2 * Copyright © 2009 Nuvoton technology corporation.
4 * Wan ZongShun <mcuos.com@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation;version 2 of the License.
12 #include <linux/slab.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/clk.h>
20 #include <linux/err.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/nand.h>
24 #include <linux/mtd/partitions.h>
26 #define REG_FMICSR 0x00
27 #define REG_SMCSR 0xa0
28 #define REG_SMISR 0xac
29 #define REG_SMCMD 0xb0
30 #define REG_SMADDR 0xb4
31 #define REG_SMDATA 0xb8
33 #define RESET_FMI 0x01
35 #define READYBUSY (0x01 << 18)
38 #define PSIZE (0x01 << 3)
39 #define DMARWEN (0x03 << 1)
40 #define BUSWID (0x01 << 4)
41 #define ECC4EN (0x01 << 5)
42 #define WP (0x01 << 24)
43 #define NANDCS (0x01 << 25)
44 #define ENDADDR (0x01 << 31)
46 #define read_data_reg(dev) \
47 __raw_readl((dev)->reg + REG_SMDATA)
49 #define write_data_reg(dev, val) \
50 __raw_writel((val), (dev)->reg + REG_SMDATA)
52 #define write_cmd_reg(dev, val) \
53 __raw_writel((val), (dev)->reg + REG_SMCMD)
55 #define write_addr_reg(dev, val) \
56 __raw_writel((val), (dev)->reg + REG_SMADDR)
60 struct nand_chip chip
;
66 static const struct mtd_partition partitions
[] = {
70 .size
= 8 * 1024 * 1024
74 .offset
= MTDPART_OFS_APPEND
,
75 .size
= MTDPART_SIZ_FULL
79 static unsigned char nuc900_nand_read_byte(struct mtd_info
*mtd
)
82 struct nuc900_nand
*nand
;
84 nand
= container_of(mtd
, struct nuc900_nand
, mtd
);
86 ret
= (unsigned char)read_data_reg(nand
);
91 static void nuc900_nand_read_buf(struct mtd_info
*mtd
,
92 unsigned char *buf
, int len
)
95 struct nuc900_nand
*nand
;
97 nand
= container_of(mtd
, struct nuc900_nand
, mtd
);
99 for (i
= 0; i
< len
; i
++)
100 buf
[i
] = (unsigned char)read_data_reg(nand
);
103 static void nuc900_nand_write_buf(struct mtd_info
*mtd
,
104 const unsigned char *buf
, int len
)
107 struct nuc900_nand
*nand
;
109 nand
= container_of(mtd
, struct nuc900_nand
, mtd
);
111 for (i
= 0; i
< len
; i
++)
112 write_data_reg(nand
, buf
[i
]);
115 static int nuc900_check_rb(struct nuc900_nand
*nand
)
118 spin_lock(&nand
->lock
);
119 val
= __raw_readl(REG_SMISR
);
121 spin_unlock(&nand
->lock
);
126 static int nuc900_nand_devready(struct mtd_info
*mtd
)
128 struct nuc900_nand
*nand
;
131 nand
= container_of(mtd
, struct nuc900_nand
, mtd
);
133 ready
= (nuc900_check_rb(nand
)) ? 1 : 0;
137 static void nuc900_nand_command_lp(struct mtd_info
*mtd
, unsigned int command
,
138 int column
, int page_addr
)
140 register struct nand_chip
*chip
= mtd
->priv
;
141 struct nuc900_nand
*nand
;
143 nand
= container_of(mtd
, struct nuc900_nand
, mtd
);
145 if (command
== NAND_CMD_READOOB
) {
146 column
+= mtd
->writesize
;
147 command
= NAND_CMD_READ0
;
150 write_cmd_reg(nand
, command
& 0xff);
152 if (column
!= -1 || page_addr
!= -1) {
155 if (chip
->options
& NAND_BUSWIDTH_16
)
157 write_addr_reg(nand
, column
);
158 write_addr_reg(nand
, column
>> 8 | ENDADDR
);
160 if (page_addr
!= -1) {
161 write_addr_reg(nand
, page_addr
);
163 if (chip
->chipsize
> (128 << 20)) {
164 write_addr_reg(nand
, page_addr
>> 8);
165 write_addr_reg(nand
, page_addr
>> 16 | ENDADDR
);
167 write_addr_reg(nand
, page_addr
>> 8 | ENDADDR
);
173 case NAND_CMD_CACHEDPROG
:
174 case NAND_CMD_PAGEPROG
:
175 case NAND_CMD_ERASE1
:
176 case NAND_CMD_ERASE2
:
179 case NAND_CMD_STATUS
:
180 case NAND_CMD_DEPLETE1
:
183 case NAND_CMD_STATUS_ERROR
:
184 case NAND_CMD_STATUS_ERROR0
:
185 case NAND_CMD_STATUS_ERROR1
:
186 case NAND_CMD_STATUS_ERROR2
:
187 case NAND_CMD_STATUS_ERROR3
:
188 udelay(chip
->chip_delay
);
194 udelay(chip
->chip_delay
);
196 write_cmd_reg(nand
, NAND_CMD_STATUS
);
197 write_cmd_reg(nand
, command
);
199 while (!nuc900_check_rb(nand
))
204 case NAND_CMD_RNDOUT
:
205 write_cmd_reg(nand
, NAND_CMD_RNDOUTSTART
);
210 write_cmd_reg(nand
, NAND_CMD_READSTART
);
213 if (!chip
->dev_ready
) {
214 udelay(chip
->chip_delay
);
219 /* Apply this short delay always to ensure that we do wait tWB in
220 * any case on any machine. */
223 while (!chip
->dev_ready(mtd
))
228 static void nuc900_nand_enable(struct nuc900_nand
*nand
)
231 spin_lock(&nand
->lock
);
232 __raw_writel(RESET_FMI
, (nand
->reg
+ REG_FMICSR
));
234 val
= __raw_readl(nand
->reg
+ REG_FMICSR
);
236 if (!(val
& NAND_EN
))
237 __raw_writel(val
| NAND_EN
, REG_FMICSR
);
239 val
= __raw_readl(nand
->reg
+ REG_SMCSR
);
241 val
&= ~(SWRST
|PSIZE
|DMARWEN
|BUSWID
|ECC4EN
|NANDCS
);
244 __raw_writel(val
, nand
->reg
+ REG_SMCSR
);
246 spin_unlock(&nand
->lock
);
249 static int nuc900_nand_probe(struct platform_device
*pdev
)
251 struct nuc900_nand
*nuc900_nand
;
252 struct nand_chip
*chip
;
254 struct resource
*res
;
258 nuc900_nand
= kzalloc(sizeof(struct nuc900_nand
), GFP_KERNEL
);
261 chip
= &(nuc900_nand
->chip
);
263 nuc900_nand
->mtd
.priv
= chip
;
264 nuc900_nand
->mtd
.owner
= THIS_MODULE
;
265 spin_lock_init(&nuc900_nand
->lock
);
267 nuc900_nand
->clk
= clk_get(&pdev
->dev
, NULL
);
268 if (IS_ERR(nuc900_nand
->clk
)) {
272 clk_enable(nuc900_nand
->clk
);
274 chip
->cmdfunc
= nuc900_nand_command_lp
;
275 chip
->dev_ready
= nuc900_nand_devready
;
276 chip
->read_byte
= nuc900_nand_read_byte
;
277 chip
->write_buf
= nuc900_nand_write_buf
;
278 chip
->read_buf
= nuc900_nand_read_buf
;
279 chip
->chip_delay
= 50;
281 chip
->ecc
.mode
= NAND_ECC_SOFT
;
283 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
289 if (!request_mem_region(res
->start
, resource_size(res
), pdev
->name
)) {
294 nuc900_nand
->reg
= ioremap(res
->start
, resource_size(res
));
295 if (!nuc900_nand
->reg
) {
300 nuc900_nand_enable(nuc900_nand
);
302 if (nand_scan(&(nuc900_nand
->mtd
), 1)) {
307 mtd_device_register(&(nuc900_nand
->mtd
), partitions
,
308 ARRAY_SIZE(partitions
));
310 platform_set_drvdata(pdev
, nuc900_nand
);
314 fail3
: iounmap(nuc900_nand
->reg
);
315 fail2
: release_mem_region(res
->start
, resource_size(res
));
316 fail1
: kfree(nuc900_nand
);
320 static int nuc900_nand_remove(struct platform_device
*pdev
)
322 struct nuc900_nand
*nuc900_nand
= platform_get_drvdata(pdev
);
323 struct resource
*res
;
325 nand_release(&nuc900_nand
->mtd
);
326 iounmap(nuc900_nand
->reg
);
328 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
329 release_mem_region(res
->start
, resource_size(res
));
331 clk_disable(nuc900_nand
->clk
);
332 clk_put(nuc900_nand
->clk
);
336 platform_set_drvdata(pdev
, NULL
);
341 static struct platform_driver nuc900_nand_driver
= {
342 .probe
= nuc900_nand_probe
,
343 .remove
= nuc900_nand_remove
,
345 .name
= "nuc900-fmi",
346 .owner
= THIS_MODULE
,
350 module_platform_driver(nuc900_nand_driver
);
352 MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
353 MODULE_DESCRIPTION("w90p910/NUC9xx nand driver!");
354 MODULE_LICENSE("GPL");
355 MODULE_ALIAS("platform:nuc900-fmi");