2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/types.h>
56 #include <linux/errno.h>
57 #include <linux/ioport.h>
58 #include <linux/pci.h>
59 #include <linux/dma-mapping.h>
60 #include <linux/kernel.h>
61 #include <linux/netdevice.h>
62 #include <linux/etherdevice.h>
63 #include <linux/skbuff.h>
64 #include <linux/init.h>
65 #include <linux/delay.h>
67 #include <linux/highmem.h>
68 #include <linux/sockios.h>
70 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
71 #include <linux/if_vlan.h>
75 #include <linux/ethtool.h>
81 #include <asm/system.h>
84 #include <asm/byteorder.h>
85 #include <asm/uaccess.h>
88 #define DRV_NAME "acenic"
92 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
93 #define ACE_IS_TIGON_I(ap) 0
94 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
96 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
97 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
100 #ifndef PCI_VENDOR_ID_ALTEON
101 #define PCI_VENDOR_ID_ALTEON 0x12ae
103 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
104 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
105 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
107 #ifndef PCI_DEVICE_ID_3COM_3C985
108 #define PCI_DEVICE_ID_3COM_3C985 0x0001
110 #ifndef PCI_VENDOR_ID_NETGEAR
111 #define PCI_VENDOR_ID_NETGEAR 0x1385
112 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
114 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
115 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
120 * Farallon used the DEC vendor ID by mistake and they seem not
123 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
124 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
126 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
127 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
129 #ifndef PCI_VENDOR_ID_SGI
130 #define PCI_VENDOR_ID_SGI 0x10a9
132 #ifndef PCI_DEVICE_ID_SGI_ACENIC
133 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
136 static struct pci_device_id acenic_pci_tbl
[] = {
137 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
,
138 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
139 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER
,
140 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
141 { PCI_VENDOR_ID_3COM
, PCI_DEVICE_ID_3COM_3C985
,
142 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
143 { PCI_VENDOR_ID_NETGEAR
, PCI_DEVICE_ID_NETGEAR_GA620
,
144 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
145 { PCI_VENDOR_ID_NETGEAR
, PCI_DEVICE_ID_NETGEAR_GA620T
,
146 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
148 * Farallon used the DEC vendor ID on their cards incorrectly,
149 * then later Alteon's ID.
151 { PCI_VENDOR_ID_DEC
, PCI_DEVICE_ID_FARALLON_PN9000SX
,
152 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
153 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_FARALLON_PN9100T
,
154 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
155 { PCI_VENDOR_ID_SGI
, PCI_DEVICE_ID_SGI_ACENIC
,
156 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
159 MODULE_DEVICE_TABLE(pci
, acenic_pci_tbl
);
161 #define ace_sync_irq(irq) synchronize_irq(irq)
163 #ifndef offset_in_page
164 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
167 #define ACE_MAX_MOD_PARMS 8
168 #define BOARD_IDX_STATIC 0
169 #define BOARD_IDX_OVERFLOW -1
171 #if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
172 defined(NETIF_F_HW_VLAN_RX)
173 #define ACENIC_DO_VLAN 1
174 #define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
176 #define ACENIC_DO_VLAN 0
177 #define ACE_RCB_VLAN_FLAG 0
183 * These must be defined before the firmware is included.
185 #define MAX_TEXT_LEN 96*1024
186 #define MAX_RODATA_LEN 8*1024
187 #define MAX_DATA_LEN 2*1024
189 #include "acenic_firmware.h"
191 #ifndef tigon2FwReleaseLocal
192 #define tigon2FwReleaseLocal 0
196 * This driver currently supports Tigon I and Tigon II based cards
197 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
198 * GA620. The driver should also work on the SGI, DEC and Farallon
199 * versions of the card, however I have not been able to test that
202 * This card is really neat, it supports receive hardware checksumming
203 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
204 * firmware. Also the programming interface is quite neat, except for
205 * the parts dealing with the i2c eeprom on the card ;-)
207 * Using jumbo frames:
209 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
210 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
211 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
212 * interface number and <MTU> being the MTU value.
216 * When compiled as a loadable module, the driver allows for a number
217 * of module parameters to be specified. The driver supports the
218 * following module parameters:
220 * trace=<val> - Firmware trace level. This requires special traced
221 * firmware to replace the firmware supplied with
222 * the driver - for debugging purposes only.
224 * link=<val> - Link state. Normally you want to use the default link
225 * parameters set by the driver. This can be used to
226 * override these in case your switch doesn't negotiate
227 * the link properly. Valid values are:
228 * 0x0001 - Force half duplex link.
229 * 0x0002 - Do not negotiate line speed with the other end.
230 * 0x0010 - 10Mbit/sec link.
231 * 0x0020 - 100Mbit/sec link.
232 * 0x0040 - 1000Mbit/sec link.
233 * 0x0100 - Do not negotiate flow control.
234 * 0x0200 - Enable RX flow control Y
235 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
236 * Default value is 0x0270, ie. enable link+flow
237 * control negotiation. Negotiating the highest
238 * possible link speed with RX flow control enabled.
240 * When disabling link speed negotiation, only one link
241 * speed is allowed to be specified!
243 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
244 * to wait for more packets to arive before
245 * interrupting the host, from the time the first
248 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
249 * to wait for more packets to arive in the transmit ring,
250 * before interrupting the host, after transmitting the
251 * first packet in the ring.
253 * max_tx_desc=<val> - maximum number of transmit descriptors
254 * (packets) transmitted before interrupting the host.
256 * max_rx_desc=<val> - maximum number of receive descriptors
257 * (packets) received before interrupting the host.
259 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
260 * increments of the NIC's on board memory to be used for
261 * transmit and receive buffers. For the 1MB NIC app. 800KB
262 * is available, on the 1/2MB NIC app. 300KB is available.
263 * 68KB will always be available as a minimum for both
264 * directions. The default value is a 50/50 split.
265 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
266 * operations, default (1) is to always disable this as
267 * that is what Alteon does on NT. I have not been able
268 * to measure any real performance differences with
269 * this on my systems. Set <val>=0 if you want to
270 * enable these operations.
272 * If you use more than one NIC, specify the parameters for the
273 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
274 * run tracing on NIC #2 but not on NIC #1 and #3.
278 * - Proper multicast support.
279 * - NIC dump support.
280 * - More tuning parameters.
282 * The mini ring is not used under Linux and I am not sure it makes sense
283 * to actually use it.
285 * New interrupt handler strategy:
287 * The old interrupt handler worked using the traditional method of
288 * replacing an skbuff with a new one when a packet arrives. However
289 * the rx rings do not need to contain a static number of buffer
290 * descriptors, thus it makes sense to move the memory allocation out
291 * of the main interrupt handler and do it in a bottom half handler
292 * and only allocate new buffers when the number of buffers in the
293 * ring is below a certain threshold. In order to avoid starving the
294 * NIC under heavy load it is however necessary to force allocation
295 * when hitting a minimum threshold. The strategy for alloction is as
298 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
299 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
300 * the buffers in the interrupt handler
301 * RX_RING_THRES - maximum number of buffers in the rx ring
302 * RX_MINI_THRES - maximum number of buffers in the mini ring
303 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
305 * One advantagous side effect of this allocation approach is that the
306 * entire rx processing can be done without holding any spin lock
307 * since the rx rings and registers are totally independent of the tx
308 * ring and its registers. This of course includes the kmalloc's of
309 * new skb's. Thus start_xmit can run in parallel with rx processing
310 * and the memory allocation on SMP systems.
312 * Note that running the skb reallocation in a bottom half opens up
313 * another can of races which needs to be handled properly. In
314 * particular it can happen that the interrupt handler tries to run
315 * the reallocation while the bottom half is either running on another
316 * CPU or was interrupted on the same CPU. To get around this the
317 * driver uses bitops to prevent the reallocation routines from being
320 * TX handling can also be done without holding any spin lock, wheee
321 * this is fun! since tx_ret_csm is only written to by the interrupt
322 * handler. The case to be aware of is when shutting down the device
323 * and cleaning up where it is necessary to make sure that
324 * start_xmit() is not running while this is happening. Well DaveM
325 * informs me that this case is already protected against ... bye bye
326 * Mr. Spin Lock, it was nice to know you.
328 * TX interrupts are now partly disabled so the NIC will only generate
329 * TX interrupts for the number of coal ticks, not for the number of
330 * TX packets in the queue. This should reduce the number of TX only,
331 * ie. when no RX processing is done, interrupts seen.
335 * Threshold values for RX buffer allocation - the low water marks for
336 * when to start refilling the rings are set to 75% of the ring
337 * sizes. It seems to make sense to refill the rings entirely from the
338 * intrrupt handler once it gets below the panic threshold, that way
339 * we don't risk that the refilling is moved to another CPU when the
340 * one running the interrupt handler just got the slab code hot in its
343 #define RX_RING_SIZE 72
344 #define RX_MINI_SIZE 64
345 #define RX_JUMBO_SIZE 48
347 #define RX_PANIC_STD_THRES 16
348 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
349 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
350 #define RX_PANIC_MINI_THRES 12
351 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
352 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
353 #define RX_PANIC_JUMBO_THRES 6
354 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
355 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
359 * Size of the mini ring entries, basically these just should be big
360 * enough to take TCP ACKs
362 #define ACE_MINI_SIZE 100
364 #define ACE_MINI_BUFSIZE ACE_MINI_SIZE
365 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
366 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
369 * There seems to be a magic difference in the effect between 995 and 996
370 * but little difference between 900 and 995 ... no idea why.
372 * There is now a default set of tuning parameters which is set, depending
373 * on whether or not the user enables Jumbo frames. It's assumed that if
374 * Jumbo frames are enabled, the user wants optimal tuning for that case.
376 #define DEF_TX_COAL 400 /* 996 */
377 #define DEF_TX_MAX_DESC 60 /* was 40 */
378 #define DEF_RX_COAL 120 /* 1000 */
379 #define DEF_RX_MAX_DESC 25
380 #define DEF_TX_RATIO 21 /* 24 */
382 #define DEF_JUMBO_TX_COAL 20
383 #define DEF_JUMBO_TX_MAX_DESC 60
384 #define DEF_JUMBO_RX_COAL 30
385 #define DEF_JUMBO_RX_MAX_DESC 6
386 #define DEF_JUMBO_TX_RATIO 21
388 #if tigon2FwReleaseLocal < 20001118
390 * Standard firmware and early modifications duplicate
391 * IRQ load without this flag (coal timer is never reset).
392 * Note that with this flag tx_coal should be less than
393 * time to xmit full tx ring.
394 * 400usec is not so bad for tx ring size of 128.
396 #define TX_COAL_INTS_ONLY 1 /* worth it */
399 * With modified firmware, this is not necessary, but still useful.
401 #define TX_COAL_INTS_ONLY 1
405 #define DEF_STAT (2 * TICKS_PER_SEC)
408 static int link_state
[ACE_MAX_MOD_PARMS
];
409 static int trace
[ACE_MAX_MOD_PARMS
];
410 static int tx_coal_tick
[ACE_MAX_MOD_PARMS
];
411 static int rx_coal_tick
[ACE_MAX_MOD_PARMS
];
412 static int max_tx_desc
[ACE_MAX_MOD_PARMS
];
413 static int max_rx_desc
[ACE_MAX_MOD_PARMS
];
414 static int tx_ratio
[ACE_MAX_MOD_PARMS
];
415 static int dis_pci_mem_inval
[ACE_MAX_MOD_PARMS
] = {1, 1, 1, 1, 1, 1, 1, 1};
417 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
418 MODULE_LICENSE("GPL");
419 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
421 module_param_array_named(link
, link_state
, int, NULL
, 0);
422 module_param_array(trace
, int, NULL
, 0);
423 module_param_array(tx_coal_tick
, int, NULL
, 0);
424 module_param_array(max_tx_desc
, int, NULL
, 0);
425 module_param_array(rx_coal_tick
, int, NULL
, 0);
426 module_param_array(max_rx_desc
, int, NULL
, 0);
427 module_param_array(tx_ratio
, int, NULL
, 0);
428 MODULE_PARM_DESC(link
, "AceNIC/3C985/NetGear link state");
429 MODULE_PARM_DESC(trace
, "AceNIC/3C985/NetGear firmware trace level");
430 MODULE_PARM_DESC(tx_coal_tick
, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
431 MODULE_PARM_DESC(max_tx_desc
, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
432 MODULE_PARM_DESC(rx_coal_tick
, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
433 MODULE_PARM_DESC(max_rx_desc
, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
434 MODULE_PARM_DESC(tx_ratio
, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
437 static char version
[] __devinitdata
=
438 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
439 " http://home.cern.ch/~jes/gige/acenic.html\n";
441 static int ace_get_settings(struct net_device
*, struct ethtool_cmd
*);
442 static int ace_set_settings(struct net_device
*, struct ethtool_cmd
*);
443 static void ace_get_drvinfo(struct net_device
*, struct ethtool_drvinfo
*);
445 static const struct ethtool_ops ace_ethtool_ops
= {
446 .get_settings
= ace_get_settings
,
447 .set_settings
= ace_set_settings
,
448 .get_drvinfo
= ace_get_drvinfo
,
451 static void ace_watchdog(struct net_device
*dev
);
453 static int __devinit
acenic_probe_one(struct pci_dev
*pdev
,
454 const struct pci_device_id
*id
)
456 struct net_device
*dev
;
457 struct ace_private
*ap
;
458 static int boards_found
;
460 dev
= alloc_etherdev(sizeof(struct ace_private
));
462 printk(KERN_ERR
"acenic: Unable to allocate "
463 "net_device structure!\n");
467 SET_NETDEV_DEV(dev
, &pdev
->dev
);
471 ap
->name
= pci_name(pdev
);
473 dev
->features
|= NETIF_F_SG
| NETIF_F_IP_CSUM
;
475 dev
->features
|= NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
;
476 dev
->vlan_rx_register
= ace_vlan_rx_register
;
479 dev
->tx_timeout
= &ace_watchdog
;
480 dev
->watchdog_timeo
= 5*HZ
;
482 dev
->open
= &ace_open
;
483 dev
->stop
= &ace_close
;
484 dev
->hard_start_xmit
= &ace_start_xmit
;
485 dev
->get_stats
= &ace_get_stats
;
486 dev
->set_multicast_list
= &ace_set_multicast_list
;
487 SET_ETHTOOL_OPS(dev
, &ace_ethtool_ops
);
488 dev
->set_mac_address
= &ace_set_mac_addr
;
489 dev
->change_mtu
= &ace_change_mtu
;
491 /* we only display this string ONCE */
495 if (pci_enable_device(pdev
))
496 goto fail_free_netdev
;
499 * Enable master mode before we start playing with the
500 * pci_command word since pci_set_master() will modify
503 pci_set_master(pdev
);
505 pci_read_config_word(pdev
, PCI_COMMAND
, &ap
->pci_command
);
507 /* OpenFirmware on Mac's does not set this - DOH.. */
508 if (!(ap
->pci_command
& PCI_COMMAND_MEMORY
)) {
509 printk(KERN_INFO
"%s: Enabling PCI Memory Mapped "
510 "access - was not enabled by BIOS/Firmware\n",
512 ap
->pci_command
= ap
->pci_command
| PCI_COMMAND_MEMORY
;
513 pci_write_config_word(ap
->pdev
, PCI_COMMAND
,
518 pci_read_config_byte(pdev
, PCI_LATENCY_TIMER
, &ap
->pci_latency
);
519 if (ap
->pci_latency
<= 0x40) {
520 ap
->pci_latency
= 0x40;
521 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, ap
->pci_latency
);
525 * Remap the regs into kernel space - this is abuse of
526 * dev->base_addr since it was means for I/O port
527 * addresses but who gives a damn.
529 dev
->base_addr
= pci_resource_start(pdev
, 0);
530 ap
->regs
= ioremap(dev
->base_addr
, 0x4000);
532 printk(KERN_ERR
"%s: Unable to map I/O register, "
533 "AceNIC %i will be disabled.\n",
534 ap
->name
, boards_found
);
535 goto fail_free_netdev
;
538 switch(pdev
->vendor
) {
539 case PCI_VENDOR_ID_ALTEON
:
540 if (pdev
->device
== PCI_DEVICE_ID_FARALLON_PN9100T
) {
541 printk(KERN_INFO
"%s: Farallon PN9100-T ",
544 printk(KERN_INFO
"%s: Alteon AceNIC ",
548 case PCI_VENDOR_ID_3COM
:
549 printk(KERN_INFO
"%s: 3Com 3C985 ", ap
->name
);
551 case PCI_VENDOR_ID_NETGEAR
:
552 printk(KERN_INFO
"%s: NetGear GA620 ", ap
->name
);
554 case PCI_VENDOR_ID_DEC
:
555 if (pdev
->device
== PCI_DEVICE_ID_FARALLON_PN9000SX
) {
556 printk(KERN_INFO
"%s: Farallon PN9000-SX ",
560 case PCI_VENDOR_ID_SGI
:
561 printk(KERN_INFO
"%s: SGI AceNIC ", ap
->name
);
564 printk(KERN_INFO
"%s: Unknown AceNIC ", ap
->name
);
568 printk("Gigabit Ethernet at 0x%08lx, ", dev
->base_addr
);
569 printk("irq %d\n", pdev
->irq
);
571 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
572 if ((readl(&ap
->regs
->HostCtrl
) >> 28) == 4) {
573 printk(KERN_ERR
"%s: Driver compiled without Tigon I"
574 " support - NIC disabled\n", dev
->name
);
579 if (ace_allocate_descriptors(dev
))
580 goto fail_free_netdev
;
583 if (boards_found
>= ACE_MAX_MOD_PARMS
)
584 ap
->board_idx
= BOARD_IDX_OVERFLOW
;
586 ap
->board_idx
= boards_found
;
588 ap
->board_idx
= BOARD_IDX_STATIC
;
592 goto fail_free_netdev
;
594 if (register_netdev(dev
)) {
595 printk(KERN_ERR
"acenic: device registration failed\n");
598 ap
->name
= dev
->name
;
600 if (ap
->pci_using_dac
)
601 dev
->features
|= NETIF_F_HIGHDMA
;
603 pci_set_drvdata(pdev
, dev
);
609 ace_init_cleanup(dev
);
615 static void __devexit
acenic_remove_one(struct pci_dev
*pdev
)
617 struct net_device
*dev
= pci_get_drvdata(pdev
);
618 struct ace_private
*ap
= netdev_priv(dev
);
619 struct ace_regs __iomem
*regs
= ap
->regs
;
622 unregister_netdev(dev
);
624 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
625 if (ap
->version
>= 2)
626 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
, ®s
->CpuBCtrl
);
629 * This clears any pending interrupts
631 writel(1, ®s
->Mb0Lo
);
632 readl(®s
->CpuCtrl
); /* flush */
635 * Make sure no other CPUs are processing interrupts
636 * on the card before the buffers are being released.
637 * Otherwise one might experience some `interesting'
640 * Then release the RX buffers - jumbo buffers were
641 * already released in ace_close().
643 ace_sync_irq(dev
->irq
);
645 for (i
= 0; i
< RX_STD_RING_ENTRIES
; i
++) {
646 struct sk_buff
*skb
= ap
->skb
->rx_std_skbuff
[i
].skb
;
649 struct ring_info
*ringp
;
652 ringp
= &ap
->skb
->rx_std_skbuff
[i
];
653 mapping
= pci_unmap_addr(ringp
, mapping
);
654 pci_unmap_page(ap
->pdev
, mapping
,
658 ap
->rx_std_ring
[i
].size
= 0;
659 ap
->skb
->rx_std_skbuff
[i
].skb
= NULL
;
664 if (ap
->version
>= 2) {
665 for (i
= 0; i
< RX_MINI_RING_ENTRIES
; i
++) {
666 struct sk_buff
*skb
= ap
->skb
->rx_mini_skbuff
[i
].skb
;
669 struct ring_info
*ringp
;
672 ringp
= &ap
->skb
->rx_mini_skbuff
[i
];
673 mapping
= pci_unmap_addr(ringp
,mapping
);
674 pci_unmap_page(ap
->pdev
, mapping
,
678 ap
->rx_mini_ring
[i
].size
= 0;
679 ap
->skb
->rx_mini_skbuff
[i
].skb
= NULL
;
685 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++) {
686 struct sk_buff
*skb
= ap
->skb
->rx_jumbo_skbuff
[i
].skb
;
688 struct ring_info
*ringp
;
691 ringp
= &ap
->skb
->rx_jumbo_skbuff
[i
];
692 mapping
= pci_unmap_addr(ringp
, mapping
);
693 pci_unmap_page(ap
->pdev
, mapping
,
697 ap
->rx_jumbo_ring
[i
].size
= 0;
698 ap
->skb
->rx_jumbo_skbuff
[i
].skb
= NULL
;
703 ace_init_cleanup(dev
);
707 static struct pci_driver acenic_pci_driver
= {
709 .id_table
= acenic_pci_tbl
,
710 .probe
= acenic_probe_one
,
711 .remove
= __devexit_p(acenic_remove_one
),
714 static int __init
acenic_init(void)
716 return pci_register_driver(&acenic_pci_driver
);
719 static void __exit
acenic_exit(void)
721 pci_unregister_driver(&acenic_pci_driver
);
724 module_init(acenic_init
);
725 module_exit(acenic_exit
);
727 static void ace_free_descriptors(struct net_device
*dev
)
729 struct ace_private
*ap
= netdev_priv(dev
);
732 if (ap
->rx_std_ring
!= NULL
) {
733 size
= (sizeof(struct rx_desc
) *
734 (RX_STD_RING_ENTRIES
+
735 RX_JUMBO_RING_ENTRIES
+
736 RX_MINI_RING_ENTRIES
+
737 RX_RETURN_RING_ENTRIES
));
738 pci_free_consistent(ap
->pdev
, size
, ap
->rx_std_ring
,
739 ap
->rx_ring_base_dma
);
740 ap
->rx_std_ring
= NULL
;
741 ap
->rx_jumbo_ring
= NULL
;
742 ap
->rx_mini_ring
= NULL
;
743 ap
->rx_return_ring
= NULL
;
745 if (ap
->evt_ring
!= NULL
) {
746 size
= (sizeof(struct event
) * EVT_RING_ENTRIES
);
747 pci_free_consistent(ap
->pdev
, size
, ap
->evt_ring
,
751 if (ap
->tx_ring
!= NULL
&& !ACE_IS_TIGON_I(ap
)) {
752 size
= (sizeof(struct tx_desc
) * MAX_TX_RING_ENTRIES
);
753 pci_free_consistent(ap
->pdev
, size
, ap
->tx_ring
,
758 if (ap
->evt_prd
!= NULL
) {
759 pci_free_consistent(ap
->pdev
, sizeof(u32
),
760 (void *)ap
->evt_prd
, ap
->evt_prd_dma
);
763 if (ap
->rx_ret_prd
!= NULL
) {
764 pci_free_consistent(ap
->pdev
, sizeof(u32
),
765 (void *)ap
->rx_ret_prd
,
767 ap
->rx_ret_prd
= NULL
;
769 if (ap
->tx_csm
!= NULL
) {
770 pci_free_consistent(ap
->pdev
, sizeof(u32
),
771 (void *)ap
->tx_csm
, ap
->tx_csm_dma
);
777 static int ace_allocate_descriptors(struct net_device
*dev
)
779 struct ace_private
*ap
= netdev_priv(dev
);
782 size
= (sizeof(struct rx_desc
) *
783 (RX_STD_RING_ENTRIES
+
784 RX_JUMBO_RING_ENTRIES
+
785 RX_MINI_RING_ENTRIES
+
786 RX_RETURN_RING_ENTRIES
));
788 ap
->rx_std_ring
= pci_alloc_consistent(ap
->pdev
, size
,
789 &ap
->rx_ring_base_dma
);
790 if (ap
->rx_std_ring
== NULL
)
793 ap
->rx_jumbo_ring
= ap
->rx_std_ring
+ RX_STD_RING_ENTRIES
;
794 ap
->rx_mini_ring
= ap
->rx_jumbo_ring
+ RX_JUMBO_RING_ENTRIES
;
795 ap
->rx_return_ring
= ap
->rx_mini_ring
+ RX_MINI_RING_ENTRIES
;
797 size
= (sizeof(struct event
) * EVT_RING_ENTRIES
);
799 ap
->evt_ring
= pci_alloc_consistent(ap
->pdev
, size
, &ap
->evt_ring_dma
);
801 if (ap
->evt_ring
== NULL
)
805 * Only allocate a host TX ring for the Tigon II, the Tigon I
806 * has to use PCI registers for this ;-(
808 if (!ACE_IS_TIGON_I(ap
)) {
809 size
= (sizeof(struct tx_desc
) * MAX_TX_RING_ENTRIES
);
811 ap
->tx_ring
= pci_alloc_consistent(ap
->pdev
, size
,
814 if (ap
->tx_ring
== NULL
)
818 ap
->evt_prd
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
820 if (ap
->evt_prd
== NULL
)
823 ap
->rx_ret_prd
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
824 &ap
->rx_ret_prd_dma
);
825 if (ap
->rx_ret_prd
== NULL
)
828 ap
->tx_csm
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
830 if (ap
->tx_csm
== NULL
)
837 ace_init_cleanup(dev
);
843 * Generic cleanup handling data allocated during init. Used when the
844 * module is unloaded or if an error occurs during initialization
846 static void ace_init_cleanup(struct net_device
*dev
)
848 struct ace_private
*ap
;
850 ap
= netdev_priv(dev
);
852 ace_free_descriptors(dev
);
855 pci_free_consistent(ap
->pdev
, sizeof(struct ace_info
),
856 ap
->info
, ap
->info_dma
);
858 kfree(ap
->trace_buf
);
861 free_irq(dev
->irq
, dev
);
868 * Commands are considered to be slow.
870 static inline void ace_issue_cmd(struct ace_regs __iomem
*regs
, struct cmd
*cmd
)
874 idx
= readl(®s
->CmdPrd
);
876 writel(*(u32
*)(cmd
), ®s
->CmdRng
[idx
]);
877 idx
= (idx
+ 1) % CMD_RING_ENTRIES
;
879 writel(idx
, ®s
->CmdPrd
);
883 static int __devinit
ace_init(struct net_device
*dev
)
885 struct ace_private
*ap
;
886 struct ace_regs __iomem
*regs
;
887 struct ace_info
*info
= NULL
;
888 struct pci_dev
*pdev
;
891 u32 tig_ver
, mac1
, mac2
, tmp
, pci_state
;
892 int board_idx
, ecode
= 0;
894 unsigned char cache_size
;
896 ap
= netdev_priv(dev
);
899 board_idx
= ap
->board_idx
;
902 * aman@sgi.com - its useful to do a NIC reset here to
903 * address the `Firmware not running' problem subsequent
904 * to any crashes involving the NIC
906 writel(HW_RESET
| (HW_RESET
<< 24), ®s
->HostCtrl
);
907 readl(®s
->HostCtrl
); /* PCI write posting */
911 * Don't access any other registers before this point!
915 * This will most likely need BYTE_SWAP once we switch
916 * to using __raw_writel()
918 writel((WORD_SWAP
| CLR_INT
| ((WORD_SWAP
| CLR_INT
) << 24)),
921 writel((CLR_INT
| WORD_SWAP
| ((CLR_INT
| WORD_SWAP
) << 24)),
924 readl(®s
->HostCtrl
); /* PCI write posting */
927 * Stop the NIC CPU and clear pending interrupts
929 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
930 readl(®s
->CpuCtrl
); /* PCI write posting */
931 writel(0, ®s
->Mb0Lo
);
933 tig_ver
= readl(®s
->HostCtrl
) >> 28;
936 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
939 printk(KERN_INFO
" Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
940 tig_ver
, tigonFwReleaseMajor
, tigonFwReleaseMinor
,
942 writel(0, ®s
->LocalCtrl
);
944 ap
->tx_ring_entries
= TIGON_I_TX_RING_ENTRIES
;
948 printk(KERN_INFO
" Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
949 tig_ver
, tigon2FwReleaseMajor
, tigon2FwReleaseMinor
,
951 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
, ®s
->CpuBCtrl
);
952 readl(®s
->CpuBCtrl
); /* PCI write posting */
954 * The SRAM bank size does _not_ indicate the amount
955 * of memory on the card, it controls the _bank_ size!
956 * Ie. a 1MB AceNIC will have two banks of 512KB.
958 writel(SRAM_BANK_512K
, ®s
->LocalCtrl
);
959 writel(SYNC_SRAM_TIMING
, ®s
->MiscCfg
);
961 ap
->tx_ring_entries
= MAX_TX_RING_ENTRIES
;
964 printk(KERN_WARNING
" Unsupported Tigon version detected "
971 * ModeStat _must_ be set after the SRAM settings as this change
972 * seems to corrupt the ModeStat and possible other registers.
973 * The SRAM settings survive resets and setting it to the same
974 * value a second time works as well. This is what caused the
975 * `Firmware not running' problem on the Tigon II.
978 writel(ACE_BYTE_SWAP_DMA
| ACE_WARN
| ACE_FATAL
| ACE_BYTE_SWAP_BD
|
979 ACE_WORD_SWAP_BD
| ACE_NO_JUMBO_FRAG
, ®s
->ModeStat
);
981 writel(ACE_BYTE_SWAP_DMA
| ACE_WARN
| ACE_FATAL
|
982 ACE_WORD_SWAP_BD
| ACE_NO_JUMBO_FRAG
, ®s
->ModeStat
);
984 readl(®s
->ModeStat
); /* PCI write posting */
987 for(i
= 0; i
< 4; i
++) {
991 t
= read_eeprom_byte(dev
, 0x8c+i
);
999 for(i
= 4; i
< 8; i
++) {
1003 t
= read_eeprom_byte(dev
, 0x8c+i
);
1011 writel(mac1
, ®s
->MacAddrHi
);
1012 writel(mac2
, ®s
->MacAddrLo
);
1014 dev
->dev_addr
[0] = (mac1
>> 8) & 0xff;
1015 dev
->dev_addr
[1] = mac1
& 0xff;
1016 dev
->dev_addr
[2] = (mac2
>> 24) & 0xff;
1017 dev
->dev_addr
[3] = (mac2
>> 16) & 0xff;
1018 dev
->dev_addr
[4] = (mac2
>> 8) & 0xff;
1019 dev
->dev_addr
[5] = mac2
& 0xff;
1021 printk("MAC: %pM\n", dev
->dev_addr
);
1024 * Looks like this is necessary to deal with on all architectures,
1025 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1026 * Ie. having two NICs in the machine, one will have the cache
1027 * line set at boot time, the other will not.
1030 pci_read_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, &cache_size
);
1032 if (cache_size
!= SMP_CACHE_BYTES
) {
1033 printk(KERN_INFO
" PCI cache line size set incorrectly "
1034 "(%i bytes) by BIOS/FW, ", cache_size
);
1035 if (cache_size
> SMP_CACHE_BYTES
)
1036 printk("expecting %i\n", SMP_CACHE_BYTES
);
1038 printk("correcting to %i\n", SMP_CACHE_BYTES
);
1039 pci_write_config_byte(pdev
, PCI_CACHE_LINE_SIZE
,
1040 SMP_CACHE_BYTES
>> 2);
1044 pci_state
= readl(®s
->PciState
);
1045 printk(KERN_INFO
" PCI bus width: %i bits, speed: %iMHz, "
1046 "latency: %i clks\n",
1047 (pci_state
& PCI_32BIT
) ? 32 : 64,
1048 (pci_state
& PCI_66MHZ
) ? 66 : 33,
1052 * Set the max DMA transfer size. Seems that for most systems
1053 * the performance is better when no MAX parameter is
1054 * set. However for systems enabling PCI write and invalidate,
1055 * DMA writes must be set to the L1 cache line size to get
1056 * optimal performance.
1058 * The default is now to turn the PCI write and invalidate off
1059 * - that is what Alteon does for NT.
1061 tmp
= READ_CMD_MEM
| WRITE_CMD_MEM
;
1062 if (ap
->version
>= 2) {
1063 tmp
|= (MEM_READ_MULTIPLE
| (pci_state
& PCI_66MHZ
));
1065 * Tuning parameters only supported for 8 cards
1067 if (board_idx
== BOARD_IDX_OVERFLOW
||
1068 dis_pci_mem_inval
[board_idx
]) {
1069 if (ap
->pci_command
& PCI_COMMAND_INVALIDATE
) {
1070 ap
->pci_command
&= ~PCI_COMMAND_INVALIDATE
;
1071 pci_write_config_word(pdev
, PCI_COMMAND
,
1073 printk(KERN_INFO
" Disabling PCI memory "
1074 "write and invalidate\n");
1076 } else if (ap
->pci_command
& PCI_COMMAND_INVALIDATE
) {
1077 printk(KERN_INFO
" PCI memory write & invalidate "
1078 "enabled by BIOS, enabling counter measures\n");
1080 switch(SMP_CACHE_BYTES
) {
1082 tmp
|= DMA_WRITE_MAX_16
;
1085 tmp
|= DMA_WRITE_MAX_32
;
1088 tmp
|= DMA_WRITE_MAX_64
;
1091 tmp
|= DMA_WRITE_MAX_128
;
1094 printk(KERN_INFO
" Cache line size %i not "
1095 "supported, PCI write and invalidate "
1096 "disabled\n", SMP_CACHE_BYTES
);
1097 ap
->pci_command
&= ~PCI_COMMAND_INVALIDATE
;
1098 pci_write_config_word(pdev
, PCI_COMMAND
,
1106 * On this platform, we know what the best dma settings
1107 * are. We use 64-byte maximum bursts, because if we
1108 * burst larger than the cache line size (or even cross
1109 * a 64byte boundary in a single burst) the UltraSparc
1110 * PCI controller will disconnect at 64-byte multiples.
1112 * Read-multiple will be properly enabled above, and when
1113 * set will give the PCI controller proper hints about
1116 tmp
&= ~DMA_READ_WRITE_MASK
;
1117 tmp
|= DMA_READ_MAX_64
;
1118 tmp
|= DMA_WRITE_MAX_64
;
1121 tmp
&= ~DMA_READ_WRITE_MASK
;
1122 tmp
|= DMA_READ_MAX_128
;
1124 * All the docs say MUST NOT. Well, I did.
1125 * Nothing terrible happens, if we load wrong size.
1126 * Bit w&i still works better!
1128 tmp
|= DMA_WRITE_MAX_128
;
1130 writel(tmp
, ®s
->PciState
);
1134 * The Host PCI bus controller driver has to set FBB.
1135 * If all devices on that PCI bus support FBB, then the controller
1136 * can enable FBB support in the Host PCI Bus controller (or on
1137 * the PCI-PCI bridge if that applies).
1141 * I have received reports from people having problems when this
1144 if (!(ap
->pci_command
& PCI_COMMAND_FAST_BACK
)) {
1145 printk(KERN_INFO
" Enabling PCI Fast Back to Back\n");
1146 ap
->pci_command
|= PCI_COMMAND_FAST_BACK
;
1147 pci_write_config_word(pdev
, PCI_COMMAND
, ap
->pci_command
);
1152 * Configure DMA attributes.
1154 if (!pci_set_dma_mask(pdev
, DMA_64BIT_MASK
)) {
1155 ap
->pci_using_dac
= 1;
1156 } else if (!pci_set_dma_mask(pdev
, DMA_32BIT_MASK
)) {
1157 ap
->pci_using_dac
= 0;
1164 * Initialize the generic info block and the command+event rings
1165 * and the control blocks for the transmit and receive rings
1166 * as they need to be setup once and for all.
1168 if (!(info
= pci_alloc_consistent(ap
->pdev
, sizeof(struct ace_info
),
1176 * Get the memory for the skb rings.
1178 if (!(ap
->skb
= kmalloc(sizeof(struct ace_skb
), GFP_KERNEL
))) {
1183 ecode
= request_irq(pdev
->irq
, ace_interrupt
, IRQF_SHARED
,
1186 printk(KERN_WARNING
"%s: Requested IRQ %d is busy\n",
1187 DRV_NAME
, pdev
->irq
);
1190 dev
->irq
= pdev
->irq
;
1193 spin_lock_init(&ap
->debug_lock
);
1194 ap
->last_tx
= ACE_TX_RING_ENTRIES(ap
) - 1;
1195 ap
->last_std_rx
= 0;
1196 ap
->last_mini_rx
= 0;
1199 memset(ap
->info
, 0, sizeof(struct ace_info
));
1200 memset(ap
->skb
, 0, sizeof(struct ace_skb
));
1202 ace_load_firmware(dev
);
1205 tmp_ptr
= ap
->info_dma
;
1206 writel(tmp_ptr
>> 32, ®s
->InfoPtrHi
);
1207 writel(tmp_ptr
& 0xffffffff, ®s
->InfoPtrLo
);
1209 memset(ap
->evt_ring
, 0, EVT_RING_ENTRIES
* sizeof(struct event
));
1211 set_aceaddr(&info
->evt_ctrl
.rngptr
, ap
->evt_ring_dma
);
1212 info
->evt_ctrl
.flags
= 0;
1216 set_aceaddr(&info
->evt_prd_ptr
, ap
->evt_prd_dma
);
1217 writel(0, ®s
->EvtCsm
);
1219 set_aceaddr(&info
->cmd_ctrl
.rngptr
, 0x100);
1220 info
->cmd_ctrl
.flags
= 0;
1221 info
->cmd_ctrl
.max_len
= 0;
1223 for (i
= 0; i
< CMD_RING_ENTRIES
; i
++)
1224 writel(0, ®s
->CmdRng
[i
]);
1226 writel(0, ®s
->CmdPrd
);
1227 writel(0, ®s
->CmdCsm
);
1229 tmp_ptr
= ap
->info_dma
;
1230 tmp_ptr
+= (unsigned long) &(((struct ace_info
*)0)->s
.stats
);
1231 set_aceaddr(&info
->stats2_ptr
, (dma_addr_t
) tmp_ptr
);
1233 set_aceaddr(&info
->rx_std_ctrl
.rngptr
, ap
->rx_ring_base_dma
);
1234 info
->rx_std_ctrl
.max_len
= ACE_STD_BUFSIZE
;
1235 info
->rx_std_ctrl
.flags
=
1236 RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| ACE_RCB_VLAN_FLAG
;
1238 memset(ap
->rx_std_ring
, 0,
1239 RX_STD_RING_ENTRIES
* sizeof(struct rx_desc
));
1241 for (i
= 0; i
< RX_STD_RING_ENTRIES
; i
++)
1242 ap
->rx_std_ring
[i
].flags
= BD_FLG_TCP_UDP_SUM
;
1244 ap
->rx_std_skbprd
= 0;
1245 atomic_set(&ap
->cur_rx_bufs
, 0);
1247 set_aceaddr(&info
->rx_jumbo_ctrl
.rngptr
,
1248 (ap
->rx_ring_base_dma
+
1249 (sizeof(struct rx_desc
) * RX_STD_RING_ENTRIES
)));
1250 info
->rx_jumbo_ctrl
.max_len
= 0;
1251 info
->rx_jumbo_ctrl
.flags
=
1252 RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| ACE_RCB_VLAN_FLAG
;
1254 memset(ap
->rx_jumbo_ring
, 0,
1255 RX_JUMBO_RING_ENTRIES
* sizeof(struct rx_desc
));
1257 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++)
1258 ap
->rx_jumbo_ring
[i
].flags
= BD_FLG_TCP_UDP_SUM
| BD_FLG_JUMBO
;
1260 ap
->rx_jumbo_skbprd
= 0;
1261 atomic_set(&ap
->cur_jumbo_bufs
, 0);
1263 memset(ap
->rx_mini_ring
, 0,
1264 RX_MINI_RING_ENTRIES
* sizeof(struct rx_desc
));
1266 if (ap
->version
>= 2) {
1267 set_aceaddr(&info
->rx_mini_ctrl
.rngptr
,
1268 (ap
->rx_ring_base_dma
+
1269 (sizeof(struct rx_desc
) *
1270 (RX_STD_RING_ENTRIES
+
1271 RX_JUMBO_RING_ENTRIES
))));
1272 info
->rx_mini_ctrl
.max_len
= ACE_MINI_SIZE
;
1273 info
->rx_mini_ctrl
.flags
=
1274 RCB_FLG_TCP_UDP_SUM
|RCB_FLG_NO_PSEUDO_HDR
|ACE_RCB_VLAN_FLAG
;
1276 for (i
= 0; i
< RX_MINI_RING_ENTRIES
; i
++)
1277 ap
->rx_mini_ring
[i
].flags
=
1278 BD_FLG_TCP_UDP_SUM
| BD_FLG_MINI
;
1280 set_aceaddr(&info
->rx_mini_ctrl
.rngptr
, 0);
1281 info
->rx_mini_ctrl
.flags
= RCB_FLG_RNG_DISABLE
;
1282 info
->rx_mini_ctrl
.max_len
= 0;
1285 ap
->rx_mini_skbprd
= 0;
1286 atomic_set(&ap
->cur_mini_bufs
, 0);
1288 set_aceaddr(&info
->rx_return_ctrl
.rngptr
,
1289 (ap
->rx_ring_base_dma
+
1290 (sizeof(struct rx_desc
) *
1291 (RX_STD_RING_ENTRIES
+
1292 RX_JUMBO_RING_ENTRIES
+
1293 RX_MINI_RING_ENTRIES
))));
1294 info
->rx_return_ctrl
.flags
= 0;
1295 info
->rx_return_ctrl
.max_len
= RX_RETURN_RING_ENTRIES
;
1297 memset(ap
->rx_return_ring
, 0,
1298 RX_RETURN_RING_ENTRIES
* sizeof(struct rx_desc
));
1300 set_aceaddr(&info
->rx_ret_prd_ptr
, ap
->rx_ret_prd_dma
);
1301 *(ap
->rx_ret_prd
) = 0;
1303 writel(TX_RING_BASE
, ®s
->WinBase
);
1305 if (ACE_IS_TIGON_I(ap
)) {
1306 ap
->tx_ring
= (__force
struct tx_desc
*) regs
->Window
;
1307 for (i
= 0; i
< (TIGON_I_TX_RING_ENTRIES
1308 * sizeof(struct tx_desc
)) / sizeof(u32
); i
++)
1309 writel(0, (__force
void __iomem
*)ap
->tx_ring
+ i
* 4);
1311 set_aceaddr(&info
->tx_ctrl
.rngptr
, TX_RING_BASE
);
1313 memset(ap
->tx_ring
, 0,
1314 MAX_TX_RING_ENTRIES
* sizeof(struct tx_desc
));
1316 set_aceaddr(&info
->tx_ctrl
.rngptr
, ap
->tx_ring_dma
);
1319 info
->tx_ctrl
.max_len
= ACE_TX_RING_ENTRIES(ap
);
1320 tmp
= RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| ACE_RCB_VLAN_FLAG
;
1323 * The Tigon I does not like having the TX ring in host memory ;-(
1325 if (!ACE_IS_TIGON_I(ap
))
1326 tmp
|= RCB_FLG_TX_HOST_RING
;
1327 #if TX_COAL_INTS_ONLY
1328 tmp
|= RCB_FLG_COAL_INT_ONLY
;
1330 info
->tx_ctrl
.flags
= tmp
;
1332 set_aceaddr(&info
->tx_csm_ptr
, ap
->tx_csm_dma
);
1335 * Potential item for tuning parameter
1338 writel(DMA_THRESH_16W
, ®s
->DmaReadCfg
);
1339 writel(DMA_THRESH_16W
, ®s
->DmaWriteCfg
);
1341 writel(DMA_THRESH_8W
, ®s
->DmaReadCfg
);
1342 writel(DMA_THRESH_8W
, ®s
->DmaWriteCfg
);
1345 writel(0, ®s
->MaskInt
);
1346 writel(1, ®s
->IfIdx
);
1349 * McKinley boxes do not like us fiddling with AssistState
1352 writel(1, ®s
->AssistState
);
1355 writel(DEF_STAT
, ®s
->TuneStatTicks
);
1356 writel(DEF_TRACE
, ®s
->TuneTrace
);
1358 ace_set_rxtx_parms(dev
, 0);
1360 if (board_idx
== BOARD_IDX_OVERFLOW
) {
1361 printk(KERN_WARNING
"%s: more than %i NICs detected, "
1362 "ignoring module parameters!\n",
1363 ap
->name
, ACE_MAX_MOD_PARMS
);
1364 } else if (board_idx
>= 0) {
1365 if (tx_coal_tick
[board_idx
])
1366 writel(tx_coal_tick
[board_idx
],
1367 ®s
->TuneTxCoalTicks
);
1368 if (max_tx_desc
[board_idx
])
1369 writel(max_tx_desc
[board_idx
], ®s
->TuneMaxTxDesc
);
1371 if (rx_coal_tick
[board_idx
])
1372 writel(rx_coal_tick
[board_idx
],
1373 ®s
->TuneRxCoalTicks
);
1374 if (max_rx_desc
[board_idx
])
1375 writel(max_rx_desc
[board_idx
], ®s
->TuneMaxRxDesc
);
1377 if (trace
[board_idx
])
1378 writel(trace
[board_idx
], ®s
->TuneTrace
);
1380 if ((tx_ratio
[board_idx
] > 0) && (tx_ratio
[board_idx
] < 64))
1381 writel(tx_ratio
[board_idx
], ®s
->TxBufRat
);
1385 * Default link parameters
1387 tmp
= LNK_ENABLE
| LNK_FULL_DUPLEX
| LNK_1000MB
| LNK_100MB
|
1388 LNK_10MB
| LNK_RX_FLOW_CTL_Y
| LNK_NEG_FCTL
| LNK_NEGOTIATE
;
1389 if(ap
->version
>= 2)
1390 tmp
|= LNK_TX_FLOW_CTL_Y
;
1393 * Override link default parameters
1395 if ((board_idx
>= 0) && link_state
[board_idx
]) {
1396 int option
= link_state
[board_idx
];
1400 if (option
& 0x01) {
1401 printk(KERN_INFO
"%s: Setting half duplex link\n",
1403 tmp
&= ~LNK_FULL_DUPLEX
;
1406 tmp
&= ~LNK_NEGOTIATE
;
1413 if ((option
& 0x70) == 0) {
1414 printk(KERN_WARNING
"%s: No media speed specified, "
1415 "forcing auto negotiation\n", ap
->name
);
1416 tmp
|= LNK_NEGOTIATE
| LNK_1000MB
|
1417 LNK_100MB
| LNK_10MB
;
1419 if ((option
& 0x100) == 0)
1420 tmp
|= LNK_NEG_FCTL
;
1422 printk(KERN_INFO
"%s: Disabling flow control "
1423 "negotiation\n", ap
->name
);
1425 tmp
|= LNK_RX_FLOW_CTL_Y
;
1426 if ((option
& 0x400) && (ap
->version
>= 2)) {
1427 printk(KERN_INFO
"%s: Enabling TX flow control\n",
1429 tmp
|= LNK_TX_FLOW_CTL_Y
;
1434 writel(tmp
, ®s
->TuneLink
);
1435 if (ap
->version
>= 2)
1436 writel(tmp
, ®s
->TuneFastLink
);
1438 if (ACE_IS_TIGON_I(ap
))
1439 writel(tigonFwStartAddr
, ®s
->Pc
);
1440 if (ap
->version
== 2)
1441 writel(tigon2FwStartAddr
, ®s
->Pc
);
1443 writel(0, ®s
->Mb0Lo
);
1446 * Set tx_csm before we start receiving interrupts, otherwise
1447 * the interrupt handler might think it is supposed to process
1448 * tx ints before we are up and running, which may cause a null
1449 * pointer access in the int handler.
1452 ap
->tx_prd
= *(ap
->tx_csm
) = ap
->tx_ret_csm
= 0;
1455 ace_set_txprd(regs
, ap
, 0);
1456 writel(0, ®s
->RxRetCsm
);
1459 * Enable DMA engine now.
1460 * If we do this sooner, Mckinley box pukes.
1461 * I assume it's because Tigon II DMA engine wants to check
1462 * *something* even before the CPU is started.
1464 writel(1, ®s
->AssistState
); /* enable DMA */
1469 writel(readl(®s
->CpuCtrl
) & ~(CPU_HALT
|CPU_TRACE
), ®s
->CpuCtrl
);
1470 readl(®s
->CpuCtrl
);
1473 * Wait for the firmware to spin up - max 3 seconds.
1475 myjif
= jiffies
+ 3 * HZ
;
1476 while (time_before(jiffies
, myjif
) && !ap
->fw_running
)
1479 if (!ap
->fw_running
) {
1480 printk(KERN_ERR
"%s: Firmware NOT running!\n", ap
->name
);
1483 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
1484 readl(®s
->CpuCtrl
);
1486 /* aman@sgi.com - account for badly behaving firmware/NIC:
1487 * - have observed that the NIC may continue to generate
1488 * interrupts for some reason; attempt to stop it - halt
1489 * second CPU for Tigon II cards, and also clear Mb0
1490 * - if we're a module, we'll fail to load if this was
1491 * the only GbE card in the system => if the kernel does
1492 * see an interrupt from the NIC, code to handle it is
1493 * gone and OOps! - so free_irq also
1495 if (ap
->version
>= 2)
1496 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
,
1498 writel(0, ®s
->Mb0Lo
);
1499 readl(®s
->Mb0Lo
);
1506 * We load the ring here as there seem to be no way to tell the
1507 * firmware to wipe the ring without re-initializing it.
1509 if (!test_and_set_bit(0, &ap
->std_refill_busy
))
1510 ace_load_std_rx_ring(ap
, RX_RING_SIZE
);
1512 printk(KERN_ERR
"%s: Someone is busy refilling the RX ring\n",
1514 if (ap
->version
>= 2) {
1515 if (!test_and_set_bit(0, &ap
->mini_refill_busy
))
1516 ace_load_mini_rx_ring(ap
, RX_MINI_SIZE
);
1518 printk(KERN_ERR
"%s: Someone is busy refilling "
1519 "the RX mini ring\n", ap
->name
);
1524 ace_init_cleanup(dev
);
1529 static void ace_set_rxtx_parms(struct net_device
*dev
, int jumbo
)
1531 struct ace_private
*ap
= netdev_priv(dev
);
1532 struct ace_regs __iomem
*regs
= ap
->regs
;
1533 int board_idx
= ap
->board_idx
;
1535 if (board_idx
>= 0) {
1537 if (!tx_coal_tick
[board_idx
])
1538 writel(DEF_TX_COAL
, ®s
->TuneTxCoalTicks
);
1539 if (!max_tx_desc
[board_idx
])
1540 writel(DEF_TX_MAX_DESC
, ®s
->TuneMaxTxDesc
);
1541 if (!rx_coal_tick
[board_idx
])
1542 writel(DEF_RX_COAL
, ®s
->TuneRxCoalTicks
);
1543 if (!max_rx_desc
[board_idx
])
1544 writel(DEF_RX_MAX_DESC
, ®s
->TuneMaxRxDesc
);
1545 if (!tx_ratio
[board_idx
])
1546 writel(DEF_TX_RATIO
, ®s
->TxBufRat
);
1548 if (!tx_coal_tick
[board_idx
])
1549 writel(DEF_JUMBO_TX_COAL
,
1550 ®s
->TuneTxCoalTicks
);
1551 if (!max_tx_desc
[board_idx
])
1552 writel(DEF_JUMBO_TX_MAX_DESC
,
1553 ®s
->TuneMaxTxDesc
);
1554 if (!rx_coal_tick
[board_idx
])
1555 writel(DEF_JUMBO_RX_COAL
,
1556 ®s
->TuneRxCoalTicks
);
1557 if (!max_rx_desc
[board_idx
])
1558 writel(DEF_JUMBO_RX_MAX_DESC
,
1559 ®s
->TuneMaxRxDesc
);
1560 if (!tx_ratio
[board_idx
])
1561 writel(DEF_JUMBO_TX_RATIO
, ®s
->TxBufRat
);
1567 static void ace_watchdog(struct net_device
*data
)
1569 struct net_device
*dev
= data
;
1570 struct ace_private
*ap
= netdev_priv(dev
);
1571 struct ace_regs __iomem
*regs
= ap
->regs
;
1574 * We haven't received a stats update event for more than 2.5
1575 * seconds and there is data in the transmit queue, thus we
1576 * asume the card is stuck.
1578 if (*ap
->tx_csm
!= ap
->tx_ret_csm
) {
1579 printk(KERN_WARNING
"%s: Transmitter is stuck, %08x\n",
1580 dev
->name
, (unsigned int)readl(®s
->HostCtrl
));
1581 /* This can happen due to ieee flow control. */
1583 printk(KERN_DEBUG
"%s: BUG... transmitter died. Kicking it.\n",
1586 netif_wake_queue(dev
);
1592 static void ace_tasklet(unsigned long dev
)
1594 struct ace_private
*ap
= netdev_priv((struct net_device
*)dev
);
1597 cur_size
= atomic_read(&ap
->cur_rx_bufs
);
1598 if ((cur_size
< RX_LOW_STD_THRES
) &&
1599 !test_and_set_bit(0, &ap
->std_refill_busy
)) {
1601 printk("refilling buffers (current %i)\n", cur_size
);
1603 ace_load_std_rx_ring(ap
, RX_RING_SIZE
- cur_size
);
1606 if (ap
->version
>= 2) {
1607 cur_size
= atomic_read(&ap
->cur_mini_bufs
);
1608 if ((cur_size
< RX_LOW_MINI_THRES
) &&
1609 !test_and_set_bit(0, &ap
->mini_refill_busy
)) {
1611 printk("refilling mini buffers (current %i)\n",
1614 ace_load_mini_rx_ring(ap
, RX_MINI_SIZE
- cur_size
);
1618 cur_size
= atomic_read(&ap
->cur_jumbo_bufs
);
1619 if (ap
->jumbo
&& (cur_size
< RX_LOW_JUMBO_THRES
) &&
1620 !test_and_set_bit(0, &ap
->jumbo_refill_busy
)) {
1622 printk("refilling jumbo buffers (current %i)\n", cur_size
);
1624 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
- cur_size
);
1626 ap
->tasklet_pending
= 0;
1631 * Copy the contents of the NIC's trace buffer to kernel memory.
1633 static void ace_dump_trace(struct ace_private
*ap
)
1637 if (!(ap
->trace_buf
= kmalloc(ACE_TRACE_SIZE
, GFP_KERNEL
)))
1644 * Load the standard rx ring.
1646 * Loading rings is safe without holding the spin lock since this is
1647 * done only before the device is enabled, thus no interrupts are
1648 * generated and by the interrupt handler/tasklet handler.
1650 static void ace_load_std_rx_ring(struct ace_private
*ap
, int nr_bufs
)
1652 struct ace_regs __iomem
*regs
= ap
->regs
;
1656 prefetchw(&ap
->cur_rx_bufs
);
1658 idx
= ap
->rx_std_skbprd
;
1660 for (i
= 0; i
< nr_bufs
; i
++) {
1661 struct sk_buff
*skb
;
1665 skb
= alloc_skb(ACE_STD_BUFSIZE
+ NET_IP_ALIGN
, GFP_ATOMIC
);
1669 skb_reserve(skb
, NET_IP_ALIGN
);
1670 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1671 offset_in_page(skb
->data
),
1673 PCI_DMA_FROMDEVICE
);
1674 ap
->skb
->rx_std_skbuff
[idx
].skb
= skb
;
1675 pci_unmap_addr_set(&ap
->skb
->rx_std_skbuff
[idx
],
1678 rd
= &ap
->rx_std_ring
[idx
];
1679 set_aceaddr(&rd
->addr
, mapping
);
1680 rd
->size
= ACE_STD_BUFSIZE
;
1682 idx
= (idx
+ 1) % RX_STD_RING_ENTRIES
;
1688 atomic_add(i
, &ap
->cur_rx_bufs
);
1689 ap
->rx_std_skbprd
= idx
;
1691 if (ACE_IS_TIGON_I(ap
)) {
1693 cmd
.evt
= C_SET_RX_PRD_IDX
;
1695 cmd
.idx
= ap
->rx_std_skbprd
;
1696 ace_issue_cmd(regs
, &cmd
);
1698 writel(idx
, ®s
->RxStdPrd
);
1703 clear_bit(0, &ap
->std_refill_busy
);
1707 printk(KERN_INFO
"Out of memory when allocating "
1708 "standard receive buffers\n");
1713 static void ace_load_mini_rx_ring(struct ace_private
*ap
, int nr_bufs
)
1715 struct ace_regs __iomem
*regs
= ap
->regs
;
1718 prefetchw(&ap
->cur_mini_bufs
);
1720 idx
= ap
->rx_mini_skbprd
;
1721 for (i
= 0; i
< nr_bufs
; i
++) {
1722 struct sk_buff
*skb
;
1726 skb
= alloc_skb(ACE_MINI_BUFSIZE
+ NET_IP_ALIGN
, GFP_ATOMIC
);
1730 skb_reserve(skb
, NET_IP_ALIGN
);
1731 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1732 offset_in_page(skb
->data
),
1734 PCI_DMA_FROMDEVICE
);
1735 ap
->skb
->rx_mini_skbuff
[idx
].skb
= skb
;
1736 pci_unmap_addr_set(&ap
->skb
->rx_mini_skbuff
[idx
],
1739 rd
= &ap
->rx_mini_ring
[idx
];
1740 set_aceaddr(&rd
->addr
, mapping
);
1741 rd
->size
= ACE_MINI_BUFSIZE
;
1743 idx
= (idx
+ 1) % RX_MINI_RING_ENTRIES
;
1749 atomic_add(i
, &ap
->cur_mini_bufs
);
1751 ap
->rx_mini_skbprd
= idx
;
1753 writel(idx
, ®s
->RxMiniPrd
);
1757 clear_bit(0, &ap
->mini_refill_busy
);
1760 printk(KERN_INFO
"Out of memory when allocating "
1761 "mini receive buffers\n");
1767 * Load the jumbo rx ring, this may happen at any time if the MTU
1768 * is changed to a value > 1500.
1770 static void ace_load_jumbo_rx_ring(struct ace_private
*ap
, int nr_bufs
)
1772 struct ace_regs __iomem
*regs
= ap
->regs
;
1775 idx
= ap
->rx_jumbo_skbprd
;
1777 for (i
= 0; i
< nr_bufs
; i
++) {
1778 struct sk_buff
*skb
;
1782 skb
= alloc_skb(ACE_JUMBO_BUFSIZE
+ NET_IP_ALIGN
, GFP_ATOMIC
);
1786 skb_reserve(skb
, NET_IP_ALIGN
);
1787 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1788 offset_in_page(skb
->data
),
1790 PCI_DMA_FROMDEVICE
);
1791 ap
->skb
->rx_jumbo_skbuff
[idx
].skb
= skb
;
1792 pci_unmap_addr_set(&ap
->skb
->rx_jumbo_skbuff
[idx
],
1795 rd
= &ap
->rx_jumbo_ring
[idx
];
1796 set_aceaddr(&rd
->addr
, mapping
);
1797 rd
->size
= ACE_JUMBO_BUFSIZE
;
1799 idx
= (idx
+ 1) % RX_JUMBO_RING_ENTRIES
;
1805 atomic_add(i
, &ap
->cur_jumbo_bufs
);
1806 ap
->rx_jumbo_skbprd
= idx
;
1808 if (ACE_IS_TIGON_I(ap
)) {
1810 cmd
.evt
= C_SET_RX_JUMBO_PRD_IDX
;
1812 cmd
.idx
= ap
->rx_jumbo_skbprd
;
1813 ace_issue_cmd(regs
, &cmd
);
1815 writel(idx
, ®s
->RxJumboPrd
);
1820 clear_bit(0, &ap
->jumbo_refill_busy
);
1823 if (net_ratelimit())
1824 printk(KERN_INFO
"Out of memory when allocating "
1825 "jumbo receive buffers\n");
1831 * All events are considered to be slow (RX/TX ints do not generate
1832 * events) and are handled here, outside the main interrupt handler,
1833 * to reduce the size of the handler.
1835 static u32
ace_handle_event(struct net_device
*dev
, u32 evtcsm
, u32 evtprd
)
1837 struct ace_private
*ap
;
1839 ap
= netdev_priv(dev
);
1841 while (evtcsm
!= evtprd
) {
1842 switch (ap
->evt_ring
[evtcsm
].evt
) {
1844 printk(KERN_INFO
"%s: Firmware up and running\n",
1849 case E_STATS_UPDATED
:
1853 u16 code
= ap
->evt_ring
[evtcsm
].code
;
1857 u32 state
= readl(&ap
->regs
->GigLnkState
);
1858 printk(KERN_WARNING
"%s: Optical link UP "
1859 "(%s Duplex, Flow Control: %s%s)\n",
1861 state
& LNK_FULL_DUPLEX
? "Full":"Half",
1862 state
& LNK_TX_FLOW_CTL_Y
? "TX " : "",
1863 state
& LNK_RX_FLOW_CTL_Y
? "RX" : "");
1867 printk(KERN_WARNING
"%s: Optical link DOWN\n",
1870 case E_C_LINK_10_100
:
1871 printk(KERN_WARNING
"%s: 10/100BaseT link "
1875 printk(KERN_ERR
"%s: Unknown optical link "
1876 "state %02x\n", ap
->name
, code
);
1881 switch(ap
->evt_ring
[evtcsm
].code
) {
1882 case E_C_ERR_INVAL_CMD
:
1883 printk(KERN_ERR
"%s: invalid command error\n",
1886 case E_C_ERR_UNIMP_CMD
:
1887 printk(KERN_ERR
"%s: unimplemented command "
1888 "error\n", ap
->name
);
1890 case E_C_ERR_BAD_CFG
:
1891 printk(KERN_ERR
"%s: bad config error\n",
1895 printk(KERN_ERR
"%s: unknown error %02x\n",
1896 ap
->name
, ap
->evt_ring
[evtcsm
].code
);
1899 case E_RESET_JUMBO_RNG
:
1902 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++) {
1903 if (ap
->skb
->rx_jumbo_skbuff
[i
].skb
) {
1904 ap
->rx_jumbo_ring
[i
].size
= 0;
1905 set_aceaddr(&ap
->rx_jumbo_ring
[i
].addr
, 0);
1906 dev_kfree_skb(ap
->skb
->rx_jumbo_skbuff
[i
].skb
);
1907 ap
->skb
->rx_jumbo_skbuff
[i
].skb
= NULL
;
1911 if (ACE_IS_TIGON_I(ap
)) {
1913 cmd
.evt
= C_SET_RX_JUMBO_PRD_IDX
;
1916 ace_issue_cmd(ap
->regs
, &cmd
);
1918 writel(0, &((ap
->regs
)->RxJumboPrd
));
1923 ap
->rx_jumbo_skbprd
= 0;
1924 printk(KERN_INFO
"%s: Jumbo ring flushed\n",
1926 clear_bit(0, &ap
->jumbo_refill_busy
);
1930 printk(KERN_ERR
"%s: Unhandled event 0x%02x\n",
1931 ap
->name
, ap
->evt_ring
[evtcsm
].evt
);
1933 evtcsm
= (evtcsm
+ 1) % EVT_RING_ENTRIES
;
1940 static void ace_rx_int(struct net_device
*dev
, u32 rxretprd
, u32 rxretcsm
)
1942 struct ace_private
*ap
= netdev_priv(dev
);
1944 int mini_count
= 0, std_count
= 0;
1948 prefetchw(&ap
->cur_rx_bufs
);
1949 prefetchw(&ap
->cur_mini_bufs
);
1951 while (idx
!= rxretprd
) {
1952 struct ring_info
*rip
;
1953 struct sk_buff
*skb
;
1954 struct rx_desc
*rxdesc
, *retdesc
;
1956 int bd_flags
, desc_type
, mapsize
;
1960 /* make sure the rx descriptor isn't read before rxretprd */
1961 if (idx
== rxretcsm
)
1964 retdesc
= &ap
->rx_return_ring
[idx
];
1965 skbidx
= retdesc
->idx
;
1966 bd_flags
= retdesc
->flags
;
1967 desc_type
= bd_flags
& (BD_FLG_JUMBO
| BD_FLG_MINI
);
1971 * Normal frames do not have any flags set
1973 * Mini and normal frames arrive frequently,
1974 * so use a local counter to avoid doing
1975 * atomic operations for each packet arriving.
1978 rip
= &ap
->skb
->rx_std_skbuff
[skbidx
];
1979 mapsize
= ACE_STD_BUFSIZE
;
1980 rxdesc
= &ap
->rx_std_ring
[skbidx
];
1984 rip
= &ap
->skb
->rx_jumbo_skbuff
[skbidx
];
1985 mapsize
= ACE_JUMBO_BUFSIZE
;
1986 rxdesc
= &ap
->rx_jumbo_ring
[skbidx
];
1987 atomic_dec(&ap
->cur_jumbo_bufs
);
1990 rip
= &ap
->skb
->rx_mini_skbuff
[skbidx
];
1991 mapsize
= ACE_MINI_BUFSIZE
;
1992 rxdesc
= &ap
->rx_mini_ring
[skbidx
];
1996 printk(KERN_INFO
"%s: unknown frame type (0x%02x) "
1997 "returned by NIC\n", dev
->name
,
2004 pci_unmap_page(ap
->pdev
,
2005 pci_unmap_addr(rip
, mapping
),
2007 PCI_DMA_FROMDEVICE
);
2008 skb_put(skb
, retdesc
->size
);
2013 csum
= retdesc
->tcp_udp_csum
;
2015 skb
->protocol
= eth_type_trans(skb
, dev
);
2018 * Instead of forcing the poor tigon mips cpu to calculate
2019 * pseudo hdr checksum, we do this ourselves.
2021 if (bd_flags
& BD_FLG_TCP_UDP_SUM
) {
2022 skb
->csum
= htons(csum
);
2023 skb
->ip_summed
= CHECKSUM_COMPLETE
;
2025 skb
->ip_summed
= CHECKSUM_NONE
;
2030 if (ap
->vlgrp
&& (bd_flags
& BD_FLG_VLAN_TAG
)) {
2031 vlan_hwaccel_rx(skb
, ap
->vlgrp
, retdesc
->vlan
);
2036 dev
->last_rx
= jiffies
;
2037 dev
->stats
.rx_packets
++;
2038 dev
->stats
.rx_bytes
+= retdesc
->size
;
2040 idx
= (idx
+ 1) % RX_RETURN_RING_ENTRIES
;
2043 atomic_sub(std_count
, &ap
->cur_rx_bufs
);
2044 if (!ACE_IS_TIGON_I(ap
))
2045 atomic_sub(mini_count
, &ap
->cur_mini_bufs
);
2049 * According to the documentation RxRetCsm is obsolete with
2050 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2052 if (ACE_IS_TIGON_I(ap
)) {
2053 writel(idx
, &ap
->regs
->RxRetCsm
);
2064 static inline void ace_tx_int(struct net_device
*dev
,
2067 struct ace_private
*ap
= netdev_priv(dev
);
2070 struct sk_buff
*skb
;
2072 struct tx_ring_info
*info
;
2074 info
= ap
->skb
->tx_skbuff
+ idx
;
2076 mapping
= pci_unmap_addr(info
, mapping
);
2079 pci_unmap_page(ap
->pdev
, mapping
,
2080 pci_unmap_len(info
, maplen
),
2082 pci_unmap_addr_set(info
, mapping
, 0);
2086 dev
->stats
.tx_packets
++;
2087 dev
->stats
.tx_bytes
+= skb
->len
;
2088 dev_kfree_skb_irq(skb
);
2092 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2093 } while (idx
!= txcsm
);
2095 if (netif_queue_stopped(dev
))
2096 netif_wake_queue(dev
);
2099 ap
->tx_ret_csm
= txcsm
;
2101 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2103 * We could try to make it before. In this case we would get
2104 * the following race condition: hard_start_xmit on other cpu
2105 * enters after we advanced tx_ret_csm and fills space,
2106 * which we have just freed, so that we make illegal device wakeup.
2107 * There is no good way to workaround this (at entry
2108 * to ace_start_xmit detects this condition and prevents
2109 * ring corruption, but it is not a good workaround.)
2111 * When tx_ret_csm is advanced after, we wake up device _only_
2112 * if we really have some space in ring (though the core doing
2113 * hard_start_xmit can see full ring for some period and has to
2114 * synchronize.) Superb.
2115 * BUT! We get another subtle race condition. hard_start_xmit
2116 * may think that ring is full between wakeup and advancing
2117 * tx_ret_csm and will stop device instantly! It is not so bad.
2118 * We are guaranteed that there is something in ring, so that
2119 * the next irq will resume transmission. To speedup this we could
2120 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2121 * (see ace_start_xmit).
2123 * Well, this dilemma exists in all lock-free devices.
2124 * We, following scheme used in drivers by Donald Becker,
2125 * select the least dangerous.
2131 static irqreturn_t
ace_interrupt(int irq
, void *dev_id
)
2133 struct net_device
*dev
= (struct net_device
*)dev_id
;
2134 struct ace_private
*ap
= netdev_priv(dev
);
2135 struct ace_regs __iomem
*regs
= ap
->regs
;
2137 u32 txcsm
, rxretcsm
, rxretprd
;
2141 * In case of PCI shared interrupts or spurious interrupts,
2142 * we want to make sure it is actually our interrupt before
2143 * spending any time in here.
2145 if (!(readl(®s
->HostCtrl
) & IN_INT
))
2149 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2150 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2151 * writel(0, ®s->Mb0Lo).
2153 * "IRQ avoidance" recommended in docs applies to IRQs served
2154 * threads and it is wrong even for that case.
2156 writel(0, ®s
->Mb0Lo
);
2157 readl(®s
->Mb0Lo
);
2160 * There is no conflict between transmit handling in
2161 * start_xmit and receive processing, thus there is no reason
2162 * to take a spin lock for RX handling. Wait until we start
2163 * working on the other stuff - hey we don't need a spin lock
2166 rxretprd
= *ap
->rx_ret_prd
;
2167 rxretcsm
= ap
->cur_rx
;
2169 if (rxretprd
!= rxretcsm
)
2170 ace_rx_int(dev
, rxretprd
, rxretcsm
);
2172 txcsm
= *ap
->tx_csm
;
2173 idx
= ap
->tx_ret_csm
;
2177 * If each skb takes only one descriptor this check degenerates
2178 * to identity, because new space has just been opened.
2179 * But if skbs are fragmented we must check that this index
2180 * update releases enough of space, otherwise we just
2181 * wait for device to make more work.
2183 if (!tx_ring_full(ap
, txcsm
, ap
->tx_prd
))
2184 ace_tx_int(dev
, txcsm
, idx
);
2187 evtcsm
= readl(®s
->EvtCsm
);
2188 evtprd
= *ap
->evt_prd
;
2190 if (evtcsm
!= evtprd
) {
2191 evtcsm
= ace_handle_event(dev
, evtcsm
, evtprd
);
2192 writel(evtcsm
, ®s
->EvtCsm
);
2196 * This has to go last in the interrupt handler and run with
2197 * the spin lock released ... what lock?
2199 if (netif_running(dev
)) {
2201 int run_tasklet
= 0;
2203 cur_size
= atomic_read(&ap
->cur_rx_bufs
);
2204 if (cur_size
< RX_LOW_STD_THRES
) {
2205 if ((cur_size
< RX_PANIC_STD_THRES
) &&
2206 !test_and_set_bit(0, &ap
->std_refill_busy
)) {
2208 printk("low on std buffers %i\n", cur_size
);
2210 ace_load_std_rx_ring(ap
,
2211 RX_RING_SIZE
- cur_size
);
2216 if (!ACE_IS_TIGON_I(ap
)) {
2217 cur_size
= atomic_read(&ap
->cur_mini_bufs
);
2218 if (cur_size
< RX_LOW_MINI_THRES
) {
2219 if ((cur_size
< RX_PANIC_MINI_THRES
) &&
2220 !test_and_set_bit(0,
2221 &ap
->mini_refill_busy
)) {
2223 printk("low on mini buffers %i\n",
2226 ace_load_mini_rx_ring(ap
, RX_MINI_SIZE
- cur_size
);
2233 cur_size
= atomic_read(&ap
->cur_jumbo_bufs
);
2234 if (cur_size
< RX_LOW_JUMBO_THRES
) {
2235 if ((cur_size
< RX_PANIC_JUMBO_THRES
) &&
2236 !test_and_set_bit(0,
2237 &ap
->jumbo_refill_busy
)){
2239 printk("low on jumbo buffers %i\n",
2242 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
- cur_size
);
2247 if (run_tasklet
&& !ap
->tasklet_pending
) {
2248 ap
->tasklet_pending
= 1;
2249 tasklet_schedule(&ap
->ace_tasklet
);
2258 static void ace_vlan_rx_register(struct net_device
*dev
, struct vlan_group
*grp
)
2260 struct ace_private
*ap
= netdev_priv(dev
);
2261 unsigned long flags
;
2263 local_irq_save(flags
);
2268 ace_unmask_irq(dev
);
2269 local_irq_restore(flags
);
2271 #endif /* ACENIC_DO_VLAN */
2274 static int ace_open(struct net_device
*dev
)
2276 struct ace_private
*ap
= netdev_priv(dev
);
2277 struct ace_regs __iomem
*regs
= ap
->regs
;
2280 if (!(ap
->fw_running
)) {
2281 printk(KERN_WARNING
"%s: Firmware not running!\n", dev
->name
);
2285 writel(dev
->mtu
+ ETH_HLEN
+ 4, ®s
->IfMtu
);
2287 cmd
.evt
= C_CLEAR_STATS
;
2290 ace_issue_cmd(regs
, &cmd
);
2292 cmd
.evt
= C_HOST_STATE
;
2293 cmd
.code
= C_C_STACK_UP
;
2295 ace_issue_cmd(regs
, &cmd
);
2298 !test_and_set_bit(0, &ap
->jumbo_refill_busy
))
2299 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
);
2301 if (dev
->flags
& IFF_PROMISC
) {
2302 cmd
.evt
= C_SET_PROMISC_MODE
;
2303 cmd
.code
= C_C_PROMISC_ENABLE
;
2305 ace_issue_cmd(regs
, &cmd
);
2313 cmd
.evt
= C_LNK_NEGOTIATION
;
2316 ace_issue_cmd(regs
, &cmd
);
2319 netif_start_queue(dev
);
2322 * Setup the bottom half rx ring refill handler
2324 tasklet_init(&ap
->ace_tasklet
, ace_tasklet
, (unsigned long)dev
);
2329 static int ace_close(struct net_device
*dev
)
2331 struct ace_private
*ap
= netdev_priv(dev
);
2332 struct ace_regs __iomem
*regs
= ap
->regs
;
2334 unsigned long flags
;
2338 * Without (or before) releasing irq and stopping hardware, this
2339 * is an absolute non-sense, by the way. It will be reset instantly
2342 netif_stop_queue(dev
);
2346 cmd
.evt
= C_SET_PROMISC_MODE
;
2347 cmd
.code
= C_C_PROMISC_DISABLE
;
2349 ace_issue_cmd(regs
, &cmd
);
2353 cmd
.evt
= C_HOST_STATE
;
2354 cmd
.code
= C_C_STACK_DOWN
;
2356 ace_issue_cmd(regs
, &cmd
);
2358 tasklet_kill(&ap
->ace_tasklet
);
2361 * Make sure one CPU is not processing packets while
2362 * buffers are being released by another.
2365 local_irq_save(flags
);
2368 for (i
= 0; i
< ACE_TX_RING_ENTRIES(ap
); i
++) {
2369 struct sk_buff
*skb
;
2371 struct tx_ring_info
*info
;
2373 info
= ap
->skb
->tx_skbuff
+ i
;
2375 mapping
= pci_unmap_addr(info
, mapping
);
2378 if (ACE_IS_TIGON_I(ap
)) {
2379 /* NB: TIGON_1 is special, tx_ring is in io space */
2380 struct tx_desc __iomem
*tx
;
2381 tx
= (__force
struct tx_desc __iomem
*) &ap
->tx_ring
[i
];
2382 writel(0, &tx
->addr
.addrhi
);
2383 writel(0, &tx
->addr
.addrlo
);
2384 writel(0, &tx
->flagsize
);
2386 memset(ap
->tx_ring
+ i
, 0,
2387 sizeof(struct tx_desc
));
2388 pci_unmap_page(ap
->pdev
, mapping
,
2389 pci_unmap_len(info
, maplen
),
2391 pci_unmap_addr_set(info
, mapping
, 0);
2400 cmd
.evt
= C_RESET_JUMBO_RNG
;
2403 ace_issue_cmd(regs
, &cmd
);
2406 ace_unmask_irq(dev
);
2407 local_irq_restore(flags
);
2413 static inline dma_addr_t
2414 ace_map_tx_skb(struct ace_private
*ap
, struct sk_buff
*skb
,
2415 struct sk_buff
*tail
, u32 idx
)
2418 struct tx_ring_info
*info
;
2420 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
2421 offset_in_page(skb
->data
),
2422 skb
->len
, PCI_DMA_TODEVICE
);
2424 info
= ap
->skb
->tx_skbuff
+ idx
;
2426 pci_unmap_addr_set(info
, mapping
, mapping
);
2427 pci_unmap_len_set(info
, maplen
, skb
->len
);
2433 ace_load_tx_bd(struct ace_private
*ap
, struct tx_desc
*desc
, u64 addr
,
2434 u32 flagsize
, u32 vlan_tag
)
2436 #if !USE_TX_COAL_NOW
2437 flagsize
&= ~BD_FLG_COAL_NOW
;
2440 if (ACE_IS_TIGON_I(ap
)) {
2441 struct tx_desc __iomem
*io
= (__force
struct tx_desc __iomem
*) desc
;
2442 writel(addr
>> 32, &io
->addr
.addrhi
);
2443 writel(addr
& 0xffffffff, &io
->addr
.addrlo
);
2444 writel(flagsize
, &io
->flagsize
);
2446 writel(vlan_tag
, &io
->vlanres
);
2449 desc
->addr
.addrhi
= addr
>> 32;
2450 desc
->addr
.addrlo
= addr
;
2451 desc
->flagsize
= flagsize
;
2453 desc
->vlanres
= vlan_tag
;
2459 static int ace_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2461 struct ace_private
*ap
= netdev_priv(dev
);
2462 struct ace_regs __iomem
*regs
= ap
->regs
;
2463 struct tx_desc
*desc
;
2465 unsigned long maxjiff
= jiffies
+ 3*HZ
;
2470 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2473 if (!skb_shinfo(skb
)->nr_frags
) {
2477 mapping
= ace_map_tx_skb(ap
, skb
, skb
, idx
);
2478 flagsize
= (skb
->len
<< 16) | (BD_FLG_END
);
2479 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2480 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2482 if (vlan_tx_tag_present(skb
)) {
2483 flagsize
|= BD_FLG_VLAN_TAG
;
2484 vlan_tag
= vlan_tx_tag_get(skb
);
2487 desc
= ap
->tx_ring
+ idx
;
2488 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2490 /* Look at ace_tx_int for explanations. */
2491 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2492 flagsize
|= BD_FLG_COAL_NOW
;
2494 ace_load_tx_bd(ap
, desc
, mapping
, flagsize
, vlan_tag
);
2500 mapping
= ace_map_tx_skb(ap
, skb
, NULL
, idx
);
2501 flagsize
= (skb_headlen(skb
) << 16);
2502 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2503 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2505 if (vlan_tx_tag_present(skb
)) {
2506 flagsize
|= BD_FLG_VLAN_TAG
;
2507 vlan_tag
= vlan_tx_tag_get(skb
);
2511 ace_load_tx_bd(ap
, ap
->tx_ring
+ idx
, mapping
, flagsize
, vlan_tag
);
2513 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2515 for (i
= 0; i
< skb_shinfo(skb
)->nr_frags
; i
++) {
2516 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
2517 struct tx_ring_info
*info
;
2520 info
= ap
->skb
->tx_skbuff
+ idx
;
2521 desc
= ap
->tx_ring
+ idx
;
2523 mapping
= pci_map_page(ap
->pdev
, frag
->page
,
2524 frag
->page_offset
, frag
->size
,
2527 flagsize
= (frag
->size
<< 16);
2528 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2529 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2530 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2532 if (i
== skb_shinfo(skb
)->nr_frags
- 1) {
2533 flagsize
|= BD_FLG_END
;
2534 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2535 flagsize
|= BD_FLG_COAL_NOW
;
2538 * Only the last fragment frees
2545 pci_unmap_addr_set(info
, mapping
, mapping
);
2546 pci_unmap_len_set(info
, maplen
, frag
->size
);
2547 ace_load_tx_bd(ap
, desc
, mapping
, flagsize
, vlan_tag
);
2553 ace_set_txprd(regs
, ap
, idx
);
2555 if (flagsize
& BD_FLG_COAL_NOW
) {
2556 netif_stop_queue(dev
);
2559 * A TX-descriptor producer (an IRQ) might have gotten
2560 * inbetween, making the ring free again. Since xmit is
2561 * serialized, this is the only situation we have to
2564 if (!tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2565 netif_wake_queue(dev
);
2568 dev
->trans_start
= jiffies
;
2569 return NETDEV_TX_OK
;
2573 * This race condition is unavoidable with lock-free drivers.
2574 * We wake up the queue _before_ tx_prd is advanced, so that we can
2575 * enter hard_start_xmit too early, while tx ring still looks closed.
2576 * This happens ~1-4 times per 100000 packets, so that we can allow
2577 * to loop syncing to other CPU. Probably, we need an additional
2578 * wmb() in ace_tx_intr as well.
2580 * Note that this race is relieved by reserving one more entry
2581 * in tx ring than it is necessary (see original non-SG driver).
2582 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2583 * is already overkill.
2585 * Alternative is to return with 1 not throttling queue. In this
2586 * case loop becomes longer, no more useful effects.
2588 if (time_before(jiffies
, maxjiff
)) {
2594 /* The ring is stuck full. */
2595 printk(KERN_WARNING
"%s: Transmit ring stuck full\n", dev
->name
);
2596 return NETDEV_TX_BUSY
;
2600 static int ace_change_mtu(struct net_device
*dev
, int new_mtu
)
2602 struct ace_private
*ap
= netdev_priv(dev
);
2603 struct ace_regs __iomem
*regs
= ap
->regs
;
2605 if (new_mtu
> ACE_JUMBO_MTU
)
2608 writel(new_mtu
+ ETH_HLEN
+ 4, ®s
->IfMtu
);
2611 if (new_mtu
> ACE_STD_MTU
) {
2613 printk(KERN_INFO
"%s: Enabling Jumbo frame "
2614 "support\n", dev
->name
);
2616 if (!test_and_set_bit(0, &ap
->jumbo_refill_busy
))
2617 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
);
2618 ace_set_rxtx_parms(dev
, 1);
2621 while (test_and_set_bit(0, &ap
->jumbo_refill_busy
));
2622 ace_sync_irq(dev
->irq
);
2623 ace_set_rxtx_parms(dev
, 0);
2627 cmd
.evt
= C_RESET_JUMBO_RNG
;
2630 ace_issue_cmd(regs
, &cmd
);
2637 static int ace_get_settings(struct net_device
*dev
, struct ethtool_cmd
*ecmd
)
2639 struct ace_private
*ap
= netdev_priv(dev
);
2640 struct ace_regs __iomem
*regs
= ap
->regs
;
2643 memset(ecmd
, 0, sizeof(struct ethtool_cmd
));
2645 (SUPPORTED_10baseT_Half
| SUPPORTED_10baseT_Full
|
2646 SUPPORTED_100baseT_Half
| SUPPORTED_100baseT_Full
|
2647 SUPPORTED_1000baseT_Half
| SUPPORTED_1000baseT_Full
|
2648 SUPPORTED_Autoneg
| SUPPORTED_FIBRE
);
2650 ecmd
->port
= PORT_FIBRE
;
2651 ecmd
->transceiver
= XCVR_INTERNAL
;
2653 link
= readl(®s
->GigLnkState
);
2654 if (link
& LNK_1000MB
)
2655 ecmd
->speed
= SPEED_1000
;
2657 link
= readl(®s
->FastLnkState
);
2658 if (link
& LNK_100MB
)
2659 ecmd
->speed
= SPEED_100
;
2660 else if (link
& LNK_10MB
)
2661 ecmd
->speed
= SPEED_10
;
2665 if (link
& LNK_FULL_DUPLEX
)
2666 ecmd
->duplex
= DUPLEX_FULL
;
2668 ecmd
->duplex
= DUPLEX_HALF
;
2670 if (link
& LNK_NEGOTIATE
)
2671 ecmd
->autoneg
= AUTONEG_ENABLE
;
2673 ecmd
->autoneg
= AUTONEG_DISABLE
;
2677 * Current struct ethtool_cmd is insufficient
2679 ecmd
->trace
= readl(®s
->TuneTrace
);
2681 ecmd
->txcoal
= readl(®s
->TuneTxCoalTicks
);
2682 ecmd
->rxcoal
= readl(®s
->TuneRxCoalTicks
);
2684 ecmd
->maxtxpkt
= readl(®s
->TuneMaxTxDesc
);
2685 ecmd
->maxrxpkt
= readl(®s
->TuneMaxRxDesc
);
2690 static int ace_set_settings(struct net_device
*dev
, struct ethtool_cmd
*ecmd
)
2692 struct ace_private
*ap
= netdev_priv(dev
);
2693 struct ace_regs __iomem
*regs
= ap
->regs
;
2696 link
= readl(®s
->GigLnkState
);
2697 if (link
& LNK_1000MB
)
2700 link
= readl(®s
->FastLnkState
);
2701 if (link
& LNK_100MB
)
2703 else if (link
& LNK_10MB
)
2709 link
= LNK_ENABLE
| LNK_1000MB
| LNK_100MB
| LNK_10MB
|
2710 LNK_RX_FLOW_CTL_Y
| LNK_NEG_FCTL
;
2711 if (!ACE_IS_TIGON_I(ap
))
2712 link
|= LNK_TX_FLOW_CTL_Y
;
2713 if (ecmd
->autoneg
== AUTONEG_ENABLE
)
2714 link
|= LNK_NEGOTIATE
;
2715 if (ecmd
->speed
!= speed
) {
2716 link
&= ~(LNK_1000MB
| LNK_100MB
| LNK_10MB
);
2730 if (ecmd
->duplex
== DUPLEX_FULL
)
2731 link
|= LNK_FULL_DUPLEX
;
2733 if (link
!= ap
->link
) {
2735 printk(KERN_INFO
"%s: Renegotiating link state\n",
2739 writel(link
, ®s
->TuneLink
);
2740 if (!ACE_IS_TIGON_I(ap
))
2741 writel(link
, ®s
->TuneFastLink
);
2744 cmd
.evt
= C_LNK_NEGOTIATION
;
2747 ace_issue_cmd(regs
, &cmd
);
2752 static void ace_get_drvinfo(struct net_device
*dev
,
2753 struct ethtool_drvinfo
*info
)
2755 struct ace_private
*ap
= netdev_priv(dev
);
2757 strlcpy(info
->driver
, "acenic", sizeof(info
->driver
));
2758 snprintf(info
->version
, sizeof(info
->version
), "%i.%i.%i",
2759 tigonFwReleaseMajor
, tigonFwReleaseMinor
,
2763 strlcpy(info
->bus_info
, pci_name(ap
->pdev
),
2764 sizeof(info
->bus_info
));
2769 * Set the hardware MAC address.
2771 static int ace_set_mac_addr(struct net_device
*dev
, void *p
)
2773 struct ace_private
*ap
= netdev_priv(dev
);
2774 struct ace_regs __iomem
*regs
= ap
->regs
;
2775 struct sockaddr
*addr
=p
;
2779 if(netif_running(dev
))
2782 memcpy(dev
->dev_addr
, addr
->sa_data
,dev
->addr_len
);
2784 da
= (u8
*)dev
->dev_addr
;
2786 writel(da
[0] << 8 | da
[1], ®s
->MacAddrHi
);
2787 writel((da
[2] << 24) | (da
[3] << 16) | (da
[4] << 8) | da
[5],
2790 cmd
.evt
= C_SET_MAC_ADDR
;
2793 ace_issue_cmd(regs
, &cmd
);
2799 static void ace_set_multicast_list(struct net_device
*dev
)
2801 struct ace_private
*ap
= netdev_priv(dev
);
2802 struct ace_regs __iomem
*regs
= ap
->regs
;
2805 if ((dev
->flags
& IFF_ALLMULTI
) && !(ap
->mcast_all
)) {
2806 cmd
.evt
= C_SET_MULTICAST_MODE
;
2807 cmd
.code
= C_C_MCAST_ENABLE
;
2809 ace_issue_cmd(regs
, &cmd
);
2811 } else if (ap
->mcast_all
) {
2812 cmd
.evt
= C_SET_MULTICAST_MODE
;
2813 cmd
.code
= C_C_MCAST_DISABLE
;
2815 ace_issue_cmd(regs
, &cmd
);
2819 if ((dev
->flags
& IFF_PROMISC
) && !(ap
->promisc
)) {
2820 cmd
.evt
= C_SET_PROMISC_MODE
;
2821 cmd
.code
= C_C_PROMISC_ENABLE
;
2823 ace_issue_cmd(regs
, &cmd
);
2825 }else if (!(dev
->flags
& IFF_PROMISC
) && (ap
->promisc
)) {
2826 cmd
.evt
= C_SET_PROMISC_MODE
;
2827 cmd
.code
= C_C_PROMISC_DISABLE
;
2829 ace_issue_cmd(regs
, &cmd
);
2834 * For the time being multicast relies on the upper layers
2835 * filtering it properly. The Firmware does not allow one to
2836 * set the entire multicast list at a time and keeping track of
2837 * it here is going to be messy.
2839 if ((dev
->mc_count
) && !(ap
->mcast_all
)) {
2840 cmd
.evt
= C_SET_MULTICAST_MODE
;
2841 cmd
.code
= C_C_MCAST_ENABLE
;
2843 ace_issue_cmd(regs
, &cmd
);
2844 }else if (!ap
->mcast_all
) {
2845 cmd
.evt
= C_SET_MULTICAST_MODE
;
2846 cmd
.code
= C_C_MCAST_DISABLE
;
2848 ace_issue_cmd(regs
, &cmd
);
2853 static struct net_device_stats
*ace_get_stats(struct net_device
*dev
)
2855 struct ace_private
*ap
= netdev_priv(dev
);
2856 struct ace_mac_stats __iomem
*mac_stats
=
2857 (struct ace_mac_stats __iomem
*)ap
->regs
->Stats
;
2859 dev
->stats
.rx_missed_errors
= readl(&mac_stats
->drop_space
);
2860 dev
->stats
.multicast
= readl(&mac_stats
->kept_mc
);
2861 dev
->stats
.collisions
= readl(&mac_stats
->coll
);
2867 static void __devinit
ace_copy(struct ace_regs __iomem
*regs
, void *src
,
2870 void __iomem
*tdest
;
2878 tsize
= min_t(u32
, ((~dest
& (ACE_WINDOW_SIZE
- 1)) + 1),
2879 min_t(u32
, size
, ACE_WINDOW_SIZE
));
2880 tdest
= (void __iomem
*) ®s
->Window
+
2881 (dest
& (ACE_WINDOW_SIZE
- 1));
2882 writel(dest
& ~(ACE_WINDOW_SIZE
- 1), ®s
->WinBase
);
2884 * This requires byte swapping on big endian, however
2885 * writel does that for us
2888 for (i
= 0; i
< (tsize
/ 4); i
++) {
2889 writel(wsrc
[i
], tdest
+ i
*4);
2900 static void __devinit
ace_clear(struct ace_regs __iomem
*regs
, u32 dest
, int size
)
2902 void __iomem
*tdest
;
2909 tsize
= min_t(u32
, ((~dest
& (ACE_WINDOW_SIZE
- 1)) + 1),
2910 min_t(u32
, size
, ACE_WINDOW_SIZE
));
2911 tdest
= (void __iomem
*) ®s
->Window
+
2912 (dest
& (ACE_WINDOW_SIZE
- 1));
2913 writel(dest
& ~(ACE_WINDOW_SIZE
- 1), ®s
->WinBase
);
2915 for (i
= 0; i
< (tsize
/ 4); i
++) {
2916 writel(0, tdest
+ i
*4);
2928 * Download the firmware into the SRAM on the NIC
2930 * This operation requires the NIC to be halted and is performed with
2931 * interrupts disabled and with the spinlock hold.
2933 static int __devinit
ace_load_firmware(struct net_device
*dev
)
2935 struct ace_private
*ap
= netdev_priv(dev
);
2936 struct ace_regs __iomem
*regs
= ap
->regs
;
2938 if (!(readl(®s
->CpuCtrl
) & CPU_HALTED
)) {
2939 printk(KERN_ERR
"%s: trying to download firmware while the "
2940 "CPU is running!\n", ap
->name
);
2945 * Do not try to clear more than 512KB or we end up seeing
2946 * funny things on NICs with only 512KB SRAM
2948 ace_clear(regs
, 0x2000, 0x80000-0x2000);
2949 if (ACE_IS_TIGON_I(ap
)) {
2950 ace_copy(regs
, tigonFwText
, tigonFwTextAddr
, tigonFwTextLen
);
2951 ace_copy(regs
, tigonFwData
, tigonFwDataAddr
, tigonFwDataLen
);
2952 ace_copy(regs
, tigonFwRodata
, tigonFwRodataAddr
,
2954 ace_clear(regs
, tigonFwBssAddr
, tigonFwBssLen
);
2955 ace_clear(regs
, tigonFwSbssAddr
, tigonFwSbssLen
);
2956 }else if (ap
->version
== 2) {
2957 ace_clear(regs
, tigon2FwBssAddr
, tigon2FwBssLen
);
2958 ace_clear(regs
, tigon2FwSbssAddr
, tigon2FwSbssLen
);
2959 ace_copy(regs
, tigon2FwText
, tigon2FwTextAddr
,tigon2FwTextLen
);
2960 ace_copy(regs
, tigon2FwRodata
, tigon2FwRodataAddr
,
2962 ace_copy(regs
, tigon2FwData
, tigon2FwDataAddr
,tigon2FwDataLen
);
2970 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
2972 * Accessing the EEPROM is `interesting' to say the least - don't read
2973 * this code right after dinner.
2975 * This is all about black magic and bit-banging the device .... I
2976 * wonder in what hospital they have put the guy who designed the i2c
2979 * Oh yes, this is only the beginning!
2981 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
2982 * code i2c readout code by beta testing all my hacks.
2984 static void __devinit
eeprom_start(struct ace_regs __iomem
*regs
)
2988 readl(®s
->LocalCtrl
);
2989 udelay(ACE_SHORT_DELAY
);
2990 local
= readl(®s
->LocalCtrl
);
2991 local
|= EEPROM_DATA_OUT
| EEPROM_WRITE_ENABLE
;
2992 writel(local
, ®s
->LocalCtrl
);
2993 readl(®s
->LocalCtrl
);
2995 udelay(ACE_SHORT_DELAY
);
2996 local
|= EEPROM_CLK_OUT
;
2997 writel(local
, ®s
->LocalCtrl
);
2998 readl(®s
->LocalCtrl
);
3000 udelay(ACE_SHORT_DELAY
);
3001 local
&= ~EEPROM_DATA_OUT
;
3002 writel(local
, ®s
->LocalCtrl
);
3003 readl(®s
->LocalCtrl
);
3005 udelay(ACE_SHORT_DELAY
);
3006 local
&= ~EEPROM_CLK_OUT
;
3007 writel(local
, ®s
->LocalCtrl
);
3008 readl(®s
->LocalCtrl
);
3013 static void __devinit
eeprom_prep(struct ace_regs __iomem
*regs
, u8 magic
)
3018 udelay(ACE_SHORT_DELAY
);
3019 local
= readl(®s
->LocalCtrl
);
3020 local
&= ~EEPROM_DATA_OUT
;
3021 local
|= EEPROM_WRITE_ENABLE
;
3022 writel(local
, ®s
->LocalCtrl
);
3023 readl(®s
->LocalCtrl
);
3026 for (i
= 0; i
< 8; i
++, magic
<<= 1) {
3027 udelay(ACE_SHORT_DELAY
);
3029 local
|= EEPROM_DATA_OUT
;
3031 local
&= ~EEPROM_DATA_OUT
;
3032 writel(local
, ®s
->LocalCtrl
);
3033 readl(®s
->LocalCtrl
);
3036 udelay(ACE_SHORT_DELAY
);
3037 local
|= EEPROM_CLK_OUT
;
3038 writel(local
, ®s
->LocalCtrl
);
3039 readl(®s
->LocalCtrl
);
3041 udelay(ACE_SHORT_DELAY
);
3042 local
&= ~(EEPROM_CLK_OUT
| EEPROM_DATA_OUT
);
3043 writel(local
, ®s
->LocalCtrl
);
3044 readl(®s
->LocalCtrl
);
3050 static int __devinit
eeprom_check_ack(struct ace_regs __iomem
*regs
)
3055 local
= readl(®s
->LocalCtrl
);
3056 local
&= ~EEPROM_WRITE_ENABLE
;
3057 writel(local
, ®s
->LocalCtrl
);
3058 readl(®s
->LocalCtrl
);
3060 udelay(ACE_LONG_DELAY
);
3061 local
|= EEPROM_CLK_OUT
;
3062 writel(local
, ®s
->LocalCtrl
);
3063 readl(®s
->LocalCtrl
);
3065 udelay(ACE_SHORT_DELAY
);
3066 /* sample data in middle of high clk */
3067 state
= (readl(®s
->LocalCtrl
) & EEPROM_DATA_IN
) != 0;
3068 udelay(ACE_SHORT_DELAY
);
3070 writel(readl(®s
->LocalCtrl
) & ~EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3071 readl(®s
->LocalCtrl
);
3078 static void __devinit
eeprom_stop(struct ace_regs __iomem
*regs
)
3082 udelay(ACE_SHORT_DELAY
);
3083 local
= readl(®s
->LocalCtrl
);
3084 local
|= EEPROM_WRITE_ENABLE
;
3085 writel(local
, ®s
->LocalCtrl
);
3086 readl(®s
->LocalCtrl
);
3088 udelay(ACE_SHORT_DELAY
);
3089 local
&= ~EEPROM_DATA_OUT
;
3090 writel(local
, ®s
->LocalCtrl
);
3091 readl(®s
->LocalCtrl
);
3093 udelay(ACE_SHORT_DELAY
);
3094 local
|= EEPROM_CLK_OUT
;
3095 writel(local
, ®s
->LocalCtrl
);
3096 readl(®s
->LocalCtrl
);
3098 udelay(ACE_SHORT_DELAY
);
3099 local
|= EEPROM_DATA_OUT
;
3100 writel(local
, ®s
->LocalCtrl
);
3101 readl(®s
->LocalCtrl
);
3103 udelay(ACE_LONG_DELAY
);
3104 local
&= ~EEPROM_CLK_OUT
;
3105 writel(local
, ®s
->LocalCtrl
);
3111 * Read a whole byte from the EEPROM.
3113 static int __devinit
read_eeprom_byte(struct net_device
*dev
,
3114 unsigned long offset
)
3116 struct ace_private
*ap
= netdev_priv(dev
);
3117 struct ace_regs __iomem
*regs
= ap
->regs
;
3118 unsigned long flags
;
3124 * Don't take interrupts on this CPU will bit banging
3125 * the %#%#@$ I2C device
3127 local_irq_save(flags
);
3131 eeprom_prep(regs
, EEPROM_WRITE_SELECT
);
3132 if (eeprom_check_ack(regs
)) {
3133 local_irq_restore(flags
);
3134 printk(KERN_ERR
"%s: Unable to sync eeprom\n", ap
->name
);
3136 goto eeprom_read_error
;
3139 eeprom_prep(regs
, (offset
>> 8) & 0xff);
3140 if (eeprom_check_ack(regs
)) {
3141 local_irq_restore(flags
);
3142 printk(KERN_ERR
"%s: Unable to set address byte 0\n",
3145 goto eeprom_read_error
;
3148 eeprom_prep(regs
, offset
& 0xff);
3149 if (eeprom_check_ack(regs
)) {
3150 local_irq_restore(flags
);
3151 printk(KERN_ERR
"%s: Unable to set address byte 1\n",
3154 goto eeprom_read_error
;
3158 eeprom_prep(regs
, EEPROM_READ_SELECT
);
3159 if (eeprom_check_ack(regs
)) {
3160 local_irq_restore(flags
);
3161 printk(KERN_ERR
"%s: Unable to set READ_SELECT\n",
3164 goto eeprom_read_error
;
3167 for (i
= 0; i
< 8; i
++) {
3168 local
= readl(®s
->LocalCtrl
);
3169 local
&= ~EEPROM_WRITE_ENABLE
;
3170 writel(local
, ®s
->LocalCtrl
);
3171 readl(®s
->LocalCtrl
);
3172 udelay(ACE_LONG_DELAY
);
3174 local
|= EEPROM_CLK_OUT
;
3175 writel(local
, ®s
->LocalCtrl
);
3176 readl(®s
->LocalCtrl
);
3178 udelay(ACE_SHORT_DELAY
);
3179 /* sample data mid high clk */
3180 result
= (result
<< 1) |
3181 ((readl(®s
->LocalCtrl
) & EEPROM_DATA_IN
) != 0);
3182 udelay(ACE_SHORT_DELAY
);
3184 local
= readl(®s
->LocalCtrl
);
3185 local
&= ~EEPROM_CLK_OUT
;
3186 writel(local
, ®s
->LocalCtrl
);
3187 readl(®s
->LocalCtrl
);
3188 udelay(ACE_SHORT_DELAY
);
3191 local
|= EEPROM_WRITE_ENABLE
;
3192 writel(local
, ®s
->LocalCtrl
);
3193 readl(®s
->LocalCtrl
);
3195 udelay(ACE_SHORT_DELAY
);
3199 local
|= EEPROM_DATA_OUT
;
3200 writel(local
, ®s
->LocalCtrl
);
3201 readl(®s
->LocalCtrl
);
3203 udelay(ACE_SHORT_DELAY
);
3204 writel(readl(®s
->LocalCtrl
) | EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3205 readl(®s
->LocalCtrl
);
3206 udelay(ACE_LONG_DELAY
);
3207 writel(readl(®s
->LocalCtrl
) & ~EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3208 readl(®s
->LocalCtrl
);
3210 udelay(ACE_SHORT_DELAY
);
3213 local_irq_restore(flags
);
3218 printk(KERN_ERR
"%s: Unable to read eeprom byte 0x%02lx\n",
3226 * compile-command: "gcc -D__SMP__ -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"