2 * Copyright(c) 2006 - 2007 Atheros Corporation. All rights reserved.
3 * Copyright(c) 2007 - 2008 Chris Snook <csnook@redhat.com>
5 * Derived from Intel e1000 driver
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the Free
10 * Software Foundation; either version 2 of the License, or (at your option)
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 * You should have received a copy of the GNU General Public License along with
19 * this program; if not, write to the Free Software Foundation, Inc., 59
20 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 #include <asm/atomic.h>
24 #include <linux/crc32.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ethtool.h>
28 #include <linux/hardirq.h>
29 #include <linux/if_vlan.h>
31 #include <linux/interrupt.h>
33 #include <linux/irqflags.h>
34 #include <linux/irqreturn.h>
35 #include <linux/mii.h>
36 #include <linux/net.h>
37 #include <linux/netdevice.h>
38 #include <linux/pci.h>
39 #include <linux/pci_ids.h>
41 #include <linux/skbuff.h>
42 #include <linux/spinlock.h>
43 #include <linux/string.h>
44 #include <linux/tcp.h>
45 #include <linux/timer.h>
46 #include <linux/types.h>
47 #include <linux/workqueue.h>
51 #define ATL2_DRV_VERSION "2.2.3"
53 static char atl2_driver_name
[] = "atl2";
54 static const char atl2_driver_string
[] = "Atheros(R) L2 Ethernet Driver";
55 static char atl2_copyright
[] = "Copyright (c) 2007 Atheros Corporation.";
56 static char atl2_driver_version
[] = ATL2_DRV_VERSION
;
58 MODULE_AUTHOR("Atheros Corporation <xiong.huang@atheros.com>, Chris Snook <csnook@redhat.com>");
59 MODULE_DESCRIPTION("Atheros Fast Ethernet Network Driver");
60 MODULE_LICENSE("GPL");
61 MODULE_VERSION(ATL2_DRV_VERSION
);
64 * atl2_pci_tbl - PCI Device ID Table
66 static struct pci_device_id atl2_pci_tbl
[] = {
67 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC
, PCI_DEVICE_ID_ATTANSIC_L2
)},
68 /* required last entry */
71 MODULE_DEVICE_TABLE(pci
, atl2_pci_tbl
);
73 static void atl2_set_ethtool_ops(struct net_device
*netdev
);
75 static void atl2_check_options(struct atl2_adapter
*adapter
);
78 * atl2_sw_init - Initialize general software structures (struct atl2_adapter)
79 * @adapter: board private structure to initialize
81 * atl2_sw_init initializes the Adapter private data structure.
82 * Fields are initialized based on PCI device information and
83 * OS network device settings (MTU size).
85 static int __devinit
atl2_sw_init(struct atl2_adapter
*adapter
)
87 struct atl2_hw
*hw
= &adapter
->hw
;
88 struct pci_dev
*pdev
= adapter
->pdev
;
90 /* PCI config space info */
91 hw
->vendor_id
= pdev
->vendor
;
92 hw
->device_id
= pdev
->device
;
93 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
94 hw
->subsystem_id
= pdev
->subsystem_device
;
96 pci_read_config_byte(pdev
, PCI_REVISION_ID
, &hw
->revision_id
);
97 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->pci_cmd_word
);
100 adapter
->ict
= 50000; /* ~100ms */
101 adapter
->link_speed
= SPEED_0
; /* hardware init */
102 adapter
->link_duplex
= FULL_DUPLEX
;
104 hw
->phy_configured
= false;
105 hw
->preamble_len
= 7;
116 hw
->max_frame_size
= adapter
->netdev
->mtu
;
118 spin_lock_init(&adapter
->stats_lock
);
120 set_bit(__ATL2_DOWN
, &adapter
->flags
);
126 * atl2_set_multi - Multicast and Promiscuous mode set
127 * @netdev: network interface device structure
129 * The set_multi entry point is called whenever the multicast address
130 * list or the network interface flags are updated. This routine is
131 * responsible for configuring the hardware for proper multicast,
132 * promiscuous mode, and all-multi behavior.
134 static void atl2_set_multi(struct net_device
*netdev
)
136 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
137 struct atl2_hw
*hw
= &adapter
->hw
;
138 struct dev_mc_list
*mc_ptr
;
142 /* Check for Promiscuous and All Multicast modes */
143 rctl
= ATL2_READ_REG(hw
, REG_MAC_CTRL
);
145 if (netdev
->flags
& IFF_PROMISC
) {
146 rctl
|= MAC_CTRL_PROMIS_EN
;
147 } else if (netdev
->flags
& IFF_ALLMULTI
) {
148 rctl
|= MAC_CTRL_MC_ALL_EN
;
149 rctl
&= ~MAC_CTRL_PROMIS_EN
;
151 rctl
&= ~(MAC_CTRL_PROMIS_EN
| MAC_CTRL_MC_ALL_EN
);
153 ATL2_WRITE_REG(hw
, REG_MAC_CTRL
, rctl
);
155 /* clear the old settings from the multicast hash table */
156 ATL2_WRITE_REG(hw
, REG_RX_HASH_TABLE
, 0);
157 ATL2_WRITE_REG_ARRAY(hw
, REG_RX_HASH_TABLE
, 1, 0);
159 /* comoute mc addresses' hash value ,and put it into hash table */
160 for (mc_ptr
= netdev
->mc_list
; mc_ptr
; mc_ptr
= mc_ptr
->next
) {
161 hash_value
= atl2_hash_mc_addr(hw
, mc_ptr
->dmi_addr
);
162 atl2_hash_set(hw
, hash_value
);
166 static void init_ring_ptrs(struct atl2_adapter
*adapter
)
168 /* Read / Write Ptr Initialize: */
169 adapter
->txd_write_ptr
= 0;
170 atomic_set(&adapter
->txd_read_ptr
, 0);
172 adapter
->rxd_read_ptr
= 0;
173 adapter
->rxd_write_ptr
= 0;
175 atomic_set(&adapter
->txs_write_ptr
, 0);
176 adapter
->txs_next_clear
= 0;
180 * atl2_configure - Configure Transmit&Receive Unit after Reset
181 * @adapter: board private structure
183 * Configure the Tx /Rx unit of the MAC after a reset.
185 static int atl2_configure(struct atl2_adapter
*adapter
)
187 struct atl2_hw
*hw
= &adapter
->hw
;
190 /* clear interrupt status */
191 ATL2_WRITE_REG(&adapter
->hw
, REG_ISR
, 0xffffffff);
193 /* set MAC Address */
194 value
= (((u32
)hw
->mac_addr
[2]) << 24) |
195 (((u32
)hw
->mac_addr
[3]) << 16) |
196 (((u32
)hw
->mac_addr
[4]) << 8) |
197 (((u32
)hw
->mac_addr
[5]));
198 ATL2_WRITE_REG(hw
, REG_MAC_STA_ADDR
, value
);
199 value
= (((u32
)hw
->mac_addr
[0]) << 8) |
200 (((u32
)hw
->mac_addr
[1]));
201 ATL2_WRITE_REG(hw
, (REG_MAC_STA_ADDR
+4), value
);
203 /* HI base address */
204 ATL2_WRITE_REG(hw
, REG_DESC_BASE_ADDR_HI
,
205 (u32
)((adapter
->ring_dma
& 0xffffffff00000000ULL
) >> 32));
207 /* LO base address */
208 ATL2_WRITE_REG(hw
, REG_TXD_BASE_ADDR_LO
,
209 (u32
)(adapter
->txd_dma
& 0x00000000ffffffffULL
));
210 ATL2_WRITE_REG(hw
, REG_TXS_BASE_ADDR_LO
,
211 (u32
)(adapter
->txs_dma
& 0x00000000ffffffffULL
));
212 ATL2_WRITE_REG(hw
, REG_RXD_BASE_ADDR_LO
,
213 (u32
)(adapter
->rxd_dma
& 0x00000000ffffffffULL
));
216 ATL2_WRITE_REGW(hw
, REG_TXD_MEM_SIZE
, (u16
)(adapter
->txd_ring_size
/4));
217 ATL2_WRITE_REGW(hw
, REG_TXS_MEM_SIZE
, (u16
)adapter
->txs_ring_size
);
218 ATL2_WRITE_REGW(hw
, REG_RXD_BUF_NUM
, (u16
)adapter
->rxd_ring_size
);
220 /* config Internal SRAM */
222 ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_tx_end);
223 ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_rx_end);
227 value
= (((u32
)hw
->ipgt
& MAC_IPG_IFG_IPGT_MASK
) <<
228 MAC_IPG_IFG_IPGT_SHIFT
) |
229 (((u32
)hw
->min_ifg
& MAC_IPG_IFG_MIFG_MASK
) <<
230 MAC_IPG_IFG_MIFG_SHIFT
) |
231 (((u32
)hw
->ipgr1
& MAC_IPG_IFG_IPGR1_MASK
) <<
232 MAC_IPG_IFG_IPGR1_SHIFT
)|
233 (((u32
)hw
->ipgr2
& MAC_IPG_IFG_IPGR2_MASK
) <<
234 MAC_IPG_IFG_IPGR2_SHIFT
);
235 ATL2_WRITE_REG(hw
, REG_MAC_IPG_IFG
, value
);
237 /* config Half-Duplex Control */
238 value
= ((u32
)hw
->lcol
& MAC_HALF_DUPLX_CTRL_LCOL_MASK
) |
239 (((u32
)hw
->max_retry
& MAC_HALF_DUPLX_CTRL_RETRY_MASK
) <<
240 MAC_HALF_DUPLX_CTRL_RETRY_SHIFT
) |
241 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN
|
242 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT
) |
243 (((u32
)hw
->jam_ipg
& MAC_HALF_DUPLX_CTRL_JAMIPG_MASK
) <<
244 MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT
);
245 ATL2_WRITE_REG(hw
, REG_MAC_HALF_DUPLX_CTRL
, value
);
247 /* set Interrupt Moderator Timer */
248 ATL2_WRITE_REGW(hw
, REG_IRQ_MODU_TIMER_INIT
, adapter
->imt
);
249 ATL2_WRITE_REG(hw
, REG_MASTER_CTRL
, MASTER_CTRL_ITIMER_EN
);
251 /* set Interrupt Clear Timer */
252 ATL2_WRITE_REGW(hw
, REG_CMBDISDMA_TIMER
, adapter
->ict
);
255 ATL2_WRITE_REG(hw
, REG_MTU
, adapter
->netdev
->mtu
+
256 ENET_HEADER_SIZE
+ VLAN_SIZE
+ ETHERNET_FCS_SIZE
);
259 ATL2_WRITE_REG(hw
, REG_TX_CUT_THRESH
, 0x177);
262 ATL2_WRITE_REGW(hw
, REG_PAUSE_ON_TH
, hw
->fc_rxd_hi
);
263 ATL2_WRITE_REGW(hw
, REG_PAUSE_OFF_TH
, hw
->fc_rxd_lo
);
266 ATL2_WRITE_REGW(hw
, REG_MB_TXD_WR_IDX
, (u16
)adapter
->txd_write_ptr
);
267 ATL2_WRITE_REGW(hw
, REG_MB_RXD_RD_IDX
, (u16
)adapter
->rxd_read_ptr
);
269 /* enable DMA read/write */
270 ATL2_WRITE_REGB(hw
, REG_DMAR
, DMAR_EN
);
271 ATL2_WRITE_REGB(hw
, REG_DMAW
, DMAW_EN
);
273 value
= ATL2_READ_REG(&adapter
->hw
, REG_ISR
);
274 if ((value
& ISR_PHY_LINKDOWN
) != 0)
275 value
= 1; /* config failed */
279 /* clear all interrupt status */
280 ATL2_WRITE_REG(&adapter
->hw
, REG_ISR
, 0x3fffffff);
281 ATL2_WRITE_REG(&adapter
->hw
, REG_ISR
, 0);
286 * atl2_setup_ring_resources - allocate Tx / RX descriptor resources
287 * @adapter: board private structure
289 * Return 0 on success, negative on failure
291 static s32
atl2_setup_ring_resources(struct atl2_adapter
*adapter
)
293 struct pci_dev
*pdev
= adapter
->pdev
;
297 /* real ring DMA buffer */
298 adapter
->ring_size
= size
=
299 adapter
->txd_ring_size
* 1 + 7 + /* dword align */
300 adapter
->txs_ring_size
* 4 + 7 + /* dword align */
301 adapter
->rxd_ring_size
* 1536 + 127; /* 128bytes align */
303 adapter
->ring_vir_addr
= pci_alloc_consistent(pdev
, size
,
305 if (!adapter
->ring_vir_addr
)
307 memset(adapter
->ring_vir_addr
, 0, adapter
->ring_size
);
310 adapter
->txd_dma
= adapter
->ring_dma
;
311 offset
= (adapter
->txd_dma
& 0x7) ? (8 - (adapter
->txd_dma
& 0x7)) : 0;
312 adapter
->txd_dma
+= offset
;
313 adapter
->txd_ring
= (struct tx_pkt_header
*) (adapter
->ring_vir_addr
+
317 adapter
->txs_dma
= adapter
->txd_dma
+ adapter
->txd_ring_size
;
318 offset
= (adapter
->txs_dma
& 0x7) ? (8 - (adapter
->txs_dma
& 0x7)) : 0;
319 adapter
->txs_dma
+= offset
;
320 adapter
->txs_ring
= (struct tx_pkt_status
*)
321 (((u8
*)adapter
->txd_ring
) + (adapter
->txd_ring_size
+ offset
));
324 adapter
->rxd_dma
= adapter
->txs_dma
+ adapter
->txs_ring_size
* 4;
325 offset
= (adapter
->rxd_dma
& 127) ?
326 (128 - (adapter
->rxd_dma
& 127)) : 0;
332 adapter
->rxd_dma
+= offset
;
333 adapter
->rxd_ring
= (struct rx_desc
*) (((u8
*)adapter
->txs_ring
) +
334 (adapter
->txs_ring_size
* 4 + offset
));
337 * Read / Write Ptr Initialize:
338 * init_ring_ptrs(adapter);
344 * atl2_irq_enable - Enable default interrupt generation settings
345 * @adapter: board private structure
347 static inline void atl2_irq_enable(struct atl2_adapter
*adapter
)
349 ATL2_WRITE_REG(&adapter
->hw
, REG_IMR
, IMR_NORMAL_MASK
);
350 ATL2_WRITE_FLUSH(&adapter
->hw
);
354 * atl2_irq_disable - Mask off interrupt generation on the NIC
355 * @adapter: board private structure
357 static inline void atl2_irq_disable(struct atl2_adapter
*adapter
)
359 ATL2_WRITE_REG(&adapter
->hw
, REG_IMR
, 0);
360 ATL2_WRITE_FLUSH(&adapter
->hw
);
361 synchronize_irq(adapter
->pdev
->irq
);
364 #ifdef NETIF_F_HW_VLAN_TX
365 static void atl2_vlan_rx_register(struct net_device
*netdev
,
366 struct vlan_group
*grp
)
368 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
371 atl2_irq_disable(adapter
);
372 adapter
->vlgrp
= grp
;
375 /* enable VLAN tag insert/strip */
376 ctrl
= ATL2_READ_REG(&adapter
->hw
, REG_MAC_CTRL
);
377 ctrl
|= MAC_CTRL_RMV_VLAN
;
378 ATL2_WRITE_REG(&adapter
->hw
, REG_MAC_CTRL
, ctrl
);
380 /* disable VLAN tag insert/strip */
381 ctrl
= ATL2_READ_REG(&adapter
->hw
, REG_MAC_CTRL
);
382 ctrl
&= ~MAC_CTRL_RMV_VLAN
;
383 ATL2_WRITE_REG(&adapter
->hw
, REG_MAC_CTRL
, ctrl
);
386 atl2_irq_enable(adapter
);
389 static void atl2_restore_vlan(struct atl2_adapter
*adapter
)
391 atl2_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
395 static void atl2_intr_rx(struct atl2_adapter
*adapter
)
397 struct net_device
*netdev
= adapter
->netdev
;
402 rxd
= adapter
->rxd_ring
+adapter
->rxd_write_ptr
;
403 if (!rxd
->status
.update
)
404 break; /* end of tx */
406 /* clear this flag at once */
407 rxd
->status
.update
= 0;
409 if (rxd
->status
.ok
&& rxd
->status
.pkt_size
>= 60) {
410 int rx_size
= (int)(rxd
->status
.pkt_size
- 4);
411 /* alloc new buffer */
412 skb
= netdev_alloc_skb_ip_align(netdev
, rx_size
);
415 "%s: Mem squeeze, deferring packet.\n",
418 * Check that some rx space is free. If not,
419 * free one and mark stats->rx_dropped++.
421 netdev
->stats
.rx_dropped
++;
425 memcpy(skb
->data
, rxd
->packet
, rx_size
);
426 skb_put(skb
, rx_size
);
427 skb
->protocol
= eth_type_trans(skb
, netdev
);
428 #ifdef NETIF_F_HW_VLAN_TX
429 if (adapter
->vlgrp
&& (rxd
->status
.vlan
)) {
430 u16 vlan_tag
= (rxd
->status
.vtag
>>4) |
431 ((rxd
->status
.vtag
&7) << 13) |
432 ((rxd
->status
.vtag
&8) << 9);
433 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, vlan_tag
);
437 netdev
->stats
.rx_bytes
+= rx_size
;
438 netdev
->stats
.rx_packets
++;
440 netdev
->stats
.rx_errors
++;
442 if (rxd
->status
.ok
&& rxd
->status
.pkt_size
<= 60)
443 netdev
->stats
.rx_length_errors
++;
444 if (rxd
->status
.mcast
)
445 netdev
->stats
.multicast
++;
447 netdev
->stats
.rx_crc_errors
++;
448 if (rxd
->status
.align
)
449 netdev
->stats
.rx_frame_errors
++;
452 /* advance write ptr */
453 if (++adapter
->rxd_write_ptr
== adapter
->rxd_ring_size
)
454 adapter
->rxd_write_ptr
= 0;
457 /* update mailbox? */
458 adapter
->rxd_read_ptr
= adapter
->rxd_write_ptr
;
459 ATL2_WRITE_REGW(&adapter
->hw
, REG_MB_RXD_RD_IDX
, adapter
->rxd_read_ptr
);
462 static void atl2_intr_tx(struct atl2_adapter
*adapter
)
464 struct net_device
*netdev
= adapter
->netdev
;
467 struct tx_pkt_status
*txs
;
468 struct tx_pkt_header
*txph
;
472 txs_write_ptr
= (u32
) atomic_read(&adapter
->txs_write_ptr
);
473 txs
= adapter
->txs_ring
+ txs_write_ptr
;
475 break; /* tx stop here */
480 if (++txs_write_ptr
== adapter
->txs_ring_size
)
482 atomic_set(&adapter
->txs_write_ptr
, (int)txs_write_ptr
);
484 txd_read_ptr
= (u32
) atomic_read(&adapter
->txd_read_ptr
);
485 txph
= (struct tx_pkt_header
*)
486 (((u8
*)adapter
->txd_ring
) + txd_read_ptr
);
488 if (txph
->pkt_size
!= txs
->pkt_size
) {
489 struct tx_pkt_status
*old_txs
= txs
;
491 "%s: txs packet size not consistent with txd"
492 " txd_:0x%08x, txs_:0x%08x!\n",
493 adapter
->netdev
->name
,
494 *(u32
*)txph
, *(u32
*)txs
);
496 "txd read ptr: 0x%x\n",
498 txs
= adapter
->txs_ring
+ txs_write_ptr
;
500 "txs-behind:0x%08x\n",
502 if (txs_write_ptr
< 2) {
503 txs
= adapter
->txs_ring
+
504 (adapter
->txs_ring_size
+
507 txs
= adapter
->txs_ring
+ (txs_write_ptr
- 2);
510 "txs-before:0x%08x\n",
516 txd_read_ptr
+= (((u32
)(txph
->pkt_size
) + 7) & ~3);
517 if (txd_read_ptr
>= adapter
->txd_ring_size
)
518 txd_read_ptr
-= adapter
->txd_ring_size
;
520 atomic_set(&adapter
->txd_read_ptr
, (int)txd_read_ptr
);
524 netdev
->stats
.tx_bytes
+= txs
->pkt_size
;
525 netdev
->stats
.tx_packets
++;
528 netdev
->stats
.tx_errors
++;
531 netdev
->stats
.collisions
++;
533 netdev
->stats
.tx_aborted_errors
++;
535 netdev
->stats
.tx_window_errors
++;
537 netdev
->stats
.tx_fifo_errors
++;
541 if (netif_queue_stopped(adapter
->netdev
) &&
542 netif_carrier_ok(adapter
->netdev
))
543 netif_wake_queue(adapter
->netdev
);
547 static void atl2_check_for_link(struct atl2_adapter
*adapter
)
549 struct net_device
*netdev
= adapter
->netdev
;
552 spin_lock(&adapter
->stats_lock
);
553 atl2_read_phy_reg(&adapter
->hw
, MII_BMSR
, &phy_data
);
554 atl2_read_phy_reg(&adapter
->hw
, MII_BMSR
, &phy_data
);
555 spin_unlock(&adapter
->stats_lock
);
557 /* notify upper layer link down ASAP */
558 if (!(phy_data
& BMSR_LSTATUS
)) { /* Link Down */
559 if (netif_carrier_ok(netdev
)) { /* old link state: Up */
560 printk(KERN_INFO
"%s: %s NIC Link is Down\n",
561 atl2_driver_name
, netdev
->name
);
562 adapter
->link_speed
= SPEED_0
;
563 netif_carrier_off(netdev
);
564 netif_stop_queue(netdev
);
567 schedule_work(&adapter
->link_chg_task
);
570 static inline void atl2_clear_phy_int(struct atl2_adapter
*adapter
)
573 spin_lock(&adapter
->stats_lock
);
574 atl2_read_phy_reg(&adapter
->hw
, 19, &phy_data
);
575 spin_unlock(&adapter
->stats_lock
);
579 * atl2_intr - Interrupt Handler
580 * @irq: interrupt number
581 * @data: pointer to a network interface device structure
582 * @pt_regs: CPU registers structure
584 static irqreturn_t
atl2_intr(int irq
, void *data
)
586 struct atl2_adapter
*adapter
= netdev_priv(data
);
587 struct atl2_hw
*hw
= &adapter
->hw
;
590 status
= ATL2_READ_REG(hw
, REG_ISR
);
595 if (status
& ISR_PHY
)
596 atl2_clear_phy_int(adapter
);
598 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
599 ATL2_WRITE_REG(hw
, REG_ISR
, status
| ISR_DIS_INT
);
601 /* check if PCIE PHY Link down */
602 if (status
& ISR_PHY_LINKDOWN
) {
603 if (netif_running(adapter
->netdev
)) { /* reset MAC */
604 ATL2_WRITE_REG(hw
, REG_ISR
, 0);
605 ATL2_WRITE_REG(hw
, REG_IMR
, 0);
606 ATL2_WRITE_FLUSH(hw
);
607 schedule_work(&adapter
->reset_task
);
612 /* check if DMA read/write error? */
613 if (status
& (ISR_DMAR_TO_RST
| ISR_DMAW_TO_RST
)) {
614 ATL2_WRITE_REG(hw
, REG_ISR
, 0);
615 ATL2_WRITE_REG(hw
, REG_IMR
, 0);
616 ATL2_WRITE_FLUSH(hw
);
617 schedule_work(&adapter
->reset_task
);
622 if (status
& (ISR_PHY
| ISR_MANUAL
)) {
623 adapter
->netdev
->stats
.tx_carrier_errors
++;
624 atl2_check_for_link(adapter
);
628 if (status
& ISR_TX_EVENT
)
629 atl2_intr_tx(adapter
);
632 if (status
& ISR_RX_EVENT
)
633 atl2_intr_rx(adapter
);
635 /* re-enable Interrupt */
636 ATL2_WRITE_REG(&adapter
->hw
, REG_ISR
, 0);
640 static int atl2_request_irq(struct atl2_adapter
*adapter
)
642 struct net_device
*netdev
= adapter
->netdev
;
646 adapter
->have_msi
= true;
647 err
= pci_enable_msi(adapter
->pdev
);
649 adapter
->have_msi
= false;
651 if (adapter
->have_msi
)
652 flags
&= ~IRQF_SHARED
;
654 return request_irq(adapter
->pdev
->irq
, atl2_intr
, flags
, netdev
->name
,
659 * atl2_free_ring_resources - Free Tx / RX descriptor Resources
660 * @adapter: board private structure
662 * Free all transmit software resources
664 static void atl2_free_ring_resources(struct atl2_adapter
*adapter
)
666 struct pci_dev
*pdev
= adapter
->pdev
;
667 pci_free_consistent(pdev
, adapter
->ring_size
, adapter
->ring_vir_addr
,
672 * atl2_open - Called when a network interface is made active
673 * @netdev: network interface device structure
675 * Returns 0 on success, negative value on failure
677 * The open entry point is called when a network interface is made
678 * active by the system (IFF_UP). At this point all resources needed
679 * for transmit and receive operations are allocated, the interrupt
680 * handler is registered with the OS, the watchdog timer is started,
681 * and the stack is notified that the interface is ready.
683 static int atl2_open(struct net_device
*netdev
)
685 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
689 /* disallow open during test */
690 if (test_bit(__ATL2_TESTING
, &adapter
->flags
))
693 /* allocate transmit descriptors */
694 err
= atl2_setup_ring_resources(adapter
);
698 err
= atl2_init_hw(&adapter
->hw
);
704 /* hardware has been reset, we need to reload some things */
705 atl2_set_multi(netdev
);
706 init_ring_ptrs(adapter
);
708 #ifdef NETIF_F_HW_VLAN_TX
709 atl2_restore_vlan(adapter
);
712 if (atl2_configure(adapter
)) {
717 err
= atl2_request_irq(adapter
);
721 clear_bit(__ATL2_DOWN
, &adapter
->flags
);
723 mod_timer(&adapter
->watchdog_timer
, round_jiffies(jiffies
+ 4*HZ
));
725 val
= ATL2_READ_REG(&adapter
->hw
, REG_MASTER_CTRL
);
726 ATL2_WRITE_REG(&adapter
->hw
, REG_MASTER_CTRL
,
727 val
| MASTER_CTRL_MANUAL_INT
);
729 atl2_irq_enable(adapter
);
736 atl2_free_ring_resources(adapter
);
737 atl2_reset_hw(&adapter
->hw
);
742 static void atl2_down(struct atl2_adapter
*adapter
)
744 struct net_device
*netdev
= adapter
->netdev
;
746 /* signal that we're down so the interrupt handler does not
747 * reschedule our watchdog timer */
748 set_bit(__ATL2_DOWN
, &adapter
->flags
);
750 netif_tx_disable(netdev
);
752 /* reset MAC to disable all RX/TX */
753 atl2_reset_hw(&adapter
->hw
);
756 atl2_irq_disable(adapter
);
758 del_timer_sync(&adapter
->watchdog_timer
);
759 del_timer_sync(&adapter
->phy_config_timer
);
760 clear_bit(0, &adapter
->cfg_phy
);
762 netif_carrier_off(netdev
);
763 adapter
->link_speed
= SPEED_0
;
764 adapter
->link_duplex
= -1;
767 static void atl2_free_irq(struct atl2_adapter
*adapter
)
769 struct net_device
*netdev
= adapter
->netdev
;
771 free_irq(adapter
->pdev
->irq
, netdev
);
773 #ifdef CONFIG_PCI_MSI
774 if (adapter
->have_msi
)
775 pci_disable_msi(adapter
->pdev
);
780 * atl2_close - Disables a network interface
781 * @netdev: network interface device structure
783 * Returns 0, this is not allowed to fail
785 * The close entry point is called when an interface is de-activated
786 * by the OS. The hardware is still under the drivers control, but
787 * needs to be disabled. A global MAC reset is issued to stop the
788 * hardware, and all transmit and receive resources are freed.
790 static int atl2_close(struct net_device
*netdev
)
792 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
794 WARN_ON(test_bit(__ATL2_RESETTING
, &adapter
->flags
));
797 atl2_free_irq(adapter
);
798 atl2_free_ring_resources(adapter
);
803 static inline int TxsFreeUnit(struct atl2_adapter
*adapter
)
805 u32 txs_write_ptr
= (u32
) atomic_read(&adapter
->txs_write_ptr
);
807 return (adapter
->txs_next_clear
>= txs_write_ptr
) ?
808 (int) (adapter
->txs_ring_size
- adapter
->txs_next_clear
+
810 (int) (txs_write_ptr
- adapter
->txs_next_clear
- 1);
813 static inline int TxdFreeBytes(struct atl2_adapter
*adapter
)
815 u32 txd_read_ptr
= (u32
)atomic_read(&adapter
->txd_read_ptr
);
817 return (adapter
->txd_write_ptr
>= txd_read_ptr
) ?
818 (int) (adapter
->txd_ring_size
- adapter
->txd_write_ptr
+
820 (int) (txd_read_ptr
- adapter
->txd_write_ptr
- 1);
823 static netdev_tx_t
atl2_xmit_frame(struct sk_buff
*skb
,
824 struct net_device
*netdev
)
826 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
827 struct tx_pkt_header
*txph
;
828 u32 offset
, copy_len
;
832 if (test_bit(__ATL2_DOWN
, &adapter
->flags
)) {
833 dev_kfree_skb_any(skb
);
837 if (unlikely(skb
->len
<= 0)) {
838 dev_kfree_skb_any(skb
);
842 txs_unused
= TxsFreeUnit(adapter
);
843 txbuf_unused
= TxdFreeBytes(adapter
);
845 if (skb
->len
+ sizeof(struct tx_pkt_header
) + 4 > txbuf_unused
||
847 /* not enough resources */
848 netif_stop_queue(netdev
);
849 return NETDEV_TX_BUSY
;
852 offset
= adapter
->txd_write_ptr
;
854 txph
= (struct tx_pkt_header
*) (((u8
*)adapter
->txd_ring
) + offset
);
857 txph
->pkt_size
= skb
->len
;
860 if (offset
>= adapter
->txd_ring_size
)
861 offset
-= adapter
->txd_ring_size
;
862 copy_len
= adapter
->txd_ring_size
- offset
;
863 if (copy_len
>= skb
->len
) {
864 memcpy(((u8
*)adapter
->txd_ring
) + offset
, skb
->data
, skb
->len
);
865 offset
+= ((u32
)(skb
->len
+ 3) & ~3);
867 memcpy(((u8
*)adapter
->txd_ring
)+offset
, skb
->data
, copy_len
);
868 memcpy((u8
*)adapter
->txd_ring
, skb
->data
+copy_len
,
870 offset
= ((u32
)(skb
->len
-copy_len
+ 3) & ~3);
872 #ifdef NETIF_F_HW_VLAN_TX
873 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
874 u16 vlan_tag
= vlan_tx_tag_get(skb
);
875 vlan_tag
= (vlan_tag
<< 4) |
877 ((vlan_tag
>> 9) & 0x8);
879 txph
->vlan
= vlan_tag
;
882 if (offset
>= adapter
->txd_ring_size
)
883 offset
-= adapter
->txd_ring_size
;
884 adapter
->txd_write_ptr
= offset
;
886 /* clear txs before send */
887 adapter
->txs_ring
[adapter
->txs_next_clear
].update
= 0;
888 if (++adapter
->txs_next_clear
== adapter
->txs_ring_size
)
889 adapter
->txs_next_clear
= 0;
891 ATL2_WRITE_REGW(&adapter
->hw
, REG_MB_TXD_WR_IDX
,
892 (adapter
->txd_write_ptr
>> 2));
895 netdev
->trans_start
= jiffies
;
896 dev_kfree_skb_any(skb
);
901 * atl2_change_mtu - Change the Maximum Transfer Unit
902 * @netdev: network interface device structure
903 * @new_mtu: new value for maximum frame size
905 * Returns 0 on success, negative on failure
907 static int atl2_change_mtu(struct net_device
*netdev
, int new_mtu
)
909 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
910 struct atl2_hw
*hw
= &adapter
->hw
;
912 if ((new_mtu
< 40) || (new_mtu
> (ETH_DATA_LEN
+ VLAN_SIZE
)))
916 if (hw
->max_frame_size
!= new_mtu
) {
917 netdev
->mtu
= new_mtu
;
918 ATL2_WRITE_REG(hw
, REG_MTU
, new_mtu
+ ENET_HEADER_SIZE
+
919 VLAN_SIZE
+ ETHERNET_FCS_SIZE
);
926 * atl2_set_mac - Change the Ethernet Address of the NIC
927 * @netdev: network interface device structure
928 * @p: pointer to an address structure
930 * Returns 0 on success, negative on failure
932 static int atl2_set_mac(struct net_device
*netdev
, void *p
)
934 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
935 struct sockaddr
*addr
= p
;
937 if (!is_valid_ether_addr(addr
->sa_data
))
938 return -EADDRNOTAVAIL
;
940 if (netif_running(netdev
))
943 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
944 memcpy(adapter
->hw
.mac_addr
, addr
->sa_data
, netdev
->addr_len
);
946 atl2_set_mac_addr(&adapter
->hw
);
957 static int atl2_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
959 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
960 struct mii_ioctl_data
*data
= if_mii(ifr
);
968 spin_lock_irqsave(&adapter
->stats_lock
, flags
);
969 if (atl2_read_phy_reg(&adapter
->hw
,
970 data
->reg_num
& 0x1F, &data
->val_out
)) {
971 spin_unlock_irqrestore(&adapter
->stats_lock
, flags
);
974 spin_unlock_irqrestore(&adapter
->stats_lock
, flags
);
977 if (data
->reg_num
& ~(0x1F))
979 spin_lock_irqsave(&adapter
->stats_lock
, flags
);
980 if (atl2_write_phy_reg(&adapter
->hw
, data
->reg_num
,
982 spin_unlock_irqrestore(&adapter
->stats_lock
, flags
);
985 spin_unlock_irqrestore(&adapter
->stats_lock
, flags
);
999 static int atl2_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
1005 return atl2_mii_ioctl(netdev
, ifr
, cmd
);
1006 #ifdef ETHTOOL_OPS_COMPAT
1008 return ethtool_ioctl(ifr
);
1016 * atl2_tx_timeout - Respond to a Tx Hang
1017 * @netdev: network interface device structure
1019 static void atl2_tx_timeout(struct net_device
*netdev
)
1021 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
1023 /* Do the reset outside of interrupt context */
1024 schedule_work(&adapter
->reset_task
);
1028 * atl2_watchdog - Timer Call-back
1029 * @data: pointer to netdev cast into an unsigned long
1031 static void atl2_watchdog(unsigned long data
)
1033 struct atl2_adapter
*adapter
= (struct atl2_adapter
*) data
;
1035 if (!test_bit(__ATL2_DOWN
, &adapter
->flags
)) {
1036 u32 drop_rxd
, drop_rxs
;
1037 unsigned long flags
;
1039 spin_lock_irqsave(&adapter
->stats_lock
, flags
);
1040 drop_rxd
= ATL2_READ_REG(&adapter
->hw
, REG_STS_RXD_OV
);
1041 drop_rxs
= ATL2_READ_REG(&adapter
->hw
, REG_STS_RXS_OV
);
1042 spin_unlock_irqrestore(&adapter
->stats_lock
, flags
);
1044 adapter
->netdev
->stats
.rx_over_errors
+= drop_rxd
+ drop_rxs
;
1046 /* Reset the timer */
1047 mod_timer(&adapter
->watchdog_timer
,
1048 round_jiffies(jiffies
+ 4 * HZ
));
1053 * atl2_phy_config - Timer Call-back
1054 * @data: pointer to netdev cast into an unsigned long
1056 static void atl2_phy_config(unsigned long data
)
1058 struct atl2_adapter
*adapter
= (struct atl2_adapter
*) data
;
1059 struct atl2_hw
*hw
= &adapter
->hw
;
1060 unsigned long flags
;
1062 spin_lock_irqsave(&adapter
->stats_lock
, flags
);
1063 atl2_write_phy_reg(hw
, MII_ADVERTISE
, hw
->mii_autoneg_adv_reg
);
1064 atl2_write_phy_reg(hw
, MII_BMCR
, MII_CR_RESET
| MII_CR_AUTO_NEG_EN
|
1065 MII_CR_RESTART_AUTO_NEG
);
1066 spin_unlock_irqrestore(&adapter
->stats_lock
, flags
);
1067 clear_bit(0, &adapter
->cfg_phy
);
1070 static int atl2_up(struct atl2_adapter
*adapter
)
1072 struct net_device
*netdev
= adapter
->netdev
;
1076 /* hardware has been reset, we need to reload some things */
1078 err
= atl2_init_hw(&adapter
->hw
);
1084 atl2_set_multi(netdev
);
1085 init_ring_ptrs(adapter
);
1087 #ifdef NETIF_F_HW_VLAN_TX
1088 atl2_restore_vlan(adapter
);
1091 if (atl2_configure(adapter
)) {
1096 clear_bit(__ATL2_DOWN
, &adapter
->flags
);
1098 val
= ATL2_READ_REG(&adapter
->hw
, REG_MASTER_CTRL
);
1099 ATL2_WRITE_REG(&adapter
->hw
, REG_MASTER_CTRL
, val
|
1100 MASTER_CTRL_MANUAL_INT
);
1102 atl2_irq_enable(adapter
);
1108 static void atl2_reinit_locked(struct atl2_adapter
*adapter
)
1110 WARN_ON(in_interrupt());
1111 while (test_and_set_bit(__ATL2_RESETTING
, &adapter
->flags
))
1115 clear_bit(__ATL2_RESETTING
, &adapter
->flags
);
1118 static void atl2_reset_task(struct work_struct
*work
)
1120 struct atl2_adapter
*adapter
;
1121 adapter
= container_of(work
, struct atl2_adapter
, reset_task
);
1123 atl2_reinit_locked(adapter
);
1126 static void atl2_setup_mac_ctrl(struct atl2_adapter
*adapter
)
1129 struct atl2_hw
*hw
= &adapter
->hw
;
1130 struct net_device
*netdev
= adapter
->netdev
;
1132 /* Config MAC CTRL Register */
1133 value
= MAC_CTRL_TX_EN
| MAC_CTRL_RX_EN
| MAC_CTRL_MACLP_CLK_PHY
;
1136 if (FULL_DUPLEX
== adapter
->link_duplex
)
1137 value
|= MAC_CTRL_DUPLX
;
1140 value
|= (MAC_CTRL_TX_FLOW
| MAC_CTRL_RX_FLOW
);
1143 value
|= (MAC_CTRL_ADD_CRC
| MAC_CTRL_PAD
);
1145 /* preamble length */
1146 value
|= (((u32
)adapter
->hw
.preamble_len
& MAC_CTRL_PRMLEN_MASK
) <<
1147 MAC_CTRL_PRMLEN_SHIFT
);
1151 value
|= MAC_CTRL_RMV_VLAN
;
1154 value
|= MAC_CTRL_BC_EN
;
1155 if (netdev
->flags
& IFF_PROMISC
)
1156 value
|= MAC_CTRL_PROMIS_EN
;
1157 else if (netdev
->flags
& IFF_ALLMULTI
)
1158 value
|= MAC_CTRL_MC_ALL_EN
;
1160 /* half retry buffer */
1161 value
|= (((u32
)(adapter
->hw
.retry_buf
&
1162 MAC_CTRL_HALF_LEFT_BUF_MASK
)) << MAC_CTRL_HALF_LEFT_BUF_SHIFT
);
1164 ATL2_WRITE_REG(hw
, REG_MAC_CTRL
, value
);
1167 static int atl2_check_link(struct atl2_adapter
*adapter
)
1169 struct atl2_hw
*hw
= &adapter
->hw
;
1170 struct net_device
*netdev
= adapter
->netdev
;
1172 u16 speed
, duplex
, phy_data
;
1175 /* MII_BMSR must read twise */
1176 atl2_read_phy_reg(hw
, MII_BMSR
, &phy_data
);
1177 atl2_read_phy_reg(hw
, MII_BMSR
, &phy_data
);
1178 if (!(phy_data
&BMSR_LSTATUS
)) { /* link down */
1179 if (netif_carrier_ok(netdev
)) { /* old link state: Up */
1182 value
= ATL2_READ_REG(hw
, REG_MAC_CTRL
);
1183 value
&= ~MAC_CTRL_RX_EN
;
1184 ATL2_WRITE_REG(hw
, REG_MAC_CTRL
, value
);
1185 adapter
->link_speed
= SPEED_0
;
1186 netif_carrier_off(netdev
);
1187 netif_stop_queue(netdev
);
1193 ret_val
= atl2_get_speed_and_duplex(hw
, &speed
, &duplex
);
1196 switch (hw
->MediaType
) {
1197 case MEDIA_TYPE_100M_FULL
:
1198 if (speed
!= SPEED_100
|| duplex
!= FULL_DUPLEX
)
1201 case MEDIA_TYPE_100M_HALF
:
1202 if (speed
!= SPEED_100
|| duplex
!= HALF_DUPLEX
)
1205 case MEDIA_TYPE_10M_FULL
:
1206 if (speed
!= SPEED_10
|| duplex
!= FULL_DUPLEX
)
1209 case MEDIA_TYPE_10M_HALF
:
1210 if (speed
!= SPEED_10
|| duplex
!= HALF_DUPLEX
)
1214 /* link result is our setting */
1215 if (reconfig
== 0) {
1216 if (adapter
->link_speed
!= speed
||
1217 adapter
->link_duplex
!= duplex
) {
1218 adapter
->link_speed
= speed
;
1219 adapter
->link_duplex
= duplex
;
1220 atl2_setup_mac_ctrl(adapter
);
1221 printk(KERN_INFO
"%s: %s NIC Link is Up<%d Mbps %s>\n",
1222 atl2_driver_name
, netdev
->name
,
1223 adapter
->link_speed
,
1224 adapter
->link_duplex
== FULL_DUPLEX
?
1225 "Full Duplex" : "Half Duplex");
1228 if (!netif_carrier_ok(netdev
)) { /* Link down -> Up */
1229 netif_carrier_on(netdev
);
1230 netif_wake_queue(netdev
);
1235 /* change original link status */
1236 if (netif_carrier_ok(netdev
)) {
1239 value
= ATL2_READ_REG(hw
, REG_MAC_CTRL
);
1240 value
&= ~MAC_CTRL_RX_EN
;
1241 ATL2_WRITE_REG(hw
, REG_MAC_CTRL
, value
);
1243 adapter
->link_speed
= SPEED_0
;
1244 netif_carrier_off(netdev
);
1245 netif_stop_queue(netdev
);
1248 /* auto-neg, insert timer to re-config phy
1249 * (if interval smaller than 5 seconds, something strange) */
1250 if (!test_bit(__ATL2_DOWN
, &adapter
->flags
)) {
1251 if (!test_and_set_bit(0, &adapter
->cfg_phy
))
1252 mod_timer(&adapter
->phy_config_timer
,
1253 round_jiffies(jiffies
+ 5 * HZ
));
1260 * atl2_link_chg_task - deal with link change event Out of interrupt context
1261 * @netdev: network interface device structure
1263 static void atl2_link_chg_task(struct work_struct
*work
)
1265 struct atl2_adapter
*adapter
;
1266 unsigned long flags
;
1268 adapter
= container_of(work
, struct atl2_adapter
, link_chg_task
);
1270 spin_lock_irqsave(&adapter
->stats_lock
, flags
);
1271 atl2_check_link(adapter
);
1272 spin_unlock_irqrestore(&adapter
->stats_lock
, flags
);
1275 static void atl2_setup_pcicmd(struct pci_dev
*pdev
)
1279 pci_read_config_word(pdev
, PCI_COMMAND
, &cmd
);
1281 if (cmd
& PCI_COMMAND_INTX_DISABLE
)
1282 cmd
&= ~PCI_COMMAND_INTX_DISABLE
;
1283 if (cmd
& PCI_COMMAND_IO
)
1284 cmd
&= ~PCI_COMMAND_IO
;
1285 if (0 == (cmd
& PCI_COMMAND_MEMORY
))
1286 cmd
|= PCI_COMMAND_MEMORY
;
1287 if (0 == (cmd
& PCI_COMMAND_MASTER
))
1288 cmd
|= PCI_COMMAND_MASTER
;
1289 pci_write_config_word(pdev
, PCI_COMMAND
, cmd
);
1292 * some motherboards BIOS(PXE/EFI) driver may set PME
1293 * while they transfer control to OS (Windows/Linux)
1294 * so we should clear this bit before NIC work normally
1296 pci_write_config_dword(pdev
, REG_PM_CTRLSTAT
, 0);
1299 #ifdef CONFIG_NET_POLL_CONTROLLER
1300 static void atl2_poll_controller(struct net_device
*netdev
)
1302 disable_irq(netdev
->irq
);
1303 atl2_intr(netdev
->irq
, netdev
);
1304 enable_irq(netdev
->irq
);
1309 static const struct net_device_ops atl2_netdev_ops
= {
1310 .ndo_open
= atl2_open
,
1311 .ndo_stop
= atl2_close
,
1312 .ndo_start_xmit
= atl2_xmit_frame
,
1313 .ndo_set_multicast_list
= atl2_set_multi
,
1314 .ndo_validate_addr
= eth_validate_addr
,
1315 .ndo_set_mac_address
= atl2_set_mac
,
1316 .ndo_change_mtu
= atl2_change_mtu
,
1317 .ndo_do_ioctl
= atl2_ioctl
,
1318 .ndo_tx_timeout
= atl2_tx_timeout
,
1319 .ndo_vlan_rx_register
= atl2_vlan_rx_register
,
1320 #ifdef CONFIG_NET_POLL_CONTROLLER
1321 .ndo_poll_controller
= atl2_poll_controller
,
1326 * atl2_probe - Device Initialization Routine
1327 * @pdev: PCI device information struct
1328 * @ent: entry in atl2_pci_tbl
1330 * Returns 0 on success, negative on failure
1332 * atl2_probe initializes an adapter identified by a pci_dev structure.
1333 * The OS initialization, configuring of the adapter private structure,
1334 * and a hardware reset occur.
1336 static int __devinit
atl2_probe(struct pci_dev
*pdev
,
1337 const struct pci_device_id
*ent
)
1339 struct net_device
*netdev
;
1340 struct atl2_adapter
*adapter
;
1341 static int cards_found
;
1342 unsigned long mmio_start
;
1348 err
= pci_enable_device(pdev
);
1353 * atl2 is a shared-high-32-bit device, so we're stuck with 32-bit DMA
1354 * until the kernel has the proper infrastructure to support 64-bit DMA
1357 if (pci_set_dma_mask(pdev
, DMA_BIT_MASK(32)) &&
1358 pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32))) {
1359 printk(KERN_ERR
"atl2: No usable DMA configuration, aborting\n");
1363 /* Mark all PCI regions associated with PCI device
1364 * pdev as being reserved by owner atl2_driver_name */
1365 err
= pci_request_regions(pdev
, atl2_driver_name
);
1369 /* Enables bus-mastering on the device and calls
1370 * pcibios_set_master to do the needed arch specific settings */
1371 pci_set_master(pdev
);
1374 netdev
= alloc_etherdev(sizeof(struct atl2_adapter
));
1376 goto err_alloc_etherdev
;
1378 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1380 pci_set_drvdata(pdev
, netdev
);
1381 adapter
= netdev_priv(netdev
);
1382 adapter
->netdev
= netdev
;
1383 adapter
->pdev
= pdev
;
1384 adapter
->hw
.back
= adapter
;
1386 mmio_start
= pci_resource_start(pdev
, 0x0);
1387 mmio_len
= pci_resource_len(pdev
, 0x0);
1389 adapter
->hw
.mem_rang
= (u32
)mmio_len
;
1390 adapter
->hw
.hw_addr
= ioremap(mmio_start
, mmio_len
);
1391 if (!adapter
->hw
.hw_addr
) {
1396 atl2_setup_pcicmd(pdev
);
1398 netdev
->netdev_ops
= &atl2_netdev_ops
;
1399 atl2_set_ethtool_ops(netdev
);
1400 netdev
->watchdog_timeo
= 5 * HZ
;
1401 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1403 netdev
->mem_start
= mmio_start
;
1404 netdev
->mem_end
= mmio_start
+ mmio_len
;
1405 adapter
->bd_number
= cards_found
;
1406 adapter
->pci_using_64
= false;
1408 /* setup the private structure */
1409 err
= atl2_sw_init(adapter
);
1415 #ifdef NETIF_F_HW_VLAN_TX
1416 netdev
->features
|= (NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
);
1419 /* Init PHY as early as possible due to power saving issue */
1420 atl2_phy_init(&adapter
->hw
);
1422 /* reset the controller to
1423 * put the device in a known good starting state */
1425 if (atl2_reset_hw(&adapter
->hw
)) {
1430 /* copy the MAC address out of the EEPROM */
1431 atl2_read_mac_addr(&adapter
->hw
);
1432 memcpy(netdev
->dev_addr
, adapter
->hw
.mac_addr
, netdev
->addr_len
);
1433 /* FIXME: do we still need this? */
1434 #ifdef ETHTOOL_GPERMADDR
1435 memcpy(netdev
->perm_addr
, adapter
->hw
.mac_addr
, netdev
->addr_len
);
1437 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1439 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
1445 atl2_check_options(adapter
);
1447 init_timer(&adapter
->watchdog_timer
);
1448 adapter
->watchdog_timer
.function
= &atl2_watchdog
;
1449 adapter
->watchdog_timer
.data
= (unsigned long) adapter
;
1451 init_timer(&adapter
->phy_config_timer
);
1452 adapter
->phy_config_timer
.function
= &atl2_phy_config
;
1453 adapter
->phy_config_timer
.data
= (unsigned long) adapter
;
1455 INIT_WORK(&adapter
->reset_task
, atl2_reset_task
);
1456 INIT_WORK(&adapter
->link_chg_task
, atl2_link_chg_task
);
1458 strcpy(netdev
->name
, "eth%d"); /* ?? */
1459 err
= register_netdev(netdev
);
1463 /* assume we have no link for now */
1464 netif_carrier_off(netdev
);
1465 netif_stop_queue(netdev
);
1475 iounmap(adapter
->hw
.hw_addr
);
1477 free_netdev(netdev
);
1479 pci_release_regions(pdev
);
1482 pci_disable_device(pdev
);
1487 * atl2_remove - Device Removal Routine
1488 * @pdev: PCI device information struct
1490 * atl2_remove is called by the PCI subsystem to alert the driver
1491 * that it should release a PCI device. The could be caused by a
1492 * Hot-Plug event, or because the driver is going to be removed from
1495 /* FIXME: write the original MAC address back in case it was changed from a
1496 * BIOS-set value, as in atl1 -- CHS */
1497 static void __devexit
atl2_remove(struct pci_dev
*pdev
)
1499 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1500 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
1502 /* flush_scheduled work may reschedule our watchdog task, so
1503 * explicitly disable watchdog tasks from being rescheduled */
1504 set_bit(__ATL2_DOWN
, &adapter
->flags
);
1506 del_timer_sync(&adapter
->watchdog_timer
);
1507 del_timer_sync(&adapter
->phy_config_timer
);
1509 flush_scheduled_work();
1511 unregister_netdev(netdev
);
1513 atl2_force_ps(&adapter
->hw
);
1515 iounmap(adapter
->hw
.hw_addr
);
1516 pci_release_regions(pdev
);
1518 free_netdev(netdev
);
1520 pci_disable_device(pdev
);
1523 static int atl2_suspend(struct pci_dev
*pdev
, pm_message_t state
)
1525 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1526 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
1527 struct atl2_hw
*hw
= &adapter
->hw
;
1530 u32 wufc
= adapter
->wol
;
1536 netif_device_detach(netdev
);
1538 if (netif_running(netdev
)) {
1539 WARN_ON(test_bit(__ATL2_RESETTING
, &adapter
->flags
));
1544 retval
= pci_save_state(pdev
);
1549 atl2_read_phy_reg(hw
, MII_BMSR
, (u16
*)&ctrl
);
1550 atl2_read_phy_reg(hw
, MII_BMSR
, (u16
*)&ctrl
);
1551 if (ctrl
& BMSR_LSTATUS
)
1552 wufc
&= ~ATLX_WUFC_LNKC
;
1554 if (0 != (ctrl
& BMSR_LSTATUS
) && 0 != wufc
) {
1556 /* get current link speed & duplex */
1557 ret_val
= atl2_get_speed_and_duplex(hw
, &speed
, &duplex
);
1560 "%s: get speed&duplex error while suspend\n",
1567 /* turn on magic packet wol */
1568 if (wufc
& ATLX_WUFC_MAG
)
1569 ctrl
|= (WOL_MAGIC_EN
| WOL_MAGIC_PME_EN
);
1571 /* ignore Link Chg event when Link is up */
1572 ATL2_WRITE_REG(hw
, REG_WOL_CTRL
, ctrl
);
1574 /* Config MAC CTRL Register */
1575 ctrl
= MAC_CTRL_RX_EN
| MAC_CTRL_MACLP_CLK_PHY
;
1576 if (FULL_DUPLEX
== adapter
->link_duplex
)
1577 ctrl
|= MAC_CTRL_DUPLX
;
1578 ctrl
|= (MAC_CTRL_ADD_CRC
| MAC_CTRL_PAD
);
1579 ctrl
|= (((u32
)adapter
->hw
.preamble_len
&
1580 MAC_CTRL_PRMLEN_MASK
) << MAC_CTRL_PRMLEN_SHIFT
);
1581 ctrl
|= (((u32
)(adapter
->hw
.retry_buf
&
1582 MAC_CTRL_HALF_LEFT_BUF_MASK
)) <<
1583 MAC_CTRL_HALF_LEFT_BUF_SHIFT
);
1584 if (wufc
& ATLX_WUFC_MAG
) {
1585 /* magic packet maybe Broadcast&multicast&Unicast */
1586 ctrl
|= MAC_CTRL_BC_EN
;
1589 ATL2_WRITE_REG(hw
, REG_MAC_CTRL
, ctrl
);
1592 ctrl
= ATL2_READ_REG(hw
, REG_PCIE_PHYMISC
);
1593 ctrl
|= PCIE_PHYMISC_FORCE_RCV_DET
;
1594 ATL2_WRITE_REG(hw
, REG_PCIE_PHYMISC
, ctrl
);
1595 ctrl
= ATL2_READ_REG(hw
, REG_PCIE_DLL_TX_CTRL1
);
1596 ctrl
|= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK
;
1597 ATL2_WRITE_REG(hw
, REG_PCIE_DLL_TX_CTRL1
, ctrl
);
1599 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 1);
1603 if (0 == (ctrl
&BMSR_LSTATUS
) && 0 != (wufc
&ATLX_WUFC_LNKC
)) {
1604 /* link is down, so only LINK CHG WOL event enable */
1605 ctrl
|= (WOL_LINK_CHG_EN
| WOL_LINK_CHG_PME_EN
);
1606 ATL2_WRITE_REG(hw
, REG_WOL_CTRL
, ctrl
);
1607 ATL2_WRITE_REG(hw
, REG_MAC_CTRL
, 0);
1610 ctrl
= ATL2_READ_REG(hw
, REG_PCIE_PHYMISC
);
1611 ctrl
|= PCIE_PHYMISC_FORCE_RCV_DET
;
1612 ATL2_WRITE_REG(hw
, REG_PCIE_PHYMISC
, ctrl
);
1613 ctrl
= ATL2_READ_REG(hw
, REG_PCIE_DLL_TX_CTRL1
);
1614 ctrl
|= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK
;
1615 ATL2_WRITE_REG(hw
, REG_PCIE_DLL_TX_CTRL1
, ctrl
);
1617 hw
->phy_configured
= false; /* re-init PHY when resume */
1619 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 1);
1626 ATL2_WRITE_REG(hw
, REG_WOL_CTRL
, 0);
1629 ctrl
= ATL2_READ_REG(hw
, REG_PCIE_PHYMISC
);
1630 ctrl
|= PCIE_PHYMISC_FORCE_RCV_DET
;
1631 ATL2_WRITE_REG(hw
, REG_PCIE_PHYMISC
, ctrl
);
1632 ctrl
= ATL2_READ_REG(hw
, REG_PCIE_DLL_TX_CTRL1
);
1633 ctrl
|= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK
;
1634 ATL2_WRITE_REG(hw
, REG_PCIE_DLL_TX_CTRL1
, ctrl
);
1637 hw
->phy_configured
= false; /* re-init PHY when resume */
1639 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 0);
1642 if (netif_running(netdev
))
1643 atl2_free_irq(adapter
);
1645 pci_disable_device(pdev
);
1647 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
1653 static int atl2_resume(struct pci_dev
*pdev
)
1655 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1656 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
1659 pci_set_power_state(pdev
, PCI_D0
);
1660 pci_restore_state(pdev
);
1662 err
= pci_enable_device(pdev
);
1665 "atl2: Cannot enable PCI device from suspend\n");
1669 pci_set_master(pdev
);
1671 ATL2_READ_REG(&adapter
->hw
, REG_WOL_CTRL
); /* clear WOL status */
1673 pci_enable_wake(pdev
, PCI_D3hot
, 0);
1674 pci_enable_wake(pdev
, PCI_D3cold
, 0);
1676 ATL2_WRITE_REG(&adapter
->hw
, REG_WOL_CTRL
, 0);
1678 if (netif_running(netdev
)) {
1679 err
= atl2_request_irq(adapter
);
1684 atl2_reset_hw(&adapter
->hw
);
1686 if (netif_running(netdev
))
1689 netif_device_attach(netdev
);
1695 static void atl2_shutdown(struct pci_dev
*pdev
)
1697 atl2_suspend(pdev
, PMSG_SUSPEND
);
1700 static struct pci_driver atl2_driver
= {
1701 .name
= atl2_driver_name
,
1702 .id_table
= atl2_pci_tbl
,
1703 .probe
= atl2_probe
,
1704 .remove
= __devexit_p(atl2_remove
),
1705 /* Power Managment Hooks */
1706 .suspend
= atl2_suspend
,
1708 .resume
= atl2_resume
,
1710 .shutdown
= atl2_shutdown
,
1714 * atl2_init_module - Driver Registration Routine
1716 * atl2_init_module is the first routine called when the driver is
1717 * loaded. All it does is register with the PCI subsystem.
1719 static int __init
atl2_init_module(void)
1721 printk(KERN_INFO
"%s - version %s\n", atl2_driver_string
,
1722 atl2_driver_version
);
1723 printk(KERN_INFO
"%s\n", atl2_copyright
);
1724 return pci_register_driver(&atl2_driver
);
1726 module_init(atl2_init_module
);
1729 * atl2_exit_module - Driver Exit Cleanup Routine
1731 * atl2_exit_module is called just before the driver is removed
1734 static void __exit
atl2_exit_module(void)
1736 pci_unregister_driver(&atl2_driver
);
1738 module_exit(atl2_exit_module
);
1740 static void atl2_read_pci_cfg(struct atl2_hw
*hw
, u32 reg
, u16
*value
)
1742 struct atl2_adapter
*adapter
= hw
->back
;
1743 pci_read_config_word(adapter
->pdev
, reg
, value
);
1746 static void atl2_write_pci_cfg(struct atl2_hw
*hw
, u32 reg
, u16
*value
)
1748 struct atl2_adapter
*adapter
= hw
->back
;
1749 pci_write_config_word(adapter
->pdev
, reg
, *value
);
1752 static int atl2_get_settings(struct net_device
*netdev
,
1753 struct ethtool_cmd
*ecmd
)
1755 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
1756 struct atl2_hw
*hw
= &adapter
->hw
;
1758 ecmd
->supported
= (SUPPORTED_10baseT_Half
|
1759 SUPPORTED_10baseT_Full
|
1760 SUPPORTED_100baseT_Half
|
1761 SUPPORTED_100baseT_Full
|
1764 ecmd
->advertising
= ADVERTISED_TP
;
1766 ecmd
->advertising
|= ADVERTISED_Autoneg
;
1767 ecmd
->advertising
|= hw
->autoneg_advertised
;
1769 ecmd
->port
= PORT_TP
;
1770 ecmd
->phy_address
= 0;
1771 ecmd
->transceiver
= XCVR_INTERNAL
;
1773 if (adapter
->link_speed
!= SPEED_0
) {
1774 ecmd
->speed
= adapter
->link_speed
;
1775 if (adapter
->link_duplex
== FULL_DUPLEX
)
1776 ecmd
->duplex
= DUPLEX_FULL
;
1778 ecmd
->duplex
= DUPLEX_HALF
;
1784 ecmd
->autoneg
= AUTONEG_ENABLE
;
1788 static int atl2_set_settings(struct net_device
*netdev
,
1789 struct ethtool_cmd
*ecmd
)
1791 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
1792 struct atl2_hw
*hw
= &adapter
->hw
;
1794 while (test_and_set_bit(__ATL2_RESETTING
, &adapter
->flags
))
1797 if (ecmd
->autoneg
== AUTONEG_ENABLE
) {
1798 #define MY_ADV_MASK (ADVERTISE_10_HALF | \
1799 ADVERTISE_10_FULL | \
1800 ADVERTISE_100_HALF| \
1803 if ((ecmd
->advertising
& MY_ADV_MASK
) == MY_ADV_MASK
) {
1804 hw
->MediaType
= MEDIA_TYPE_AUTO_SENSOR
;
1805 hw
->autoneg_advertised
= MY_ADV_MASK
;
1806 } else if ((ecmd
->advertising
& MY_ADV_MASK
) ==
1807 ADVERTISE_100_FULL
) {
1808 hw
->MediaType
= MEDIA_TYPE_100M_FULL
;
1809 hw
->autoneg_advertised
= ADVERTISE_100_FULL
;
1810 } else if ((ecmd
->advertising
& MY_ADV_MASK
) ==
1811 ADVERTISE_100_HALF
) {
1812 hw
->MediaType
= MEDIA_TYPE_100M_HALF
;
1813 hw
->autoneg_advertised
= ADVERTISE_100_HALF
;
1814 } else if ((ecmd
->advertising
& MY_ADV_MASK
) ==
1815 ADVERTISE_10_FULL
) {
1816 hw
->MediaType
= MEDIA_TYPE_10M_FULL
;
1817 hw
->autoneg_advertised
= ADVERTISE_10_FULL
;
1818 } else if ((ecmd
->advertising
& MY_ADV_MASK
) ==
1819 ADVERTISE_10_HALF
) {
1820 hw
->MediaType
= MEDIA_TYPE_10M_HALF
;
1821 hw
->autoneg_advertised
= ADVERTISE_10_HALF
;
1823 clear_bit(__ATL2_RESETTING
, &adapter
->flags
);
1826 ecmd
->advertising
= hw
->autoneg_advertised
|
1827 ADVERTISED_TP
| ADVERTISED_Autoneg
;
1829 clear_bit(__ATL2_RESETTING
, &adapter
->flags
);
1833 /* reset the link */
1834 if (netif_running(adapter
->netdev
)) {
1838 atl2_reset_hw(&adapter
->hw
);
1840 clear_bit(__ATL2_RESETTING
, &adapter
->flags
);
1844 static u32
atl2_get_tx_csum(struct net_device
*netdev
)
1846 return (netdev
->features
& NETIF_F_HW_CSUM
) != 0;
1849 static u32
atl2_get_msglevel(struct net_device
*netdev
)
1855 * It's sane for this to be empty, but we might want to take advantage of this.
1857 static void atl2_set_msglevel(struct net_device
*netdev
, u32 data
)
1861 static int atl2_get_regs_len(struct net_device
*netdev
)
1863 #define ATL2_REGS_LEN 42
1864 return sizeof(u32
) * ATL2_REGS_LEN
;
1867 static void atl2_get_regs(struct net_device
*netdev
,
1868 struct ethtool_regs
*regs
, void *p
)
1870 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
1871 struct atl2_hw
*hw
= &adapter
->hw
;
1875 memset(p
, 0, sizeof(u32
) * ATL2_REGS_LEN
);
1877 regs
->version
= (1 << 24) | (hw
->revision_id
<< 16) | hw
->device_id
;
1879 regs_buff
[0] = ATL2_READ_REG(hw
, REG_VPD_CAP
);
1880 regs_buff
[1] = ATL2_READ_REG(hw
, REG_SPI_FLASH_CTRL
);
1881 regs_buff
[2] = ATL2_READ_REG(hw
, REG_SPI_FLASH_CONFIG
);
1882 regs_buff
[3] = ATL2_READ_REG(hw
, REG_TWSI_CTRL
);
1883 regs_buff
[4] = ATL2_READ_REG(hw
, REG_PCIE_DEV_MISC_CTRL
);
1884 regs_buff
[5] = ATL2_READ_REG(hw
, REG_MASTER_CTRL
);
1885 regs_buff
[6] = ATL2_READ_REG(hw
, REG_MANUAL_TIMER_INIT
);
1886 regs_buff
[7] = ATL2_READ_REG(hw
, REG_IRQ_MODU_TIMER_INIT
);
1887 regs_buff
[8] = ATL2_READ_REG(hw
, REG_PHY_ENABLE
);
1888 regs_buff
[9] = ATL2_READ_REG(hw
, REG_CMBDISDMA_TIMER
);
1889 regs_buff
[10] = ATL2_READ_REG(hw
, REG_IDLE_STATUS
);
1890 regs_buff
[11] = ATL2_READ_REG(hw
, REG_MDIO_CTRL
);
1891 regs_buff
[12] = ATL2_READ_REG(hw
, REG_SERDES_LOCK
);
1892 regs_buff
[13] = ATL2_READ_REG(hw
, REG_MAC_CTRL
);
1893 regs_buff
[14] = ATL2_READ_REG(hw
, REG_MAC_IPG_IFG
);
1894 regs_buff
[15] = ATL2_READ_REG(hw
, REG_MAC_STA_ADDR
);
1895 regs_buff
[16] = ATL2_READ_REG(hw
, REG_MAC_STA_ADDR
+4);
1896 regs_buff
[17] = ATL2_READ_REG(hw
, REG_RX_HASH_TABLE
);
1897 regs_buff
[18] = ATL2_READ_REG(hw
, REG_RX_HASH_TABLE
+4);
1898 regs_buff
[19] = ATL2_READ_REG(hw
, REG_MAC_HALF_DUPLX_CTRL
);
1899 regs_buff
[20] = ATL2_READ_REG(hw
, REG_MTU
);
1900 regs_buff
[21] = ATL2_READ_REG(hw
, REG_WOL_CTRL
);
1901 regs_buff
[22] = ATL2_READ_REG(hw
, REG_SRAM_TXRAM_END
);
1902 regs_buff
[23] = ATL2_READ_REG(hw
, REG_DESC_BASE_ADDR_HI
);
1903 regs_buff
[24] = ATL2_READ_REG(hw
, REG_TXD_BASE_ADDR_LO
);
1904 regs_buff
[25] = ATL2_READ_REG(hw
, REG_TXD_MEM_SIZE
);
1905 regs_buff
[26] = ATL2_READ_REG(hw
, REG_TXS_BASE_ADDR_LO
);
1906 regs_buff
[27] = ATL2_READ_REG(hw
, REG_TXS_MEM_SIZE
);
1907 regs_buff
[28] = ATL2_READ_REG(hw
, REG_RXD_BASE_ADDR_LO
);
1908 regs_buff
[29] = ATL2_READ_REG(hw
, REG_RXD_BUF_NUM
);
1909 regs_buff
[30] = ATL2_READ_REG(hw
, REG_DMAR
);
1910 regs_buff
[31] = ATL2_READ_REG(hw
, REG_TX_CUT_THRESH
);
1911 regs_buff
[32] = ATL2_READ_REG(hw
, REG_DMAW
);
1912 regs_buff
[33] = ATL2_READ_REG(hw
, REG_PAUSE_ON_TH
);
1913 regs_buff
[34] = ATL2_READ_REG(hw
, REG_PAUSE_OFF_TH
);
1914 regs_buff
[35] = ATL2_READ_REG(hw
, REG_MB_TXD_WR_IDX
);
1915 regs_buff
[36] = ATL2_READ_REG(hw
, REG_MB_RXD_RD_IDX
);
1916 regs_buff
[38] = ATL2_READ_REG(hw
, REG_ISR
);
1917 regs_buff
[39] = ATL2_READ_REG(hw
, REG_IMR
);
1919 atl2_read_phy_reg(hw
, MII_BMCR
, &phy_data
);
1920 regs_buff
[40] = (u32
)phy_data
;
1921 atl2_read_phy_reg(hw
, MII_BMSR
, &phy_data
);
1922 regs_buff
[41] = (u32
)phy_data
;
1925 static int atl2_get_eeprom_len(struct net_device
*netdev
)
1927 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
1929 if (!atl2_check_eeprom_exist(&adapter
->hw
))
1935 static int atl2_get_eeprom(struct net_device
*netdev
,
1936 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
1938 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
1939 struct atl2_hw
*hw
= &adapter
->hw
;
1941 int first_dword
, last_dword
;
1945 if (eeprom
->len
== 0)
1948 if (atl2_check_eeprom_exist(hw
))
1951 eeprom
->magic
= hw
->vendor_id
| (hw
->device_id
<< 16);
1953 first_dword
= eeprom
->offset
>> 2;
1954 last_dword
= (eeprom
->offset
+ eeprom
->len
- 1) >> 2;
1956 eeprom_buff
= kmalloc(sizeof(u32
) * (last_dword
- first_dword
+ 1),
1961 for (i
= first_dword
; i
< last_dword
; i
++) {
1962 if (!atl2_read_eeprom(hw
, i
*4, &(eeprom_buff
[i
-first_dword
])))
1966 memcpy(bytes
, (u8
*)eeprom_buff
+ (eeprom
->offset
& 3),
1973 static int atl2_set_eeprom(struct net_device
*netdev
,
1974 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
1976 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
1977 struct atl2_hw
*hw
= &adapter
->hw
;
1980 int max_len
, first_dword
, last_dword
, ret_val
= 0;
1983 if (eeprom
->len
== 0)
1986 if (eeprom
->magic
!= (hw
->vendor_id
| (hw
->device_id
<< 16)))
1991 first_dword
= eeprom
->offset
>> 2;
1992 last_dword
= (eeprom
->offset
+ eeprom
->len
- 1) >> 2;
1993 eeprom_buff
= kmalloc(max_len
, GFP_KERNEL
);
1997 ptr
= (u32
*)eeprom_buff
;
1999 if (eeprom
->offset
& 3) {
2000 /* need read/modify/write of first changed EEPROM word */
2001 /* only the second byte of the word is being modified */
2002 if (!atl2_read_eeprom(hw
, first_dword
*4, &(eeprom_buff
[0])))
2006 if (((eeprom
->offset
+ eeprom
->len
) & 3)) {
2008 * need read/modify/write of last changed EEPROM word
2009 * only the first byte of the word is being modified
2011 if (!atl2_read_eeprom(hw
, last_dword
* 4,
2012 &(eeprom_buff
[last_dword
- first_dword
])))
2016 /* Device's eeprom is always little-endian, word addressable */
2017 memcpy(ptr
, bytes
, eeprom
->len
);
2019 for (i
= 0; i
< last_dword
- first_dword
+ 1; i
++) {
2020 if (!atl2_write_eeprom(hw
, ((first_dword
+i
)*4), eeprom_buff
[i
]))
2028 static void atl2_get_drvinfo(struct net_device
*netdev
,
2029 struct ethtool_drvinfo
*drvinfo
)
2031 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
2033 strncpy(drvinfo
->driver
, atl2_driver_name
, 32);
2034 strncpy(drvinfo
->version
, atl2_driver_version
, 32);
2035 strncpy(drvinfo
->fw_version
, "L2", 32);
2036 strncpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
), 32);
2037 drvinfo
->n_stats
= 0;
2038 drvinfo
->testinfo_len
= 0;
2039 drvinfo
->regdump_len
= atl2_get_regs_len(netdev
);
2040 drvinfo
->eedump_len
= atl2_get_eeprom_len(netdev
);
2043 static void atl2_get_wol(struct net_device
*netdev
,
2044 struct ethtool_wolinfo
*wol
)
2046 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
2048 wol
->supported
= WAKE_MAGIC
;
2051 if (adapter
->wol
& ATLX_WUFC_EX
)
2052 wol
->wolopts
|= WAKE_UCAST
;
2053 if (adapter
->wol
& ATLX_WUFC_MC
)
2054 wol
->wolopts
|= WAKE_MCAST
;
2055 if (adapter
->wol
& ATLX_WUFC_BC
)
2056 wol
->wolopts
|= WAKE_BCAST
;
2057 if (adapter
->wol
& ATLX_WUFC_MAG
)
2058 wol
->wolopts
|= WAKE_MAGIC
;
2059 if (adapter
->wol
& ATLX_WUFC_LNKC
)
2060 wol
->wolopts
|= WAKE_PHY
;
2063 static int atl2_set_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
2065 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
2067 if (wol
->wolopts
& (WAKE_ARP
| WAKE_MAGICSECURE
))
2070 if (wol
->wolopts
& (WAKE_UCAST
| WAKE_BCAST
| WAKE_MCAST
))
2073 /* these settings will always override what we currently have */
2076 if (wol
->wolopts
& WAKE_MAGIC
)
2077 adapter
->wol
|= ATLX_WUFC_MAG
;
2078 if (wol
->wolopts
& WAKE_PHY
)
2079 adapter
->wol
|= ATLX_WUFC_LNKC
;
2084 static int atl2_nway_reset(struct net_device
*netdev
)
2086 struct atl2_adapter
*adapter
= netdev_priv(netdev
);
2087 if (netif_running(netdev
))
2088 atl2_reinit_locked(adapter
);
2092 static const struct ethtool_ops atl2_ethtool_ops
= {
2093 .get_settings
= atl2_get_settings
,
2094 .set_settings
= atl2_set_settings
,
2095 .get_drvinfo
= atl2_get_drvinfo
,
2096 .get_regs_len
= atl2_get_regs_len
,
2097 .get_regs
= atl2_get_regs
,
2098 .get_wol
= atl2_get_wol
,
2099 .set_wol
= atl2_set_wol
,
2100 .get_msglevel
= atl2_get_msglevel
,
2101 .set_msglevel
= atl2_set_msglevel
,
2102 .nway_reset
= atl2_nway_reset
,
2103 .get_link
= ethtool_op_get_link
,
2104 .get_eeprom_len
= atl2_get_eeprom_len
,
2105 .get_eeprom
= atl2_get_eeprom
,
2106 .set_eeprom
= atl2_set_eeprom
,
2107 .get_tx_csum
= atl2_get_tx_csum
,
2108 .get_sg
= ethtool_op_get_sg
,
2109 .set_sg
= ethtool_op_set_sg
,
2111 .get_tso
= ethtool_op_get_tso
,
2115 static void atl2_set_ethtool_ops(struct net_device
*netdev
)
2117 SET_ETHTOOL_OPS(netdev
, &atl2_ethtool_ops
);
2120 #define LBYTESWAP(a) ((((a) & 0x00ff00ff) << 8) | \
2121 (((a) & 0xff00ff00) >> 8))
2122 #define LONGSWAP(a) ((LBYTESWAP(a) << 16) | (LBYTESWAP(a) >> 16))
2123 #define SHORTSWAP(a) (((a) << 8) | ((a) >> 8))
2126 * Reset the transmit and receive units; mask and clear all interrupts.
2128 * hw - Struct containing variables accessed by shared code
2129 * return : 0 or idle status (if error)
2131 static s32
atl2_reset_hw(struct atl2_hw
*hw
)
2134 u16 pci_cfg_cmd_word
;
2137 /* Workaround for PCI problem when BIOS sets MMRBC incorrectly. */
2138 atl2_read_pci_cfg(hw
, PCI_REG_COMMAND
, &pci_cfg_cmd_word
);
2139 if ((pci_cfg_cmd_word
&
2140 (CMD_IO_SPACE
|CMD_MEMORY_SPACE
|CMD_BUS_MASTER
)) !=
2141 (CMD_IO_SPACE
|CMD_MEMORY_SPACE
|CMD_BUS_MASTER
)) {
2143 (CMD_IO_SPACE
|CMD_MEMORY_SPACE
|CMD_BUS_MASTER
);
2144 atl2_write_pci_cfg(hw
, PCI_REG_COMMAND
, &pci_cfg_cmd_word
);
2147 /* Clear Interrupt mask to stop board from generating
2148 * interrupts & Clear any pending interrupt events
2151 /* ATL2_WRITE_REG(hw, REG_IMR, 0); */
2152 /* ATL2_WRITE_REG(hw, REG_ISR, 0xffffffff); */
2154 /* Issue Soft Reset to the MAC. This will reset the chip's
2155 * transmit, receive, DMA. It will not effect
2156 * the current PCI configuration. The global reset bit is self-
2157 * clearing, and should clear within a microsecond.
2159 ATL2_WRITE_REG(hw
, REG_MASTER_CTRL
, MASTER_CTRL_SOFT_RST
);
2161 msleep(1); /* delay about 1ms */
2163 /* Wait at least 10ms for All module to be Idle */
2164 for (i
= 0; i
< 10; i
++) {
2165 icr
= ATL2_READ_REG(hw
, REG_IDLE_STATUS
);
2168 msleep(1); /* delay 1 ms */
2178 #define CUSTOM_SPI_CS_SETUP 2
2179 #define CUSTOM_SPI_CLK_HI 2
2180 #define CUSTOM_SPI_CLK_LO 2
2181 #define CUSTOM_SPI_CS_HOLD 2
2182 #define CUSTOM_SPI_CS_HI 3
2184 static struct atl2_spi_flash_dev flash_table
[] =
2186 /* MFR WRSR READ PROGRAM WREN WRDI RDSR RDID SECTOR_ERASE CHIP_ERASE */
2187 {"Atmel", 0x0, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52, 0x62 },
2188 {"SST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0x90, 0x20, 0x60 },
2189 {"ST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0xAB, 0xD8, 0xC7 },
2192 static bool atl2_spi_read(struct atl2_hw
*hw
, u32 addr
, u32
*buf
)
2197 ATL2_WRITE_REG(hw
, REG_SPI_DATA
, 0);
2198 ATL2_WRITE_REG(hw
, REG_SPI_ADDR
, addr
);
2200 value
= SPI_FLASH_CTRL_WAIT_READY
|
2201 (CUSTOM_SPI_CS_SETUP
& SPI_FLASH_CTRL_CS_SETUP_MASK
) <<
2202 SPI_FLASH_CTRL_CS_SETUP_SHIFT
|
2203 (CUSTOM_SPI_CLK_HI
& SPI_FLASH_CTRL_CLK_HI_MASK
) <<
2204 SPI_FLASH_CTRL_CLK_HI_SHIFT
|
2205 (CUSTOM_SPI_CLK_LO
& SPI_FLASH_CTRL_CLK_LO_MASK
) <<
2206 SPI_FLASH_CTRL_CLK_LO_SHIFT
|
2207 (CUSTOM_SPI_CS_HOLD
& SPI_FLASH_CTRL_CS_HOLD_MASK
) <<
2208 SPI_FLASH_CTRL_CS_HOLD_SHIFT
|
2209 (CUSTOM_SPI_CS_HI
& SPI_FLASH_CTRL_CS_HI_MASK
) <<
2210 SPI_FLASH_CTRL_CS_HI_SHIFT
|
2211 (0x1 & SPI_FLASH_CTRL_INS_MASK
) << SPI_FLASH_CTRL_INS_SHIFT
;
2213 ATL2_WRITE_REG(hw
, REG_SPI_FLASH_CTRL
, value
);
2215 value
|= SPI_FLASH_CTRL_START
;
2217 ATL2_WRITE_REG(hw
, REG_SPI_FLASH_CTRL
, value
);
2219 for (i
= 0; i
< 10; i
++) {
2221 value
= ATL2_READ_REG(hw
, REG_SPI_FLASH_CTRL
);
2222 if (!(value
& SPI_FLASH_CTRL_START
))
2226 if (value
& SPI_FLASH_CTRL_START
)
2229 *buf
= ATL2_READ_REG(hw
, REG_SPI_DATA
);
2235 * get_permanent_address
2236 * return 0 if get valid mac address,
2238 static int get_permanent_address(struct atl2_hw
*hw
)
2243 u8 EthAddr
[NODE_ADDRESS_SIZE
];
2246 if (is_valid_ether_addr(hw
->perm_mac_addr
))
2252 if (!atl2_check_eeprom_exist(hw
)) { /* eeprom exists */
2256 /* Read out all EEPROM content */
2259 if (atl2_read_eeprom(hw
, i
+ 0x100, &Control
)) {
2261 if (Register
== REG_MAC_STA_ADDR
)
2263 else if (Register
==
2264 (REG_MAC_STA_ADDR
+ 4))
2267 } else if ((Control
& 0xff) == 0x5A) {
2269 Register
= (u16
) (Control
>> 16);
2271 /* assume data end while encount an invalid KEYWORD */
2275 break; /* read error */
2280 *(u32
*) &EthAddr
[2] = LONGSWAP(Addr
[0]);
2281 *(u16
*) &EthAddr
[0] = SHORTSWAP(*(u16
*) &Addr
[1]);
2283 if (is_valid_ether_addr(EthAddr
)) {
2284 memcpy(hw
->perm_mac_addr
, EthAddr
, NODE_ADDRESS_SIZE
);
2290 /* see if SPI flash exists? */
2297 if (atl2_spi_read(hw
, i
+ 0x1f000, &Control
)) {
2299 if (Register
== REG_MAC_STA_ADDR
)
2301 else if (Register
== (REG_MAC_STA_ADDR
+ 4))
2304 } else if ((Control
& 0xff) == 0x5A) {
2306 Register
= (u16
) (Control
>> 16);
2308 break; /* data end */
2311 break; /* read error */
2316 *(u32
*) &EthAddr
[2] = LONGSWAP(Addr
[0]);
2317 *(u16
*) &EthAddr
[0] = SHORTSWAP(*(u16
*)&Addr
[1]);
2318 if (is_valid_ether_addr(EthAddr
)) {
2319 memcpy(hw
->perm_mac_addr
, EthAddr
, NODE_ADDRESS_SIZE
);
2322 /* maybe MAC-address is from BIOS */
2323 Addr
[0] = ATL2_READ_REG(hw
, REG_MAC_STA_ADDR
);
2324 Addr
[1] = ATL2_READ_REG(hw
, REG_MAC_STA_ADDR
+ 4);
2325 *(u32
*) &EthAddr
[2] = LONGSWAP(Addr
[0]);
2326 *(u16
*) &EthAddr
[0] = SHORTSWAP(*(u16
*) &Addr
[1]);
2328 if (is_valid_ether_addr(EthAddr
)) {
2329 memcpy(hw
->perm_mac_addr
, EthAddr
, NODE_ADDRESS_SIZE
);
2337 * Reads the adapter's MAC address from the EEPROM
2339 * hw - Struct containing variables accessed by shared code
2341 static s32
atl2_read_mac_addr(struct atl2_hw
*hw
)
2345 if (get_permanent_address(hw
)) {
2347 /* FIXME: shouldn't we use random_ether_addr() here? */
2348 hw
->perm_mac_addr
[0] = 0x00;
2349 hw
->perm_mac_addr
[1] = 0x13;
2350 hw
->perm_mac_addr
[2] = 0x74;
2351 hw
->perm_mac_addr
[3] = 0x00;
2352 hw
->perm_mac_addr
[4] = 0x5c;
2353 hw
->perm_mac_addr
[5] = 0x38;
2356 for (i
= 0; i
< NODE_ADDRESS_SIZE
; i
++)
2357 hw
->mac_addr
[i
] = hw
->perm_mac_addr
[i
];
2363 * Hashes an address to determine its location in the multicast table
2365 * hw - Struct containing variables accessed by shared code
2366 * mc_addr - the multicast address to hash
2370 * set hash value for a multicast address
2371 * hash calcu processing :
2372 * 1. calcu 32bit CRC for multicast address
2373 * 2. reverse crc with MSB to LSB
2375 static u32
atl2_hash_mc_addr(struct atl2_hw
*hw
, u8
*mc_addr
)
2381 crc32
= ether_crc_le(6, mc_addr
);
2383 for (i
= 0; i
< 32; i
++)
2384 value
|= (((crc32
>> i
) & 1) << (31 - i
));
2390 * Sets the bit in the multicast table corresponding to the hash value.
2392 * hw - Struct containing variables accessed by shared code
2393 * hash_value - Multicast address hash value
2395 static void atl2_hash_set(struct atl2_hw
*hw
, u32 hash_value
)
2397 u32 hash_bit
, hash_reg
;
2400 /* The HASH Table is a register array of 2 32-bit registers.
2401 * It is treated like an array of 64 bits. We want to set
2402 * bit BitArray[hash_value]. So we figure out what register
2403 * the bit is in, read it, OR in the new bit, then write
2404 * back the new value. The register is determined by the
2405 * upper 7 bits of the hash value and the bit within that
2406 * register are determined by the lower 5 bits of the value.
2408 hash_reg
= (hash_value
>> 31) & 0x1;
2409 hash_bit
= (hash_value
>> 26) & 0x1F;
2411 mta
= ATL2_READ_REG_ARRAY(hw
, REG_RX_HASH_TABLE
, hash_reg
);
2413 mta
|= (1 << hash_bit
);
2415 ATL2_WRITE_REG_ARRAY(hw
, REG_RX_HASH_TABLE
, hash_reg
, mta
);
2419 * atl2_init_pcie - init PCIE module
2421 static void atl2_init_pcie(struct atl2_hw
*hw
)
2424 value
= LTSSM_TEST_MODE_DEF
;
2425 ATL2_WRITE_REG(hw
, REG_LTSSM_TEST_MODE
, value
);
2427 value
= PCIE_DLL_TX_CTRL1_DEF
;
2428 ATL2_WRITE_REG(hw
, REG_PCIE_DLL_TX_CTRL1
, value
);
2431 static void atl2_init_flash_opcode(struct atl2_hw
*hw
)
2433 if (hw
->flash_vendor
>= ARRAY_SIZE(flash_table
))
2434 hw
->flash_vendor
= 0; /* ATMEL */
2437 ATL2_WRITE_REGB(hw
, REG_SPI_FLASH_OP_PROGRAM
,
2438 flash_table
[hw
->flash_vendor
].cmdPROGRAM
);
2439 ATL2_WRITE_REGB(hw
, REG_SPI_FLASH_OP_SC_ERASE
,
2440 flash_table
[hw
->flash_vendor
].cmdSECTOR_ERASE
);
2441 ATL2_WRITE_REGB(hw
, REG_SPI_FLASH_OP_CHIP_ERASE
,
2442 flash_table
[hw
->flash_vendor
].cmdCHIP_ERASE
);
2443 ATL2_WRITE_REGB(hw
, REG_SPI_FLASH_OP_RDID
,
2444 flash_table
[hw
->flash_vendor
].cmdRDID
);
2445 ATL2_WRITE_REGB(hw
, REG_SPI_FLASH_OP_WREN
,
2446 flash_table
[hw
->flash_vendor
].cmdWREN
);
2447 ATL2_WRITE_REGB(hw
, REG_SPI_FLASH_OP_RDSR
,
2448 flash_table
[hw
->flash_vendor
].cmdRDSR
);
2449 ATL2_WRITE_REGB(hw
, REG_SPI_FLASH_OP_WRSR
,
2450 flash_table
[hw
->flash_vendor
].cmdWRSR
);
2451 ATL2_WRITE_REGB(hw
, REG_SPI_FLASH_OP_READ
,
2452 flash_table
[hw
->flash_vendor
].cmdREAD
);
2455 /********************************************************************
2456 * Performs basic configuration of the adapter.
2458 * hw - Struct containing variables accessed by shared code
2459 * Assumes that the controller has previously been reset and is in a
2460 * post-reset uninitialized state. Initializes multicast table,
2461 * and Calls routines to setup link
2462 * Leaves the transmit and receive units disabled and uninitialized.
2463 ********************************************************************/
2464 static s32
atl2_init_hw(struct atl2_hw
*hw
)
2470 /* Zero out the Multicast HASH table */
2471 /* clear the old settings from the multicast hash table */
2472 ATL2_WRITE_REG(hw
, REG_RX_HASH_TABLE
, 0);
2473 ATL2_WRITE_REG_ARRAY(hw
, REG_RX_HASH_TABLE
, 1, 0);
2475 atl2_init_flash_opcode(hw
);
2477 ret_val
= atl2_phy_init(hw
);
2483 * Detects the current speed and duplex settings of the hardware.
2485 * hw - Struct containing variables accessed by shared code
2486 * speed - Speed of the connection
2487 * duplex - Duplex setting of the connection
2489 static s32
atl2_get_speed_and_duplex(struct atl2_hw
*hw
, u16
*speed
,
2495 /* Read PHY Specific Status Register (17) */
2496 ret_val
= atl2_read_phy_reg(hw
, MII_ATLX_PSSR
, &phy_data
);
2500 if (!(phy_data
& MII_ATLX_PSSR_SPD_DPLX_RESOLVED
))
2501 return ATLX_ERR_PHY_RES
;
2503 switch (phy_data
& MII_ATLX_PSSR_SPEED
) {
2504 case MII_ATLX_PSSR_100MBS
:
2507 case MII_ATLX_PSSR_10MBS
:
2511 return ATLX_ERR_PHY_SPEED
;
2515 if (phy_data
& MII_ATLX_PSSR_DPLX
)
2516 *duplex
= FULL_DUPLEX
;
2518 *duplex
= HALF_DUPLEX
;
2524 * Reads the value from a PHY register
2525 * hw - Struct containing variables accessed by shared code
2526 * reg_addr - address of the PHY register to read
2528 static s32
atl2_read_phy_reg(struct atl2_hw
*hw
, u16 reg_addr
, u16
*phy_data
)
2533 val
= ((u32
)(reg_addr
& MDIO_REG_ADDR_MASK
)) << MDIO_REG_ADDR_SHIFT
|
2537 MDIO_CLK_25_4
<< MDIO_CLK_SEL_SHIFT
;
2538 ATL2_WRITE_REG(hw
, REG_MDIO_CTRL
, val
);
2542 for (i
= 0; i
< MDIO_WAIT_TIMES
; i
++) {
2544 val
= ATL2_READ_REG(hw
, REG_MDIO_CTRL
);
2545 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
2549 if (!(val
& (MDIO_START
| MDIO_BUSY
))) {
2550 *phy_data
= (u16
)val
;
2554 return ATLX_ERR_PHY
;
2558 * Writes a value to a PHY register
2559 * hw - Struct containing variables accessed by shared code
2560 * reg_addr - address of the PHY register to write
2561 * data - data to write to the PHY
2563 static s32
atl2_write_phy_reg(struct atl2_hw
*hw
, u32 reg_addr
, u16 phy_data
)
2568 val
= ((u32
)(phy_data
& MDIO_DATA_MASK
)) << MDIO_DATA_SHIFT
|
2569 (reg_addr
& MDIO_REG_ADDR_MASK
) << MDIO_REG_ADDR_SHIFT
|
2572 MDIO_CLK_25_4
<< MDIO_CLK_SEL_SHIFT
;
2573 ATL2_WRITE_REG(hw
, REG_MDIO_CTRL
, val
);
2577 for (i
= 0; i
< MDIO_WAIT_TIMES
; i
++) {
2579 val
= ATL2_READ_REG(hw
, REG_MDIO_CTRL
);
2580 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
2586 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
2589 return ATLX_ERR_PHY
;
2593 * Configures PHY autoneg and flow control advertisement settings
2595 * hw - Struct containing variables accessed by shared code
2597 static s32
atl2_phy_setup_autoneg_adv(struct atl2_hw
*hw
)
2600 s16 mii_autoneg_adv_reg
;
2602 /* Read the MII Auto-Neg Advertisement Register (Address 4). */
2603 mii_autoneg_adv_reg
= MII_AR_DEFAULT_CAP_MASK
;
2605 /* Need to parse autoneg_advertised and set up
2606 * the appropriate PHY registers. First we will parse for
2607 * autoneg_advertised software override. Since we can advertise
2608 * a plethora of combinations, we need to check each bit
2612 /* First we clear all the 10/100 mb speed bits in the Auto-Neg
2613 * Advertisement Register (Address 4) and the 1000 mb speed bits in
2614 * the 1000Base-T Control Register (Address 9). */
2615 mii_autoneg_adv_reg
&= ~MII_AR_SPEED_MASK
;
2617 /* Need to parse MediaType and setup the
2618 * appropriate PHY registers. */
2619 switch (hw
->MediaType
) {
2620 case MEDIA_TYPE_AUTO_SENSOR
:
2621 mii_autoneg_adv_reg
|=
2622 (MII_AR_10T_HD_CAPS
|
2623 MII_AR_10T_FD_CAPS
|
2624 MII_AR_100TX_HD_CAPS
|
2625 MII_AR_100TX_FD_CAPS
);
2626 hw
->autoneg_advertised
=
2632 case MEDIA_TYPE_100M_FULL
:
2633 mii_autoneg_adv_reg
|= MII_AR_100TX_FD_CAPS
;
2634 hw
->autoneg_advertised
= ADVERTISE_100_FULL
;
2636 case MEDIA_TYPE_100M_HALF
:
2637 mii_autoneg_adv_reg
|= MII_AR_100TX_HD_CAPS
;
2638 hw
->autoneg_advertised
= ADVERTISE_100_HALF
;
2640 case MEDIA_TYPE_10M_FULL
:
2641 mii_autoneg_adv_reg
|= MII_AR_10T_FD_CAPS
;
2642 hw
->autoneg_advertised
= ADVERTISE_10_FULL
;
2645 mii_autoneg_adv_reg
|= MII_AR_10T_HD_CAPS
;
2646 hw
->autoneg_advertised
= ADVERTISE_10_HALF
;
2650 /* flow control fixed to enable all */
2651 mii_autoneg_adv_reg
|= (MII_AR_ASM_DIR
| MII_AR_PAUSE
);
2653 hw
->mii_autoneg_adv_reg
= mii_autoneg_adv_reg
;
2655 ret_val
= atl2_write_phy_reg(hw
, MII_ADVERTISE
, mii_autoneg_adv_reg
);
2664 * Resets the PHY and make all config validate
2666 * hw - Struct containing variables accessed by shared code
2668 * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
2670 static s32
atl2_phy_commit(struct atl2_hw
*hw
)
2675 phy_data
= MII_CR_RESET
| MII_CR_AUTO_NEG_EN
| MII_CR_RESTART_AUTO_NEG
;
2676 ret_val
= atl2_write_phy_reg(hw
, MII_BMCR
, phy_data
);
2680 /* pcie serdes link may be down ! */
2681 for (i
= 0; i
< 25; i
++) {
2683 val
= ATL2_READ_REG(hw
, REG_MDIO_CTRL
);
2684 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
2688 if (0 != (val
& (MDIO_START
| MDIO_BUSY
))) {
2689 printk(KERN_ERR
"atl2: PCIe link down for at least 25ms !\n");
2696 static s32
atl2_phy_init(struct atl2_hw
*hw
)
2701 if (hw
->phy_configured
)
2705 ATL2_WRITE_REGW(hw
, REG_PHY_ENABLE
, 1);
2706 ATL2_WRITE_FLUSH(hw
);
2709 /* check if the PHY is in powersaving mode */
2710 atl2_write_phy_reg(hw
, MII_DBG_ADDR
, 0);
2711 atl2_read_phy_reg(hw
, MII_DBG_DATA
, &phy_val
);
2713 /* 024E / 124E 0r 0274 / 1274 ? */
2714 if (phy_val
& 0x1000) {
2716 atl2_write_phy_reg(hw
, MII_DBG_DATA
, phy_val
);
2721 /*Enable PHY LinkChange Interrupt */
2722 ret_val
= atl2_write_phy_reg(hw
, 18, 0xC00);
2726 /* setup AutoNeg parameters */
2727 ret_val
= atl2_phy_setup_autoneg_adv(hw
);
2731 /* SW.Reset & En-Auto-Neg to restart Auto-Neg */
2732 ret_val
= atl2_phy_commit(hw
);
2736 hw
->phy_configured
= true;
2741 static void atl2_set_mac_addr(struct atl2_hw
*hw
)
2744 /* 00-0B-6A-F6-00-DC
2745 * 0: 6AF600DC 1: 000B
2747 value
= (((u32
)hw
->mac_addr
[2]) << 24) |
2748 (((u32
)hw
->mac_addr
[3]) << 16) |
2749 (((u32
)hw
->mac_addr
[4]) << 8) |
2750 (((u32
)hw
->mac_addr
[5]));
2751 ATL2_WRITE_REG_ARRAY(hw
, REG_MAC_STA_ADDR
, 0, value
);
2753 value
= (((u32
)hw
->mac_addr
[0]) << 8) |
2754 (((u32
)hw
->mac_addr
[1]));
2755 ATL2_WRITE_REG_ARRAY(hw
, REG_MAC_STA_ADDR
, 1, value
);
2759 * check_eeprom_exist
2760 * return 0 if eeprom exist
2762 static int atl2_check_eeprom_exist(struct atl2_hw
*hw
)
2766 value
= ATL2_READ_REG(hw
, REG_SPI_FLASH_CTRL
);
2767 if (value
& SPI_FLASH_CTRL_EN_VPD
) {
2768 value
&= ~SPI_FLASH_CTRL_EN_VPD
;
2769 ATL2_WRITE_REG(hw
, REG_SPI_FLASH_CTRL
, value
);
2771 value
= ATL2_READ_REGW(hw
, REG_PCIE_CAP_LIST
);
2772 return ((value
& 0xFF00) == 0x6C00) ? 0 : 1;
2775 /* FIXME: This doesn't look right. -- CHS */
2776 static bool atl2_write_eeprom(struct atl2_hw
*hw
, u32 offset
, u32 value
)
2781 static bool atl2_read_eeprom(struct atl2_hw
*hw
, u32 Offset
, u32
*pValue
)
2787 return false; /* address do not align */
2789 ATL2_WRITE_REG(hw
, REG_VPD_DATA
, 0);
2790 Control
= (Offset
& VPD_CAP_VPD_ADDR_MASK
) << VPD_CAP_VPD_ADDR_SHIFT
;
2791 ATL2_WRITE_REG(hw
, REG_VPD_CAP
, Control
);
2793 for (i
= 0; i
< 10; i
++) {
2795 Control
= ATL2_READ_REG(hw
, REG_VPD_CAP
);
2796 if (Control
& VPD_CAP_VPD_FLAG
)
2800 if (Control
& VPD_CAP_VPD_FLAG
) {
2801 *pValue
= ATL2_READ_REG(hw
, REG_VPD_DATA
);
2804 return false; /* timeout */
2807 static void atl2_force_ps(struct atl2_hw
*hw
)
2811 atl2_write_phy_reg(hw
, MII_DBG_ADDR
, 0);
2812 atl2_read_phy_reg(hw
, MII_DBG_DATA
, &phy_val
);
2813 atl2_write_phy_reg(hw
, MII_DBG_DATA
, phy_val
| 0x1000);
2815 atl2_write_phy_reg(hw
, MII_DBG_ADDR
, 2);
2816 atl2_write_phy_reg(hw
, MII_DBG_DATA
, 0x3000);
2817 atl2_write_phy_reg(hw
, MII_DBG_ADDR
, 3);
2818 atl2_write_phy_reg(hw
, MII_DBG_DATA
, 0);
2821 /* This is the only thing that needs to be changed to adjust the
2822 * maximum number of ports that the driver can manage.
2824 #define ATL2_MAX_NIC 4
2826 #define OPTION_UNSET -1
2827 #define OPTION_DISABLED 0
2828 #define OPTION_ENABLED 1
2830 /* All parameters are treated the same, as an integer array of values.
2831 * This macro just reduces the need to repeat the same declaration code
2832 * over and over (plus this helps to avoid typo bugs).
2834 #define ATL2_PARAM_INIT {[0 ... ATL2_MAX_NIC] = OPTION_UNSET}
2835 #ifndef module_param_array
2836 /* Module Parameters are always initialized to -1, so that the driver
2837 * can tell the difference between no user specified value or the
2838 * user asking for the default value.
2839 * The true default values are loaded in when atl2_check_options is called.
2841 * This is a GCC extension to ANSI C.
2842 * See the item "Labeled Elements in Initializers" in the section
2843 * "Extensions to the C Language Family" of the GCC documentation.
2846 #define ATL2_PARAM(X, desc) \
2847 static const int __devinitdata X[ATL2_MAX_NIC + 1] = ATL2_PARAM_INIT; \
2848 MODULE_PARM(X, "1-" __MODULE_STRING(ATL2_MAX_NIC) "i"); \
2849 MODULE_PARM_DESC(X, desc);
2851 #define ATL2_PARAM(X, desc) \
2852 static int __devinitdata X[ATL2_MAX_NIC+1] = ATL2_PARAM_INIT; \
2853 static unsigned int num_##X; \
2854 module_param_array_named(X, X, int, &num_##X, 0); \
2855 MODULE_PARM_DESC(X, desc);
2859 * Transmit Memory Size
2860 * Valid Range: 64-2048
2861 * Default Value: 128
2863 #define ATL2_MIN_TX_MEMSIZE 4 /* 4KB */
2864 #define ATL2_MAX_TX_MEMSIZE 64 /* 64KB */
2865 #define ATL2_DEFAULT_TX_MEMSIZE 8 /* 8KB */
2866 ATL2_PARAM(TxMemSize
, "Bytes of Transmit Memory");
2869 * Receive Memory Block Count
2870 * Valid Range: 16-512
2871 * Default Value: 128
2873 #define ATL2_MIN_RXD_COUNT 16
2874 #define ATL2_MAX_RXD_COUNT 512
2875 #define ATL2_DEFAULT_RXD_COUNT 64
2876 ATL2_PARAM(RxMemBlock
, "Number of receive memory block");
2879 * User Specified MediaType Override
2882 * - 0 - auto-negotiate at all supported speeds
2883 * - 1 - only link at 1000Mbps Full Duplex
2884 * - 2 - only link at 100Mbps Full Duplex
2885 * - 3 - only link at 100Mbps Half Duplex
2886 * - 4 - only link at 10Mbps Full Duplex
2887 * - 5 - only link at 10Mbps Half Duplex
2890 ATL2_PARAM(MediaType
, "MediaType Select");
2893 * Interrupt Moderate Timer in units of 2048 ns (~2 us)
2894 * Valid Range: 10-65535
2895 * Default Value: 45000(90ms)
2897 #define INT_MOD_DEFAULT_CNT 100 /* 200us */
2898 #define INT_MOD_MAX_CNT 65000
2899 #define INT_MOD_MIN_CNT 50
2900 ATL2_PARAM(IntModTimer
, "Interrupt Moderator Timer");
2909 ATL2_PARAM(FlashVendor
, "SPI Flash Vendor");
2911 #define AUTONEG_ADV_DEFAULT 0x2F
2912 #define AUTONEG_ADV_MASK 0x2F
2913 #define FLOW_CONTROL_DEFAULT FLOW_CONTROL_FULL
2915 #define FLASH_VENDOR_DEFAULT 0
2916 #define FLASH_VENDOR_MIN 0
2917 #define FLASH_VENDOR_MAX 2
2919 struct atl2_option
{
2920 enum { enable_option
, range_option
, list_option
} type
;
2925 struct { /* range_option info */
2929 struct { /* list_option info */
2931 struct atl2_opt_list
{ int i
; char *str
; } *p
;
2936 static int __devinit
atl2_validate_option(int *value
, struct atl2_option
*opt
)
2939 struct atl2_opt_list
*ent
;
2941 if (*value
== OPTION_UNSET
) {
2946 switch (opt
->type
) {
2949 case OPTION_ENABLED
:
2950 printk(KERN_INFO
"%s Enabled\n", opt
->name
);
2953 case OPTION_DISABLED
:
2954 printk(KERN_INFO
"%s Disabled\n", opt
->name
);
2960 if (*value
>= opt
->arg
.r
.min
&& *value
<= opt
->arg
.r
.max
) {
2961 printk(KERN_INFO
"%s set to %i\n", opt
->name
, *value
);
2966 for (i
= 0; i
< opt
->arg
.l
.nr
; i
++) {
2967 ent
= &opt
->arg
.l
.p
[i
];
2968 if (*value
== ent
->i
) {
2969 if (ent
->str
[0] != '\0')
2970 printk(KERN_INFO
"%s\n", ent
->str
);
2979 printk(KERN_INFO
"Invalid %s specified (%i) %s\n",
2980 opt
->name
, *value
, opt
->err
);
2986 * atl2_check_options - Range Checking for Command Line Parameters
2987 * @adapter: board private structure
2989 * This routine checks all command line parameters for valid user
2990 * input. If an invalid value is given, or if no user specified
2991 * value exists, a default value is used. The final value is stored
2992 * in a variable in the adapter structure.
2994 static void __devinit
atl2_check_options(struct atl2_adapter
*adapter
)
2997 struct atl2_option opt
;
2998 int bd
= adapter
->bd_number
;
2999 if (bd
>= ATL2_MAX_NIC
) {
3000 printk(KERN_NOTICE
"Warning: no configuration for board #%i\n",
3002 printk(KERN_NOTICE
"Using defaults for all values\n");
3003 #ifndef module_param_array
3008 /* Bytes of Transmit Memory */
3009 opt
.type
= range_option
;
3010 opt
.name
= "Bytes of Transmit Memory";
3011 opt
.err
= "using default of " __MODULE_STRING(ATL2_DEFAULT_TX_MEMSIZE
);
3012 opt
.def
= ATL2_DEFAULT_TX_MEMSIZE
;
3013 opt
.arg
.r
.min
= ATL2_MIN_TX_MEMSIZE
;
3014 opt
.arg
.r
.max
= ATL2_MAX_TX_MEMSIZE
;
3015 #ifdef module_param_array
3016 if (num_TxMemSize
> bd
) {
3018 val
= TxMemSize
[bd
];
3019 atl2_validate_option(&val
, &opt
);
3020 adapter
->txd_ring_size
= ((u32
) val
) * 1024;
3021 #ifdef module_param_array
3023 adapter
->txd_ring_size
= ((u32
)opt
.def
) * 1024;
3025 /* txs ring size: */
3026 adapter
->txs_ring_size
= adapter
->txd_ring_size
/ 128;
3027 if (adapter
->txs_ring_size
> 160)
3028 adapter
->txs_ring_size
= 160;
3030 /* Receive Memory Block Count */
3031 opt
.type
= range_option
;
3032 opt
.name
= "Number of receive memory block";
3033 opt
.err
= "using default of " __MODULE_STRING(ATL2_DEFAULT_RXD_COUNT
);
3034 opt
.def
= ATL2_DEFAULT_RXD_COUNT
;
3035 opt
.arg
.r
.min
= ATL2_MIN_RXD_COUNT
;
3036 opt
.arg
.r
.max
= ATL2_MAX_RXD_COUNT
;
3037 #ifdef module_param_array
3038 if (num_RxMemBlock
> bd
) {
3040 val
= RxMemBlock
[bd
];
3041 atl2_validate_option(&val
, &opt
);
3042 adapter
->rxd_ring_size
= (u32
)val
;
3044 /* ((u16)val)&~1; */ /* even number */
3045 #ifdef module_param_array
3047 adapter
->rxd_ring_size
= (u32
)opt
.def
;
3049 /* init RXD Flow control value */
3050 adapter
->hw
.fc_rxd_hi
= (adapter
->rxd_ring_size
/ 8) * 7;
3051 adapter
->hw
.fc_rxd_lo
= (ATL2_MIN_RXD_COUNT
/ 8) >
3052 (adapter
->rxd_ring_size
/ 12) ? (ATL2_MIN_RXD_COUNT
/ 8) :
3053 (adapter
->rxd_ring_size
/ 12);
3055 /* Interrupt Moderate Timer */
3056 opt
.type
= range_option
;
3057 opt
.name
= "Interrupt Moderate Timer";
3058 opt
.err
= "using default of " __MODULE_STRING(INT_MOD_DEFAULT_CNT
);
3059 opt
.def
= INT_MOD_DEFAULT_CNT
;
3060 opt
.arg
.r
.min
= INT_MOD_MIN_CNT
;
3061 opt
.arg
.r
.max
= INT_MOD_MAX_CNT
;
3062 #ifdef module_param_array
3063 if (num_IntModTimer
> bd
) {
3065 val
= IntModTimer
[bd
];
3066 atl2_validate_option(&val
, &opt
);
3067 adapter
->imt
= (u16
) val
;
3068 #ifdef module_param_array
3070 adapter
->imt
= (u16
)(opt
.def
);
3073 opt
.type
= range_option
;
3074 opt
.name
= "SPI Flash Vendor";
3075 opt
.err
= "using default of " __MODULE_STRING(FLASH_VENDOR_DEFAULT
);
3076 opt
.def
= FLASH_VENDOR_DEFAULT
;
3077 opt
.arg
.r
.min
= FLASH_VENDOR_MIN
;
3078 opt
.arg
.r
.max
= FLASH_VENDOR_MAX
;
3079 #ifdef module_param_array
3080 if (num_FlashVendor
> bd
) {
3082 val
= FlashVendor
[bd
];
3083 atl2_validate_option(&val
, &opt
);
3084 adapter
->hw
.flash_vendor
= (u8
) val
;
3085 #ifdef module_param_array
3087 adapter
->hw
.flash_vendor
= (u8
)(opt
.def
);
3090 opt
.type
= range_option
;
3091 opt
.name
= "Speed/Duplex Selection";
3092 opt
.err
= "using default of " __MODULE_STRING(MEDIA_TYPE_AUTO_SENSOR
);
3093 opt
.def
= MEDIA_TYPE_AUTO_SENSOR
;
3094 opt
.arg
.r
.min
= MEDIA_TYPE_AUTO_SENSOR
;
3095 opt
.arg
.r
.max
= MEDIA_TYPE_10M_HALF
;
3096 #ifdef module_param_array
3097 if (num_MediaType
> bd
) {
3099 val
= MediaType
[bd
];
3100 atl2_validate_option(&val
, &opt
);
3101 adapter
->hw
.MediaType
= (u16
) val
;
3102 #ifdef module_param_array
3104 adapter
->hw
.MediaType
= (u16
)(opt
.def
);