drivers/net/benet/be.h

   1 /*
   2  * Copyright (C) 2005 - 2011 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 #ifndef BE_H
  19 #define BE_H
  20
  21 #include <linux/pci.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/version.h>
  24 #include <linux/delay.h>
  25 #include <net/tcp.h>
  26 #include <net/ip.h>
  27 #include <net/ipv6.h>
  28 #include <linux/if_vlan.h>
  29 #include <linux/workqueue.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/firmware.h>
  32 #include <linux/slab.h>
  33
  34 #include "be_hw.h"
  35
  36 #define DRV_VER                 "4.0.100u"
  37 #define DRV_NAME                "be2net"
  38 #define BE_NAME                 "ServerEngines BladeEngine2 10Gbps NIC"
  39 #define BE3_NAME                "ServerEngines BladeEngine3 10Gbps NIC"
  40 #define OC_NAME                 "Emulex OneConnect 10Gbps NIC"
  41 #define OC_NAME_BE              OC_NAME "(be3)"
  42 #define OC_NAME_LANCER          OC_NAME "(Lancer)"
  43 #define DRV_DESC                "ServerEngines BladeEngine 10Gbps NIC Driver"
  44
  45 #define BE_VENDOR_ID            0x19a2
  46 #define EMULEX_VENDOR_ID        0x10df
  47 #define BE_DEVICE_ID1           0x211
  48 #define BE_DEVICE_ID2           0x221
  49 #define OC_DEVICE_ID1           0x700   /* Device Id for BE2 cards */
  50 #define OC_DEVICE_ID2           0x710   /* Device Id for BE3 cards */
  51 #define OC_DEVICE_ID3           0xe220  /* Device id for Lancer cards */
  52
  53 static inline char *nic_name(struct pci_dev *pdev)
  54 {
  55         switch (pdev->device) {
  56         case OC_DEVICE_ID1:
  57                 return OC_NAME;
  58         case OC_DEVICE_ID2:
  59                 return OC_NAME_BE;
  60         case OC_DEVICE_ID3:
  61                 return OC_NAME_LANCER;
  62         case BE_DEVICE_ID2:
  63                 return BE3_NAME;
  64         default:
  65                 return BE_NAME;
  66         }
  67 }
  68
  69 /* Number of bytes of an RX frame that are copied to skb->data */
  70 #define BE_HDR_LEN              ((u16) 64)
  71 #define BE_MAX_JUMBO_FRAME_SIZE 9018
  72 #define BE_MIN_MTU              256
  73
  74 #define BE_NUM_VLANS_SUPPORTED  64
  75 #define BE_MAX_EQD              96
  76 #define BE_MAX_TX_FRAG_COUNT    30
  77
  78 #define EVNT_Q_LEN              1024
  79 #define TX_Q_LEN                2048
  80 #define TX_CQ_LEN               1024
  81 #define RX_Q_LEN                1024    /* Does not support any other value */
  82 #define RX_CQ_LEN               1024
  83 #define MCC_Q_LEN               128     /* total size not to exceed 8 pages */
  84 #define MCC_CQ_LEN              256
  85
  86 #define MAX_RSS_QS              4       /* BE limit is 4 queues/port */
  87 #define MAX_RX_QS               (MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
  88 #define BE_MAX_MSIX_VECTORS     (MAX_RX_QS + 1)/* RX + TX */
  89 #define BE_NAPI_WEIGHT          64
  90 #define MAX_RX_POST             BE_NAPI_WEIGHT /* Frags posted at a time */
  91 #define RX_FRAGS_REFILL_WM      (RX_Q_LEN - MAX_RX_POST)
  92
  93 #define FW_VER_LEN              32
  94
  95 struct be_dma_mem {
  96         void *va;
  97         dma_addr_t dma;
  98         u32 size;
  99 };
 100
 101 struct be_queue_info {
 102         struct be_dma_mem dma_mem;
 103         u16 len;
 104         u16 entry_size; /* Size of an element in the queue */
 105         u16 id;
 106         u16 tail, head;
 107         bool created;
 108         atomic_t used;  /* Number of valid elements in the queue */
 109 };
 110
 111 static inline u32 MODULO(u16 val, u16 limit)
 112 {
 113         BUG_ON(limit & (limit - 1));
 114         return val & (limit - 1);
 115 }
 116
 117 static inline void index_adv(u16 *index, u16 val, u16 limit)
 118 {
 119         *index = MODULO((*index + val), limit);
 120 }
 121
 122 static inline void index_inc(u16 *index, u16 limit)
 123 {
 124         *index = MODULO((*index + 1), limit);
 125 }
 126
 127 static inline void *queue_head_node(struct be_queue_info *q)
 128 {
 129         return q->dma_mem.va + q->head * q->entry_size;
 130 }
 131
 132 static inline void *queue_tail_node(struct be_queue_info *q)
 133 {
 134         return q->dma_mem.va + q->tail * q->entry_size;
 135 }
 136
 137 static inline void queue_head_inc(struct be_queue_info *q)
 138 {
 139         index_inc(&q->head, q->len);
 140 }
 141
 142 static inline void queue_tail_inc(struct be_queue_info *q)
 143 {
 144         index_inc(&q->tail, q->len);
 145 }
 146
 147 struct be_eq_obj {
 148         struct be_queue_info q;
 149         char desc[32];
 150
 151         /* Adaptive interrupt coalescing (AIC) info */
 152         bool enable_aic;
 153         u16 min_eqd;            /* in usecs */
 154         u16 max_eqd;            /* in usecs */
 155         u16 cur_eqd;            /* in usecs */
 156         u8  eq_idx;
 157
 158         struct napi_struct napi;
 159 };
 160
 161 struct be_mcc_obj {
 162         struct be_queue_info q;
 163         struct be_queue_info cq;
 164         bool rearm_cq;
 165 };
 166
 167 struct be_tx_stats {
 168         u32 be_tx_reqs;         /* number of TX requests initiated */
 169         u32 be_tx_stops;        /* number of times TX Q was stopped */
 170         u32 be_tx_wrbs;         /* number of tx WRBs used */
 171         u32 be_tx_events;       /* number of tx completion events  */
 172         u32 be_tx_compl;        /* number of tx completion entries processed */
 173         ulong be_tx_jiffies;
 174         u64 be_tx_bytes;
 175         u64 be_tx_bytes_prev;
 176         u64 be_tx_pkts;
 177         u32 be_tx_rate;
 178 };
 179
 180 struct be_tx_obj {
 181         struct be_queue_info q;
 182         struct be_queue_info cq;
 183         /* Remember the skbs that were transmitted */
 184         struct sk_buff *sent_skb_list[TX_Q_LEN];
 185 };
 186
 187 /* Struct to remember the pages posted for rx frags */
 188 struct be_rx_page_info {
 189         struct page *page;
 190         DEFINE_DMA_UNMAP_ADDR(bus);
 191         u16 page_offset;
 192         bool last_page_user;
 193 };
 194
 195 struct be_rx_stats {
 196         u32 rx_post_fail;/* number of ethrx buffer alloc failures */
 197         u32 rx_polls;   /* number of times NAPI called poll function */
 198         u32 rx_events;  /* number of ucast rx completion events  */
 199         u32 rx_compl;   /* number of rx completion entries processed */
 200         ulong rx_jiffies;
 201         u64 rx_bytes;
 202         u64 rx_bytes_prev;
 203         u64 rx_pkts;
 204         u32 rx_rate;
 205         u32 rx_mcast_pkts;
 206         u32 rxcp_err;   /* Num rx completion entries w/ err set. */
 207         ulong rx_fps_jiffies;   /* jiffies at last FPS calc */
 208         u32 rx_frags;
 209         u32 prev_rx_frags;
 210         u32 rx_fps;             /* Rx frags per second */
 211 };
 212
 213 struct be_rx_compl_info {
 214         u32 rss_hash;
 215         u16 vlan_tag;
 216         u16 pkt_size;
 217         u16 rxq_idx;
 218         u16 mac_id;
 219         u8 vlanf;
 220         u8 num_rcvd;
 221         u8 err;
 222         u8 ipf;
 223         u8 tcpf;
 224         u8 udpf;
 225         u8 ip_csum;
 226         u8 l4_csum;
 227         u8 ipv6;
 228         u8 vtm;
 229         u8 pkt_type;
 230 };
 231
 232 struct be_rx_obj {
 233         struct be_adapter *adapter;
 234         struct be_queue_info q;
 235         struct be_queue_info cq;
 236         struct be_rx_compl_info rxcp;
 237         struct be_rx_page_info page_info_tbl[RX_Q_LEN];
 238         struct be_eq_obj rx_eq;
 239         struct be_rx_stats stats;
 240         u8 rss_id;
 241         bool rx_post_starved;   /* Zero rx frags have been posted to BE */
 242         u32 cache_line_barrier[16];
 243 };
 244
 245 struct be_drv_stats {
 246         u8 be_on_die_temperature;
 247         u64 be_tx_events;
 248         u64 eth_red_drops;
 249         u64 rx_drops_no_pbuf;
 250         u64 rx_drops_no_txpb;
 251         u64 rx_drops_no_erx_descr;
 252         u64 rx_drops_no_tpre_descr;
 253         u64 rx_drops_too_many_frags;
 254         u64 rx_drops_invalid_ring;
 255         u64 forwarded_packets;
 256         u64 rx_drops_mtu;
 257         u64 rx_crc_errors;
 258         u64 rx_alignment_symbol_errors;
 259         u64 rx_pause_frames;
 260         u64 rx_priority_pause_frames;
 261         u64 rx_control_frames;
 262         u64 rx_in_range_errors;
 263         u64 rx_out_range_errors;
 264         u64 rx_frame_too_long;
 265         u64 rx_address_match_errors;
 266         u64 rx_dropped_too_small;
 267         u64 rx_dropped_too_short;
 268         u64 rx_dropped_header_too_small;
 269         u64 rx_dropped_tcp_length;
 270         u64 rx_dropped_runt;
 271         u64 rx_ip_checksum_errs;
 272         u64 rx_tcp_checksum_errs;
 273         u64 rx_udp_checksum_errs;
 274         u64 rx_switched_unicast_packets;
 275         u64 rx_switched_multicast_packets;
 276         u64 rx_switched_broadcast_packets;
 277         u64 tx_pauseframes;
 278         u64 tx_priority_pauseframes;
 279         u64 tx_controlframes;
 280         u64 rxpp_fifo_overflow_drop;
 281         u64 rx_input_fifo_overflow_drop;
 282         u64 pmem_fifo_overflow_drop;
 283         u64 jabber_events;
 284 };
 285
 286 struct be_vf_cfg {
 287         unsigned char vf_mac_addr[ETH_ALEN];
 288         u32 vf_if_handle;
 289         u32 vf_pmac_id;
 290         u16 vf_vlan_tag;
 291         u32 vf_tx_rate;
 292 };
 293
 294 #define BE_INVALID_PMAC_ID              0xffffffff
 295
 296 struct be_adapter {
 297         struct pci_dev *pdev;
 298         struct net_device *netdev;
 299
 300         u8 __iomem *csr;
 301         u8 __iomem *db;         /* Door Bell */
 302         u8 __iomem *pcicfg;     /* PCI config space */
 303
 304         struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
 305         struct be_dma_mem mbox_mem;
 306         /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
 307          * is stored for freeing purpose */
 308         struct be_dma_mem mbox_mem_alloced;
 309
 310         struct be_mcc_obj mcc_obj;
 311         spinlock_t mcc_lock;    /* For serializing mcc cmds to BE card */
 312         spinlock_t mcc_cq_lock;
 313
 314         struct msix_entry msix_entries[BE_MAX_MSIX_VECTORS];
 315         u32 num_msix_vec;
 316         bool isr_registered;
 317
 318         /* TX Rings */
 319         struct be_eq_obj tx_eq;
 320         struct be_tx_obj tx_obj;
 321         struct be_tx_stats tx_stats;
 322
 323         u32 cache_line_break[8];
 324
 325         /* Rx rings */
 326         struct be_rx_obj rx_obj[MAX_RX_QS];
 327         u32 num_rx_qs;
 328         u32 big_page_size;      /* Compounded page size shared by rx wrbs */
 329
 330         u8 eq_next_idx;
 331         struct be_drv_stats drv_stats;
 332
 333         struct vlan_group *vlan_grp;
 334         u16 vlans_added;
 335         u16 max_vlans;  /* Number of vlans supported */
 336         u8 vlan_tag[VLAN_N_VID];
 337         u8 vlan_prio_bmap;      /* Available Priority BitMap */
 338         u16 recommended_prio;   /* Recommended Priority */
 339         struct be_dma_mem mc_cmd_mem;
 340
 341         struct be_dma_mem stats_cmd;
 342         /* Work queue used to perform periodic tasks like getting statistics */
 343         struct delayed_work work;
 344         u16 work_counter;
 345
 346         /* Ethtool knobs and info */
 347         char fw_ver[FW_VER_LEN];
 348         u32 if_handle;          /* Used to configure filtering */
 349         u32 pmac_id;            /* MAC addr handle used by BE card */
 350         u32 beacon_state;       /* for set_phys_id */
 351
 352         bool eeh_err;
 353         bool link_up;
 354         u32 port_num;
 355         bool promiscuous;
 356         bool wol;
 357         u32 function_mode;
 358         u32 function_caps;
 359         u32 rx_fc;              /* Rx flow control */
 360         u32 tx_fc;              /* Tx flow control */
 361         bool ue_detected;
 362         bool stats_cmd_sent;
 363         int link_speed;
 364         u8 port_type;
 365         u8 transceiver;
 366         u8 autoneg;
 367         u8 generation;          /* BladeEngine ASIC generation */
 368         u32 flash_status;
 369         struct completion flash_compl;
 370
 371         bool be3_native;
 372         bool sriov_enabled;
 373         struct be_vf_cfg *vf_cfg;
 374         u8 is_virtfn;
 375         u32 sli_family;
 376         u8 hba_port_num;
 377         u16 pvid;
 378 };
 379
 380 #define be_physfn(adapter) (!adapter->is_virtfn)
 381
 382 /* BladeEngine Generation numbers */
 383 #define BE_GEN2 2
 384 #define BE_GEN3 3
 385
 386 #define lancer_chip(adapter)            (adapter->pdev->device == OC_DEVICE_ID3)
 387
 388 extern const struct ethtool_ops be_ethtool_ops;
 389
 390 #define msix_enabled(adapter)           (adapter->num_msix_vec > 0)
 391 #define tx_stats(adapter)               (&adapter->tx_stats)
 392 #define rx_stats(rxo)                   (&rxo->stats)
 393
 394 #define BE_SET_NETDEV_OPS(netdev, ops)  (netdev->netdev_ops = ops)
 395
 396 #define for_all_rx_queues(adapter, rxo, i)                              \
 397         for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;  \
 398                 i++, rxo++)
 399
 400 /* Just skip the first default non-rss queue */
 401 #define for_all_rss_queues(adapter, rxo, i)                             \
 402         for (i = 0, rxo = &adapter->rx_obj[i+1]; i < (adapter->num_rx_qs - 1);\
 403                 i++, rxo++)
 404
 405 #define PAGE_SHIFT_4K           12
 406 #define PAGE_SIZE_4K            (1 << PAGE_SHIFT_4K)
 407
 408 /* Returns number of pages spanned by the data starting at the given addr */
 409 #define PAGES_4K_SPANNED(_address, size)                                \
 410                 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) +     \
 411                         (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
 412
 413 /* Byte offset into the page corresponding to given address */
 414 #define OFFSET_IN_PAGE(addr)                                            \
 415                  ((size_t)(addr) & (PAGE_SIZE_4K-1))
 416
 417 /* Returns bit offset within a DWORD of a bitfield */
 418 #define AMAP_BIT_OFFSET(_struct, field)                                 \
 419                 (((size_t)&(((_struct *)0)->field))%32)
 420
 421 /* Returns the bit mask of the field that is NOT shifted into location. */
 422 static inline u32 amap_mask(u32 bitsize)
 423 {
 424         return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
 425 }
 426
 427 static inline void
 428 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
 429 {
 430         u32 *dw = (u32 *) ptr + dw_offset;
 431         *dw &= ~(mask << offset);
 432         *dw |= (mask & value) << offset;
 433 }
 434
 435 #define AMAP_SET_BITS(_struct, field, ptr, val)                         \
 436                 amap_set(ptr,                                           \
 437                         offsetof(_struct, field)/32,                    \
 438                         amap_mask(sizeof(((_struct *)0)->field)),       \
 439                         AMAP_BIT_OFFSET(_struct, field),                \
 440                         val)
 441
 442 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
 443 {
 444         u32 *dw = (u32 *) ptr;
 445         return mask & (*(dw + dw_offset) >> offset);
 446 }
 447
 448 #define AMAP_GET_BITS(_struct, field, ptr)                              \
 449                 amap_get(ptr,                                           \
 450                         offsetof(_struct, field)/32,                    \
 451                         amap_mask(sizeof(((_struct *)0)->field)),       \
 452                         AMAP_BIT_OFFSET(_struct, field))
 453
 454 #define be_dws_cpu_to_le(wrb, len)      swap_dws(wrb, len)
 455 #define be_dws_le_to_cpu(wrb, len)      swap_dws(wrb, len)
 456 static inline void swap_dws(void *wrb, int len)
 457 {
 458 #ifdef __BIG_ENDIAN
 459         u32 *dw = wrb;
 460         BUG_ON(len % 4);
 461         do {
 462                 *dw = cpu_to_le32(*dw);
 463                 dw++;
 464                 len -= 4;
 465         } while (len);
 466 #endif                          /* __BIG_ENDIAN */
 467 }
 468
 469 static inline u8 is_tcp_pkt(struct sk_buff *skb)
 470 {
 471         u8 val = 0;
 472
 473         if (ip_hdr(skb)->version == 4)
 474                 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
 475         else if (ip_hdr(skb)->version == 6)
 476                 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
 477
 478         return val;
 479 }
 480
 481 static inline u8 is_udp_pkt(struct sk_buff *skb)
 482 {
 483         u8 val = 0;
 484
 485         if (ip_hdr(skb)->version == 4)
 486                 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
 487         else if (ip_hdr(skb)->version == 6)
 488                 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
 489
 490         return val;
 491 }
 492
 493 static inline void be_check_sriov_fn_type(struct be_adapter *adapter)
 494 {
 495         u32 sli_intf;
 496
 497         pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
 498         adapter->is_virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
 499 }
 500
 501 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
 502 {
 503         u32 addr;
 504
 505         addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
 506
 507         mac[5] = (u8)(addr & 0xFF);
 508         mac[4] = (u8)((addr >> 8) & 0xFF);
 509         mac[3] = (u8)((addr >> 16) & 0xFF);
 510         /* Use the OUI from the current MAC address */
 511         memcpy(mac, adapter->netdev->dev_addr, 3);
 512 }
 513
 514 static inline bool be_multi_rxq(const struct be_adapter *adapter)
 515 {
 516         return adapter->num_rx_qs > 1;
 517 }
 518
 519 extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
 520                 u16 num_popped);
 521 extern void be_link_status_update(struct be_adapter *adapter, bool link_up);
 522 extern void netdev_stats_update(struct be_adapter *adapter);
 523 extern void be_parse_stats(struct be_adapter *adapter);
 524 extern int be_load_fw(struct be_adapter *adapter, u8 *func);
 525 #endif                          /* BE_H */