2 * Copyright (C) 2005 - 2010 ServerEngines
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
14 * 209 N. Fair Oaks Ave
21 #include <linux/pci.h>
22 #include <linux/etherdevice.h>
23 #include <linux/version.h>
24 #include <linux/delay.h>
28 #include <linux/if_vlan.h>
29 #include <linux/workqueue.h>
30 #include <linux/interrupt.h>
31 #include <linux/firmware.h>
32 #include <linux/slab.h>
36 #define DRV_VER "2.102.147u"
37 #define DRV_NAME "be2net"
38 #define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
39 #define BE3_NAME "ServerEngines BladeEngine3 10Gbps NIC"
40 #define OC_NAME "Emulex OneConnect 10Gbps NIC"
41 #define OC_NAME1 "Emulex OneConnect 10Gbps NIC (be3)"
42 #define DRV_DESC "ServerEngines BladeEngine 10Gbps NIC Driver"
44 #define BE_VENDOR_ID 0x19a2
45 #define BE_DEVICE_ID1 0x211
46 #define BE_DEVICE_ID2 0x221
47 #define OC_DEVICE_ID1 0x700
48 #define OC_DEVICE_ID2 0x710
50 static inline char *nic_name(struct pci_dev
*pdev
)
52 switch (pdev
->device
) {
64 /* Number of bytes of an RX frame that are copied to skb->data */
66 #define BE_MAX_JUMBO_FRAME_SIZE 9018
67 #define BE_MIN_MTU 256
69 #define BE_NUM_VLANS_SUPPORTED 64
71 #define BE_MAX_TX_FRAG_COUNT 30
73 #define EVNT_Q_LEN 1024
75 #define TX_CQ_LEN 1024
76 #define RX_Q_LEN 1024 /* Does not support any other value */
77 #define RX_CQ_LEN 1024
78 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
79 #define MCC_CQ_LEN 256
81 #define BE_NAPI_WEIGHT 64
82 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
83 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
95 struct be_queue_info
{
96 struct be_dma_mem dma_mem
;
98 u16 entry_size
; /* Size of an element in the queue */
102 atomic_t used
; /* Number of valid elements in the queue */
105 static inline u32
MODULO(u16 val
, u16 limit
)
107 BUG_ON(limit
& (limit
- 1));
108 return val
& (limit
- 1);
111 static inline void index_adv(u16
*index
, u16 val
, u16 limit
)
113 *index
= MODULO((*index
+ val
), limit
);
116 static inline void index_inc(u16
*index
, u16 limit
)
118 *index
= MODULO((*index
+ 1), limit
);
121 static inline void *queue_head_node(struct be_queue_info
*q
)
123 return q
->dma_mem
.va
+ q
->head
* q
->entry_size
;
126 static inline void *queue_tail_node(struct be_queue_info
*q
)
128 return q
->dma_mem
.va
+ q
->tail
* q
->entry_size
;
131 static inline void queue_head_inc(struct be_queue_info
*q
)
133 index_inc(&q
->head
, q
->len
);
136 static inline void queue_tail_inc(struct be_queue_info
*q
)
138 index_inc(&q
->tail
, q
->len
);
142 struct be_queue_info q
;
145 /* Adaptive interrupt coalescing (AIC) info */
147 u16 min_eqd
; /* in usecs */
148 u16 max_eqd
; /* in usecs */
149 u16 cur_eqd
; /* in usecs */
151 struct napi_struct napi
;
155 struct be_queue_info q
;
156 struct be_queue_info cq
;
160 struct be_drvr_stats
{
161 u32 be_tx_reqs
; /* number of TX requests initiated */
162 u32 be_tx_stops
; /* number of times TX Q was stopped */
163 u32 be_fwd_reqs
; /* number of send reqs through forwarding i/f */
164 u32 be_tx_wrbs
; /* number of tx WRBs used */
165 u32 be_tx_events
; /* number of tx completion events */
166 u32 be_tx_compl
; /* number of tx completion entries processed */
169 u64 be_tx_bytes_prev
;
173 u32 cache_barrier
[16];
175 u32 be_ethrx_post_fail
;/* number of ethrx buffer alloc failures */
176 u32 be_rx_polls
; /* number of times NAPI called poll function */
177 u32 be_rx_events
; /* number of ucast rx completion events */
178 u32 be_rx_compl
; /* number of rx completion entries processed */
181 u64 be_rx_bytes_prev
;
184 /* number of non ether type II frames dropped where
185 * frame len > length field of Mac Hdr */
186 u32 be_802_3_dropped_frames
;
187 /* number of non ether type II frames malformed where
188 * in frame len < length field of Mac Hdr */
189 u32 be_802_3_malformed_frames
;
190 u32 be_rxcp_err
; /* Num rx completion entries w/ err set. */
191 ulong rx_fps_jiffies
; /* jiffies at last FPS calc */
193 u32 be_prev_rx_frags
;
194 u32 be_rx_fps
; /* Rx frags per second */
197 struct be_stats_obj
{
198 struct be_drvr_stats drvr_stats
;
199 struct be_dma_mem cmd
;
203 struct be_queue_info q
;
204 struct be_queue_info cq
;
205 /* Remember the skbs that were transmitted */
206 struct sk_buff
*sent_skb_list
[TX_Q_LEN
];
209 /* Struct to remember the pages posted for rx frags */
210 struct be_rx_page_info
{
212 DEFINE_DMA_UNMAP_ADDR(bus
);
218 struct be_queue_info q
;
219 struct be_queue_info cq
;
220 struct be_rx_page_info page_info_tbl
[RX_Q_LEN
];
223 #define BE_NUM_MSIX_VECTORS 2 /* 1 each for Tx and Rx */
225 struct pci_dev
*pdev
;
226 struct net_device
*netdev
;
229 u8 __iomem
*db
; /* Door Bell */
230 u8 __iomem
*pcicfg
; /* PCI config space */
232 spinlock_t mbox_lock
; /* For serializing mbox cmds to BE card */
233 struct be_dma_mem mbox_mem
;
234 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
235 * is stored for freeing purpose */
236 struct be_dma_mem mbox_mem_alloced
;
238 struct be_mcc_obj mcc_obj
;
239 spinlock_t mcc_lock
; /* For serializing mcc cmds to BE card */
240 spinlock_t mcc_cq_lock
;
242 struct msix_entry msix_entries
[BE_NUM_MSIX_VECTORS
];
247 struct be_eq_obj tx_eq
;
248 struct be_tx_obj tx_obj
;
250 u32 cache_line_break
[8];
253 struct be_eq_obj rx_eq
;
254 struct be_rx_obj rx_obj
;
255 u32 big_page_size
; /* Compounded page size shared by rx wrbs */
256 bool rx_post_starved
; /* Zero rx frags have been posted to BE */
258 struct vlan_group
*vlan_grp
;
260 u16 max_vlans
; /* Number of vlans supported */
261 u8 vlan_tag
[VLAN_GROUP_ARRAY_LEN
];
262 struct be_dma_mem mc_cmd_mem
;
264 struct be_stats_obj stats
;
265 /* Work queue used to perform periodic tasks like getting statistics */
266 struct delayed_work work
;
268 /* Ethtool knobs and info */
269 bool rx_csum
; /* BE card must perform rx-checksumming */
270 char fw_ver
[FW_VER_LEN
];
271 u32 if_handle
; /* Used to configure filtering */
272 u32 pmac_id
; /* MAC addr handle used by BE card */
280 u32 rx_fc
; /* Rx flow control */
281 u32 tx_fc
; /* Tx flow control */
285 u8 generation
; /* BladeEngine ASIC generation */
288 u32 vf_if_handle
[BE_MAX_VF
];
289 u32 vf_pmac_id
[BE_MAX_VF
];
293 #define be_physfn(adapter) (!adapter->pdev->is_virtfn)
295 /* BladeEngine Generation numbers */
299 extern const struct ethtool_ops be_ethtool_ops
;
301 #define drvr_stats(adapter) (&adapter->stats.drvr_stats)
303 #define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
305 #define PAGE_SHIFT_4K 12
306 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
308 /* Returns number of pages spanned by the data starting at the given addr */
309 #define PAGES_4K_SPANNED(_address, size) \
310 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
311 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
313 /* Byte offset into the page corresponding to given address */
314 #define OFFSET_IN_PAGE(addr) \
315 ((size_t)(addr) & (PAGE_SIZE_4K-1))
317 /* Returns bit offset within a DWORD of a bitfield */
318 #define AMAP_BIT_OFFSET(_struct, field) \
319 (((size_t)&(((_struct *)0)->field))%32)
321 /* Returns the bit mask of the field that is NOT shifted into location. */
322 static inline u32
amap_mask(u32 bitsize
)
324 return (bitsize
== 32 ? 0xFFFFFFFF : (1 << bitsize
) - 1);
328 amap_set(void *ptr
, u32 dw_offset
, u32 mask
, u32 offset
, u32 value
)
330 u32
*dw
= (u32
*) ptr
+ dw_offset
;
331 *dw
&= ~(mask
<< offset
);
332 *dw
|= (mask
& value
) << offset
;
335 #define AMAP_SET_BITS(_struct, field, ptr, val) \
337 offsetof(_struct, field)/32, \
338 amap_mask(sizeof(((_struct *)0)->field)), \
339 AMAP_BIT_OFFSET(_struct, field), \
342 static inline u32
amap_get(void *ptr
, u32 dw_offset
, u32 mask
, u32 offset
)
344 u32
*dw
= (u32
*) ptr
;
345 return mask
& (*(dw
+ dw_offset
) >> offset
);
348 #define AMAP_GET_BITS(_struct, field, ptr) \
350 offsetof(_struct, field)/32, \
351 amap_mask(sizeof(((_struct *)0)->field)), \
352 AMAP_BIT_OFFSET(_struct, field))
354 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
355 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
356 static inline void swap_dws(void *wrb
, int len
)
362 *dw
= cpu_to_le32(*dw
);
366 #endif /* __BIG_ENDIAN */
369 static inline u8
is_tcp_pkt(struct sk_buff
*skb
)
373 if (ip_hdr(skb
)->version
== 4)
374 val
= (ip_hdr(skb
)->protocol
== IPPROTO_TCP
);
375 else if (ip_hdr(skb
)->version
== 6)
376 val
= (ipv6_hdr(skb
)->nexthdr
== NEXTHDR_TCP
);
381 static inline u8
is_udp_pkt(struct sk_buff
*skb
)
385 if (ip_hdr(skb
)->version
== 4)
386 val
= (ip_hdr(skb
)->protocol
== IPPROTO_UDP
);
387 else if (ip_hdr(skb
)->version
== 6)
388 val
= (ipv6_hdr(skb
)->nexthdr
== NEXTHDR_UDP
);
393 extern void be_cq_notify(struct be_adapter
*adapter
, u16 qid
, bool arm
,
395 extern void be_link_status_update(struct be_adapter
*adapter
, bool link_up
);
396 extern void netdev_stats_update(struct be_adapter
*adapter
);
397 extern int be_load_fw(struct be_adapter
*adapter
, u8
*func
);