2 * Copyright (C) 2005 - 2009 ServerEngines
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
14 * 209 N. Fair Oaks Ave
21 #include <linux/pci.h>
22 #include <linux/etherdevice.h>
23 #include <linux/version.h>
24 #include <linux/delay.h>
28 #include <linux/if_vlan.h>
29 #include <linux/workqueue.h>
30 #include <linux/interrupt.h>
31 #include <linux/inet_lro.h>
35 #define DRV_VER "2.0.348"
36 #define DRV_NAME "be2net"
37 #define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
38 #define OC_NAME "Emulex OneConnect 10Gbps NIC"
39 #define DRV_DESC BE_NAME "Driver"
41 #define BE_VENDOR_ID 0x19a2
42 #define BE_DEVICE_ID1 0x211
43 #define OC_DEVICE_ID1 0x700
44 #define OC_DEVICE_ID2 0x701
46 static inline char *nic_name(struct pci_dev
*pdev
)
48 if (pdev
->device
== OC_DEVICE_ID1
|| pdev
->device
== OC_DEVICE_ID2
)
54 /* Number of bytes of an RX frame that are copied to skb->data */
56 #define BE_MAX_JUMBO_FRAME_SIZE 9018
57 #define BE_MIN_MTU 256
59 #define BE_NUM_VLANS_SUPPORTED 64
61 #define BE_MAX_TX_FRAG_COUNT 30
63 #define EVNT_Q_LEN 1024
65 #define TX_CQ_LEN 1024
66 #define RX_Q_LEN 1024 /* Does not support any other value */
67 #define RX_CQ_LEN 1024
68 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
69 #define MCC_CQ_LEN 256
71 #define BE_NAPI_WEIGHT 64
72 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
73 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
75 #define BE_MAX_LRO_DESCRIPTORS 16
76 #define BE_MAX_FRAGS_PER_FRAME (min((u32) 16, (u32) MAX_SKB_FRAGS))
84 struct be_queue_info
{
85 struct be_dma_mem dma_mem
;
87 u16 entry_size
; /* Size of an element in the queue */
91 atomic_t used
; /* Number of valid elements in the queue */
94 static inline u32
MODULO(u16 val
, u16 limit
)
96 BUG_ON(limit
& (limit
- 1));
97 return val
& (limit
- 1);
100 static inline void index_adv(u16
*index
, u16 val
, u16 limit
)
102 *index
= MODULO((*index
+ val
), limit
);
105 static inline void index_inc(u16
*index
, u16 limit
)
107 *index
= MODULO((*index
+ 1), limit
);
110 static inline void *queue_head_node(struct be_queue_info
*q
)
112 return q
->dma_mem
.va
+ q
->head
* q
->entry_size
;
115 static inline void *queue_tail_node(struct be_queue_info
*q
)
117 return q
->dma_mem
.va
+ q
->tail
* q
->entry_size
;
120 static inline void queue_head_inc(struct be_queue_info
*q
)
122 index_inc(&q
->head
, q
->len
);
125 static inline void queue_tail_inc(struct be_queue_info
*q
)
127 index_inc(&q
->tail
, q
->len
);
132 struct be_queue_info q
;
135 /* Adaptive interrupt coalescing (AIC) info */
137 u16 min_eqd
; /* in usecs */
138 u16 max_eqd
; /* in usecs */
139 u16 cur_eqd
; /* in usecs */
141 struct napi_struct napi
;
145 struct be_queue_info q
;
146 struct be_queue_info cq
;
149 struct be_ctrl_info
{
151 u8 __iomem
*db
; /* Door Bell */
152 u8 __iomem
*pcicfg
; /* PCI config space */
155 /* Mbox used for cmd request/response */
156 spinlock_t mbox_lock
; /* For serializing mbox cmds to BE card */
157 struct be_dma_mem mbox_mem
;
158 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
159 * is stored for freeing purpose */
160 struct be_dma_mem mbox_mem_alloced
;
163 struct be_mcc_obj mcc_obj
;
164 spinlock_t mcc_lock
; /* For serializing mcc cmds to BE card */
165 spinlock_t mcc_cq_lock
;
167 /* MCC Async callback */
168 void (*async_cb
)(void *adapter
, bool link_up
);
174 struct be_drvr_stats
{
175 u32 be_tx_reqs
; /* number of TX requests initiated */
176 u32 be_tx_stops
; /* number of times TX Q was stopped */
177 u32 be_fwd_reqs
; /* number of send reqs through forwarding i/f */
178 u32 be_tx_wrbs
; /* number of tx WRBs used */
179 u32 be_tx_events
; /* number of tx completion events */
180 u32 be_tx_compl
; /* number of tx completion entries processed */
183 u64 be_tx_bytes_prev
;
186 u32 cache_barrier
[16];
188 u32 be_ethrx_post_fail
;/* number of ethrx buffer alloc failures */
189 u32 be_polls
; /* number of times NAPI called poll function */
190 u32 be_rx_events
; /* number of ucast rx completion events */
191 u32 be_rx_compl
; /* number of rx completion entries processed */
192 u32 be_lro_hgram_data
[8]; /* histogram of LRO data packets */
193 u32 be_lro_hgram_ack
[8]; /* histogram of LRO ACKs */
196 u64 be_rx_bytes_prev
;
198 /* number of non ether type II frames dropped where
199 * frame len > length field of Mac Hdr */
200 u32 be_802_3_dropped_frames
;
201 /* number of non ether type II frames malformed where
202 * in frame len < length field of Mac Hdr */
203 u32 be_802_3_malformed_frames
;
204 u32 be_rxcp_err
; /* Num rx completion entries w/ err set. */
205 ulong rx_fps_jiffies
; /* jiffies at last FPS calc */
207 u32 be_prev_rx_frags
;
208 u32 be_rx_fps
; /* Rx frags per second */
211 struct be_stats_obj
{
212 struct be_drvr_stats drvr_stats
;
213 struct net_device_stats net_stats
;
214 struct be_dma_mem cmd
;
218 struct be_queue_info q
;
219 struct be_queue_info cq
;
220 /* Remember the skbs that were transmitted */
221 struct sk_buff
*sent_skb_list
[TX_Q_LEN
];
224 /* Struct to remember the pages posted for rx frags */
225 struct be_rx_page_info
{
233 struct be_queue_info q
;
234 struct be_queue_info cq
;
235 struct be_rx_page_info page_info_tbl
[RX_Q_LEN
];
236 struct net_lro_mgr lro_mgr
;
237 struct net_lro_desc lro_desc
[BE_MAX_LRO_DESCRIPTORS
];
240 #define BE_NUM_MSIX_VECTORS 2 /* 1 each for Tx and Rx */
242 struct pci_dev
*pdev
;
243 struct net_device
*netdev
;
245 /* Mbox, pci config, csr address information */
246 struct be_ctrl_info ctrl
;
248 struct msix_entry msix_entries
[BE_NUM_MSIX_VECTORS
];
253 struct be_eq_obj tx_eq
;
254 struct be_tx_obj tx_obj
;
256 u32 cache_line_break
[8];
259 struct be_eq_obj rx_eq
;
260 struct be_rx_obj rx_obj
;
261 u32 big_page_size
; /* Compounded page size shared by rx wrbs */
262 bool rx_post_starved
; /* Zero rx frags have been posted to BE */
264 struct vlan_group
*vlan_grp
;
266 u8 vlan_tag
[VLAN_GROUP_ARRAY_LEN
];
268 struct be_stats_obj stats
;
269 /* Work queue used to perform periodic tasks like getting statistics */
270 struct delayed_work work
;
272 /* Ethtool knobs and info */
273 bool rx_csum
; /* BE card must perform rx-checksumming */
275 char fw_ver
[FW_VER_LEN
];
276 u32 if_handle
; /* Used to configure filtering */
277 u32 pmac_id
; /* MAC addr handle used by BE card */
284 extern struct ethtool_ops be_ethtool_ops
;
286 #define drvr_stats(adapter) (&adapter->stats.drvr_stats)
288 #define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
290 #define PAGE_SHIFT_4K 12
291 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
293 /* Returns number of pages spanned by the data starting at the given addr */
294 #define PAGES_4K_SPANNED(_address, size) \
295 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
296 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
298 /* Byte offset into the page corresponding to given address */
299 #define OFFSET_IN_PAGE(addr) \
300 ((size_t)(addr) & (PAGE_SIZE_4K-1))
302 /* Returns bit offset within a DWORD of a bitfield */
303 #define AMAP_BIT_OFFSET(_struct, field) \
304 (((size_t)&(((_struct *)0)->field))%32)
306 /* Returns the bit mask of the field that is NOT shifted into location. */
307 static inline u32
amap_mask(u32 bitsize
)
309 return (bitsize
== 32 ? 0xFFFFFFFF : (1 << bitsize
) - 1);
313 amap_set(void *ptr
, u32 dw_offset
, u32 mask
, u32 offset
, u32 value
)
315 u32
*dw
= (u32
*) ptr
+ dw_offset
;
316 *dw
&= ~(mask
<< offset
);
317 *dw
|= (mask
& value
) << offset
;
320 #define AMAP_SET_BITS(_struct, field, ptr, val) \
322 offsetof(_struct, field)/32, \
323 amap_mask(sizeof(((_struct *)0)->field)), \
324 AMAP_BIT_OFFSET(_struct, field), \
327 static inline u32
amap_get(void *ptr
, u32 dw_offset
, u32 mask
, u32 offset
)
329 u32
*dw
= (u32
*) ptr
;
330 return mask
& (*(dw
+ dw_offset
) >> offset
);
333 #define AMAP_GET_BITS(_struct, field, ptr) \
335 offsetof(_struct, field)/32, \
336 amap_mask(sizeof(((_struct *)0)->field)), \
337 AMAP_BIT_OFFSET(_struct, field))
339 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
340 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
341 static inline void swap_dws(void *wrb
, int len
)
347 *dw
= cpu_to_le32(*dw
);
351 #endif /* __BIG_ENDIAN */
354 static inline u8
is_tcp_pkt(struct sk_buff
*skb
)
358 if (ip_hdr(skb
)->version
== 4)
359 val
= (ip_hdr(skb
)->protocol
== IPPROTO_TCP
);
360 else if (ip_hdr(skb
)->version
== 6)
361 val
= (ipv6_hdr(skb
)->nexthdr
== NEXTHDR_TCP
);
366 static inline u8
is_udp_pkt(struct sk_buff
*skb
)
370 if (ip_hdr(skb
)->version
== 4)
371 val
= (ip_hdr(skb
)->protocol
== IPPROTO_UDP
);
372 else if (ip_hdr(skb
)->version
== 6)
373 val
= (ipv6_hdr(skb
)->nexthdr
== NEXTHDR_UDP
);
378 extern void be_cq_notify(struct be_ctrl_info
*ctrl
, u16 qid
, bool arm
,