2 * Blackfin On-Chip MAC Driver
4 * Copyright 2004-2010 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #define DRV_VERSION "1.1"
12 #define DRV_DESC "Blackfin on-chip Ethernet MAC driver"
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/slab.h>
21 #include <linux/delay.h>
22 #include <linux/timer.h>
23 #include <linux/errno.h>
24 #include <linux/irq.h>
26 #include <linux/ioport.h>
27 #include <linux/crc32.h>
28 #include <linux/device.h>
29 #include <linux/spinlock.h>
30 #include <linux/mii.h>
31 #include <linux/netdevice.h>
32 #include <linux/etherdevice.h>
33 #include <linux/ethtool.h>
34 #include <linux/skbuff.h>
35 #include <linux/platform_device.h>
38 #include <linux/dma-mapping.h>
40 #include <asm/div64.h>
42 #include <asm/blackfin.h>
43 #include <asm/cacheflush.h>
44 #include <asm/portmux.h>
49 MODULE_AUTHOR("Bryan Wu, Luke Yang");
50 MODULE_LICENSE("GPL");
51 MODULE_DESCRIPTION(DRV_DESC
);
52 MODULE_ALIAS("platform:bfin_mac");
54 #if defined(CONFIG_BFIN_MAC_USE_L1)
55 # define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
56 # define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
58 # define bfin_mac_alloc(dma_handle, size) \
59 dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
60 # define bfin_mac_free(dma_handle, ptr) \
61 dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
64 #define PKT_BUF_SZ 1580
66 #define MAX_TIMEOUT_CNT 500
68 /* pointers to maintain transmit list */
69 static struct net_dma_desc_tx
*tx_list_head
;
70 static struct net_dma_desc_tx
*tx_list_tail
;
71 static struct net_dma_desc_rx
*rx_list_head
;
72 static struct net_dma_desc_rx
*rx_list_tail
;
73 static struct net_dma_desc_rx
*current_rx_ptr
;
74 static struct net_dma_desc_tx
*current_tx_ptr
;
75 static struct net_dma_desc_tx
*tx_desc
;
76 static struct net_dma_desc_rx
*rx_desc
;
78 static void desc_list_free(void)
80 struct net_dma_desc_rx
*r
;
81 struct net_dma_desc_tx
*t
;
83 #if !defined(CONFIG_BFIN_MAC_USE_L1)
84 dma_addr_t dma_handle
= 0;
89 for (i
= 0; i
< CONFIG_BFIN_TX_DESC_NUM
; i
++) {
92 dev_kfree_skb(t
->skb
);
98 bfin_mac_free(dma_handle
, tx_desc
);
103 for (i
= 0; i
< CONFIG_BFIN_RX_DESC_NUM
; i
++) {
106 dev_kfree_skb(r
->skb
);
112 bfin_mac_free(dma_handle
, rx_desc
);
116 static int desc_list_init(void)
119 struct sk_buff
*new_skb
;
120 #if !defined(CONFIG_BFIN_MAC_USE_L1)
122 * This dma_handle is useless in Blackfin dma_alloc_coherent().
123 * The real dma handler is the return value of dma_alloc_coherent().
125 dma_addr_t dma_handle
;
128 tx_desc
= bfin_mac_alloc(&dma_handle
,
129 sizeof(struct net_dma_desc_tx
) *
130 CONFIG_BFIN_TX_DESC_NUM
);
134 rx_desc
= bfin_mac_alloc(&dma_handle
,
135 sizeof(struct net_dma_desc_rx
) *
136 CONFIG_BFIN_RX_DESC_NUM
);
141 tx_list_head
= tx_list_tail
= tx_desc
;
143 for (i
= 0; i
< CONFIG_BFIN_TX_DESC_NUM
; i
++) {
144 struct net_dma_desc_tx
*t
= tx_desc
+ i
;
145 struct dma_descriptor
*a
= &(t
->desc_a
);
146 struct dma_descriptor
*b
= &(t
->desc_b
);
150 * read from memory WNR = 0
151 * wordsize is 32 bits
152 * 6 half words is desc size
155 a
->config
= WDSIZE_32
| NDSIZE_6
| DMAFLOW_LARGE
;
156 a
->start_addr
= (unsigned long)t
->packet
;
158 a
->next_dma_desc
= b
;
162 * write to memory WNR = 1
163 * wordsize is 32 bits
165 * 6 half words is desc size
168 b
->config
= DMAEN
| WNR
| WDSIZE_32
| NDSIZE_6
| DMAFLOW_LARGE
;
169 b
->start_addr
= (unsigned long)(&(t
->status
));
173 tx_list_tail
->desc_b
.next_dma_desc
= a
;
174 tx_list_tail
->next
= t
;
177 tx_list_tail
->next
= tx_list_head
; /* tx_list is a circle */
178 tx_list_tail
->desc_b
.next_dma_desc
= &(tx_list_head
->desc_a
);
179 current_tx_ptr
= tx_list_head
;
182 rx_list_head
= rx_list_tail
= rx_desc
;
184 for (i
= 0; i
< CONFIG_BFIN_RX_DESC_NUM
; i
++) {
185 struct net_dma_desc_rx
*r
= rx_desc
+ i
;
186 struct dma_descriptor
*a
= &(r
->desc_a
);
187 struct dma_descriptor
*b
= &(r
->desc_b
);
189 /* allocate a new skb for next time receive */
190 new_skb
= dev_alloc_skb(PKT_BUF_SZ
+ NET_IP_ALIGN
);
192 pr_notice("init: low on mem - packet dropped\n");
195 skb_reserve(new_skb
, NET_IP_ALIGN
);
196 /* Invidate the data cache of skb->data range when it is write back
197 * cache. It will prevent overwritting the new data from DMA
199 blackfin_dcache_invalidate_range((unsigned long)new_skb
->head
,
200 (unsigned long)new_skb
->end
);
205 * write to memory WNR = 1
206 * wordsize is 32 bits
208 * 6 half words is desc size
211 a
->config
= DMAEN
| WNR
| WDSIZE_32
| NDSIZE_6
| DMAFLOW_LARGE
;
212 /* since RXDWA is enabled */
213 a
->start_addr
= (unsigned long)new_skb
->data
- 2;
215 a
->next_dma_desc
= b
;
219 * write to memory WNR = 1
220 * wordsize is 32 bits
222 * 6 half words is desc size
225 b
->config
= DMAEN
| WNR
| WDSIZE_32
| DI_EN
|
226 NDSIZE_6
| DMAFLOW_LARGE
;
227 b
->start_addr
= (unsigned long)(&(r
->status
));
230 rx_list_tail
->desc_b
.next_dma_desc
= a
;
231 rx_list_tail
->next
= r
;
234 rx_list_tail
->next
= rx_list_head
; /* rx_list is a circle */
235 rx_list_tail
->desc_b
.next_dma_desc
= &(rx_list_head
->desc_a
);
236 current_rx_ptr
= rx_list_head
;
242 pr_err("kmalloc failed\n");
247 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
252 /* Wait until the previous MDC/MDIO transaction has completed */
253 static int bfin_mdio_poll(void)
255 int timeout_cnt
= MAX_TIMEOUT_CNT
;
257 /* poll the STABUSY bit */
258 while ((bfin_read_EMAC_STAADD()) & STABUSY
) {
260 if (timeout_cnt
-- < 0) {
261 pr_err("wait MDC/MDIO transaction to complete timeout\n");
269 /* Read an off-chip register in a PHY through the MDC/MDIO port */
270 static int bfin_mdiobus_read(struct mii_bus
*bus
, int phy_addr
, int regnum
)
274 ret
= bfin_mdio_poll();
279 bfin_write_EMAC_STAADD(SET_PHYAD((u16
) phy_addr
) |
280 SET_REGAD((u16
) regnum
) |
283 ret
= bfin_mdio_poll();
287 return (int) bfin_read_EMAC_STADAT();
290 /* Write an off-chip register in a PHY through the MDC/MDIO port */
291 static int bfin_mdiobus_write(struct mii_bus
*bus
, int phy_addr
, int regnum
,
296 ret
= bfin_mdio_poll();
300 bfin_write_EMAC_STADAT((u32
) value
);
303 bfin_write_EMAC_STAADD(SET_PHYAD((u16
) phy_addr
) |
304 SET_REGAD((u16
) regnum
) |
308 return bfin_mdio_poll();
311 static int bfin_mdiobus_reset(struct mii_bus
*bus
)
316 static void bfin_mac_adjust_link(struct net_device
*dev
)
318 struct bfin_mac_local
*lp
= netdev_priv(dev
);
319 struct phy_device
*phydev
= lp
->phydev
;
323 spin_lock_irqsave(&lp
->lock
, flags
);
325 /* Now we make sure that we can be in full duplex mode.
326 * If not, we operate in half-duplex mode. */
327 if (phydev
->duplex
!= lp
->old_duplex
) {
328 u32 opmode
= bfin_read_EMAC_OPMODE();
336 bfin_write_EMAC_OPMODE(opmode
);
337 lp
->old_duplex
= phydev
->duplex
;
340 if (phydev
->speed
!= lp
->old_speed
) {
341 if (phydev
->interface
== PHY_INTERFACE_MODE_RMII
) {
342 u32 opmode
= bfin_read_EMAC_OPMODE();
343 switch (phydev
->speed
) {
352 "Ack! Speed (%d) is not 10/100!\n",
356 bfin_write_EMAC_OPMODE(opmode
);
360 lp
->old_speed
= phydev
->speed
;
367 } else if (lp
->old_link
) {
375 u32 opmode
= bfin_read_EMAC_OPMODE();
376 phy_print_status(phydev
);
377 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode
);
380 spin_unlock_irqrestore(&lp
->lock
, flags
);
384 #define MDC_CLK 2500000
386 static int mii_probe(struct net_device
*dev
, int phy_mode
)
388 struct bfin_mac_local
*lp
= netdev_priv(dev
);
389 struct phy_device
*phydev
= NULL
;
390 unsigned short sysctl
;
394 /* Enable PHY output early */
395 if (!(bfin_read_VR_CTL() & CLKBUFOE
))
396 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE
);
399 mdc_div
= ((sclk
/ MDC_CLK
) / 2) - 1;
401 sysctl
= bfin_read_EMAC_SYSCTL();
402 sysctl
= (sysctl
& ~MDCDIV
) | SET_MDCDIV(mdc_div
);
403 bfin_write_EMAC_SYSCTL(sysctl
);
405 /* search for connected PHY device */
406 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
) {
407 struct phy_device
*const tmp_phydev
= lp
->mii_bus
->phy_map
[i
];
410 continue; /* no PHY here... */
413 break; /* found it */
416 /* now we are supposed to have a proper phydev, to attach to... */
418 netdev_err(dev
, "no phy device found\n");
422 if (phy_mode
!= PHY_INTERFACE_MODE_RMII
&&
423 phy_mode
!= PHY_INTERFACE_MODE_MII
) {
424 netdev_err(dev
, "invalid phy interface mode\n");
428 phydev
= phy_connect(dev
, dev_name(&phydev
->dev
), &bfin_mac_adjust_link
,
431 if (IS_ERR(phydev
)) {
432 netdev_err(dev
, "could not attach PHY\n");
433 return PTR_ERR(phydev
);
436 /* mask with MAC supported features */
437 phydev
->supported
&= (SUPPORTED_10baseT_Half
438 | SUPPORTED_10baseT_Full
439 | SUPPORTED_100baseT_Half
440 | SUPPORTED_100baseT_Full
442 | SUPPORTED_Pause
| SUPPORTED_Asym_Pause
446 phydev
->advertising
= phydev
->supported
;
453 pr_info("attached PHY driver [%s] "
454 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)@sclk=%dMHz)\n",
455 phydev
->drv
->name
, dev_name(&phydev
->dev
), phydev
->irq
,
456 MDC_CLK
, mdc_div
, sclk
/1000000);
466 * interrupt routine for magic packet wakeup
468 static irqreturn_t
bfin_mac_wake_interrupt(int irq
, void *dev_id
)
474 bfin_mac_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
476 struct bfin_mac_local
*lp
= netdev_priv(dev
);
479 return phy_ethtool_gset(lp
->phydev
, cmd
);
485 bfin_mac_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
487 struct bfin_mac_local
*lp
= netdev_priv(dev
);
489 if (!capable(CAP_NET_ADMIN
))
493 return phy_ethtool_sset(lp
->phydev
, cmd
);
498 static void bfin_mac_ethtool_getdrvinfo(struct net_device
*dev
,
499 struct ethtool_drvinfo
*info
)
501 strcpy(info
->driver
, KBUILD_MODNAME
);
502 strcpy(info
->version
, DRV_VERSION
);
503 strcpy(info
->fw_version
, "N/A");
504 strcpy(info
->bus_info
, dev_name(&dev
->dev
));
507 static void bfin_mac_ethtool_getwol(struct net_device
*dev
,
508 struct ethtool_wolinfo
*wolinfo
)
510 struct bfin_mac_local
*lp
= netdev_priv(dev
);
512 wolinfo
->supported
= WAKE_MAGIC
;
513 wolinfo
->wolopts
= lp
->wol
;
516 static int bfin_mac_ethtool_setwol(struct net_device
*dev
,
517 struct ethtool_wolinfo
*wolinfo
)
519 struct bfin_mac_local
*lp
= netdev_priv(dev
);
522 if (wolinfo
->wolopts
& (WAKE_MAGICSECURE
|
529 lp
->wol
= wolinfo
->wolopts
;
531 if (lp
->wol
&& !lp
->irq_wake_requested
) {
532 /* register wake irq handler */
533 rc
= request_irq(IRQ_MAC_WAKEDET
, bfin_mac_wake_interrupt
,
534 IRQF_DISABLED
, "EMAC_WAKE", dev
);
537 lp
->irq_wake_requested
= true;
540 if (!lp
->wol
&& lp
->irq_wake_requested
) {
541 free_irq(IRQ_MAC_WAKEDET
, dev
);
542 lp
->irq_wake_requested
= false;
545 /* Make sure the PHY driver doesn't suspend */
546 device_init_wakeup(&dev
->dev
, lp
->wol
);
551 static const struct ethtool_ops bfin_mac_ethtool_ops
= {
552 .get_settings
= bfin_mac_ethtool_getsettings
,
553 .set_settings
= bfin_mac_ethtool_setsettings
,
554 .get_link
= ethtool_op_get_link
,
555 .get_drvinfo
= bfin_mac_ethtool_getdrvinfo
,
556 .get_wol
= bfin_mac_ethtool_getwol
,
557 .set_wol
= bfin_mac_ethtool_setwol
,
560 /**************************************************************************/
561 static void setup_system_regs(struct net_device
*dev
)
563 struct bfin_mac_local
*lp
= netdev_priv(dev
);
565 unsigned short sysctl
;
568 * Odd word alignment for Receive Frame DMA word
569 * Configure checksum support and rcve frame word alignment
571 sysctl
= bfin_read_EMAC_SYSCTL();
573 * check if interrupt is requested for any PHY,
574 * enable PHY interrupt only if needed
576 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
)
577 if (lp
->mii_bus
->irq
[i
] != PHY_POLL
)
579 if (i
< PHY_MAX_ADDR
)
582 #if defined(BFIN_MAC_CSUM_OFFLOAD)
587 bfin_write_EMAC_SYSCTL(sysctl
);
589 bfin_write_EMAC_MMC_CTL(RSTC
| CROLL
);
591 /* Initialize the TX DMA channel registers */
592 bfin_write_DMA2_X_COUNT(0);
593 bfin_write_DMA2_X_MODIFY(4);
594 bfin_write_DMA2_Y_COUNT(0);
595 bfin_write_DMA2_Y_MODIFY(0);
597 /* Initialize the RX DMA channel registers */
598 bfin_write_DMA1_X_COUNT(0);
599 bfin_write_DMA1_X_MODIFY(4);
600 bfin_write_DMA1_Y_COUNT(0);
601 bfin_write_DMA1_Y_MODIFY(0);
604 static void setup_mac_addr(u8
*mac_addr
)
606 u32 addr_low
= le32_to_cpu(*(__le32
*) & mac_addr
[0]);
607 u16 addr_hi
= le16_to_cpu(*(__le16
*) & mac_addr
[4]);
609 /* this depends on a little-endian machine */
610 bfin_write_EMAC_ADDRLO(addr_low
);
611 bfin_write_EMAC_ADDRHI(addr_hi
);
614 static int bfin_mac_set_mac_address(struct net_device
*dev
, void *p
)
616 struct sockaddr
*addr
= p
;
617 if (netif_running(dev
))
619 memcpy(dev
->dev_addr
, addr
->sa_data
, dev
->addr_len
);
620 setup_mac_addr(dev
->dev_addr
);
624 #ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
625 #define bfin_mac_hwtstamp_is_none(cfg) ((cfg) == HWTSTAMP_FILTER_NONE)
627 static int bfin_mac_hwtstamp_ioctl(struct net_device
*netdev
,
628 struct ifreq
*ifr
, int cmd
)
630 struct hwtstamp_config config
;
631 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
633 u32 ptpfv1
, ptpfv2
, ptpfv3
, ptpfoff
;
635 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
638 pr_debug("%s config flag:0x%x, tx_type:0x%x, rx_filter:0x%x\n",
639 __func__
, config
.flags
, config
.tx_type
, config
.rx_filter
);
641 /* reserved for future extensions */
645 if ((config
.tx_type
!= HWTSTAMP_TX_OFF
) &&
646 (config
.tx_type
!= HWTSTAMP_TX_ON
))
649 ptpctl
= bfin_read_EMAC_PTP_CTL();
651 switch (config
.rx_filter
) {
652 case HWTSTAMP_FILTER_NONE
:
654 * Dont allow any timestamping
657 bfin_write_EMAC_PTP_FV3(ptpfv3
);
659 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
660 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
661 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
663 * Clear the five comparison mask bits (bits[12:8]) in EMAC_PTP_CTL)
664 * to enable all the field matches.
667 bfin_write_EMAC_PTP_CTL(ptpctl
);
669 * Keep the default values of the EMAC_PTP_FOFF register.
671 ptpfoff
= 0x4A24170C;
672 bfin_write_EMAC_PTP_FOFF(ptpfoff
);
674 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
678 bfin_write_EMAC_PTP_FV1(ptpfv1
);
680 bfin_write_EMAC_PTP_FV2(ptpfv2
);
682 * The default value (0xFFFC) allows the timestamping of both
683 * received Sync messages and Delay_Req messages.
686 bfin_write_EMAC_PTP_FV3(ptpfv3
);
688 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V1_L4_EVENT
;
690 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
691 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
692 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
693 /* Clear all five comparison mask bits (bits[12:8]) in the
694 * EMAC_PTP_CTL register to enable all the field matches.
697 bfin_write_EMAC_PTP_CTL(ptpctl
);
699 * Keep the default values of the EMAC_PTP_FOFF register, except set
700 * the PTPCOF field to 0x2A.
702 ptpfoff
= 0x2A24170C;
703 bfin_write_EMAC_PTP_FOFF(ptpfoff
);
705 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
709 bfin_write_EMAC_PTP_FV1(ptpfv1
);
711 bfin_write_EMAC_PTP_FV2(ptpfv2
);
713 * To allow the timestamping of Pdelay_Req and Pdelay_Resp, set
714 * the value to 0xFFF0.
717 bfin_write_EMAC_PTP_FV3(ptpfv3
);
719 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_L4_EVENT
;
721 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
722 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
723 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
725 * Clear bits 8 and 12 of the EMAC_PTP_CTL register to enable only the
726 * EFTM and PTPCM field comparison.
729 bfin_write_EMAC_PTP_CTL(ptpctl
);
731 * Keep the default values of all the fields of the EMAC_PTP_FOFF
732 * register, except set the PTPCOF field to 0x0E.
734 ptpfoff
= 0x0E24170C;
735 bfin_write_EMAC_PTP_FOFF(ptpfoff
);
737 * Program bits [15:0] of the EMAC_PTP_FV1 register to 0x88F7, which
738 * corresponds to PTP messages on the MAC layer.
741 bfin_write_EMAC_PTP_FV1(ptpfv1
);
743 bfin_write_EMAC_PTP_FV2(ptpfv2
);
745 * To allow the timestamping of Pdelay_Req and Pdelay_Resp
746 * messages, set the value to 0xFFF0.
749 bfin_write_EMAC_PTP_FV3(ptpfv3
);
751 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_L2_EVENT
;
757 if (config
.tx_type
== HWTSTAMP_TX_OFF
&&
758 bfin_mac_hwtstamp_is_none(config
.rx_filter
)) {
760 bfin_write_EMAC_PTP_CTL(ptpctl
);
765 bfin_write_EMAC_PTP_CTL(ptpctl
);
768 * clear any existing timestamp
770 bfin_read_EMAC_PTP_RXSNAPLO();
771 bfin_read_EMAC_PTP_RXSNAPHI();
773 bfin_read_EMAC_PTP_TXSNAPLO();
774 bfin_read_EMAC_PTP_TXSNAPHI();
777 * Set registers so that rollover occurs soon to test this.
779 bfin_write_EMAC_PTP_TIMELO(0x00000000);
780 bfin_write_EMAC_PTP_TIMEHI(0xFF800000);
784 lp
->compare
.last_update
= 0;
785 timecounter_init(&lp
->clock
,
787 ktime_to_ns(ktime_get_real()));
788 timecompare_update(&lp
->compare
, 0);
791 lp
->stamp_cfg
= config
;
792 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
796 static void bfin_dump_hwtamp(char *s
, ktime_t
*hw
, ktime_t
*ts
, struct timecompare
*cmp
)
798 ktime_t sys
= ktime_get_real();
800 pr_debug("%s %s hardware:%d,%d transform system:%d,%d system:%d,%d, cmp:%lld, %lld\n",
801 __func__
, s
, hw
->tv
.sec
, hw
->tv
.nsec
, ts
->tv
.sec
, ts
->tv
.nsec
, sys
.tv
.sec
,
802 sys
.tv
.nsec
, cmp
->offset
, cmp
->skew
);
805 static void bfin_tx_hwtstamp(struct net_device
*netdev
, struct sk_buff
*skb
)
807 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
809 if (skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
) {
810 int timeout_cnt
= MAX_TIMEOUT_CNT
;
812 /* When doing time stamping, keep the connection to the socket
815 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
818 * The timestamping is done at the EMAC module's MII/RMII interface
819 * when the module sees the Start of Frame of an event message packet. This
820 * interface is the closest possible place to the physical Ethernet transmission
821 * medium, providing the best timing accuracy.
823 while ((!(bfin_read_EMAC_PTP_ISTAT() & TXTL
)) && (--timeout_cnt
))
825 if (timeout_cnt
== 0)
826 netdev_err(netdev
, "timestamp the TX packet failed\n");
828 struct skb_shared_hwtstamps shhwtstamps
;
832 regval
= bfin_read_EMAC_PTP_TXSNAPLO();
833 regval
|= (u64
)bfin_read_EMAC_PTP_TXSNAPHI() << 32;
834 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
835 ns
= timecounter_cyc2time(&lp
->clock
,
837 timecompare_update(&lp
->compare
, ns
);
838 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
839 shhwtstamps
.syststamp
=
840 timecompare_transform(&lp
->compare
, ns
);
841 skb_tstamp_tx(skb
, &shhwtstamps
);
843 bfin_dump_hwtamp("TX", &shhwtstamps
.hwtstamp
, &shhwtstamps
.syststamp
, &lp
->compare
);
848 static void bfin_rx_hwtstamp(struct net_device
*netdev
, struct sk_buff
*skb
)
850 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
853 struct skb_shared_hwtstamps
*shhwtstamps
;
855 if (bfin_mac_hwtstamp_is_none(lp
->stamp_cfg
.rx_filter
))
858 valid
= bfin_read_EMAC_PTP_ISTAT() & RXEL
;
862 shhwtstamps
= skb_hwtstamps(skb
);
864 regval
= bfin_read_EMAC_PTP_RXSNAPLO();
865 regval
|= (u64
)bfin_read_EMAC_PTP_RXSNAPHI() << 32;
866 ns
= timecounter_cyc2time(&lp
->clock
, regval
);
867 timecompare_update(&lp
->compare
, ns
);
868 memset(shhwtstamps
, 0, sizeof(*shhwtstamps
));
869 shhwtstamps
->hwtstamp
= ns_to_ktime(ns
);
870 shhwtstamps
->syststamp
= timecompare_transform(&lp
->compare
, ns
);
872 bfin_dump_hwtamp("RX", &shhwtstamps
->hwtstamp
, &shhwtstamps
->syststamp
, &lp
->compare
);
876 * bfin_read_clock - read raw cycle counter (to be used by time counter)
878 static cycle_t
bfin_read_clock(const struct cyclecounter
*tc
)
882 stamp
= bfin_read_EMAC_PTP_TIMELO();
883 stamp
|= (u64
)bfin_read_EMAC_PTP_TIMEHI() << 32ULL;
888 #define PTP_CLK 25000000
890 static void bfin_mac_hwtstamp_init(struct net_device
*netdev
)
892 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
895 /* Initialize hardware timer */
896 append
= PTP_CLK
* (1ULL << 32);
897 do_div(append
, get_sclk());
898 bfin_write_EMAC_PTP_ADDEND((u32
)append
);
900 memset(&lp
->cycles
, 0, sizeof(lp
->cycles
));
901 lp
->cycles
.read
= bfin_read_clock
;
902 lp
->cycles
.mask
= CLOCKSOURCE_MASK(64);
903 lp
->cycles
.mult
= 1000000000 / PTP_CLK
;
904 lp
->cycles
.shift
= 0;
906 /* Synchronize our NIC clock against system wall clock */
907 memset(&lp
->compare
, 0, sizeof(lp
->compare
));
908 lp
->compare
.source
= &lp
->clock
;
909 lp
->compare
.target
= ktime_get_real
;
910 lp
->compare
.num_samples
= 10;
912 /* Initialize hwstamp config */
913 lp
->stamp_cfg
.rx_filter
= HWTSTAMP_FILTER_NONE
;
914 lp
->stamp_cfg
.tx_type
= HWTSTAMP_TX_OFF
;
918 # define bfin_mac_hwtstamp_is_none(cfg) 0
919 # define bfin_mac_hwtstamp_init(dev)
920 # define bfin_mac_hwtstamp_ioctl(dev, ifr, cmd) (-EOPNOTSUPP)
921 # define bfin_rx_hwtstamp(dev, skb)
922 # define bfin_tx_hwtstamp(dev, skb)
925 static inline void _tx_reclaim_skb(void)
928 tx_list_head
->desc_a
.config
&= ~DMAEN
;
929 tx_list_head
->status
.status_word
= 0;
930 if (tx_list_head
->skb
) {
931 dev_kfree_skb(tx_list_head
->skb
);
932 tx_list_head
->skb
= NULL
;
934 tx_list_head
= tx_list_head
->next
;
936 } while (tx_list_head
->status
.status_word
!= 0);
939 static void tx_reclaim_skb(struct bfin_mac_local
*lp
)
941 int timeout_cnt
= MAX_TIMEOUT_CNT
;
943 if (tx_list_head
->status
.status_word
!= 0)
946 if (current_tx_ptr
->next
== tx_list_head
) {
947 while (tx_list_head
->status
.status_word
== 0) {
948 /* slow down polling to avoid too many queue stop. */
950 /* reclaim skb if DMA is not running. */
951 if (!(bfin_read_DMA2_IRQ_STATUS() & DMA_RUN
))
953 if (timeout_cnt
-- < 0)
957 if (timeout_cnt
>= 0)
960 netif_stop_queue(lp
->ndev
);
963 if (current_tx_ptr
->next
!= tx_list_head
&&
964 netif_queue_stopped(lp
->ndev
))
965 netif_wake_queue(lp
->ndev
);
967 if (tx_list_head
!= current_tx_ptr
) {
968 /* shorten the timer interval if tx queue is stopped */
969 if (netif_queue_stopped(lp
->ndev
))
970 lp
->tx_reclaim_timer
.expires
=
971 jiffies
+ (TX_RECLAIM_JIFFIES
>> 4);
973 lp
->tx_reclaim_timer
.expires
=
974 jiffies
+ TX_RECLAIM_JIFFIES
;
976 mod_timer(&lp
->tx_reclaim_timer
,
977 lp
->tx_reclaim_timer
.expires
);
983 static void tx_reclaim_skb_timeout(unsigned long lp
)
985 tx_reclaim_skb((struct bfin_mac_local
*)lp
);
988 static int bfin_mac_hard_start_xmit(struct sk_buff
*skb
,
989 struct net_device
*dev
)
991 struct bfin_mac_local
*lp
= netdev_priv(dev
);
993 u32 data_align
= (unsigned long)(skb
->data
) & 0x3;
995 current_tx_ptr
->skb
= skb
;
997 if (data_align
== 0x2) {
998 /* move skb->data to current_tx_ptr payload */
999 data
= (u16
*)(skb
->data
) - 1;
1000 *data
= (u16
)(skb
->len
);
1002 * When transmitting an Ethernet packet, the PTP_TSYNC module requires
1003 * a DMA_Length_Word field associated with the packet. The lower 12 bits
1004 * of this field are the length of the packet payload in bytes and the higher
1005 * 4 bits are the timestamping enable field.
1007 if (skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)
1010 current_tx_ptr
->desc_a
.start_addr
= (u32
)data
;
1011 /* this is important! */
1012 blackfin_dcache_flush_range((u32
)data
,
1013 (u32
)((u8
*)data
+ skb
->len
+ 4));
1015 *((u16
*)(current_tx_ptr
->packet
)) = (u16
)(skb
->len
);
1016 /* enable timestamping for the sent packet */
1017 if (skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)
1018 *((u16
*)(current_tx_ptr
->packet
)) |= 0x1000;
1019 memcpy((u8
*)(current_tx_ptr
->packet
+ 2), skb
->data
,
1021 current_tx_ptr
->desc_a
.start_addr
=
1022 (u32
)current_tx_ptr
->packet
;
1023 blackfin_dcache_flush_range(
1024 (u32
)current_tx_ptr
->packet
,
1025 (u32
)(current_tx_ptr
->packet
+ skb
->len
+ 2));
1028 /* make sure the internal data buffers in the core are drained
1029 * so that the DMA descriptors are completely written when the
1030 * DMA engine goes to fetch them below
1034 /* always clear status buffer before start tx dma */
1035 current_tx_ptr
->status
.status_word
= 0;
1037 /* enable this packet's dma */
1038 current_tx_ptr
->desc_a
.config
|= DMAEN
;
1040 /* tx dma is running, just return */
1041 if (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN
)
1044 /* tx dma is not running */
1045 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr
->desc_a
));
1046 /* dma enabled, read from memory, size is 6 */
1047 bfin_write_DMA2_CONFIG(current_tx_ptr
->desc_a
.config
);
1048 /* Turn on the EMAC tx */
1049 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE
);
1052 bfin_tx_hwtstamp(dev
, skb
);
1054 current_tx_ptr
= current_tx_ptr
->next
;
1055 dev
->stats
.tx_packets
++;
1056 dev
->stats
.tx_bytes
+= (skb
->len
);
1060 return NETDEV_TX_OK
;
1063 #define IP_HEADER_OFF 0
1064 #define RX_ERROR_MASK (RX_LONG | RX_ALIGN | RX_CRC | RX_LEN | \
1065 RX_FRAG | RX_ADDR | RX_DMAO | RX_PHY | RX_LATE | RX_RANGE)
1067 static void bfin_mac_rx(struct net_device
*dev
)
1069 struct sk_buff
*skb
, *new_skb
;
1071 struct bfin_mac_local
*lp __maybe_unused
= netdev_priv(dev
);
1072 #if defined(BFIN_MAC_CSUM_OFFLOAD)
1074 unsigned char fcs
[ETH_FCS_LEN
+ 1];
1077 /* check if frame status word reports an error condition
1078 * we which case we simply drop the packet
1080 if (current_rx_ptr
->status
.status_word
& RX_ERROR_MASK
) {
1081 netdev_notice(dev
, "rx: receive error - packet dropped\n");
1082 dev
->stats
.rx_dropped
++;
1086 /* allocate a new skb for next time receive */
1087 skb
= current_rx_ptr
->skb
;
1089 new_skb
= dev_alloc_skb(PKT_BUF_SZ
+ NET_IP_ALIGN
);
1091 netdev_notice(dev
, "rx: low on mem - packet dropped\n");
1092 dev
->stats
.rx_dropped
++;
1095 /* reserve 2 bytes for RXDWA padding */
1096 skb_reserve(new_skb
, NET_IP_ALIGN
);
1097 /* Invidate the data cache of skb->data range when it is write back
1098 * cache. It will prevent overwritting the new data from DMA
1100 blackfin_dcache_invalidate_range((unsigned long)new_skb
->head
,
1101 (unsigned long)new_skb
->end
);
1103 current_rx_ptr
->skb
= new_skb
;
1104 current_rx_ptr
->desc_a
.start_addr
= (unsigned long)new_skb
->data
- 2;
1106 len
= (unsigned short)((current_rx_ptr
->status
.status_word
) & RX_FRLEN
);
1107 /* Deduce Ethernet FCS length from Ethernet payload length */
1111 skb
->protocol
= eth_type_trans(skb
, dev
);
1113 bfin_rx_hwtstamp(dev
, skb
);
1115 #if defined(BFIN_MAC_CSUM_OFFLOAD)
1116 /* Checksum offloading only works for IPv4 packets with the standard IP header
1117 * length of 20 bytes, because the blackfin MAC checksum calculation is
1118 * based on that assumption. We must NOT use the calculated checksum if our
1119 * IP version or header break that assumption.
1121 if (skb
->data
[IP_HEADER_OFF
] == 0x45) {
1122 skb
->csum
= current_rx_ptr
->status
.ip_payload_csum
;
1124 * Deduce Ethernet FCS from hardware generated IP payload checksum.
1125 * IP checksum is based on 16-bit one's complement algorithm.
1126 * To deduce a value from checksum is equal to add its inversion.
1127 * If the IP payload len is odd, the inversed FCS should also
1128 * begin from odd address and leave first byte zero.
1132 for (i
= 0; i
< ETH_FCS_LEN
; i
++)
1133 fcs
[i
+ 1] = ~skb
->data
[skb
->len
+ i
];
1134 skb
->csum
= csum_partial(fcs
, ETH_FCS_LEN
+ 1, skb
->csum
);
1136 for (i
= 0; i
< ETH_FCS_LEN
; i
++)
1137 fcs
[i
] = ~skb
->data
[skb
->len
+ i
];
1138 skb
->csum
= csum_partial(fcs
, ETH_FCS_LEN
, skb
->csum
);
1140 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1145 dev
->stats
.rx_packets
++;
1146 dev
->stats
.rx_bytes
+= len
;
1148 current_rx_ptr
->status
.status_word
= 0x00000000;
1149 current_rx_ptr
= current_rx_ptr
->next
;
1152 /* interrupt routine to handle rx and error signal */
1153 static irqreturn_t
bfin_mac_interrupt(int irq
, void *dev_id
)
1155 struct net_device
*dev
= dev_id
;
1159 if (current_rx_ptr
->status
.status_word
== 0) {
1160 /* no more new packet received */
1162 if (current_rx_ptr
->next
->status
.status_word
!= 0) {
1163 current_rx_ptr
= current_rx_ptr
->next
;
1167 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
1168 DMA_DONE
| DMA_ERR
);
1175 goto get_one_packet
;
1178 #ifdef CONFIG_NET_POLL_CONTROLLER
1179 static void bfin_mac_poll(struct net_device
*dev
)
1181 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1183 disable_irq(IRQ_MAC_RX
);
1184 bfin_mac_interrupt(IRQ_MAC_RX
, dev
);
1186 enable_irq(IRQ_MAC_RX
);
1188 #endif /* CONFIG_NET_POLL_CONTROLLER */
1190 static void bfin_mac_disable(void)
1192 unsigned int opmode
;
1194 opmode
= bfin_read_EMAC_OPMODE();
1197 /* Turn off the EMAC */
1198 bfin_write_EMAC_OPMODE(opmode
);
1202 * Enable Interrupts, Receive, and Transmit
1204 static int bfin_mac_enable(struct phy_device
*phydev
)
1209 pr_debug("%s\n", __func__
);
1212 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head
->desc_a
));
1213 bfin_write_DMA1_CONFIG(rx_list_head
->desc_a
.config
);
1216 ret
= bfin_mdio_poll();
1220 /* We enable only RX here */
1221 /* ASTP : Enable Automatic Pad Stripping
1222 PR : Promiscuous Mode for test
1223 PSF : Receive frames with total length less than 64 bytes.
1224 FDMODE : Full Duplex Mode
1225 LB : Internal Loopback for test
1226 RE : Receiver Enable */
1227 opmode
= bfin_read_EMAC_OPMODE();
1228 if (opmode
& FDMODE
)
1231 opmode
|= DRO
| DC
| PSF
;
1234 if (phydev
->interface
== PHY_INTERFACE_MODE_RMII
) {
1235 opmode
|= RMII
; /* For Now only 100MBit are supported */
1236 #if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) && CONFIG_BF_REV_0_2
1241 /* Turn on the EMAC rx */
1242 bfin_write_EMAC_OPMODE(opmode
);
1247 /* Our watchdog timed out. Called by the networking layer */
1248 static void bfin_mac_timeout(struct net_device
*dev
)
1250 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1252 pr_debug("%s: %s\n", dev
->name
, __func__
);
1256 del_timer(&lp
->tx_reclaim_timer
);
1258 /* reset tx queue and free skb */
1259 while (tx_list_head
!= current_tx_ptr
) {
1260 tx_list_head
->desc_a
.config
&= ~DMAEN
;
1261 tx_list_head
->status
.status_word
= 0;
1262 if (tx_list_head
->skb
) {
1263 dev_kfree_skb(tx_list_head
->skb
);
1264 tx_list_head
->skb
= NULL
;
1266 tx_list_head
= tx_list_head
->next
;
1269 if (netif_queue_stopped(lp
->ndev
))
1270 netif_wake_queue(lp
->ndev
);
1272 bfin_mac_enable(lp
->phydev
);
1274 /* We can accept TX packets again */
1275 dev
->trans_start
= jiffies
; /* prevent tx timeout */
1276 netif_wake_queue(dev
);
1279 static void bfin_mac_multicast_hash(struct net_device
*dev
)
1281 u32 emac_hashhi
, emac_hashlo
;
1282 struct netdev_hw_addr
*ha
;
1286 emac_hashhi
= emac_hashlo
= 0;
1288 netdev_for_each_mc_addr(ha
, dev
) {
1291 /* skip non-multicast addresses */
1295 crc
= ether_crc(ETH_ALEN
, addrs
);
1299 emac_hashhi
|= 1 << (crc
& 0x1f);
1301 emac_hashlo
|= 1 << (crc
& 0x1f);
1304 bfin_write_EMAC_HASHHI(emac_hashhi
);
1305 bfin_write_EMAC_HASHLO(emac_hashlo
);
1309 * This routine will, depending on the values passed to it,
1310 * either make it accept multicast packets, go into
1311 * promiscuous mode (for TCPDUMP and cousins) or accept
1312 * a select set of multicast packets
1314 static void bfin_mac_set_multicast_list(struct net_device
*dev
)
1318 if (dev
->flags
& IFF_PROMISC
) {
1319 netdev_info(dev
, "set promisc mode\n");
1320 sysctl
= bfin_read_EMAC_OPMODE();
1322 bfin_write_EMAC_OPMODE(sysctl
);
1323 } else if (dev
->flags
& IFF_ALLMULTI
) {
1324 /* accept all multicast */
1325 sysctl
= bfin_read_EMAC_OPMODE();
1327 bfin_write_EMAC_OPMODE(sysctl
);
1328 } else if (!netdev_mc_empty(dev
)) {
1329 /* set up multicast hash table */
1330 sysctl
= bfin_read_EMAC_OPMODE();
1332 bfin_write_EMAC_OPMODE(sysctl
);
1333 bfin_mac_multicast_hash(dev
);
1335 /* clear promisc or multicast mode */
1336 sysctl
= bfin_read_EMAC_OPMODE();
1337 sysctl
&= ~(RAF
| PAM
);
1338 bfin_write_EMAC_OPMODE(sysctl
);
1342 static int bfin_mac_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
1344 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
1346 if (!netif_running(netdev
))
1351 return bfin_mac_hwtstamp_ioctl(netdev
, ifr
, cmd
);
1354 return phy_mii_ioctl(lp
->phydev
, ifr
, cmd
);
1361 * this puts the device in an inactive state
1363 static void bfin_mac_shutdown(struct net_device
*dev
)
1365 /* Turn off the EMAC */
1366 bfin_write_EMAC_OPMODE(0x00000000);
1367 /* Turn off the EMAC RX DMA */
1368 bfin_write_DMA1_CONFIG(0x0000);
1369 bfin_write_DMA2_CONFIG(0x0000);
1373 * Open and Initialize the interface
1375 * Set up everything, reset the card, etc..
1377 static int bfin_mac_open(struct net_device
*dev
)
1379 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1381 pr_debug("%s: %s\n", dev
->name
, __func__
);
1384 * Check that the address is valid. If its not, refuse
1385 * to bring the device up. The user must specify an
1386 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1388 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1389 netdev_warn(dev
, "no valid ethernet hw addr\n");
1393 /* initial rx and tx list */
1394 ret
= desc_list_init();
1398 phy_start(lp
->phydev
);
1399 phy_write(lp
->phydev
, MII_BMCR
, BMCR_RESET
);
1400 setup_system_regs(dev
);
1401 setup_mac_addr(dev
->dev_addr
);
1404 ret
= bfin_mac_enable(lp
->phydev
);
1407 pr_debug("hardware init finished\n");
1409 netif_start_queue(dev
);
1410 netif_carrier_on(dev
);
1416 * this makes the board clean up everything that it can
1417 * and not talk to the outside world. Caused by
1418 * an 'ifconfig ethX down'
1420 static int bfin_mac_close(struct net_device
*dev
)
1422 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1423 pr_debug("%s: %s\n", dev
->name
, __func__
);
1425 netif_stop_queue(dev
);
1426 netif_carrier_off(dev
);
1428 phy_stop(lp
->phydev
);
1429 phy_write(lp
->phydev
, MII_BMCR
, BMCR_PDOWN
);
1431 /* clear everything */
1432 bfin_mac_shutdown(dev
);
1434 /* free the rx/tx buffers */
1440 static const struct net_device_ops bfin_mac_netdev_ops
= {
1441 .ndo_open
= bfin_mac_open
,
1442 .ndo_stop
= bfin_mac_close
,
1443 .ndo_start_xmit
= bfin_mac_hard_start_xmit
,
1444 .ndo_set_mac_address
= bfin_mac_set_mac_address
,
1445 .ndo_tx_timeout
= bfin_mac_timeout
,
1446 .ndo_set_multicast_list
= bfin_mac_set_multicast_list
,
1447 .ndo_do_ioctl
= bfin_mac_ioctl
,
1448 .ndo_validate_addr
= eth_validate_addr
,
1449 .ndo_change_mtu
= eth_change_mtu
,
1450 #ifdef CONFIG_NET_POLL_CONTROLLER
1451 .ndo_poll_controller
= bfin_mac_poll
,
1455 static int __devinit
bfin_mac_probe(struct platform_device
*pdev
)
1457 struct net_device
*ndev
;
1458 struct bfin_mac_local
*lp
;
1459 struct platform_device
*pd
;
1460 struct bfin_mii_bus_platform_data
*mii_bus_data
;
1463 ndev
= alloc_etherdev(sizeof(struct bfin_mac_local
));
1465 dev_err(&pdev
->dev
, "Cannot allocate net device!\n");
1469 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1470 platform_set_drvdata(pdev
, ndev
);
1471 lp
= netdev_priv(ndev
);
1474 /* Grab the MAC address in the MAC */
1475 *(__le32
*) (&(ndev
->dev_addr
[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
1476 *(__le16
*) (&(ndev
->dev_addr
[4])) = cpu_to_le16((u16
) bfin_read_EMAC_ADDRHI());
1479 /*todo: how to proble? which is revision_register */
1480 bfin_write_EMAC_ADDRLO(0x12345678);
1481 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
1482 dev_err(&pdev
->dev
, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");
1484 goto out_err_probe_mac
;
1489 * Is it valid? (Did bootloader initialize it?)
1490 * Grab the MAC from the board somehow
1491 * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c
1493 if (!is_valid_ether_addr(ndev
->dev_addr
))
1494 bfin_get_ether_addr(ndev
->dev_addr
);
1496 /* If still not valid, get a random one */
1497 if (!is_valid_ether_addr(ndev
->dev_addr
))
1498 random_ether_addr(ndev
->dev_addr
);
1500 setup_mac_addr(ndev
->dev_addr
);
1502 if (!pdev
->dev
.platform_data
) {
1503 dev_err(&pdev
->dev
, "Cannot get platform device bfin_mii_bus!\n");
1505 goto out_err_probe_mac
;
1507 pd
= pdev
->dev
.platform_data
;
1508 lp
->mii_bus
= platform_get_drvdata(pd
);
1510 dev_err(&pdev
->dev
, "Cannot get mii_bus!\n");
1512 goto out_err_probe_mac
;
1514 lp
->mii_bus
->priv
= ndev
;
1515 mii_bus_data
= pd
->dev
.platform_data
;
1517 rc
= mii_probe(ndev
, mii_bus_data
->phy_mode
);
1519 dev_err(&pdev
->dev
, "MII Probe failed!\n");
1520 goto out_err_mii_probe
;
1523 /* Fill in the fields of the device structure with ethernet values. */
1526 ndev
->netdev_ops
= &bfin_mac_netdev_ops
;
1527 ndev
->ethtool_ops
= &bfin_mac_ethtool_ops
;
1529 init_timer(&lp
->tx_reclaim_timer
);
1530 lp
->tx_reclaim_timer
.data
= (unsigned long)lp
;
1531 lp
->tx_reclaim_timer
.function
= tx_reclaim_skb_timeout
;
1533 spin_lock_init(&lp
->lock
);
1535 /* now, enable interrupts */
1536 /* register irq handler */
1537 rc
= request_irq(IRQ_MAC_RX
, bfin_mac_interrupt
,
1538 IRQF_DISABLED
, "EMAC_RX", ndev
);
1540 dev_err(&pdev
->dev
, "Cannot request Blackfin MAC RX IRQ!\n");
1542 goto out_err_request_irq
;
1545 rc
= register_netdev(ndev
);
1547 dev_err(&pdev
->dev
, "Cannot register net device!\n");
1548 goto out_err_reg_ndev
;
1551 bfin_mac_hwtstamp_init(ndev
);
1553 /* now, print out the card info, in a short format.. */
1554 netdev_info(ndev
, "%s, Version %s\n", DRV_DESC
, DRV_VERSION
);
1559 free_irq(IRQ_MAC_RX
, ndev
);
1560 out_err_request_irq
:
1562 mdiobus_unregister(lp
->mii_bus
);
1563 mdiobus_free(lp
->mii_bus
);
1565 platform_set_drvdata(pdev
, NULL
);
1571 static int __devexit
bfin_mac_remove(struct platform_device
*pdev
)
1573 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1574 struct bfin_mac_local
*lp
= netdev_priv(ndev
);
1576 platform_set_drvdata(pdev
, NULL
);
1578 lp
->mii_bus
->priv
= NULL
;
1580 unregister_netdev(ndev
);
1582 free_irq(IRQ_MAC_RX
, ndev
);
1590 static int bfin_mac_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
1592 struct net_device
*net_dev
= platform_get_drvdata(pdev
);
1593 struct bfin_mac_local
*lp
= netdev_priv(net_dev
);
1596 bfin_write_EMAC_OPMODE((bfin_read_EMAC_OPMODE() & ~TE
) | RE
);
1597 bfin_write_EMAC_WKUP_CTL(MPKE
);
1598 enable_irq_wake(IRQ_MAC_WAKEDET
);
1600 if (netif_running(net_dev
))
1601 bfin_mac_close(net_dev
);
1607 static int bfin_mac_resume(struct platform_device
*pdev
)
1609 struct net_device
*net_dev
= platform_get_drvdata(pdev
);
1610 struct bfin_mac_local
*lp
= netdev_priv(net_dev
);
1613 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE
);
1614 bfin_write_EMAC_WKUP_CTL(0);
1615 disable_irq_wake(IRQ_MAC_WAKEDET
);
1617 if (netif_running(net_dev
))
1618 bfin_mac_open(net_dev
);
1624 #define bfin_mac_suspend NULL
1625 #define bfin_mac_resume NULL
1626 #endif /* CONFIG_PM */
1628 static int __devinit
bfin_mii_bus_probe(struct platform_device
*pdev
)
1630 struct mii_bus
*miibus
;
1631 struct bfin_mii_bus_platform_data
*mii_bus_pd
;
1632 const unsigned short *pin_req
;
1635 mii_bus_pd
= dev_get_platdata(&pdev
->dev
);
1637 dev_err(&pdev
->dev
, "No peripherals in platform data!\n");
1642 * We are setting up a network card,
1643 * so set the GPIO pins to Ethernet mode
1645 pin_req
= mii_bus_pd
->mac_peripherals
;
1646 rc
= peripheral_request_list(pin_req
, KBUILD_MODNAME
);
1648 dev_err(&pdev
->dev
, "Requesting peripherals failed!\n");
1653 miibus
= mdiobus_alloc();
1656 miibus
->read
= bfin_mdiobus_read
;
1657 miibus
->write
= bfin_mdiobus_write
;
1658 miibus
->reset
= bfin_mdiobus_reset
;
1660 miibus
->parent
= &pdev
->dev
;
1661 miibus
->name
= "bfin_mii_bus";
1662 miibus
->phy_mask
= mii_bus_pd
->phy_mask
;
1664 snprintf(miibus
->id
, MII_BUS_ID_SIZE
, "0");
1665 miibus
->irq
= kmalloc(sizeof(int)*PHY_MAX_ADDR
, GFP_KERNEL
);
1667 goto out_err_irq_alloc
;
1669 for (i
= rc
; i
< PHY_MAX_ADDR
; ++i
)
1670 miibus
->irq
[i
] = PHY_POLL
;
1672 rc
= clamp(mii_bus_pd
->phydev_number
, 0, PHY_MAX_ADDR
);
1673 if (rc
!= mii_bus_pd
->phydev_number
)
1674 dev_err(&pdev
->dev
, "Invalid number (%i) of phydevs\n",
1675 mii_bus_pd
->phydev_number
);
1676 for (i
= 0; i
< rc
; ++i
) {
1677 unsigned short phyaddr
= mii_bus_pd
->phydev_data
[i
].addr
;
1678 if (phyaddr
< PHY_MAX_ADDR
)
1679 miibus
->irq
[phyaddr
] = mii_bus_pd
->phydev_data
[i
].irq
;
1682 "Invalid PHY address %i for phydev %i\n",
1686 rc
= mdiobus_register(miibus
);
1688 dev_err(&pdev
->dev
, "Cannot register MDIO bus!\n");
1689 goto out_err_mdiobus_register
;
1692 platform_set_drvdata(pdev
, miibus
);
1695 out_err_mdiobus_register
:
1698 mdiobus_free(miibus
);
1700 peripheral_free_list(pin_req
);
1705 static int __devexit
bfin_mii_bus_remove(struct platform_device
*pdev
)
1707 struct mii_bus
*miibus
= platform_get_drvdata(pdev
);
1708 struct bfin_mii_bus_platform_data
*mii_bus_pd
=
1709 dev_get_platdata(&pdev
->dev
);
1711 platform_set_drvdata(pdev
, NULL
);
1712 mdiobus_unregister(miibus
);
1714 mdiobus_free(miibus
);
1715 peripheral_free_list(mii_bus_pd
->mac_peripherals
);
1720 static struct platform_driver bfin_mii_bus_driver
= {
1721 .probe
= bfin_mii_bus_probe
,
1722 .remove
= __devexit_p(bfin_mii_bus_remove
),
1724 .name
= "bfin_mii_bus",
1725 .owner
= THIS_MODULE
,
1729 static struct platform_driver bfin_mac_driver
= {
1730 .probe
= bfin_mac_probe
,
1731 .remove
= __devexit_p(bfin_mac_remove
),
1732 .resume
= bfin_mac_resume
,
1733 .suspend
= bfin_mac_suspend
,
1735 .name
= KBUILD_MODNAME
,
1736 .owner
= THIS_MODULE
,
1740 static int __init
bfin_mac_init(void)
1743 ret
= platform_driver_register(&bfin_mii_bus_driver
);
1745 return platform_driver_register(&bfin_mac_driver
);
1749 module_init(bfin_mac_init
);
1751 static void __exit
bfin_mac_cleanup(void)
1753 platform_driver_unregister(&bfin_mac_driver
);
1754 platform_driver_unregister(&bfin_mii_bus_driver
);
1757 module_exit(bfin_mac_cleanup
);