drivers/net/bna/bnad.h

   1 /*
   2  * Linux network driver for Brocade Converged Network Adapter.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License (GPL) Version 2 as
   6  * published by the Free Software Foundation
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 /*
  14  * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15  * All rights reserved
  16  * www.brocade.com
  17  */
  18 #ifndef __BNAD_H__
  19 #define __BNAD_H__
  20
  21 #include <linux/rtnetlink.h>
  22 #include <linux/workqueue.h>
  23 #include <linux/ipv6.h>
  24 #include <linux/etherdevice.h>
  25 #include <linux/mutex.h>
  26 #include <linux/firmware.h>
  27 #include <linux/if_vlan.h>
  28
  29 /* Fix for IA64 */
  30 #include <asm/checksum.h>
  31 #include <net/ip6_checksum.h>
  32
  33 #include <net/ip.h>
  34 #include <net/tcp.h>
  35
  36 #include "bna.h"
  37
  38 #define BNAD_TXQ_DEPTH          2048
  39 #define BNAD_RXQ_DEPTH          2048
  40
  41 #define BNAD_MAX_TXS            1
  42 #define BNAD_MAX_TXQ_PER_TX     8       /* 8 priority queues */
  43 #define BNAD_TXQ_NUM            1
  44
  45 #define BNAD_MAX_RXS            1
  46 #define BNAD_MAX_RXPS_PER_RX    16
  47
  48 /*
  49  * Control structure pointed to ccb->ctrl, which
  50  * determines the NAPI / LRO behavior CCB
  51  * There is 1:1 corres. between ccb & ctrl
  52  */
  53 struct bnad_rx_ctrl {
  54         struct bna_ccb *ccb;
  55         unsigned long  flags;
  56         struct napi_struct      napi;
  57 };
  58
  59 #define BNAD_RXMODE_PROMISC_DEFAULT     BNA_RXMODE_PROMISC
  60
  61 #define BNAD_GET_TX_ID(_skb)    (0)
  62
  63 /*
  64  * GLOBAL #defines (CONSTANTS)
  65  */
  66 #define BNAD_NAME                       "bna"
  67 #define BNAD_NAME_LEN                   64
  68
  69 #define BNAD_VERSION                    "2.3.2.3"
  70
  71 #define BNAD_MAILBOX_MSIX_VECTORS       1
  72
  73 #define BNAD_STATS_TIMER_FREQ           1000    /* in msecs */
  74 #define BNAD_DIM_TIMER_FREQ             1000    /* in msecs */
  75
  76 #define BNAD_MAX_Q_DEPTH                0x10000
  77 #define BNAD_MIN_Q_DEPTH                0x200
  78
  79 #define BNAD_JUMBO_MTU                  9000
  80
  81 #define BNAD_NETIF_WAKE_THRESHOLD       8
  82
  83 #define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3
  84
  85 /* Bit positions for tcb->flags */
  86 #define BNAD_TXQ_FREE_SENT              0
  87 #define BNAD_TXQ_TX_STARTED             1
  88
  89 /* Bit positions for rcb->flags */
  90 #define BNAD_RXQ_REFILL                 0
  91 #define BNAD_RXQ_STARTED                1
  92
  93 /*
  94  * DATA STRUCTURES
  95  */
  96
  97 /* enums */
  98 enum bnad_intr_source {
  99         BNAD_INTR_TX            = 1,
 100         BNAD_INTR_RX            = 2
 101 };
 102
 103 enum bnad_link_state {
 104         BNAD_LS_DOWN            = 0,
 105         BNAD_LS_UP              = 1
 106 };
 107
 108 struct bnad_completion {
 109         struct completion       ioc_comp;
 110         struct completion       ucast_comp;
 111         struct completion       mcast_comp;
 112         struct completion       tx_comp;
 113         struct completion       rx_comp;
 114         struct completion       stats_comp;
 115         struct completion       port_comp;
 116
 117         u8                      ioc_comp_status;
 118         u8                      ucast_comp_status;
 119         u8                      mcast_comp_status;
 120         u8                      tx_comp_status;
 121         u8                      rx_comp_status;
 122         u8                      stats_comp_status;
 123         u8                      port_comp_status;
 124 };
 125
 126 /* Tx Rx Control Stats */
 127 struct bnad_drv_stats {
 128         u64             netif_queue_stop;
 129         u64             netif_queue_wakeup;
 130         u64             netif_queue_stopped;
 131         u64             tso4;
 132         u64             tso6;
 133         u64             tso_err;
 134         u64             tcpcsum_offload;
 135         u64             udpcsum_offload;
 136         u64             csum_help;
 137         u64             csum_help_err;
 138
 139         u64             hw_stats_updates;
 140         u64             netif_rx_schedule;
 141         u64             netif_rx_complete;
 142         u64             netif_rx_dropped;
 143
 144         u64             link_toggle;
 145         u64             cee_up;
 146
 147         u64             rxp_info_alloc_failed;
 148         u64             mbox_intr_disabled;
 149         u64             mbox_intr_enabled;
 150         u64             tx_unmap_q_alloc_failed;
 151         u64             rx_unmap_q_alloc_failed;
 152
 153         u64             rxbuf_alloc_failed;
 154 };
 155
 156 /* Complete driver stats */
 157 struct bnad_stats {
 158         struct bnad_drv_stats drv_stats;
 159         struct bna_stats *bna_stats;
 160 };
 161
 162 /* Tx / Rx Resources */
 163 struct bnad_tx_res_info {
 164         struct bna_res_info res_info[BNA_TX_RES_T_MAX];
 165 };
 166
 167 struct bnad_rx_res_info {
 168         struct bna_res_info res_info[BNA_RX_RES_T_MAX];
 169 };
 170
 171 struct bnad_tx_info {
 172         struct bna_tx *tx; /* 1:1 between tx_info & tx */
 173         struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
 174 } ____cacheline_aligned;
 175
 176 struct bnad_rx_info {
 177         struct bna_rx *rx; /* 1:1 between rx_info & rx */
 178
 179         struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXPS_PER_RX];
 180 } ____cacheline_aligned;
 181
 182 /* Unmap queues for Tx / Rx cleanup */
 183 struct bnad_skb_unmap {
 184         struct sk_buff          *skb;
 185         DEFINE_DMA_UNMAP_ADDR(dma_addr);
 186 };
 187
 188 struct bnad_unmap_q {
 189         u32             producer_index;
 190         u32             consumer_index;
 191         u32             q_depth;
 192         /* This should be the last one */
 193         struct bnad_skb_unmap unmap_array[1];
 194 };
 195
 196 /* Bit mask values for bnad->cfg_flags */
 197 #define BNAD_CF_DIM_ENABLED             0x01    /* DIM */
 198 #define BNAD_CF_PROMISC                 0x02
 199 #define BNAD_CF_ALLMULTI                0x04
 200 #define BNAD_CF_MSIX                    0x08    /* If in MSIx mode */
 201
 202 /* Defines for run_flags bit-mask */
 203 /* Set, tested & cleared using xxx_bit() functions */
 204 /* Values indicated bit positions */
 205 #define BNAD_RF_CEE_RUNNING             1
 206 #define BNAD_RF_MBOX_IRQ_DISABLED       2
 207 #define BNAD_RF_RX_STARTED              3
 208 #define BNAD_RF_DIM_TIMER_RUNNING       4
 209 #define BNAD_RF_STATS_TIMER_RUNNING     5
 210 #define BNAD_RF_TX_SHUTDOWN_DELAYED     6
 211 #define BNAD_RF_RX_SHUTDOWN_DELAYED     7
 212
 213 struct bnad {
 214         struct net_device       *netdev;
 215
 216         /* Data path */
 217         struct bnad_tx_info tx_info[BNAD_MAX_TXS];
 218         struct bnad_rx_info rx_info[BNAD_MAX_RXS];
 219
 220         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 221         /*
 222          * These q numbers are global only because
 223          * they are used to calculate MSIx vectors.
 224          * Actually the exact # of queues are per Tx/Rx
 225          * object.
 226          */
 227         u32             num_tx;
 228         u32             num_rx;
 229         u32             num_txq_per_tx;
 230         u32             num_rxp_per_rx;
 231
 232         u32             txq_depth;
 233         u32             rxq_depth;
 234
 235         u8                      tx_coalescing_timeo;
 236         u8                      rx_coalescing_timeo;
 237
 238         struct bna_rx_config rx_config[BNAD_MAX_RXS];
 239         struct bna_tx_config tx_config[BNAD_MAX_TXS];
 240
 241         void __iomem            *bar0;  /* BAR0 address */
 242
 243         struct bna bna;
 244
 245         u32             cfg_flags;
 246         unsigned long           run_flags;
 247
 248         struct pci_dev          *pcidev;
 249         u64             mmio_start;
 250         u64             mmio_len;
 251
 252         u32             msix_num;
 253         struct msix_entry       *msix_table;
 254
 255         struct mutex            conf_mutex;
 256         spinlock_t              bna_lock ____cacheline_aligned;
 257
 258         /* Timers */
 259         struct timer_list       ioc_timer;
 260         struct timer_list       dim_timer;
 261         struct timer_list       stats_timer;
 262
 263         /* Control path resources, memory & irq */
 264         struct bna_res_info res_info[BNA_RES_T_MAX];
 265         struct bnad_tx_res_info tx_res_info[BNAD_MAX_TXS];
 266         struct bnad_rx_res_info rx_res_info[BNAD_MAX_RXS];
 267
 268         struct bnad_completion bnad_completions;
 269
 270         /* Burnt in MAC address */
 271         mac_t                   perm_addr;
 272
 273         struct tasklet_struct   tx_free_tasklet;
 274
 275         /* Statistics */
 276         struct bnad_stats stats;
 277
 278         struct bnad_diag *diag;
 279
 280         char                    adapter_name[BNAD_NAME_LEN];
 281         char                    port_name[BNAD_NAME_LEN];
 282         char                    mbox_irq_name[BNAD_NAME_LEN];
 283 };
 284
 285 /*
 286  * EXTERN VARIABLES
 287  */
 288 extern struct firmware *bfi_fw;
 289 extern u32              bnad_rxqs_per_cq;
 290
 291 /*
 292  * EXTERN PROTOTYPES
 293  */
 294 extern u32 *cna_get_firmware_buf(struct pci_dev *pdev);
 295 /* Netdev entry point prototypes */
 296 extern void bnad_set_ethtool_ops(struct net_device *netdev);
 297
 298 /* Configuration & setup */
 299 extern void bnad_tx_coalescing_timeo_set(struct bnad *bnad);
 300 extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
 301
 302 extern int bnad_setup_rx(struct bnad *bnad, uint rx_id);
 303 extern int bnad_setup_tx(struct bnad *bnad, uint tx_id);
 304 extern void bnad_cleanup_tx(struct bnad *bnad, uint tx_id);
 305 extern void bnad_cleanup_rx(struct bnad *bnad, uint rx_id);
 306
 307 /* Timer start/stop protos */
 308 extern void bnad_dim_timer_start(struct bnad *bnad);
 309
 310 /* Statistics */
 311 extern void bnad_netdev_qstats_fill(struct bnad *bnad,
 312                 struct rtnl_link_stats64 *stats);
 313 extern void bnad_netdev_hwstats_fill(struct bnad *bnad,
 314                 struct rtnl_link_stats64 *stats);
 315
 316 /**
 317  * MACROS
 318  */
 319 /* To set & get the stats counters */
 320 #define BNAD_UPDATE_CTR(_bnad, _ctr)                            \
 321                                 (((_bnad)->stats.drv_stats._ctr)++)
 322
 323 #define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr)
 324
 325 #define bnad_enable_rx_irq_unsafe(_ccb)                 \
 326 {                                                       \
 327         if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))) {\
 328                 bna_ib_coalescing_timer_set((_ccb)->i_dbell,    \
 329                         (_ccb)->rx_coalescing_timeo);           \
 330                 bna_ib_ack((_ccb)->i_dbell, 0);                 \
 331         }                                                       \
 332 }
 333
 334 #define bnad_dim_timer_running(_bnad)                           \
 335         (((_bnad)->cfg_flags & BNAD_CF_DIM_ENABLED) &&          \
 336         (test_bit(BNAD_RF_DIM_TIMER_RUNNING, &((_bnad)->run_flags))))
 337
 338 #endif /* __BNAD_H__ */