projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
bnx2x: Multiple concurrent l2 traffic classes
[deliverable/linux.git] / drivers / net / bnx2x / bnx2x_dcb.c
1 /* bnx2x_dcb.c: Broadcom Everest network driver.
2 *
3 * Copyright 2009-2011 Broadcom Corporation
4 *
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9 *
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
13 * consent.
14 *
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Dmitry Kravkov
17 *
18 */
19 #include <linux/netdevice.h>
20 #include <linux/types.h>
21 #include <linux/errno.h>
22
23 #include "bnx2x.h"
24 #include "bnx2x_cmn.h"
25 #include "bnx2x_dcb.h"
26
27 #ifdef BCM_DCBNL
28 #include <linux/rtnetlink.h>
29 #endif
30
31 /* forward declarations of dcbx related functions */
32 static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
33 static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
34 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
35 static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
36 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
37 u32 *set_configuration_ets_pg,
38 u32 *pri_pg_tbl);
39 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
40 u32 *pg_pri_orginal_spread,
41 struct pg_help_data *help_data);
42 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
43 struct pg_help_data *help_data,
44 struct dcbx_ets_feature *ets,
45 u32 *pg_pri_orginal_spread);
46 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
47 struct cos_help_data *cos_data,
48 u32 *pg_pri_orginal_spread,
49 struct dcbx_ets_feature *ets);
50 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp);
51
52
53 static void bnx2x_pfc_set(struct bnx2x *bp)
54 {
55 struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
56 u32 pri_bit, val = 0;
57 int i;
58
59 pfc_params.num_of_rx_cos_priority_mask =
60 bp->dcbx_port_params.ets.num_of_cos;
61
62 /* Tx COS configuration */
63 for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++)
64 /*
65 * We configure only the pauseable bits (non pauseable aren't
66 * configured at all) it's done to avoid false pauses from
67 * network
68 */
69 pfc_params.rx_cos_priority_mask[i] =
70 bp->dcbx_port_params.ets.cos_params[i].pri_bitmask
71 & DCBX_PFC_PRI_PAUSE_MASK(bp);
72
73 /*
74 * Rx COS configuration
75 * Changing PFC RX configuration .
76 * In RX COS0 will always be configured to lossy and COS1 to lossless
77 */
78 for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) {
79 pri_bit = 1 << i;
80
81 if (pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))
82 val |= 1 << (i * 4);
83 }
84
85 pfc_params.pkt_priority_to_cos = val;
86
87 /* RX COS0 */
88 pfc_params.llfc_low_priority_classes = 0;
89 /* RX COS1 */
90 pfc_params.llfc_high_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
91
92 /* BRB configuration */
93 pfc_params.cos0_pauseable = false;
94 pfc_params.cos1_pauseable = true;
95
96 bnx2x_acquire_phy_lock(bp);
97 bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
98 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
99 bnx2x_release_phy_lock(bp);
100 }
101
102 static void bnx2x_pfc_clear(struct bnx2x *bp)
103 {
104 struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
105 nig_params.pause_enable = 1;
106 #ifdef BNX2X_SAFC
107 if (bp->flags & SAFC_TX_FLAG) {
108 u32 high = 0, low = 0;
109 int i;
110
111 for (i = 0; i < BNX2X_MAX_PRIORITY; i++) {
112 if (bp->pri_map[i] == 1)
113 high |= (1 << i);
114 if (bp->pri_map[i] == 0)
115 low |= (1 << i);
116 }
117
118 nig_params.llfc_low_priority_classes = high;
119 nig_params.llfc_low_priority_classes = low;
120
121 nig_params.pause_enable = 0;
122 nig_params.llfc_enable = 1;
123 nig_params.llfc_out_en = 1;
124 }
125 #endif /* BNX2X_SAFC */
126 bnx2x_acquire_phy_lock(bp);
127 bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
128 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
129 bnx2x_release_phy_lock(bp);
130 }
131
132 static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
133 struct dcbx_features *features,
134 u32 error)
135 {
136 u8 i = 0;
137 DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
138
139 /* PG */
140 DP(NETIF_MSG_LINK,
141 "local_mib.features.ets.enabled %x\n", features->ets.enabled);
142 for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
143 DP(NETIF_MSG_LINK,
144 "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
145 DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
146 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
147 DP(NETIF_MSG_LINK,
148 "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
149 DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
150
151 /* pfc */
152 DP(NETIF_MSG_LINK, "dcbx_features.pfc.pri_en_bitmap %x\n",
153 features->pfc.pri_en_bitmap);
154 DP(NETIF_MSG_LINK, "dcbx_features.pfc.pfc_caps %x\n",
155 features->pfc.pfc_caps);
156 DP(NETIF_MSG_LINK, "dcbx_features.pfc.enabled %x\n",
157 features->pfc.enabled);
158
159 DP(NETIF_MSG_LINK, "dcbx_features.app.default_pri %x\n",
160 features->app.default_pri);
161 DP(NETIF_MSG_LINK, "dcbx_features.app.tc_supported %x\n",
162 features->app.tc_supported);
163 DP(NETIF_MSG_LINK, "dcbx_features.app.enabled %x\n",
164 features->app.enabled);
165 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
166 DP(NETIF_MSG_LINK,
167 "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
168 i, features->app.app_pri_tbl[i].app_id);
169 DP(NETIF_MSG_LINK,
170 "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
171 i, features->app.app_pri_tbl[i].pri_bitmap);
172 DP(NETIF_MSG_LINK,
173 "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
174 i, features->app.app_pri_tbl[i].appBitfield);
175 }
176 }
177
178 static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
179 u8 pri_bitmap,
180 u8 llfc_traf_type)
181 {
182 u32 pri = MAX_PFC_PRIORITIES;
183 u32 index = MAX_PFC_PRIORITIES - 1;
184 u32 pri_mask;
185 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
186
187 /* Choose the highest priority */
188 while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
189 pri_mask = 1 << index;
190 if (GET_FLAGS(pri_bitmap, pri_mask))
191 pri = index ;
192 index--;
193 }
194
195 if (pri < MAX_PFC_PRIORITIES)
196 ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
197 }
198
199 static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
200 struct dcbx_app_priority_feature *app,
201 u32 error) {
202 u8 index;
203 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
204
205 if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
206 DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_ERROR\n");
207
208 if (app->enabled && !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) {
209
210 bp->dcbx_port_params.app.enabled = true;
211
212 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
213 ttp[index] = 0;
214
215 if (app->default_pri < MAX_PFC_PRIORITIES)
216 ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
217
218 for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
219 struct dcbx_app_priority_entry *entry =
220 app->app_pri_tbl;
221
222 if (GET_FLAGS(entry[index].appBitfield,
223 DCBX_APP_SF_ETH_TYPE) &&
224 ETH_TYPE_FCOE == entry[index].app_id)
225 bnx2x_dcbx_get_ap_priority(bp,
226 entry[index].pri_bitmap,
227 LLFC_TRAFFIC_TYPE_FCOE);
228
229 if (GET_FLAGS(entry[index].appBitfield,
230 DCBX_APP_SF_PORT) &&
231 TCP_PORT_ISCSI == entry[index].app_id)
232 bnx2x_dcbx_get_ap_priority(bp,
233 entry[index].pri_bitmap,
234 LLFC_TRAFFIC_TYPE_ISCSI);
235 }
236 } else {
237 DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_DISABLED\n");
238 bp->dcbx_port_params.app.enabled = false;
239 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
240 ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
241 }
242 }
243
244 static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
245 struct dcbx_ets_feature *ets,
246 u32 error) {
247 int i = 0;
248 u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
249 struct pg_help_data pg_help_data;
250 struct bnx2x_dcbx_cos_params *cos_params =
251 bp->dcbx_port_params.ets.cos_params;
252
253 memset(&pg_help_data, 0, sizeof(struct pg_help_data));
254
255
256 if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
257 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ERROR\n");
258
259
260 /* Clean up old settings of ets on COS */
261 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) {
262 cos_params[i].pauseable = false;
263 cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID;
264 cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
265 cos_params[i].pri_bitmask = 0;
266 }
267
268 if (bp->dcbx_port_params.app.enabled &&
269 !GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR) &&
270 ets->enabled) {
271 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ENABLE\n");
272 bp->dcbx_port_params.ets.enabled = true;
273
274 bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
275 pg_pri_orginal_spread,
276 ets->pri_pg_tbl);
277
278 bnx2x_dcbx_get_num_pg_traf_type(bp,
279 pg_pri_orginal_spread,
280 &pg_help_data);
281
282 bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
283 ets, pg_pri_orginal_spread);
284
285 } else {
286 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_DISABLED\n");
287 bp->dcbx_port_params.ets.enabled = false;
288 ets->pri_pg_tbl[0] = 0;
289
290 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
291 DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
292 }
293 }
294
295 static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
296 struct dcbx_pfc_feature *pfc, u32 error)
297 {
298
299 if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
300 DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_ERROR\n");
301
302 if (bp->dcbx_port_params.app.enabled &&
303 !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR) &&
304 pfc->enabled) {
305 bp->dcbx_port_params.pfc.enabled = true;
306 bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
307 ~(pfc->pri_en_bitmap);
308 } else {
309 DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_DISABLED\n");
310 bp->dcbx_port_params.pfc.enabled = false;
311 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
312 }
313 }
314
315 static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
316 struct dcbx_features *features,
317 u32 error)
318 {
319 bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
320
321 bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
322
323 bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
324 }
325
326 #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
327 static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
328 u32 *base_mib_addr,
329 u32 offset,
330 int read_mib_type)
331 {
332 int max_try_read = 0, i;
333 u32 *buff, mib_size, prefix_seq_num, suffix_seq_num;
334 struct lldp_remote_mib *remote_mib ;
335 struct lldp_local_mib *local_mib;
336
337
338 switch (read_mib_type) {
339 case DCBX_READ_LOCAL_MIB:
340 mib_size = sizeof(struct lldp_local_mib);
341 break;
342 case DCBX_READ_REMOTE_MIB:
343 mib_size = sizeof(struct lldp_remote_mib);
344 break;
345 default:
346 return 1; /*error*/
347 }
348
349 offset += BP_PORT(bp) * mib_size;
350
351 do {
352 buff = base_mib_addr;
353 for (i = 0; i < mib_size; i += 4, buff++)
354 *buff = REG_RD(bp, offset + i);
355
356 max_try_read++;
357
358 switch (read_mib_type) {
359 case DCBX_READ_LOCAL_MIB:
360 local_mib = (struct lldp_local_mib *) base_mib_addr;
361 prefix_seq_num = local_mib->prefix_seq_num;
362 suffix_seq_num = local_mib->suffix_seq_num;
363 break;
364 case DCBX_READ_REMOTE_MIB:
365 remote_mib = (struct lldp_remote_mib *) base_mib_addr;
366 prefix_seq_num = remote_mib->prefix_seq_num;
367 suffix_seq_num = remote_mib->suffix_seq_num;
368 break;
369 default:
370 return 1; /*error*/
371 }
372 } while ((prefix_seq_num != suffix_seq_num) &&
373 (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
374
375 if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
376 BNX2X_ERR("MIB could not be read\n");
377 return 1;
378 }
379
380 return 0;
381 }
382
383 static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
384 {
385 if (BP_PORT(bp)) {
386 BNX2X_ERR("4 port mode is not supported");
387 return;
388 }
389
390 if (bp->dcbx_port_params.pfc.enabled)
391 /*
392 * 1. Fills up common PFC structures if required
393 * 2. Configure NIG, MAC and BRB via the elink
394 */
395 bnx2x_pfc_set(bp);
396 else
397 bnx2x_pfc_clear(bp);
398 }
399
400 static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
401 {
402 DP(NETIF_MSG_LINK, "sending STOP TRAFFIC\n");
403 bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STOP_TRAFFIC,
404 0 /* connectionless */,
405 0 /* dataHi is zero */,
406 0 /* dataLo is zero */,
407 NONE_CONNECTION_TYPE);
408 }
409
410 static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
411 {
412 bnx2x_dcbx_fw_struct(bp);
413 DP(NETIF_MSG_LINK, "sending START TRAFFIC\n");
414 bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_START_TRAFFIC,
415 0, /* connectionless */
416 U64_HI(bnx2x_sp_mapping(bp, pfc_config)),
417 U64_LO(bnx2x_sp_mapping(bp, pfc_config)),
418 NONE_CONNECTION_TYPE);
419 }
420
421 static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp)
422 {
423 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
424 int rc = 0;
425
426 if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) {
427 BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos);
428 return;
429 }
430
431 /* valid COS entries */
432 if (ets->num_of_cos == 1) /* no ETS */
433 return;
434
435 /* sanity */
436 if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) &&
437 (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
438 ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) &&
439 (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
440 BNX2X_ERR("all COS should have at least bw_limit or strict"
441 "ets->cos_params[0].strict= %x"
442 "ets->cos_params[0].bw_tbl= %x"
443 "ets->cos_params[1].strict= %x"
444 "ets->cos_params[1].bw_tbl= %x",
445 ets->cos_params[0].strict,
446 ets->cos_params[0].bw_tbl,
447 ets->cos_params[1].strict,
448 ets->cos_params[1].bw_tbl);
449 return;
450 }
451 /* If we join a group and there is bw_tbl and strict then bw rules */
452 if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
453 (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
454 u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
455 u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
456 /* Do not allow 0-100 configuration
457 * since PBF does not support it
458 * force 1-99 instead
459 */
460 if (bw_tbl_0 == 0) {
461 bw_tbl_0 = 1;
462 bw_tbl_1 = 99;
463 } else if (bw_tbl_1 == 0) {
464 bw_tbl_1 = 1;
465 bw_tbl_0 = 99;
466 }
467
468 bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
469 } else {
470 if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST)
471 rc = bnx2x_ets_strict(&bp->link_params, 0);
472 else if (ets->cos_params[1].strict
473 == BNX2X_DCBX_STRICT_COS_HIGHEST)
474 rc = bnx2x_ets_strict(&bp->link_params, 1);
475 if (rc)
476 BNX2X_ERR("update_ets_params failed\n");
477 }
478 }
479
480 /*
481 * In E3B0 the configuration may have more than 2 COS.
482 */
483 void bnx2x_dcbx_update_ets_config(struct bnx2x *bp)
484 {
485 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
486 struct bnx2x_ets_params ets_params = { 0 };
487 u8 i;
488
489 ets_params.num_of_cos = ets->num_of_cos;
490
491 for (i = 0; i < ets->num_of_cos; i++) {
492 /* COS is SP */
493 if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) {
494 if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) {
495 BNX2X_ERR("COS can't be not BW and not SP\n");
496 return;
497 }
498
499 ets_params.cos[i].state = bnx2x_cos_state_strict;
500 ets_params.cos[i].params.sp_params.pri =
501 ets->cos_params[i].strict;
502 } else { /* COS is BW */
503 if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) {
504 BNX2X_ERR("COS can't be not BW and not SP\n");
505 return;
506 }
507 ets_params.cos[i].state = bnx2x_cos_state_bw;
508 ets_params.cos[i].params.bw_params.bw =
509 (u8)ets->cos_params[i].bw_tbl;
510 }
511 }
512
513 /* Configure the ETS in HW */
514 if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars,
515 &ets_params)) {
516 BNX2X_ERR("bnx2x_ets_e3b0_config failed\n");
517 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
518 }
519 }
520
521 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
522 {
523 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
524
525 if (!bp->dcbx_port_params.ets.enabled)
526 return;
527
528 if (CHIP_IS_E3B0(bp))
529 bnx2x_dcbx_update_ets_config(bp);
530 else
531 bnx2x_dcbx_2cos_limit_update_ets_config(bp);
532 }
533
534 #ifdef BCM_DCBNL
535 static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp)
536 {
537 struct lldp_remote_mib remote_mib = {0};
538 u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset);
539 int rc;
540
541 DP(NETIF_MSG_LINK, "dcbx_remote_mib_offset 0x%x\n",
542 dcbx_remote_mib_offset);
543
544 if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) {
545 BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n");
546 return -EINVAL;
547 }
548
549 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset,
550 DCBX_READ_REMOTE_MIB);
551
552 if (rc) {
553 BNX2X_ERR("Faild to read remote mib from FW\n");
554 return rc;
555 }
556
557 /* save features and flags */
558 bp->dcbx_remote_feat = remote_mib.features;
559 bp->dcbx_remote_flags = remote_mib.flags;
560 return 0;
561 }
562 #endif
563
564 static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
565 {
566 struct lldp_local_mib local_mib = {0};
567 u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
568 int rc;
569
570 DP(NETIF_MSG_LINK, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
571
572 if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
573 BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
574 return -EINVAL;
575 }
576
577 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
578 DCBX_READ_LOCAL_MIB);
579
580 if (rc) {
581 BNX2X_ERR("Faild to read local mib from FW\n");
582 return rc;
583 }
584
585 /* save features and error */
586 bp->dcbx_local_feat = local_mib.features;
587 bp->dcbx_error = local_mib.error;
588 return 0;
589 }
590
591
592 #ifdef BCM_DCBNL
593 static inline
594 u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent)
595 {
596 u8 pri;
597
598 /* Choose the highest priority */
599 for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--)
600 if (ent->pri_bitmap & (1 << pri))
601 break;
602 return pri;
603 }
604
605 static inline
606 u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent)
607 {
608 return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) ==
609 DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM :
610 DCB_APP_IDTYPE_ETHTYPE;
611 }
612
613 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall)
614 {
615 int i, err = 0;
616
617 for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) {
618 struct dcbx_app_priority_entry *ent =
619 &bp->dcbx_local_feat.app.app_pri_tbl[i];
620
621 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
622 u8 up = bnx2x_dcbx_dcbnl_app_up(ent);
623
624 /* avoid invalid user-priority */
625 if (up) {
626 struct dcb_app app;
627 app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
628 app.protocol = ent->app_id;
629 app.priority = delall ? 0 : up;
630 err = dcb_setapp(bp->dev, &app);
631 }
632 }
633 }
634 return err;
635 }
636 #endif
637
638 static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set)
639 {
640 if (SHMEM2_HAS(bp, drv_flags)) {
641 u32 drv_flags;
642 bnx2x_acquire_hw_lock(bp, HW_LOCK_DRV_FLAGS);
643 drv_flags = SHMEM2_RD(bp, drv_flags);
644
645 if (set)
646 SET_FLAGS(drv_flags, flags);
647 else
648 RESET_FLAGS(drv_flags, flags);
649
650 SHMEM2_WR(bp, drv_flags, drv_flags);
651 DP(NETIF_MSG_HW, "drv_flags 0x%08x\n", drv_flags);
652 bnx2x_release_hw_lock(bp, HW_LOCK_DRV_FLAGS);
653 }
654 }
655
656 static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp)
657 {
658 u8 prio, cos;
659 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) {
660 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
661 if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask
662 & (1 << prio)) {
663 bp->prio_to_cos[prio] = cos;
664 }
665 }
666 }
667
668 /* setup tc must be called under rtnl lock, but we can't take it here
669 * as we are handling an attetntion on a work queue which must be
670 * flushed at some rtnl-locked contexts (e.g. if down)
671 */
672 if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state))
673 schedule_delayed_work(&bp->sp_rtnl_task, 0);
674 }
675
676 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
677 {
678 switch (state) {
679 case BNX2X_DCBX_STATE_NEG_RECEIVED:
680 {
681 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
682 #ifdef BCM_DCBNL
683 /**
684 * Delete app tlvs from dcbnl before reading new
685 * negotiation results
686 */
687 bnx2x_dcbnl_update_applist(bp, true);
688
689 /* Read rmeote mib if dcbx is in the FW */
690 if (bnx2x_dcbx_read_shmem_remote_mib(bp))
691 return;
692 #endif
693 /* Read neg results if dcbx is in the FW */
694 if (bnx2x_dcbx_read_shmem_neg_results(bp))
695 return;
696
697 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
698 bp->dcbx_error);
699
700 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
701 bp->dcbx_error);
702
703 /* mark DCBX result for PMF migration */
704 bnx2x_update_drv_flags(bp, DRV_FLAGS_DCB_CONFIGURED, 1);
705 #ifdef BCM_DCBNL
706 /**
707 * Add new app tlvs to dcbnl
708 */
709 bnx2x_dcbnl_update_applist(bp, false);
710 #endif
711 bnx2x_dcbx_stop_hw_tx(bp);
712
713 /* reconfigure the netdevice with the results of the new
714 * dcbx negotiation.
715 */
716 bnx2x_dcbx_update_tc_mapping(bp);
717
718 return;
719 }
720 case BNX2X_DCBX_STATE_TX_PAUSED:
721 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_PAUSED\n");
722 bnx2x_pfc_set_pfc(bp);
723
724 bnx2x_dcbx_update_ets_params(bp);
725 bnx2x_dcbx_resume_hw_tx(bp);
726 return;
727 case BNX2X_DCBX_STATE_TX_RELEASED:
728 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_RELEASED\n");
729 bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
730 #ifdef BCM_DCBNL
731 /**
732 * Send a notification for the new negotiated parameters
733 */
734 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
735 #endif
736 return;
737 default:
738 BNX2X_ERR("Unknown DCBX_STATE\n");
739 }
740 }
741
742
743 #define LLDP_STATS_OFFSET(bp) (BP_PORT(bp)*\
744 sizeof(struct lldp_dcbx_stat))
745
746 /* calculate struct offset in array according to chip information */
747 #define LLDP_PARAMS_OFFSET(bp) (BP_PORT(bp)*sizeof(struct lldp_params))
748
749 #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
750 BP_PORT(bp)*sizeof(struct lldp_admin_mib))
751
752 static void bnx2x_dcbx_lldp_updated_params(struct bnx2x *bp,
753 u32 dcbx_lldp_params_offset)
754 {
755 struct lldp_params lldp_params = {0};
756 u32 i = 0, *buff = NULL;
757 u32 offset = dcbx_lldp_params_offset + LLDP_PARAMS_OFFSET(bp);
758
759 DP(NETIF_MSG_LINK, "lldp_offset 0x%x\n", offset);
760
761 if ((bp->lldp_config_params.overwrite_settings ==
762 BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE)) {
763 /* Read the data first */
764 buff = (u32 *)&lldp_params;
765 for (i = 0; i < sizeof(struct lldp_params); i += 4, buff++)
766 *buff = REG_RD(bp, (offset + i));
767
768 lldp_params.msg_tx_hold =
769 (u8)bp->lldp_config_params.msg_tx_hold;
770 lldp_params.msg_fast_tx_interval =
771 (u8)bp->lldp_config_params.msg_fast_tx;
772 lldp_params.tx_crd_max =
773 (u8)bp->lldp_config_params.tx_credit_max;
774 lldp_params.msg_tx_interval =
775 (u8)bp->lldp_config_params.msg_tx_interval;
776 lldp_params.tx_fast =
777 (u8)bp->lldp_config_params.tx_fast;
778
779 /* Write the data.*/
780 buff = (u32 *)&lldp_params;
781 for (i = 0; i < sizeof(struct lldp_params); i += 4, buff++)
782 REG_WR(bp, (offset + i) , *buff);
783
784
785 } else if (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
786 bp->lldp_config_params.overwrite_settings)
787 bp->lldp_config_params.overwrite_settings =
788 BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID;
789 }
790
791 static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
792 u32 dcbx_lldp_params_offset)
793 {
794 struct lldp_admin_mib admin_mib;
795 u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
796 u32 *buff;
797 u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
798
799 /*shortcuts*/
800 struct dcbx_features *af = &admin_mib.features;
801 struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
802
803 memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
804 buff = (u32 *)&admin_mib;
805 /* Read the data first */
806 for (i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++)
807 *buff = REG_RD(bp, (offset + i));
808
809 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON)
810 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
811 else
812 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
813
814 if ((BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
815 dp->overwrite_settings)) {
816 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
817 admin_mib.ver_cfg_flags |=
818 (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
819 DCBX_CEE_VERSION_MASK;
820
821 af->ets.enabled = (u8)dp->admin_ets_enable;
822
823 af->pfc.enabled = (u8)dp->admin_pfc_enable;
824
825 /* FOR IEEE dp->admin_tc_supported_tx_enable */
826 if (dp->admin_ets_configuration_tx_enable)
827 SET_FLAGS(admin_mib.ver_cfg_flags,
828 DCBX_ETS_CONFIG_TX_ENABLED);
829 else
830 RESET_FLAGS(admin_mib.ver_cfg_flags,
831 DCBX_ETS_CONFIG_TX_ENABLED);
832 /* For IEEE admin_ets_recommendation_tx_enable */
833 if (dp->admin_pfc_tx_enable)
834 SET_FLAGS(admin_mib.ver_cfg_flags,
835 DCBX_PFC_CONFIG_TX_ENABLED);
836 else
837 RESET_FLAGS(admin_mib.ver_cfg_flags,
838 DCBX_PFC_CONFIG_TX_ENABLED);
839
840 if (dp->admin_application_priority_tx_enable)
841 SET_FLAGS(admin_mib.ver_cfg_flags,
842 DCBX_APP_CONFIG_TX_ENABLED);
843 else
844 RESET_FLAGS(admin_mib.ver_cfg_flags,
845 DCBX_APP_CONFIG_TX_ENABLED);
846
847 if (dp->admin_ets_willing)
848 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
849 else
850 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
851 /* For IEEE admin_ets_reco_valid */
852 if (dp->admin_pfc_willing)
853 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
854 else
855 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
856
857 if (dp->admin_app_priority_willing)
858 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
859 else
860 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
861
862 for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
863 DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
864 (u8)dp->admin_configuration_bw_precentage[i]);
865
866 DP(NETIF_MSG_LINK, "pg_bw_tbl[%d] = %02x\n",
867 i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
868 }
869
870 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
871 DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
872 (u8)dp->admin_configuration_ets_pg[i]);
873
874 DP(NETIF_MSG_LINK, "pri_pg_tbl[%d] = %02x\n",
875 i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
876 }
877
878 /*For IEEE admin_recommendation_bw_precentage
879 *For IEEE admin_recommendation_ets_pg */
880 af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
881 for (i = 0; i < 4; i++) {
882 if (dp->admin_priority_app_table[i].valid) {
883 struct bnx2x_admin_priority_app_table *table =
884 dp->admin_priority_app_table;
885 if ((ETH_TYPE_FCOE == table[i].app_id) &&
886 (TRAFFIC_TYPE_ETH == table[i].traffic_type))
887 traf_type = FCOE_APP_IDX;
888 else if ((TCP_PORT_ISCSI == table[i].app_id) &&
889 (TRAFFIC_TYPE_PORT == table[i].traffic_type))
890 traf_type = ISCSI_APP_IDX;
891 else
892 traf_type = other_traf_type++;
893
894 af->app.app_pri_tbl[traf_type].app_id =
895 table[i].app_id;
896
897 af->app.app_pri_tbl[traf_type].pri_bitmap =
898 (u8)(1 << table[i].priority);
899
900 af->app.app_pri_tbl[traf_type].appBitfield =
901 (DCBX_APP_ENTRY_VALID);
902
903 af->app.app_pri_tbl[traf_type].appBitfield |=
904 (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
905 DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
906 }
907 }
908
909 af->app.default_pri = (u8)dp->admin_default_priority;
910
911 } else if (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
912 dp->overwrite_settings)
913 dp->overwrite_settings = BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID;
914
915 /* Write the data. */
916 buff = (u32 *)&admin_mib;
917 for (i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++)
918 REG_WR(bp, (offset + i), *buff);
919 }
920
921 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
922 {
923 if (!CHIP_IS_E1x(bp) && !CHIP_MODE_IS_4_PORT(bp)) {
924 bp->dcb_state = dcb_on;
925 bp->dcbx_enabled = dcbx_enabled;
926 } else {
927 bp->dcb_state = false;
928 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID;
929 }
930 DP(NETIF_MSG_LINK, "DCB state [%s:%s]\n",
931 dcb_on ? "ON" : "OFF",
932 dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" :
933 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" :
934 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ?
935 "on-chip with negotiation" : "invalid");
936 }
937
938 void bnx2x_dcbx_init_params(struct bnx2x *bp)
939 {
940 bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
941 bp->dcbx_config_params.admin_ets_willing = 1;
942 bp->dcbx_config_params.admin_pfc_willing = 1;
943 bp->dcbx_config_params.overwrite_settings = 1;
944 bp->dcbx_config_params.admin_ets_enable = 1;
945 bp->dcbx_config_params.admin_pfc_enable = 1;
946 bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
947 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
948 bp->dcbx_config_params.admin_pfc_tx_enable = 1;
949 bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
950 bp->dcbx_config_params.admin_ets_reco_valid = 1;
951 bp->dcbx_config_params.admin_app_priority_willing = 1;
952 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 00;
953 bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 50;
954 bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 50;
955 bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
956 bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
957 bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
958 bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
959 bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
960 bp->dcbx_config_params.admin_configuration_ets_pg[0] = 1;
961 bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
962 bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
963 bp->dcbx_config_params.admin_configuration_ets_pg[3] = 2;
964 bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
965 bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
966 bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
967 bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
968 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 0;
969 bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 1;
970 bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 2;
971 bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
972 bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 7;
973 bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 5;
974 bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 6;
975 bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 7;
976 bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
977 bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
978 bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
979 bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
980 bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
981 bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
982 bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
983 bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
984 bp->dcbx_config_params.admin_pfc_bitmap = 0x8; /* FCoE(3) enable */
985 bp->dcbx_config_params.admin_priority_app_table[0].valid = 1;
986 bp->dcbx_config_params.admin_priority_app_table[1].valid = 1;
987 bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
988 bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
989 bp->dcbx_config_params.admin_priority_app_table[0].priority = 3;
990 bp->dcbx_config_params.admin_priority_app_table[1].priority = 0;
991 bp->dcbx_config_params.admin_priority_app_table[2].priority = 0;
992 bp->dcbx_config_params.admin_priority_app_table[3].priority = 0;
993 bp->dcbx_config_params.admin_priority_app_table[0].traffic_type = 0;
994 bp->dcbx_config_params.admin_priority_app_table[1].traffic_type = 1;
995 bp->dcbx_config_params.admin_priority_app_table[2].traffic_type = 0;
996 bp->dcbx_config_params.admin_priority_app_table[3].traffic_type = 0;
997 bp->dcbx_config_params.admin_priority_app_table[0].app_id = 0x8906;
998 bp->dcbx_config_params.admin_priority_app_table[1].app_id = 3260;
999 bp->dcbx_config_params.admin_priority_app_table[2].app_id = 0;
1000 bp->dcbx_config_params.admin_priority_app_table[3].app_id = 0;
1001 bp->dcbx_config_params.admin_default_priority =
1002 bp->dcbx_config_params.admin_priority_app_table[1].priority;
1003 }
1004
1005 void bnx2x_dcbx_init(struct bnx2x *bp)
1006 {
1007 u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
1008
1009 if (bp->dcbx_enabled <= 0)
1010 return;
1011
1012 /* validate:
1013 * chip of good for dcbx version,
1014 * dcb is wanted
1015 * the function is pmf
1016 * shmem2 contains DCBX support fields
1017 */
1018 DP(NETIF_MSG_LINK, "dcb_state %d bp->port.pmf %d\n",
1019 bp->dcb_state, bp->port.pmf);
1020
1021 if (bp->dcb_state == BNX2X_DCB_STATE_ON && bp->port.pmf &&
1022 SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
1023 dcbx_lldp_params_offset =
1024 SHMEM2_RD(bp, dcbx_lldp_params_offset);
1025
1026 DP(NETIF_MSG_LINK, "dcbx_lldp_params_offset 0x%x\n",
1027 dcbx_lldp_params_offset);
1028
1029 bnx2x_update_drv_flags(bp, DRV_FLAGS_DCB_CONFIGURED, 0);
1030
1031 if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
1032 bnx2x_dcbx_lldp_updated_params(bp,
1033 dcbx_lldp_params_offset);
1034
1035 bnx2x_dcbx_admin_mib_updated_params(bp,
1036 dcbx_lldp_params_offset);
1037
1038 /* Let HW start negotiation */
1039 bnx2x_fw_command(bp,
1040 DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
1041 }
1042 }
1043 }
1044 static void
1045 bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
1046 struct flow_control_configuration *pfc_fw_cfg)
1047 {
1048 u8 pri = 0;
1049 u8 cos = 0;
1050
1051 DP(NETIF_MSG_LINK,
1052 "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
1053 DP(NETIF_MSG_LINK,
1054 "pdev->params.dcbx_port_params.pfc."
1055 "priority_non_pauseable_mask %x\n",
1056 bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
1057
1058 for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
1059 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1060 "cos_params[%d].pri_bitmask %x\n", cos,
1061 bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
1062
1063 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1064 "cos_params[%d].bw_tbl %x\n", cos,
1065 bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
1066
1067 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1068 "cos_params[%d].strict %x\n", cos,
1069 bp->dcbx_port_params.ets.cos_params[cos].strict);
1070
1071 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1072 "cos_params[%d].pauseable %x\n", cos,
1073 bp->dcbx_port_params.ets.cos_params[cos].pauseable);
1074 }
1075
1076 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
1077 DP(NETIF_MSG_LINK,
1078 "pfc_fw_cfg->traffic_type_to_priority_cos[%d]."
1079 "priority %x\n", pri,
1080 pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
1081
1082 DP(NETIF_MSG_LINK,
1083 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
1084 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
1085 }
1086 }
1087
1088 /* fills help_data according to pg_info */
1089 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
1090 u32 *pg_pri_orginal_spread,
1091 struct pg_help_data *help_data)
1092 {
1093 bool pg_found = false;
1094 u32 i, traf_type, add_traf_type, add_pg;
1095 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1096 struct pg_entry_help_data *data = help_data->data; /*shotcut*/
1097
1098 /* Set to invalid */
1099 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
1100 data[i].pg = DCBX_ILLEGAL_PG;
1101
1102 for (add_traf_type = 0;
1103 add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
1104 pg_found = false;
1105 if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
1106 add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
1107 for (traf_type = 0;
1108 traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1109 traf_type++) {
1110 if (data[traf_type].pg == add_pg) {
1111 if (!(data[traf_type].pg_priority &
1112 (1 << ttp[add_traf_type])))
1113 data[traf_type].
1114 num_of_dif_pri++;
1115 data[traf_type].pg_priority |=
1116 (1 << ttp[add_traf_type]);
1117 pg_found = true;
1118 break;
1119 }
1120 }
1121 if (false == pg_found) {
1122 data[help_data->num_of_pg].pg = add_pg;
1123 data[help_data->num_of_pg].pg_priority =
1124 (1 << ttp[add_traf_type]);
1125 data[help_data->num_of_pg].num_of_dif_pri = 1;
1126 help_data->num_of_pg++;
1127 }
1128 }
1129 DP(NETIF_MSG_LINK,
1130 "add_traf_type %d pg_found %s num_of_pg %d\n",
1131 add_traf_type, (false == pg_found) ? "NO" : "YES",
1132 help_data->num_of_pg);
1133 }
1134 }
1135
1136 static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
1137 struct cos_help_data *cos_data,
1138 u32 pri_join_mask)
1139 {
1140 /* Only one priority than only one COS */
1141 cos_data->data[0].pausable =
1142 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1143 cos_data->data[0].pri_join_mask = pri_join_mask;
1144 cos_data->data[0].cos_bw = 100;
1145 cos_data->num_of_cos = 1;
1146 }
1147
1148 static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
1149 struct cos_entry_help_data *data,
1150 u8 pg_bw)
1151 {
1152 if (data->cos_bw == DCBX_INVALID_COS_BW)
1153 data->cos_bw = pg_bw;
1154 else
1155 data->cos_bw += pg_bw;
1156 }
1157
1158 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
1159 struct cos_help_data *cos_data,
1160 u32 *pg_pri_orginal_spread,
1161 struct dcbx_ets_feature *ets)
1162 {
1163 u32 pri_tested = 0;
1164 u8 i = 0;
1165 u8 entry = 0;
1166 u8 pg_entry = 0;
1167 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1168
1169 cos_data->data[0].pausable = true;
1170 cos_data->data[1].pausable = false;
1171 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
1172
1173 for (i = 0 ; i < num_of_pri ; i++) {
1174 pri_tested = 1 << bp->dcbx_port_params.
1175 app.traffic_type_priority[i];
1176
1177 if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
1178 cos_data->data[1].pri_join_mask |= pri_tested;
1179 entry = 1;
1180 } else {
1181 cos_data->data[0].pri_join_mask |= pri_tested;
1182 entry = 0;
1183 }
1184 pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
1185 app.traffic_type_priority[i]];
1186 /* There can be only one strict pg */
1187 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
1188 bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
1189 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
1190 else
1191 /* If we join a group and one is strict
1192 * than the bw rulls */
1193 cos_data->data[entry].strict =
1194 BNX2X_DCBX_STRICT_COS_HIGHEST;
1195 }
1196 if ((0 == cos_data->data[0].pri_join_mask) &&
1197 (0 == cos_data->data[1].pri_join_mask))
1198 BNX2X_ERR("dcbx error: Both groups must have priorities\n");
1199 }
1200
1201
1202 #ifndef POWER_OF_2
1203 #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
1204 #endif
1205
1206 static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp,
1207 struct pg_help_data *pg_help_data,
1208 struct cos_help_data *cos_data,
1209 u32 pri_join_mask,
1210 u8 num_of_dif_pri)
1211 {
1212 u8 i = 0;
1213 u32 pri_tested = 0;
1214 u32 pri_mask_without_pri = 0;
1215 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1216 /*debug*/
1217 if (num_of_dif_pri == 1) {
1218 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
1219 return;
1220 }
1221 /* single priority group */
1222 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1223 /* If there are both pauseable and non-pauseable priorities,
1224 * the pauseable priorities go to the first queue and
1225 * the non-pauseable priorities go to the second queue.
1226 */
1227 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1228 /* Pauseable */
1229 cos_data->data[0].pausable = true;
1230 /* Non pauseable.*/
1231 cos_data->data[1].pausable = false;
1232
1233 if (2 == num_of_dif_pri) {
1234 cos_data->data[0].cos_bw = 50;
1235 cos_data->data[1].cos_bw = 50;
1236 }
1237
1238 if (3 == num_of_dif_pri) {
1239 if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
1240 pri_join_mask))) {
1241 cos_data->data[0].cos_bw = 33;
1242 cos_data->data[1].cos_bw = 67;
1243 } else {
1244 cos_data->data[0].cos_bw = 67;
1245 cos_data->data[1].cos_bw = 33;
1246 }
1247 }
1248
1249 } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
1250 /* If there are only pauseable priorities,
1251 * then one/two priorities go to the first queue
1252 * and one priority goes to the second queue.
1253 */
1254 if (2 == num_of_dif_pri) {
1255 cos_data->data[0].cos_bw = 50;
1256 cos_data->data[1].cos_bw = 50;
1257 } else {
1258 cos_data->data[0].cos_bw = 67;
1259 cos_data->data[1].cos_bw = 33;
1260 }
1261 cos_data->data[1].pausable = true;
1262 cos_data->data[0].pausable = true;
1263 /* All priorities except FCOE */
1264 cos_data->data[0].pri_join_mask = (pri_join_mask &
1265 ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
1266 /* Only FCOE priority.*/
1267 cos_data->data[1].pri_join_mask =
1268 (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
1269 } else
1270 /* If there are only non-pauseable priorities,
1271 * they will all go to the same queue.
1272 */
1273 bnx2x_dcbx_ets_disabled_entry_data(bp,
1274 cos_data, pri_join_mask);
1275 } else {
1276 /* priority group which is not BW limited (PG#15):*/
1277 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1278 /* If there are both pauseable and non-pauseable
1279 * priorities, the pauseable priorities go to the first
1280 * queue and the non-pauseable priorities
1281 * go to the second queue.
1282 */
1283 if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
1284 DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
1285 cos_data->data[0].strict =
1286 BNX2X_DCBX_STRICT_COS_HIGHEST;
1287 cos_data->data[1].strict =
1288 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
1289 BNX2X_DCBX_STRICT_COS_HIGHEST);
1290 } else {
1291 cos_data->data[0].strict =
1292 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
1293 BNX2X_DCBX_STRICT_COS_HIGHEST);
1294 cos_data->data[1].strict =
1295 BNX2X_DCBX_STRICT_COS_HIGHEST;
1296 }
1297 /* Pauseable */
1298 cos_data->data[0].pausable = true;
1299 /* Non pause-able.*/
1300 cos_data->data[1].pausable = false;
1301 } else {
1302 /* If there are only pauseable priorities or
1303 * only non-pauseable,* the lower priorities go
1304 * to the first queue and the higherpriorities go
1305 * to the second queue.
1306 */
1307 cos_data->data[0].pausable =
1308 cos_data->data[1].pausable =
1309 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1310
1311 for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
1312 pri_tested = 1 << bp->dcbx_port_params.
1313 app.traffic_type_priority[i];
1314 /* Remove priority tested */
1315 pri_mask_without_pri =
1316 (pri_join_mask & ((u8)(~pri_tested)));
1317 if (pri_mask_without_pri < pri_tested)
1318 break;
1319 }
1320
1321 if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
1322 BNX2X_ERR("Invalid value for pri_join_mask -"
1323 " could not find a priority\n");
1324
1325 cos_data->data[0].pri_join_mask = pri_mask_without_pri;
1326 cos_data->data[1].pri_join_mask = pri_tested;
1327 /* Both queues are strict priority,
1328 * and that with the highest priority
1329 * gets the highest strict priority in the arbiter.
1330 */
1331 cos_data->data[0].strict =
1332 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
1333 BNX2X_DCBX_STRICT_COS_HIGHEST);
1334 cos_data->data[1].strict =
1335 BNX2X_DCBX_STRICT_COS_HIGHEST;
1336 }
1337 }
1338 }
1339
1340 static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
1341 struct bnx2x *bp,
1342 struct pg_help_data *pg_help_data,
1343 struct dcbx_ets_feature *ets,
1344 struct cos_help_data *cos_data,
1345 u32 *pg_pri_orginal_spread,
1346 u32 pri_join_mask,
1347 u8 num_of_dif_pri)
1348 {
1349 u8 i = 0;
1350 u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 };
1351
1352 /* If there are both pauseable and non-pauseable priorities,
1353 * the pauseable priorities go to the first queue and
1354 * the non-pauseable priorities go to the second queue.
1355 */
1356 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1357 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
1358 pg_help_data->data[0].pg_priority) ||
1359 IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
1360 pg_help_data->data[1].pg_priority)) {
1361 /* If one PG contains both pauseable and
1362 * non-pauseable priorities then ETS is disabled.
1363 */
1364 bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
1365 pg_pri_orginal_spread, ets);
1366 bp->dcbx_port_params.ets.enabled = false;
1367 return;
1368 }
1369
1370 /* Pauseable */
1371 cos_data->data[0].pausable = true;
1372 /* Non pauseable. */
1373 cos_data->data[1].pausable = false;
1374 if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
1375 pg_help_data->data[0].pg_priority)) {
1376 /* 0 is pauseable */
1377 cos_data->data[0].pri_join_mask =
1378 pg_help_data->data[0].pg_priority;
1379 pg[0] = pg_help_data->data[0].pg;
1380 cos_data->data[1].pri_join_mask =
1381 pg_help_data->data[1].pg_priority;
1382 pg[1] = pg_help_data->data[1].pg;
1383 } else {/* 1 is pauseable */
1384 cos_data->data[0].pri_join_mask =
1385 pg_help_data->data[1].pg_priority;
1386 pg[0] = pg_help_data->data[1].pg;
1387 cos_data->data[1].pri_join_mask =
1388 pg_help_data->data[0].pg_priority;
1389 pg[1] = pg_help_data->data[0].pg;
1390 }
1391 } else {
1392 /* If there are only pauseable priorities or
1393 * only non-pauseable, each PG goes to a queue.
1394 */
1395 cos_data->data[0].pausable = cos_data->data[1].pausable =
1396 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1397 cos_data->data[0].pri_join_mask =
1398 pg_help_data->data[0].pg_priority;
1399 pg[0] = pg_help_data->data[0].pg;
1400 cos_data->data[1].pri_join_mask =
1401 pg_help_data->data[1].pg_priority;
1402 pg[1] = pg_help_data->data[1].pg;
1403 }
1404
1405 /* There can be only one strict pg */
1406 for (i = 0 ; i < ARRAY_SIZE(pg); i++) {
1407 if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
1408 cos_data->data[i].cos_bw =
1409 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
1410 else
1411 cos_data->data[i].strict =
1412 BNX2X_DCBX_STRICT_COS_HIGHEST;
1413 }
1414 }
1415
1416 static int bnx2x_dcbx_join_pgs(
1417 struct bnx2x *bp,
1418 struct dcbx_ets_feature *ets,
1419 struct pg_help_data *pg_help_data,
1420 u8 required_num_of_pg)
1421 {
1422 u8 entry_joined = pg_help_data->num_of_pg - 1;
1423 u8 entry_removed = entry_joined + 1;
1424 u8 pg_joined = 0;
1425
1426 if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data)
1427 <= pg_help_data->num_of_pg) {
1428
1429 BNX2X_ERR("required_num_of_pg can't be zero\n");
1430 return -EINVAL;
1431 }
1432
1433 while (required_num_of_pg < pg_help_data->num_of_pg) {
1434 entry_joined = pg_help_data->num_of_pg - 2;
1435 entry_removed = entry_joined + 1;
1436 /* protect index */
1437 entry_removed %= ARRAY_SIZE(pg_help_data->data);
1438
1439 pg_help_data->data[entry_joined].pg_priority |=
1440 pg_help_data->data[entry_removed].pg_priority;
1441
1442 pg_help_data->data[entry_joined].num_of_dif_pri +=
1443 pg_help_data->data[entry_removed].num_of_dif_pri;
1444
1445 if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG ||
1446 pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG)
1447 /* Entries joined strict priority rules */
1448 pg_help_data->data[entry_joined].pg =
1449 DCBX_STRICT_PRI_PG;
1450 else {
1451 /* Entries can be joined join BW */
1452 pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl,
1453 pg_help_data->data[entry_joined].pg) +
1454 DCBX_PG_BW_GET(ets->pg_bw_tbl,
1455 pg_help_data->data[entry_removed].pg);
1456
1457 DCBX_PG_BW_SET(ets->pg_bw_tbl,
1458 pg_help_data->data[entry_joined].pg, pg_joined);
1459 }
1460 /* Joined the entries */
1461 pg_help_data->num_of_pg--;
1462 }
1463
1464 return 0;
1465 }
1466
1467 static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
1468 struct bnx2x *bp,
1469 struct pg_help_data *pg_help_data,
1470 struct dcbx_ets_feature *ets,
1471 struct cos_help_data *cos_data,
1472 u32 *pg_pri_orginal_spread,
1473 u32 pri_join_mask,
1474 u8 num_of_dif_pri)
1475 {
1476 u8 i = 0;
1477 u32 pri_tested = 0;
1478 u8 entry = 0;
1479 u8 pg_entry = 0;
1480 bool b_found_strict = false;
1481 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1482
1483 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
1484 /* If there are both pauseable and non-pauseable priorities,
1485 * the pauseable priorities go to the first queue and the
1486 * non-pauseable priorities go to the second queue.
1487 */
1488 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
1489 bnx2x_dcbx_separate_pauseable_from_non(bp,
1490 cos_data, pg_pri_orginal_spread, ets);
1491 else {
1492 /* If two BW-limited PG-s were combined to one queue,
1493 * the BW is their sum.
1494 *
1495 * If there are only pauseable priorities or only non-pauseable,
1496 * and there are both BW-limited and non-BW-limited PG-s,
1497 * the BW-limited PG/s go to one queue and the non-BW-limited
1498 * PG/s go to the second queue.
1499 *
1500 * If there are only pauseable priorities or only non-pauseable
1501 * and all are BW limited, then two priorities go to the first
1502 * queue and one priority goes to the second queue.
1503 *
1504 * We will join this two cases:
1505 * if one is BW limited it will go to the secoend queue
1506 * otherwise the last priority will get it
1507 */
1508
1509 cos_data->data[0].pausable = cos_data->data[1].pausable =
1510 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1511
1512 for (i = 0 ; i < num_of_pri; i++) {
1513 pri_tested = 1 << bp->dcbx_port_params.
1514 app.traffic_type_priority[i];
1515 pg_entry = (u8)pg_pri_orginal_spread[bp->
1516 dcbx_port_params.app.traffic_type_priority[i]];
1517
1518 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1519 entry = 0;
1520
1521 if (i == (num_of_pri-1) &&
1522 false == b_found_strict)
1523 /* last entry will be handled separately
1524 * If no priority is strict than last
1525 * enty goes to last queue.*/
1526 entry = 1;
1527 cos_data->data[entry].pri_join_mask |=
1528 pri_tested;
1529 bnx2x_dcbx_add_to_cos_bw(bp,
1530 &cos_data->data[entry],
1531 DCBX_PG_BW_GET(ets->pg_bw_tbl,
1532 pg_entry));
1533 } else {
1534 b_found_strict = true;
1535 cos_data->data[1].pri_join_mask |= pri_tested;
1536 /* If we join a group and one is strict
1537 * than the bw rulls */
1538 cos_data->data[1].strict =
1539 BNX2X_DCBX_STRICT_COS_HIGHEST;
1540 }
1541 }
1542 }
1543 }
1544
1545
1546 static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp,
1547 struct pg_help_data *help_data,
1548 struct dcbx_ets_feature *ets,
1549 struct cos_help_data *cos_data,
1550 u32 *pg_pri_orginal_spread,
1551 u32 pri_join_mask,
1552 u8 num_of_dif_pri)
1553 {
1554
1555 /* default E2 settings */
1556 cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2;
1557
1558 switch (help_data->num_of_pg) {
1559 case 1:
1560 bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(
1561 bp,
1562 help_data,
1563 cos_data,
1564 pri_join_mask,
1565 num_of_dif_pri);
1566 break;
1567 case 2:
1568 bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
1569 bp,
1570 help_data,
1571 ets,
1572 cos_data,
1573 pg_pri_orginal_spread,
1574 pri_join_mask,
1575 num_of_dif_pri);
1576 break;
1577
1578 case 3:
1579 bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
1580 bp,
1581 help_data,
1582 ets,
1583 cos_data,
1584 pg_pri_orginal_spread,
1585 pri_join_mask,
1586 num_of_dif_pri);
1587 break;
1588 default:
1589 BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
1590 bnx2x_dcbx_ets_disabled_entry_data(bp,
1591 cos_data, pri_join_mask);
1592 }
1593 }
1594
1595 static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp,
1596 struct cos_help_data *cos_data,
1597 u8 entry,
1598 u8 num_spread_of_entries,
1599 u8 strict_app_pris)
1600 {
1601 u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST;
1602 u8 num_of_app_pri = MAX_PFC_PRIORITIES;
1603 u8 app_pri_bit = 0;
1604
1605 while (num_spread_of_entries && num_of_app_pri > 0) {
1606 app_pri_bit = 1 << (num_of_app_pri - 1);
1607 if (app_pri_bit & strict_app_pris) {
1608 struct cos_entry_help_data *data = &cos_data->
1609 data[entry];
1610 num_spread_of_entries--;
1611 if (num_spread_of_entries == 0) {
1612 /* last entry needed put all the entries left */
1613 data->cos_bw = DCBX_INVALID_COS_BW;
1614 data->strict = strict_pri;
1615 data->pri_join_mask = strict_app_pris;
1616 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1617 data->pri_join_mask);
1618 } else {
1619 strict_app_pris &= ~app_pri_bit;
1620
1621 data->cos_bw = DCBX_INVALID_COS_BW;
1622 data->strict = strict_pri;
1623 data->pri_join_mask = app_pri_bit;
1624 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1625 data->pri_join_mask);
1626 }
1627
1628 strict_pri =
1629 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri);
1630 entry++;
1631 }
1632
1633 num_of_app_pri--;
1634 }
1635
1636 if (num_spread_of_entries)
1637 return -EINVAL;
1638
1639 return 0;
1640 }
1641
1642 static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp,
1643 struct cos_help_data *cos_data,
1644 u8 entry,
1645 u8 num_spread_of_entries,
1646 u8 strict_app_pris)
1647 {
1648
1649 if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry,
1650 num_spread_of_entries,
1651 strict_app_pris)) {
1652 struct cos_entry_help_data *data = &cos_data->
1653 data[entry];
1654 /* Fill BW entry */
1655 data->cos_bw = DCBX_INVALID_COS_BW;
1656 data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST;
1657 data->pri_join_mask = strict_app_pris;
1658 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1659 data->pri_join_mask);
1660 return 1;
1661 }
1662
1663 return num_spread_of_entries;
1664 }
1665
1666 static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp,
1667 struct pg_help_data *help_data,
1668 struct dcbx_ets_feature *ets,
1669 struct cos_help_data *cos_data,
1670 u32 pri_join_mask)
1671
1672 {
1673 u8 need_num_of_entries = 0;
1674 u8 i = 0;
1675 u8 entry = 0;
1676
1677 /*
1678 * if the number of requested PG-s in CEE is greater than 3
1679 * then the results are not determined since this is a violation
1680 * of the standard.
1681 */
1682 if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) {
1683 if (bnx2x_dcbx_join_pgs(bp, ets, help_data,
1684 DCBX_COS_MAX_NUM_E3B0)) {
1685 BNX2X_ERR("Unable to reduce the number of PGs -"
1686 "we will disables ETS\n");
1687 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data,
1688 pri_join_mask);
1689 return;
1690 }
1691 }
1692
1693 for (i = 0 ; i < help_data->num_of_pg; i++) {
1694 struct pg_entry_help_data *pg = &help_data->data[i];
1695 if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1696 struct cos_entry_help_data *data = &cos_data->
1697 data[entry];
1698 /* Fill BW entry */
1699 data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg);
1700 data->strict = BNX2X_DCBX_STRICT_INVALID;
1701 data->pri_join_mask = pg->pg_priority;
1702 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
1703 data->pri_join_mask);
1704
1705 entry++;
1706 } else {
1707 need_num_of_entries = min_t(u8,
1708 (u8)pg->num_of_dif_pri,
1709 (u8)DCBX_COS_MAX_NUM_E3B0 -
1710 help_data->num_of_pg + 1);
1711 /*
1712 * If there are still VOQ-s which have no associated PG,
1713 * then associate these VOQ-s to PG15. These PG-s will
1714 * be used for SP between priorities on PG15.
1715 */
1716 entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data,
1717 entry, need_num_of_entries, pg->pg_priority);
1718 }
1719 }
1720
1721 /* the entry will represent the number of COSes used */
1722 cos_data->num_of_cos = entry;
1723 }
1724 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
1725 struct pg_help_data *help_data,
1726 struct dcbx_ets_feature *ets,
1727 u32 *pg_pri_orginal_spread)
1728 {
1729 struct cos_help_data cos_data;
1730 u8 i = 0;
1731 u32 pri_join_mask = 0;
1732 u8 num_of_dif_pri = 0;
1733
1734 memset(&cos_data, 0, sizeof(cos_data));
1735
1736 /* Validate the pg value */
1737 for (i = 0; i < help_data->num_of_pg ; i++) {
1738 if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
1739 DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
1740 BNX2X_ERR("Invalid pg[%d] data %x\n", i,
1741 help_data->data[i].pg);
1742 pri_join_mask |= help_data->data[i].pg_priority;
1743 num_of_dif_pri += help_data->data[i].num_of_dif_pri;
1744 }
1745
1746 /* defaults */
1747 cos_data.num_of_cos = 1;
1748 for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) {
1749 cos_data.data[i].pri_join_mask = 0;
1750 cos_data.data[i].pausable = false;
1751 cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID;
1752 cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
1753 }
1754
1755 if (CHIP_IS_E3B0(bp))
1756 bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets,
1757 &cos_data, pri_join_mask);
1758 else /* E2 + E3A0 */
1759 bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp,
1760 help_data, ets,
1761 &cos_data,
1762 pg_pri_orginal_spread,
1763 pri_join_mask,
1764 num_of_dif_pri);
1765
1766
1767 for (i = 0; i < cos_data.num_of_cos ; i++) {
1768 struct bnx2x_dcbx_cos_params *p =
1769 &bp->dcbx_port_params.ets.cos_params[i];
1770
1771 p->strict = cos_data.data[i].strict;
1772 p->bw_tbl = cos_data.data[i].cos_bw;
1773 p->pri_bitmask = cos_data.data[i].pri_join_mask;
1774 p->pauseable = cos_data.data[i].pausable;
1775
1776 /* sanity */
1777 if (p->bw_tbl != DCBX_INVALID_COS_BW ||
1778 p->strict != BNX2X_DCBX_STRICT_INVALID) {
1779 if (p->pri_bitmask == 0)
1780 BNX2X_ERR("Invalid pri_bitmask for %d\n", i);
1781
1782 if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) {
1783
1784 if (p->pauseable &&
1785 DCBX_PFC_PRI_GET_NON_PAUSE(bp,
1786 p->pri_bitmask) != 0)
1787 BNX2X_ERR("Inconsistent config for "
1788 "pausable COS %d\n", i);
1789
1790 if (!p->pauseable &&
1791 DCBX_PFC_PRI_GET_PAUSE(bp,
1792 p->pri_bitmask) != 0)
1793 BNX2X_ERR("Inconsistent config for "
1794 "nonpausable COS %d\n", i);
1795 }
1796 }
1797
1798 if (p->pauseable)
1799 DP(NETIF_MSG_LINK, "COS %d PAUSABLE prijoinmask 0x%x\n",
1800 i, cos_data.data[i].pri_join_mask);
1801 else
1802 DP(NETIF_MSG_LINK, "COS %d NONPAUSABLE prijoinmask "
1803 "0x%x\n",
1804 i, cos_data.data[i].pri_join_mask);
1805 }
1806
1807 bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
1808 }
1809
1810 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
1811 u32 *set_configuration_ets_pg,
1812 u32 *pri_pg_tbl)
1813 {
1814 int i;
1815
1816 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
1817 set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
1818
1819 DP(NETIF_MSG_LINK, "set_configuration_ets_pg[%d] = 0x%x\n",
1820 i, set_configuration_ets_pg[i]);
1821 }
1822 }
1823
1824 static void bnx2x_dcbx_fw_struct(struct bnx2x *bp)
1825 {
1826 struct flow_control_configuration *pfc_fw_cfg = NULL;
1827 u16 pri_bit = 0;
1828 u8 cos = 0, pri = 0;
1829 struct priority_cos *tt2cos;
1830 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1831
1832 pfc_fw_cfg = (struct flow_control_configuration *)
1833 bnx2x_sp(bp, pfc_config);
1834 memset(pfc_fw_cfg, 0, sizeof(struct flow_control_configuration));
1835
1836 /*shortcut*/
1837 tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
1838
1839 /* Fw version should be incremented each update */
1840 pfc_fw_cfg->dcb_version = ++bp->dcb_version;
1841 pfc_fw_cfg->dcb_enabled = 1;
1842
1843 /* Fill priority parameters */
1844 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
1845 tt2cos[pri].priority = ttp[pri];
1846 pri_bit = 1 << tt2cos[pri].priority;
1847
1848 /* Fill COS parameters based on COS calculated to
1849 * make it more general for future use */
1850 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
1851 if (bp->dcbx_port_params.ets.cos_params[cos].
1852 pri_bitmask & pri_bit)
1853 tt2cos[pri].cos = cos;
1854 }
1855
1856 /* we never want the FW to add a 0 vlan tag */
1857 pfc_fw_cfg->dont_add_pri_0_en = 1;
1858
1859 bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
1860 }
1861
1862 void bnx2x_dcbx_pmf_update(struct bnx2x *bp)
1863 {
1864 /* if we need to syncronize DCBX result from prev PMF
1865 * read it from shmem and update bp accordingly
1866 */
1867 if (SHMEM2_HAS(bp, drv_flags) &&
1868 GET_FLAGS(SHMEM2_RD(bp, drv_flags), DRV_FLAGS_DCB_CONFIGURED)) {
1869 /* Read neg results if dcbx is in the FW */
1870 if (bnx2x_dcbx_read_shmem_neg_results(bp))
1871 return;
1872
1873 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
1874 bp->dcbx_error);
1875 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
1876 bp->dcbx_error);
1877 }
1878 }
1879
1880 /* DCB netlink */
1881 #ifdef BCM_DCBNL
1882
1883 #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \
1884 DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC)
1885
1886 static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp)
1887 {
1888 /* validate dcbnl call that may change HW state:
1889 * DCB is on and DCBX mode was SUCCESSFULLY set by the user.
1890 */
1891 return bp->dcb_state && bp->dcbx_mode_uset;
1892 }
1893
1894 static u8 bnx2x_dcbnl_get_state(struct net_device *netdev)
1895 {
1896 struct bnx2x *bp = netdev_priv(netdev);
1897 DP(NETIF_MSG_LINK, "state = %d\n", bp->dcb_state);
1898 return bp->dcb_state;
1899 }
1900
1901 static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state)
1902 {
1903 struct bnx2x *bp = netdev_priv(netdev);
1904 DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
1905
1906 bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled);
1907 return 0;
1908 }
1909
1910 static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev,
1911 u8 *perm_addr)
1912 {
1913 struct bnx2x *bp = netdev_priv(netdev);
1914 DP(NETIF_MSG_LINK, "GET-PERM-ADDR\n");
1915
1916 /* first the HW mac address */
1917 memcpy(perm_addr, netdev->dev_addr, netdev->addr_len);
1918
1919 #ifdef BCM_CNIC
1920 /* second SAN address */
1921 memcpy(perm_addr+netdev->addr_len, bp->fip_mac, netdev->addr_len);
1922 #endif
1923 }
1924
1925 static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio,
1926 u8 prio_type, u8 pgid, u8 bw_pct,
1927 u8 up_map)
1928 {
1929 struct bnx2x *bp = netdev_priv(netdev);
1930
1931 DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, pgid);
1932 if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
1933 return;
1934
1935 /**
1936 * bw_pct ingnored - band-width percentage devision between user
1937 * priorities within the same group is not
1938 * standard and hence not supported
1939 *
1940 * prio_type igonred - priority levels within the same group are not
1941 * standard and hence are not supported. According
1942 * to the standard pgid 15 is dedicated to strict
1943 * prioirty traffic (on the port level).
1944 *
1945 * up_map ignored
1946 */
1947
1948 bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid;
1949 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
1950 }
1951
1952 static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev,
1953 int pgid, u8 bw_pct)
1954 {
1955 struct bnx2x *bp = netdev_priv(netdev);
1956 DP(NETIF_MSG_LINK, "pgid[%d] = %d\n", pgid, bw_pct);
1957
1958 if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
1959 return;
1960
1961 bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct;
1962 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
1963 }
1964
1965 static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio,
1966 u8 prio_type, u8 pgid, u8 bw_pct,
1967 u8 up_map)
1968 {
1969 struct bnx2x *bp = netdev_priv(netdev);
1970 DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
1971 }
1972
1973 static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev,
1974 int pgid, u8 bw_pct)
1975 {
1976 struct bnx2x *bp = netdev_priv(netdev);
1977 DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
1978 }
1979
1980 static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio,
1981 u8 *prio_type, u8 *pgid, u8 *bw_pct,
1982 u8 *up_map)
1983 {
1984 struct bnx2x *bp = netdev_priv(netdev);
1985 DP(NETIF_MSG_LINK, "prio = %d\n", prio);
1986
1987 /**
1988 * bw_pct ingnored - band-width percentage devision between user
1989 * priorities within the same group is not
1990 * standard and hence not supported
1991 *
1992 * prio_type igonred - priority levels within the same group are not
1993 * standard and hence are not supported. According
1994 * to the standard pgid 15 is dedicated to strict
1995 * prioirty traffic (on the port level).
1996 *
1997 * up_map ignored
1998 */
1999 *up_map = *bw_pct = *prio_type = *pgid = 0;
2000
2001 if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
2002 return;
2003
2004 *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio);
2005 }
2006
2007 static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev,
2008 int pgid, u8 *bw_pct)
2009 {
2010 struct bnx2x *bp = netdev_priv(netdev);
2011 DP(NETIF_MSG_LINK, "pgid = %d\n", pgid);
2012
2013 *bw_pct = 0;
2014
2015 if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
2016 return;
2017
2018 *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid);
2019 }
2020
2021 static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio,
2022 u8 *prio_type, u8 *pgid, u8 *bw_pct,
2023 u8 *up_map)
2024 {
2025 struct bnx2x *bp = netdev_priv(netdev);
2026 DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
2027
2028 *prio_type = *pgid = *bw_pct = *up_map = 0;
2029 }
2030
2031 static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev,
2032 int pgid, u8 *bw_pct)
2033 {
2034 struct bnx2x *bp = netdev_priv(netdev);
2035 DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
2036
2037 *bw_pct = 0;
2038 }
2039
2040 static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio,
2041 u8 setting)
2042 {
2043 struct bnx2x *bp = netdev_priv(netdev);
2044 DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, setting);
2045
2046 if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES)
2047 return;
2048
2049 bp->dcbx_config_params.admin_pfc_bitmap |= ((setting ? 1 : 0) << prio);
2050
2051 if (setting)
2052 bp->dcbx_config_params.admin_pfc_tx_enable = 1;
2053 }
2054
2055 static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio,
2056 u8 *setting)
2057 {
2058 struct bnx2x *bp = netdev_priv(netdev);
2059 DP(NETIF_MSG_LINK, "prio = %d\n", prio);
2060
2061 *setting = 0;
2062
2063 if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES)
2064 return;
2065
2066 *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1;
2067 }
2068
2069 static u8 bnx2x_dcbnl_set_all(struct net_device *netdev)
2070 {
2071 struct bnx2x *bp = netdev_priv(netdev);
2072 int rc = 0;
2073
2074 DP(NETIF_MSG_LINK, "SET-ALL\n");
2075
2076 if (!bnx2x_dcbnl_set_valid(bp))
2077 return 1;
2078
2079 if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
2080 netdev_err(bp->dev, "Handling parity error recovery. "
2081 "Try again later\n");
2082 return 1;
2083 }
2084 if (netif_running(bp->dev)) {
2085 bnx2x_nic_unload(bp, UNLOAD_NORMAL);
2086 rc = bnx2x_nic_load(bp, LOAD_NORMAL);
2087 }
2088 DP(NETIF_MSG_LINK, "set_dcbx_params done (%d)\n", rc);
2089 if (rc)
2090 return 1;
2091
2092 return 0;
2093 }
2094
2095 static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
2096 {
2097 struct bnx2x *bp = netdev_priv(netdev);
2098 u8 rval = 0;
2099
2100 if (bp->dcb_state) {
2101 switch (capid) {
2102 case DCB_CAP_ATTR_PG:
2103 *cap = true;
2104 break;
2105 case DCB_CAP_ATTR_PFC:
2106 *cap = true;
2107 break;
2108 case DCB_CAP_ATTR_UP2TC:
2109 *cap = false;
2110 break;
2111 case DCB_CAP_ATTR_PG_TCS:
2112 *cap = 0x80; /* 8 priorities for PGs */
2113 break;
2114 case DCB_CAP_ATTR_PFC_TCS:
2115 *cap = 0x80; /* 8 priorities for PFC */
2116 break;
2117 case DCB_CAP_ATTR_GSP:
2118 *cap = true;
2119 break;
2120 case DCB_CAP_ATTR_BCN:
2121 *cap = false;
2122 break;
2123 case DCB_CAP_ATTR_DCBX:
2124 *cap = BNX2X_DCBX_CAPS;
2125 default:
2126 rval = -EINVAL;
2127 break;
2128 }
2129 } else
2130 rval = -EINVAL;
2131
2132 DP(NETIF_MSG_LINK, "capid %d:%x\n", capid, *cap);
2133 return rval;
2134 }
2135
2136 static u8 bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num)
2137 {
2138 struct bnx2x *bp = netdev_priv(netdev);
2139 u8 rval = 0;
2140
2141 DP(NETIF_MSG_LINK, "tcid %d\n", tcid);
2142
2143 if (bp->dcb_state) {
2144 switch (tcid) {
2145 case DCB_NUMTCS_ATTR_PG:
2146 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
2147 DCBX_COS_MAX_NUM_E2;
2148 break;
2149 case DCB_NUMTCS_ATTR_PFC:
2150 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
2151 DCBX_COS_MAX_NUM_E2;
2152 break;
2153 default:
2154 rval = -EINVAL;
2155 break;
2156 }
2157 } else
2158 rval = -EINVAL;
2159
2160 return rval;
2161 }
2162
2163 static u8 bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num)
2164 {
2165 struct bnx2x *bp = netdev_priv(netdev);
2166 DP(NETIF_MSG_LINK, "num tcs = %d; Not supported\n", num);
2167 return -EINVAL;
2168 }
2169
2170 static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
2171 {
2172 struct bnx2x *bp = netdev_priv(netdev);
2173 DP(NETIF_MSG_LINK, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
2174
2175 if (!bp->dcb_state)
2176 return 0;
2177
2178 return bp->dcbx_local_feat.pfc.enabled;
2179 }
2180
2181 static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state)
2182 {
2183 struct bnx2x *bp = netdev_priv(netdev);
2184 DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
2185
2186 if (!bnx2x_dcbnl_set_valid(bp))
2187 return;
2188
2189 bp->dcbx_config_params.admin_pfc_tx_enable =
2190 bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0);
2191 }
2192
2193 static void bnx2x_admin_app_set_ent(
2194 struct bnx2x_admin_priority_app_table *app_ent,
2195 u8 idtype, u16 idval, u8 up)
2196 {
2197 app_ent->valid = 1;
2198
2199 switch (idtype) {
2200 case DCB_APP_IDTYPE_ETHTYPE:
2201 app_ent->traffic_type = TRAFFIC_TYPE_ETH;
2202 break;
2203 case DCB_APP_IDTYPE_PORTNUM:
2204 app_ent->traffic_type = TRAFFIC_TYPE_PORT;
2205 break;
2206 default:
2207 break; /* never gets here */
2208 }
2209 app_ent->app_id = idval;
2210 app_ent->priority = up;
2211 }
2212
2213 static bool bnx2x_admin_app_is_equal(
2214 struct bnx2x_admin_priority_app_table *app_ent,
2215 u8 idtype, u16 idval)
2216 {
2217 if (!app_ent->valid)
2218 return false;
2219
2220 switch (idtype) {
2221 case DCB_APP_IDTYPE_ETHTYPE:
2222 if (app_ent->traffic_type != TRAFFIC_TYPE_ETH)
2223 return false;
2224 break;
2225 case DCB_APP_IDTYPE_PORTNUM:
2226 if (app_ent->traffic_type != TRAFFIC_TYPE_PORT)
2227 return false;
2228 break;
2229 default:
2230 return false;
2231 }
2232 if (app_ent->app_id != idval)
2233 return false;
2234
2235 return true;
2236 }
2237
2238 static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up)
2239 {
2240 int i, ff;
2241
2242 /* iterate over the app entries looking for idtype and idval */
2243 for (i = 0, ff = -1; i < 4; i++) {
2244 struct bnx2x_admin_priority_app_table *app_ent =
2245 &bp->dcbx_config_params.admin_priority_app_table[i];
2246 if (bnx2x_admin_app_is_equal(app_ent, idtype, idval))
2247 break;
2248
2249 if (ff < 0 && !app_ent->valid)
2250 ff = i;
2251 }
2252 if (i < 4)
2253 /* if found overwrite up */
2254 bp->dcbx_config_params.
2255 admin_priority_app_table[i].priority = up;
2256 else if (ff >= 0)
2257 /* not found use first-free */
2258 bnx2x_admin_app_set_ent(
2259 &bp->dcbx_config_params.admin_priority_app_table[ff],
2260 idtype, idval, up);
2261 else
2262 /* app table is full */
2263 return -EBUSY;
2264
2265 /* up configured, if not 0 make sure feature is enabled */
2266 if (up)
2267 bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
2268
2269 return 0;
2270 }
2271
2272 static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype,
2273 u16 idval, u8 up)
2274 {
2275 struct bnx2x *bp = netdev_priv(netdev);
2276
2277 DP(NETIF_MSG_LINK, "app_type %d, app_id %x, prio bitmap %d\n",
2278 idtype, idval, up);
2279
2280 if (!bnx2x_dcbnl_set_valid(bp))
2281 return -EINVAL;
2282
2283 /* verify idtype */
2284 switch (idtype) {
2285 case DCB_APP_IDTYPE_ETHTYPE:
2286 case DCB_APP_IDTYPE_PORTNUM:
2287 break;
2288 default:
2289 return -EINVAL;
2290 }
2291 return bnx2x_set_admin_app_up(bp, idtype, idval, up);
2292 }
2293
2294 static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev)
2295 {
2296 struct bnx2x *bp = netdev_priv(netdev);
2297 u8 state;
2298
2299 state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE;
2300
2301 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF)
2302 state |= DCB_CAP_DCBX_STATIC;
2303
2304 return state;
2305 }
2306
2307 static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state)
2308 {
2309 struct bnx2x *bp = netdev_priv(netdev);
2310 DP(NETIF_MSG_LINK, "state = %02x\n", state);
2311
2312 /* set dcbx mode */
2313
2314 if ((state & BNX2X_DCBX_CAPS) != state) {
2315 BNX2X_ERR("Requested DCBX mode %x is beyond advertised "
2316 "capabilities\n", state);
2317 return 1;
2318 }
2319
2320 if (bp->dcb_state != BNX2X_DCB_STATE_ON) {
2321 BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n");
2322 return 1;
2323 }
2324
2325 if (state & DCB_CAP_DCBX_STATIC)
2326 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF;
2327 else
2328 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON;
2329
2330 bp->dcbx_mode_uset = true;
2331 return 0;
2332 }
2333
2334 static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
2335 u8 *flags)
2336 {
2337 struct bnx2x *bp = netdev_priv(netdev);
2338 u8 rval = 0;
2339
2340 DP(NETIF_MSG_LINK, "featid %d\n", featid);
2341
2342 if (bp->dcb_state) {
2343 *flags = 0;
2344 switch (featid) {
2345 case DCB_FEATCFG_ATTR_PG:
2346 if (bp->dcbx_local_feat.ets.enabled)
2347 *flags |= DCB_FEATCFG_ENABLE;
2348 if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR)
2349 *flags |= DCB_FEATCFG_ERROR;
2350 break;
2351 case DCB_FEATCFG_ATTR_PFC:
2352 if (bp->dcbx_local_feat.pfc.enabled)
2353 *flags |= DCB_FEATCFG_ENABLE;
2354 if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR |
2355 DCBX_LOCAL_PFC_MISMATCH))
2356 *flags |= DCB_FEATCFG_ERROR;
2357 break;
2358 case DCB_FEATCFG_ATTR_APP:
2359 if (bp->dcbx_local_feat.app.enabled)
2360 *flags |= DCB_FEATCFG_ENABLE;
2361 if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR |
2362 DCBX_LOCAL_APP_MISMATCH))
2363 *flags |= DCB_FEATCFG_ERROR;
2364 break;
2365 default:
2366 rval = -EINVAL;
2367 break;
2368 }
2369 } else
2370 rval = -EINVAL;
2371
2372 return rval;
2373 }
2374
2375 static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
2376 u8 flags)
2377 {
2378 struct bnx2x *bp = netdev_priv(netdev);
2379 u8 rval = 0;
2380
2381 DP(NETIF_MSG_LINK, "featid = %d flags = %02x\n", featid, flags);
2382
2383 /* ignore the 'advertise' flag */
2384 if (bnx2x_dcbnl_set_valid(bp)) {
2385 switch (featid) {
2386 case DCB_FEATCFG_ATTR_PG:
2387 bp->dcbx_config_params.admin_ets_enable =
2388 flags & DCB_FEATCFG_ENABLE ? 1 : 0;
2389 bp->dcbx_config_params.admin_ets_willing =
2390 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2391 break;
2392 case DCB_FEATCFG_ATTR_PFC:
2393 bp->dcbx_config_params.admin_pfc_enable =
2394 flags & DCB_FEATCFG_ENABLE ? 1 : 0;
2395 bp->dcbx_config_params.admin_pfc_willing =
2396 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2397 break;
2398 case DCB_FEATCFG_ATTR_APP:
2399 /* ignore enable, always enabled */
2400 bp->dcbx_config_params.admin_app_priority_willing =
2401 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2402 break;
2403 default:
2404 rval = -EINVAL;
2405 break;
2406 }
2407 } else
2408 rval = -EINVAL;
2409
2410 return rval;
2411 }
2412
2413 static int bnx2x_peer_appinfo(struct net_device *netdev,
2414 struct dcb_peer_app_info *info, u16* app_count)
2415 {
2416 int i;
2417 struct bnx2x *bp = netdev_priv(netdev);
2418
2419 DP(NETIF_MSG_LINK, "APP-INFO\n");
2420
2421 info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0;
2422 info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0;
2423 *app_count = 0;
2424
2425 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
2426 if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield &
2427 DCBX_APP_ENTRY_VALID)
2428 (*app_count)++;
2429 return 0;
2430 }
2431
2432 static int bnx2x_peer_apptable(struct net_device *netdev,
2433 struct dcb_app *table)
2434 {
2435 int i, j;
2436 struct bnx2x *bp = netdev_priv(netdev);
2437
2438 DP(NETIF_MSG_LINK, "APP-TABLE\n");
2439
2440 for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
2441 struct dcbx_app_priority_entry *ent =
2442 &bp->dcbx_remote_feat.app.app_pri_tbl[i];
2443
2444 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
2445 table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
2446 table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent);
2447 table[j++].protocol = ent->app_id;
2448 }
2449 }
2450 return 0;
2451 }
2452
2453 static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg)
2454 {
2455 int i;
2456 struct bnx2x *bp = netdev_priv(netdev);
2457
2458 pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0;
2459
2460 for (i = 0; i < CEE_DCBX_MAX_PGS; i++) {
2461 pg->pg_bw[i] =
2462 DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i);
2463 pg->prio_pg[i] =
2464 DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i);
2465 }
2466 return 0;
2467 }
2468
2469 static int bnx2x_cee_peer_getpfc(struct net_device *netdev,
2470 struct cee_pfc *pfc)
2471 {
2472 struct bnx2x *bp = netdev_priv(netdev);
2473 pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps;
2474 pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap;
2475 return 0;
2476 }
2477
2478 const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = {
2479 .getstate = bnx2x_dcbnl_get_state,
2480 .setstate = bnx2x_dcbnl_set_state,
2481 .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr,
2482 .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx,
2483 .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx,
2484 .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx,
2485 .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx,
2486 .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx,
2487 .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx,
2488 .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx,
2489 .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx,
2490 .setpfccfg = bnx2x_dcbnl_set_pfc_cfg,
2491 .getpfccfg = bnx2x_dcbnl_get_pfc_cfg,
2492 .setall = bnx2x_dcbnl_set_all,
2493 .getcap = bnx2x_dcbnl_get_cap,
2494 .getnumtcs = bnx2x_dcbnl_get_numtcs,
2495 .setnumtcs = bnx2x_dcbnl_set_numtcs,
2496 .getpfcstate = bnx2x_dcbnl_get_pfc_state,
2497 .setpfcstate = bnx2x_dcbnl_set_pfc_state,
2498 .setapp = bnx2x_dcbnl_set_app_up,
2499 .getdcbx = bnx2x_dcbnl_get_dcbx,
2500 .setdcbx = bnx2x_dcbnl_set_dcbx,
2501 .getfeatcfg = bnx2x_dcbnl_get_featcfg,
2502 .setfeatcfg = bnx2x_dcbnl_set_featcfg,
2503 .peer_getappinfo = bnx2x_peer_appinfo,
2504 .peer_getapptable = bnx2x_peer_apptable,
2505 .cee_peer_getpg = bnx2x_cee_peer_getpg,
2506 .cee_peer_getpfc = bnx2x_cee_peer_getpfc,
2507 };
2508
2509 #endif /* BCM_DCBNL */
Linux kernel - Deliverables
This page took 0.146798 seconds and 5 git commands to generate.