drivers/net/cnic_defs.h

   1
   2 /* cnic.c: Broadcom CNIC core network driver.
   3  *
   4  * Copyright (c) 2006-2010 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation.
   9  *
  10  */
  11
  12 #ifndef CNIC_DEFS_H
  13 #define CNIC_DEFS_H
  14
  15 /* KWQ (kernel work queue) request op codes */
  16 #define L2_KWQE_OPCODE_VALUE_FLUSH                  (4)
  17 #define L2_KWQE_OPCODE_VALUE_VM_FREE_RX_QUEUE       (8)
  18
  19 #define L4_KWQE_OPCODE_VALUE_CONNECT1               (50)
  20 #define L4_KWQE_OPCODE_VALUE_CONNECT2               (51)
  21 #define L4_KWQE_OPCODE_VALUE_CONNECT3               (52)
  22 #define L4_KWQE_OPCODE_VALUE_RESET                  (53)
  23 #define L4_KWQE_OPCODE_VALUE_CLOSE                  (54)
  24 #define L4_KWQE_OPCODE_VALUE_UPDATE_SECRET          (60)
  25 #define L4_KWQE_OPCODE_VALUE_INIT_ULP               (61)
  26
  27 #define L4_KWQE_OPCODE_VALUE_OFFLOAD_PG             (1)
  28 #define L4_KWQE_OPCODE_VALUE_UPDATE_PG              (9)
  29 #define L4_KWQE_OPCODE_VALUE_UPLOAD_PG              (14)
  30
  31 #define L5CM_RAMROD_CMD_ID_BASE                 (0x80)
  32 #define L5CM_RAMROD_CMD_ID_TCP_CONNECT          (L5CM_RAMROD_CMD_ID_BASE + 3)
  33 #define L5CM_RAMROD_CMD_ID_CLOSE                (L5CM_RAMROD_CMD_ID_BASE + 12)
  34 #define L5CM_RAMROD_CMD_ID_ABORT                (L5CM_RAMROD_CMD_ID_BASE + 13)
  35 #define L5CM_RAMROD_CMD_ID_SEARCHER_DELETE      (L5CM_RAMROD_CMD_ID_BASE + 14)
  36 #define L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD    (L5CM_RAMROD_CMD_ID_BASE + 15)
  37
  38 /* KCQ (kernel completion queue) response op codes */
  39 #define L4_KCQE_OPCODE_VALUE_CLOSE_COMP             (53)
  40 #define L4_KCQE_OPCODE_VALUE_RESET_COMP             (54)
  41 #define L4_KCQE_OPCODE_VALUE_FW_TCP_UPDATE          (55)
  42 #define L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE       (56)
  43 #define L4_KCQE_OPCODE_VALUE_RESET_RECEIVED         (57)
  44 #define L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED         (58)
  45 #define L4_KCQE_OPCODE_VALUE_INIT_ULP               (61)
  46
  47 #define L4_KCQE_OPCODE_VALUE_OFFLOAD_PG             (1)
  48 #define L4_KCQE_OPCODE_VALUE_UPDATE_PG              (9)
  49 #define L4_KCQE_OPCODE_VALUE_UPLOAD_PG              (14)
  50
  51 /* KCQ (kernel completion queue) completion status */
  52 #define L4_KCQE_COMPLETION_STATUS_SUCCESS           (0)
  53 #define L4_KCQE_COMPLETION_STATUS_TIMEOUT           (0x93)
  54
  55 #define L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL    (0x83)
  56 #define L4_KCQE_COMPLETION_STATUS_OFFLOADED_PG      (0x89)
  57
  58 #define L4_KCQE_OPCODE_VALUE_OOO_EVENT_NOTIFICATION (0xa0)
  59 #define L4_KCQE_OPCODE_VALUE_OOO_FLUSH              (0xa1)
  60
  61 #define L4_LAYER_CODE (4)
  62 #define L2_LAYER_CODE (2)
  63
  64 /*
  65  * L4 KCQ CQE
  66  */
  67 struct l4_kcq {
  68         u32 cid;
  69         u32 pg_cid;
  70         u32 conn_id;
  71         u32 pg_host_opaque;
  72 #if defined(__BIG_ENDIAN)
  73         u16 status;
  74         u16 reserved1;
  75 #elif defined(__LITTLE_ENDIAN)
  76         u16 reserved1;
  77         u16 status;
  78 #endif
  79         u32 reserved2[2];
  80 #if defined(__BIG_ENDIAN)
  81         u8 flags;
  82 #define L4_KCQ_RESERVED3 (0x7<<0)
  83 #define L4_KCQ_RESERVED3_SHIFT 0
  84 #define L4_KCQ_RAMROD_COMPLETION (0x1<<3) /* Everest only */
  85 #define L4_KCQ_RAMROD_COMPLETION_SHIFT 3
  86 #define L4_KCQ_LAYER_CODE (0x7<<4)
  87 #define L4_KCQ_LAYER_CODE_SHIFT 4
  88 #define L4_KCQ_RESERVED4 (0x1<<7)
  89 #define L4_KCQ_RESERVED4_SHIFT 7
  90         u8 op_code;
  91         u16 qe_self_seq;
  92 #elif defined(__LITTLE_ENDIAN)
  93         u16 qe_self_seq;
  94         u8 op_code;
  95         u8 flags;
  96 #define L4_KCQ_RESERVED3 (0xF<<0)
  97 #define L4_KCQ_RESERVED3_SHIFT 0
  98 #define L4_KCQ_RAMROD_COMPLETION (0x1<<3) /* Everest only */
  99 #define L4_KCQ_RAMROD_COMPLETION_SHIFT 3
 100 #define L4_KCQ_LAYER_CODE (0x7<<4)
 101 #define L4_KCQ_LAYER_CODE_SHIFT 4
 102 #define L4_KCQ_RESERVED4 (0x1<<7)
 103 #define L4_KCQ_RESERVED4_SHIFT 7
 104 #endif
 105 };
 106
 107
 108 /*
 109  * L4 KCQ CQE PG upload
 110  */
 111 struct l4_kcq_upload_pg {
 112         u32 pg_cid;
 113 #if defined(__BIG_ENDIAN)
 114         u16 pg_status;
 115         u16 pg_ipid_count;
 116 #elif defined(__LITTLE_ENDIAN)
 117         u16 pg_ipid_count;
 118         u16 pg_status;
 119 #endif
 120         u32 reserved1[5];
 121 #if defined(__BIG_ENDIAN)
 122         u8 flags;
 123 #define L4_KCQ_UPLOAD_PG_RESERVED3 (0xF<<0)
 124 #define L4_KCQ_UPLOAD_PG_RESERVED3_SHIFT 0
 125 #define L4_KCQ_UPLOAD_PG_LAYER_CODE (0x7<<4)
 126 #define L4_KCQ_UPLOAD_PG_LAYER_CODE_SHIFT 4
 127 #define L4_KCQ_UPLOAD_PG_RESERVED4 (0x1<<7)
 128 #define L4_KCQ_UPLOAD_PG_RESERVED4_SHIFT 7
 129         u8 op_code;
 130         u16 qe_self_seq;
 131 #elif defined(__LITTLE_ENDIAN)
 132         u16 qe_self_seq;
 133         u8 op_code;
 134         u8 flags;
 135 #define L4_KCQ_UPLOAD_PG_RESERVED3 (0xF<<0)
 136 #define L4_KCQ_UPLOAD_PG_RESERVED3_SHIFT 0
 137 #define L4_KCQ_UPLOAD_PG_LAYER_CODE (0x7<<4)
 138 #define L4_KCQ_UPLOAD_PG_LAYER_CODE_SHIFT 4
 139 #define L4_KCQ_UPLOAD_PG_RESERVED4 (0x1<<7)
 140 #define L4_KCQ_UPLOAD_PG_RESERVED4_SHIFT 7
 141 #endif
 142 };
 143
 144
 145 /*
 146  * Gracefully close the connection request
 147  */
 148 struct l4_kwq_close_req {
 149 #if defined(__BIG_ENDIAN)
 150         u8 flags;
 151 #define L4_KWQ_CLOSE_REQ_RESERVED1 (0xF<<0)
 152 #define L4_KWQ_CLOSE_REQ_RESERVED1_SHIFT 0
 153 #define L4_KWQ_CLOSE_REQ_LAYER_CODE (0x7<<4)
 154 #define L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT 4
 155 #define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT (0x1<<7)
 156 #define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT_SHIFT 7
 157         u8 op_code;
 158         u16 reserved0;
 159 #elif defined(__LITTLE_ENDIAN)
 160         u16 reserved0;
 161         u8 op_code;
 162         u8 flags;
 163 #define L4_KWQ_CLOSE_REQ_RESERVED1 (0xF<<0)
 164 #define L4_KWQ_CLOSE_REQ_RESERVED1_SHIFT 0
 165 #define L4_KWQ_CLOSE_REQ_LAYER_CODE (0x7<<4)
 166 #define L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT 4
 167 #define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT (0x1<<7)
 168 #define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT_SHIFT 7
 169 #endif
 170         u32 cid;
 171         u32 reserved2[6];
 172 };
 173
 174
 175 /*
 176  * The first request to be passed in order to establish connection in option2
 177  */
 178 struct l4_kwq_connect_req1 {
 179 #if defined(__BIG_ENDIAN)
 180         u8 flags;
 181 #define L4_KWQ_CONNECT_REQ1_RESERVED1 (0xF<<0)
 182 #define L4_KWQ_CONNECT_REQ1_RESERVED1_SHIFT 0
 183 #define L4_KWQ_CONNECT_REQ1_LAYER_CODE (0x7<<4)
 184 #define L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT 4
 185 #define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT (0x1<<7)
 186 #define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT_SHIFT 7
 187         u8 op_code;
 188         u8 reserved0;
 189         u8 conn_flags;
 190 #define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE (0x1<<0)
 191 #define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE_SHIFT 0
 192 #define L4_KWQ_CONNECT_REQ1_IP_V6 (0x1<<1)
 193 #define L4_KWQ_CONNECT_REQ1_IP_V6_SHIFT 1
 194 #define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG (0x1<<2)
 195 #define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG_SHIFT 2
 196 #define L4_KWQ_CONNECT_REQ1_RSRV (0x1F<<3)
 197 #define L4_KWQ_CONNECT_REQ1_RSRV_SHIFT 3
 198 #elif defined(__LITTLE_ENDIAN)
 199         u8 conn_flags;
 200 #define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE (0x1<<0)
 201 #define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE_SHIFT 0
 202 #define L4_KWQ_CONNECT_REQ1_IP_V6 (0x1<<1)
 203 #define L4_KWQ_CONNECT_REQ1_IP_V6_SHIFT 1
 204 #define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG (0x1<<2)
 205 #define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG_SHIFT 2
 206 #define L4_KWQ_CONNECT_REQ1_RSRV (0x1F<<3)
 207 #define L4_KWQ_CONNECT_REQ1_RSRV_SHIFT 3
 208         u8 reserved0;
 209         u8 op_code;
 210         u8 flags;
 211 #define L4_KWQ_CONNECT_REQ1_RESERVED1 (0xF<<0)
 212 #define L4_KWQ_CONNECT_REQ1_RESERVED1_SHIFT 0
 213 #define L4_KWQ_CONNECT_REQ1_LAYER_CODE (0x7<<4)
 214 #define L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT 4
 215 #define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT (0x1<<7)
 216 #define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT_SHIFT 7
 217 #endif
 218         u32 cid;
 219         u32 pg_cid;
 220         u32 src_ip;
 221         u32 dst_ip;
 222 #if defined(__BIG_ENDIAN)
 223         u16 dst_port;
 224         u16 src_port;
 225 #elif defined(__LITTLE_ENDIAN)
 226         u16 src_port;
 227         u16 dst_port;
 228 #endif
 229 #if defined(__BIG_ENDIAN)
 230         u8 rsrv1[3];
 231         u8 tcp_flags;
 232 #define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK (0x1<<0)
 233 #define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK_SHIFT 0
 234 #define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE (0x1<<1)
 235 #define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE_SHIFT 1
 236 #define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE (0x1<<2)
 237 #define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE_SHIFT 2
 238 #define L4_KWQ_CONNECT_REQ1_TIME_STAMP (0x1<<3)
 239 #define L4_KWQ_CONNECT_REQ1_TIME_STAMP_SHIFT 3
 240 #define L4_KWQ_CONNECT_REQ1_SACK (0x1<<4)
 241 #define L4_KWQ_CONNECT_REQ1_SACK_SHIFT 4
 242 #define L4_KWQ_CONNECT_REQ1_SEG_SCALING (0x1<<5)
 243 #define L4_KWQ_CONNECT_REQ1_SEG_SCALING_SHIFT 5
 244 #define L4_KWQ_CONNECT_REQ1_RESERVED2 (0x3<<6)
 245 #define L4_KWQ_CONNECT_REQ1_RESERVED2_SHIFT 6
 246 #elif defined(__LITTLE_ENDIAN)
 247         u8 tcp_flags;
 248 #define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK (0x1<<0)
 249 #define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK_SHIFT 0
 250 #define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE (0x1<<1)
 251 #define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE_SHIFT 1
 252 #define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE (0x1<<2)
 253 #define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE_SHIFT 2
 254 #define L4_KWQ_CONNECT_REQ1_TIME_STAMP (0x1<<3)
 255 #define L4_KWQ_CONNECT_REQ1_TIME_STAMP_SHIFT 3
 256 #define L4_KWQ_CONNECT_REQ1_SACK (0x1<<4)
 257 #define L4_KWQ_CONNECT_REQ1_SACK_SHIFT 4
 258 #define L4_KWQ_CONNECT_REQ1_SEG_SCALING (0x1<<5)
 259 #define L4_KWQ_CONNECT_REQ1_SEG_SCALING_SHIFT 5
 260 #define L4_KWQ_CONNECT_REQ1_RESERVED2 (0x3<<6)
 261 #define L4_KWQ_CONNECT_REQ1_RESERVED2_SHIFT 6
 262         u8 rsrv1[3];
 263 #endif
 264         u32 rsrv2;
 265 };
 266
 267
 268 /*
 269  * The second ( optional )request to be passed in order to establish
 270  * connection in option2 - for IPv6 only
 271  */
 272 struct l4_kwq_connect_req2 {
 273 #if defined(__BIG_ENDIAN)
 274         u8 flags;
 275 #define L4_KWQ_CONNECT_REQ2_RESERVED1 (0xF<<0)
 276 #define L4_KWQ_CONNECT_REQ2_RESERVED1_SHIFT 0
 277 #define L4_KWQ_CONNECT_REQ2_LAYER_CODE (0x7<<4)
 278 #define L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT 4
 279 #define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT (0x1<<7)
 280 #define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT_SHIFT 7
 281         u8 op_code;
 282         u8 reserved0;
 283         u8 rsrv;
 284 #elif defined(__LITTLE_ENDIAN)
 285         u8 rsrv;
 286         u8 reserved0;
 287         u8 op_code;
 288         u8 flags;
 289 #define L4_KWQ_CONNECT_REQ2_RESERVED1 (0xF<<0)
 290 #define L4_KWQ_CONNECT_REQ2_RESERVED1_SHIFT 0
 291 #define L4_KWQ_CONNECT_REQ2_LAYER_CODE (0x7<<4)
 292 #define L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT 4
 293 #define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT (0x1<<7)
 294 #define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT_SHIFT 7
 295 #endif
 296         u32 reserved2;
 297         u32 src_ip_v6_2;
 298         u32 src_ip_v6_3;
 299         u32 src_ip_v6_4;
 300         u32 dst_ip_v6_2;
 301         u32 dst_ip_v6_3;
 302         u32 dst_ip_v6_4;
 303 };
 304
 305
 306 /*
 307  * The third ( and last )request to be passed in order to establish
 308  * connection in option2
 309  */
 310 struct l4_kwq_connect_req3 {
 311 #if defined(__BIG_ENDIAN)
 312         u8 flags;
 313 #define L4_KWQ_CONNECT_REQ3_RESERVED1 (0xF<<0)
 314 #define L4_KWQ_CONNECT_REQ3_RESERVED1_SHIFT 0
 315 #define L4_KWQ_CONNECT_REQ3_LAYER_CODE (0x7<<4)
 316 #define L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT 4
 317 #define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT (0x1<<7)
 318 #define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT_SHIFT 7
 319         u8 op_code;
 320         u16 reserved0;
 321 #elif defined(__LITTLE_ENDIAN)
 322         u16 reserved0;
 323         u8 op_code;
 324         u8 flags;
 325 #define L4_KWQ_CONNECT_REQ3_RESERVED1 (0xF<<0)
 326 #define L4_KWQ_CONNECT_REQ3_RESERVED1_SHIFT 0
 327 #define L4_KWQ_CONNECT_REQ3_LAYER_CODE (0x7<<4)
 328 #define L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT 4
 329 #define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT (0x1<<7)
 330 #define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT_SHIFT 7
 331 #endif
 332         u32 ka_timeout;
 333         u32 ka_interval ;
 334 #if defined(__BIG_ENDIAN)
 335         u8 snd_seq_scale;
 336         u8 ttl;
 337         u8 tos;
 338         u8 ka_max_probe_count;
 339 #elif defined(__LITTLE_ENDIAN)
 340         u8 ka_max_probe_count;
 341         u8 tos;
 342         u8 ttl;
 343         u8 snd_seq_scale;
 344 #endif
 345 #if defined(__BIG_ENDIAN)
 346         u16 pmtu;
 347         u16 mss;
 348 #elif defined(__LITTLE_ENDIAN)
 349         u16 mss;
 350         u16 pmtu;
 351 #endif
 352         u32 rcv_buf;
 353         u32 snd_buf;
 354         u32 seed;
 355 };
 356
 357
 358 /*
 359  * a KWQE request to offload a PG connection
 360  */
 361 struct l4_kwq_offload_pg {
 362 #if defined(__BIG_ENDIAN)
 363         u8 flags;
 364 #define L4_KWQ_OFFLOAD_PG_RESERVED1 (0xF<<0)
 365 #define L4_KWQ_OFFLOAD_PG_RESERVED1_SHIFT 0
 366 #define L4_KWQ_OFFLOAD_PG_LAYER_CODE (0x7<<4)
 367 #define L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT 4
 368 #define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT (0x1<<7)
 369 #define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT_SHIFT 7
 370         u8 op_code;
 371         u16 reserved0;
 372 #elif defined(__LITTLE_ENDIAN)
 373         u16 reserved0;
 374         u8 op_code;
 375         u8 flags;
 376 #define L4_KWQ_OFFLOAD_PG_RESERVED1 (0xF<<0)
 377 #define L4_KWQ_OFFLOAD_PG_RESERVED1_SHIFT 0
 378 #define L4_KWQ_OFFLOAD_PG_LAYER_CODE (0x7<<4)
 379 #define L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT 4
 380 #define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT (0x1<<7)
 381 #define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT_SHIFT 7
 382 #endif
 383 #if defined(__BIG_ENDIAN)
 384         u8 l2hdr_nbytes;
 385         u8 pg_flags;
 386 #define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP (0x1<<0)
 387 #define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP_SHIFT 0
 388 #define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING (0x1<<1)
 389 #define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING_SHIFT 1
 390 #define L4_KWQ_OFFLOAD_PG_RESERVED2 (0x3F<<2)
 391 #define L4_KWQ_OFFLOAD_PG_RESERVED2_SHIFT 2
 392         u8 da0;
 393         u8 da1;
 394 #elif defined(__LITTLE_ENDIAN)
 395         u8 da1;
 396         u8 da0;
 397         u8 pg_flags;
 398 #define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP (0x1<<0)
 399 #define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP_SHIFT 0
 400 #define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING (0x1<<1)
 401 #define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING_SHIFT 1
 402 #define L4_KWQ_OFFLOAD_PG_RESERVED2 (0x3F<<2)
 403 #define L4_KWQ_OFFLOAD_PG_RESERVED2_SHIFT 2
 404         u8 l2hdr_nbytes;
 405 #endif
 406 #if defined(__BIG_ENDIAN)
 407         u8 da2;
 408         u8 da3;
 409         u8 da4;
 410         u8 da5;
 411 #elif defined(__LITTLE_ENDIAN)
 412         u8 da5;
 413         u8 da4;
 414         u8 da3;
 415         u8 da2;
 416 #endif
 417 #if defined(__BIG_ENDIAN)
 418         u8 sa0;
 419         u8 sa1;
 420         u8 sa2;
 421         u8 sa3;
 422 #elif defined(__LITTLE_ENDIAN)
 423         u8 sa3;
 424         u8 sa2;
 425         u8 sa1;
 426         u8 sa0;
 427 #endif
 428 #if defined(__BIG_ENDIAN)
 429         u8 sa4;
 430         u8 sa5;
 431         u16 etype;
 432 #elif defined(__LITTLE_ENDIAN)
 433         u16 etype;
 434         u8 sa5;
 435         u8 sa4;
 436 #endif
 437 #if defined(__BIG_ENDIAN)
 438         u16 vlan_tag;
 439         u16 ipid_start;
 440 #elif defined(__LITTLE_ENDIAN)
 441         u16 ipid_start;
 442         u16 vlan_tag;
 443 #endif
 444 #if defined(__BIG_ENDIAN)
 445         u16 ipid_count;
 446         u16 reserved3;
 447 #elif defined(__LITTLE_ENDIAN)
 448         u16 reserved3;
 449         u16 ipid_count;
 450 #endif
 451         u32 host_opaque;
 452 };
 453
 454
 455 /*
 456  * Abortively close the connection request
 457  */
 458 struct l4_kwq_reset_req {
 459 #if defined(__BIG_ENDIAN)
 460         u8 flags;
 461 #define L4_KWQ_RESET_REQ_RESERVED1 (0xF<<0)
 462 #define L4_KWQ_RESET_REQ_RESERVED1_SHIFT 0
 463 #define L4_KWQ_RESET_REQ_LAYER_CODE (0x7<<4)
 464 #define L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT 4
 465 #define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT (0x1<<7)
 466 #define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT_SHIFT 7
 467         u8 op_code;
 468         u16 reserved0;
 469 #elif defined(__LITTLE_ENDIAN)
 470         u16 reserved0;
 471         u8 op_code;
 472         u8 flags;
 473 #define L4_KWQ_RESET_REQ_RESERVED1 (0xF<<0)
 474 #define L4_KWQ_RESET_REQ_RESERVED1_SHIFT 0
 475 #define L4_KWQ_RESET_REQ_LAYER_CODE (0x7<<4)
 476 #define L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT 4
 477 #define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT (0x1<<7)
 478 #define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT_SHIFT 7
 479 #endif
 480         u32 cid;
 481         u32 reserved2[6];
 482 };
 483
 484
 485 /*
 486  * a KWQE request to update a PG connection
 487  */
 488 struct l4_kwq_update_pg {
 489 #if defined(__BIG_ENDIAN)
 490         u8 flags;
 491 #define L4_KWQ_UPDATE_PG_RESERVED1 (0xF<<0)
 492 #define L4_KWQ_UPDATE_PG_RESERVED1_SHIFT 0
 493 #define L4_KWQ_UPDATE_PG_LAYER_CODE (0x7<<4)
 494 #define L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT 4
 495 #define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT (0x1<<7)
 496 #define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT_SHIFT 7
 497         u8 opcode;
 498         u16 oper16;
 499 #elif defined(__LITTLE_ENDIAN)
 500         u16 oper16;
 501         u8 opcode;
 502         u8 flags;
 503 #define L4_KWQ_UPDATE_PG_RESERVED1 (0xF<<0)
 504 #define L4_KWQ_UPDATE_PG_RESERVED1_SHIFT 0
 505 #define L4_KWQ_UPDATE_PG_LAYER_CODE (0x7<<4)
 506 #define L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT 4
 507 #define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT (0x1<<7)
 508 #define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT_SHIFT 7
 509 #endif
 510         u32 pg_cid;
 511         u32 pg_host_opaque;
 512 #if defined(__BIG_ENDIAN)
 513         u8 pg_valids;
 514 #define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT (0x1<<0)
 515 #define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT_SHIFT 0
 516 #define L4_KWQ_UPDATE_PG_VALIDS_DA (0x1<<1)
 517 #define L4_KWQ_UPDATE_PG_VALIDS_DA_SHIFT 1
 518 #define L4_KWQ_UPDATE_PG_RESERVERD2 (0x3F<<2)
 519 #define L4_KWQ_UPDATE_PG_RESERVERD2_SHIFT 2
 520         u8 pg_unused_a;
 521         u16 pg_ipid_count;
 522 #elif defined(__LITTLE_ENDIAN)
 523         u16 pg_ipid_count;
 524         u8 pg_unused_a;
 525         u8 pg_valids;
 526 #define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT (0x1<<0)
 527 #define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT_SHIFT 0
 528 #define L4_KWQ_UPDATE_PG_VALIDS_DA (0x1<<1)
 529 #define L4_KWQ_UPDATE_PG_VALIDS_DA_SHIFT 1
 530 #define L4_KWQ_UPDATE_PG_RESERVERD2 (0x3F<<2)
 531 #define L4_KWQ_UPDATE_PG_RESERVERD2_SHIFT 2
 532 #endif
 533 #if defined(__BIG_ENDIAN)
 534         u16 reserverd3;
 535         u8 da0;
 536         u8 da1;
 537 #elif defined(__LITTLE_ENDIAN)
 538         u8 da1;
 539         u8 da0;
 540         u16 reserverd3;
 541 #endif
 542 #if defined(__BIG_ENDIAN)
 543         u8 da2;
 544         u8 da3;
 545         u8 da4;
 546         u8 da5;
 547 #elif defined(__LITTLE_ENDIAN)
 548         u8 da5;
 549         u8 da4;
 550         u8 da3;
 551         u8 da2;
 552 #endif
 553         u32 reserved4;
 554         u32 reserved5;
 555 };
 556
 557
 558 /*
 559  * a KWQE request to upload a PG or L4 context
 560  */
 561 struct l4_kwq_upload {
 562 #if defined(__BIG_ENDIAN)
 563         u8 flags;
 564 #define L4_KWQ_UPLOAD_RESERVED1 (0xF<<0)
 565 #define L4_KWQ_UPLOAD_RESERVED1_SHIFT 0
 566 #define L4_KWQ_UPLOAD_LAYER_CODE (0x7<<4)
 567 #define L4_KWQ_UPLOAD_LAYER_CODE_SHIFT 4
 568 #define L4_KWQ_UPLOAD_LINKED_WITH_NEXT (0x1<<7)
 569 #define L4_KWQ_UPLOAD_LINKED_WITH_NEXT_SHIFT 7
 570         u8 opcode;
 571         u16 oper16;
 572 #elif defined(__LITTLE_ENDIAN)
 573         u16 oper16;
 574         u8 opcode;
 575         u8 flags;
 576 #define L4_KWQ_UPLOAD_RESERVED1 (0xF<<0)
 577 #define L4_KWQ_UPLOAD_RESERVED1_SHIFT 0
 578 #define L4_KWQ_UPLOAD_LAYER_CODE (0x7<<4)
 579 #define L4_KWQ_UPLOAD_LAYER_CODE_SHIFT 4
 580 #define L4_KWQ_UPLOAD_LINKED_WITH_NEXT (0x1<<7)
 581 #define L4_KWQ_UPLOAD_LINKED_WITH_NEXT_SHIFT 7
 582 #endif
 583         u32 cid;
 584         u32 reserved2[6];
 585 };
 586
 587 /*
 588  * bnx2x structures
 589  */
 590
 591 /*
 592  * The iscsi aggregative context of Cstorm
 593  */
 594 struct cstorm_iscsi_ag_context {
 595         u32 agg_vars1;
 596 #define CSTORM_ISCSI_AG_CONTEXT_STATE (0xFF<<0)
 597 #define CSTORM_ISCSI_AG_CONTEXT_STATE_SHIFT 0
 598 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<8)
 599 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 8
 600 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<9)
 601 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 9
 602 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<10)
 603 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 10
 604 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<11)
 605 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 11
 606 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN (0x1<<12)
 607 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN_SHIFT 12
 608 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN (0x1<<13)
 609 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN_SHIFT 13
 610 #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF (0x3<<14)
 611 #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF_SHIFT 14
 612 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66 (0x3<<16)
 613 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66_SHIFT 16
 614 #define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN (0x1<<18)
 615 #define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN_SHIFT 18
 616 #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION0_CF_EN (0x1<<19)
 617 #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION0_CF_EN_SHIFT 19
 618 #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION1_CF_EN (0x1<<20)
 619 #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION1_CF_EN_SHIFT 20
 620 #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION2_CF_EN (0x1<<21)
 621 #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION2_CF_EN_SHIFT 21
 622 #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF_EN (0x1<<22)
 623 #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF_EN_SHIFT 22
 624 #define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE (0x7<<23)
 625 #define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE_SHIFT 23
 626 #define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE (0x3<<26)
 627 #define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE_SHIFT 26
 628 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED52 (0x3<<28)
 629 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED52_SHIFT 28
 630 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED53 (0x3<<30)
 631 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED53_SHIFT 30
 632 #if defined(__BIG_ENDIAN)
 633         u8 __aux1_th;
 634         u8 __aux1_val;
 635         u16 __agg_vars2;
 636 #elif defined(__LITTLE_ENDIAN)
 637         u16 __agg_vars2;
 638         u8 __aux1_val;
 639         u8 __aux1_th;
 640 #endif
 641         u32 rel_seq;
 642         u32 rel_seq_th;
 643 #if defined(__BIG_ENDIAN)
 644         u16 hq_cons;
 645         u16 hq_prod;
 646 #elif defined(__LITTLE_ENDIAN)
 647         u16 hq_prod;
 648         u16 hq_cons;
 649 #endif
 650 #if defined(__BIG_ENDIAN)
 651         u8 __reserved62;
 652         u8 __reserved61;
 653         u8 __reserved60;
 654         u8 __reserved59;
 655 #elif defined(__LITTLE_ENDIAN)
 656         u8 __reserved59;
 657         u8 __reserved60;
 658         u8 __reserved61;
 659         u8 __reserved62;
 660 #endif
 661 #if defined(__BIG_ENDIAN)
 662         u16 __reserved64;
 663         u16 __cq_u_prod0;
 664 #elif defined(__LITTLE_ENDIAN)
 665         u16 __cq_u_prod0;
 666         u16 __reserved64;
 667 #endif
 668         u32 __cq_u_prod1;
 669 #if defined(__BIG_ENDIAN)
 670         u16 __agg_vars3;
 671         u16 __cq_u_prod2;
 672 #elif defined(__LITTLE_ENDIAN)
 673         u16 __cq_u_prod2;
 674         u16 __agg_vars3;
 675 #endif
 676 #if defined(__BIG_ENDIAN)
 677         u16 __aux2_th;
 678         u16 __cq_u_prod3;
 679 #elif defined(__LITTLE_ENDIAN)
 680         u16 __cq_u_prod3;
 681         u16 __aux2_th;
 682 #endif
 683 };
 684
 685 /*
 686  * iSCSI context region, used only in iSCSI
 687  */
 688 struct ustorm_iscsi_rq_db {
 689         struct regpair pbl_base;
 690         struct regpair curr_pbe;
 691 };
 692
 693 /*
 694  * iSCSI context region, used only in iSCSI
 695  */
 696 struct ustorm_iscsi_r2tq_db {
 697         struct regpair pbl_base;
 698         struct regpair curr_pbe;
 699 };
 700
 701 /*
 702  * iSCSI context region, used only in iSCSI
 703  */
 704 struct ustorm_iscsi_cq_db {
 705 #if defined(__BIG_ENDIAN)
 706         u16 cq_sn;
 707         u16 prod;
 708 #elif defined(__LITTLE_ENDIAN)
 709         u16 prod;
 710         u16 cq_sn;
 711 #endif
 712         struct regpair curr_pbe;
 713 };
 714
 715 /*
 716  * iSCSI context region, used only in iSCSI
 717  */
 718 struct rings_db {
 719         struct ustorm_iscsi_rq_db rq;
 720         struct ustorm_iscsi_r2tq_db r2tq;
 721         struct ustorm_iscsi_cq_db cq[8];
 722 #if defined(__BIG_ENDIAN)
 723         u16 rq_prod;
 724         u16 r2tq_prod;
 725 #elif defined(__LITTLE_ENDIAN)
 726         u16 r2tq_prod;
 727         u16 rq_prod;
 728 #endif
 729         struct regpair cq_pbl_base;
 730 };
 731
 732 /*
 733  * iSCSI context region, used only in iSCSI
 734  */
 735 struct ustorm_iscsi_placement_db {
 736         u32 sgl_base_lo;
 737         u32 sgl_base_hi;
 738         u32 local_sge_0_address_hi;
 739         u32 local_sge_0_address_lo;
 740 #if defined(__BIG_ENDIAN)
 741         u16 curr_sge_offset;
 742         u16 local_sge_0_size;
 743 #elif defined(__LITTLE_ENDIAN)
 744         u16 local_sge_0_size;
 745         u16 curr_sge_offset;
 746 #endif
 747         u32 local_sge_1_address_hi;
 748         u32 local_sge_1_address_lo;
 749 #if defined(__BIG_ENDIAN)
 750         u16 reserved6;
 751         u16 local_sge_1_size;
 752 #elif defined(__LITTLE_ENDIAN)
 753         u16 local_sge_1_size;
 754         u16 reserved6;
 755 #endif
 756 #if defined(__BIG_ENDIAN)
 757         u8 sgl_size;
 758         u8 local_sge_index_2b;
 759         u16 reserved7;
 760 #elif defined(__LITTLE_ENDIAN)
 761         u16 reserved7;
 762         u8 local_sge_index_2b;
 763         u8 sgl_size;
 764 #endif
 765         u32 rem_pdu;
 766         u32 place_db_bitfield_1;
 767 #define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD (0xFFFFFF<<0)
 768 #define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD_SHIFT 0
 769 #define USTORM_ISCSI_PLACEMENT_DB_CQ_ID (0xFF<<24)
 770 #define USTORM_ISCSI_PLACEMENT_DB_CQ_ID_SHIFT 24
 771         u32 place_db_bitfield_2;
 772 #define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE (0xFFFFFF<<0)
 773 #define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE_SHIFT 0
 774 #define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX (0xFF<<24)
 775 #define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX_SHIFT 24
 776         u32 nal;
 777 #define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE (0xFFFFFF<<0)
 778 #define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE_SHIFT 0
 779 #define USTORM_ISCSI_PLACEMENT_DB_EXP_PADDING_2B (0x3<<24)
 780 #define USTORM_ISCSI_PLACEMENT_DB_EXP_PADDING_2B_SHIFT 24
 781 #define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B (0x7<<26)
 782 #define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B_SHIFT 26
 783 #define USTORM_ISCSI_PLACEMENT_DB_NAL_LEN_3B (0x7<<29)
 784 #define USTORM_ISCSI_PLACEMENT_DB_NAL_LEN_3B_SHIFT 29
 785 };
 786
 787 /*
 788  * Ustorm iSCSI Storm Context
 789  */
 790 struct ustorm_iscsi_st_context {
 791         u32 exp_stat_sn;
 792         u32 exp_data_sn;
 793         struct rings_db ring;
 794         struct regpair task_pbl_base;
 795         struct regpair tce_phy_addr;
 796         struct ustorm_iscsi_placement_db place_db;
 797         u32 reserved8;
 798         u32 rem_rcv_len;
 799 #if defined(__BIG_ENDIAN)
 800         u16 hdr_itt;
 801         u16 iscsi_conn_id;
 802 #elif defined(__LITTLE_ENDIAN)
 803         u16 iscsi_conn_id;
 804         u16 hdr_itt;
 805 #endif
 806         u32 nal_bytes;
 807 #if defined(__BIG_ENDIAN)
 808         u8 hdr_second_byte_union;
 809         u8 bitfield_0;
 810 #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0)
 811 #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 0
 812 #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1)
 813 #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 1
 814 #define USTORM_ISCSI_ST_CONTEXT_BRESETCRC (0x1<<2)
 815 #define USTORM_ISCSI_ST_CONTEXT_BRESETCRC_SHIFT 2
 816 #define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x1F<<3)
 817 #define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 3
 818         u8 task_pdu_cache_index;
 819         u8 task_pbe_cache_index;
 820 #elif defined(__LITTLE_ENDIAN)
 821         u8 task_pbe_cache_index;
 822         u8 task_pdu_cache_index;
 823         u8 bitfield_0;
 824 #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0)
 825 #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 0
 826 #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1)
 827 #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 1
 828 #define USTORM_ISCSI_ST_CONTEXT_BRESETCRC (0x1<<2)
 829 #define USTORM_ISCSI_ST_CONTEXT_BRESETCRC_SHIFT 2
 830 #define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x1F<<3)
 831 #define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 3
 832         u8 hdr_second_byte_union;
 833 #endif
 834 #if defined(__BIG_ENDIAN)
 835         u16 reserved3;
 836         u8 reserved2;
 837         u8 acDecrement;
 838 #elif defined(__LITTLE_ENDIAN)
 839         u8 acDecrement;
 840         u8 reserved2;
 841         u16 reserved3;
 842 #endif
 843         u32 task_stat;
 844 #if defined(__BIG_ENDIAN)
 845         u8 hdr_opcode;
 846         u8 num_cqs;
 847         u16 reserved5;
 848 #elif defined(__LITTLE_ENDIAN)
 849         u16 reserved5;
 850         u8 num_cqs;
 851         u8 hdr_opcode;
 852 #endif
 853         u32 negotiated_rx;
 854 #define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH (0xFFFFFF<<0)
 855 #define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH_SHIFT 0
 856 #define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS (0xFF<<24)
 857 #define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT 24
 858         u32 negotiated_rx_and_flags;
 859 #define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH (0xFFFFFF<<0)
 860 #define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH_SHIFT 0
 861 #define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED (0x1<<24)
 862 #define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED_SHIFT 24
 863 #define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN (0x1<<25)
 864 #define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN_SHIFT 25
 865 #define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN (0x1<<26)
 866 #define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN_SHIFT 26
 867 #define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR (0x1<<27)
 868 #define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR_SHIFT 27
 869 #define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID (0x1<<28)
 870 #define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID_SHIFT 28
 871 #define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE (0x3<<29)
 872 #define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE_SHIFT 29
 873 #define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED (0x1<<31)
 874 #define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED_SHIFT 31
 875 };
 876
 877 /*
 878  * TCP context region, shared in TOE, RDMA and ISCSI
 879  */
 880 struct tstorm_tcp_st_context_section {
 881         u32 flags1;
 882 #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT (0xFFFFFF<<0)
 883 #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT_SHIFT 0
 884 #define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID (0x1<<24)
 885 #define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID_SHIFT 24
 886 #define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS (0x1<<25)
 887 #define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS_SHIFT 25
 888 #define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED0 (0x1<<26)
 889 #define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED0_SHIFT 26
 890 #define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD (0x1<<27)
 891 #define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD_SHIFT 27
 892 #define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED (0x1<<28)
 893 #define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED_SHIFT 28
 894 #define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE (0x1<<29)
 895 #define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE_SHIFT 29
 896 #define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN (0x1<<30)
 897 #define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN_SHIFT 30
 898 #define TSTORM_TCP_ST_CONTEXT_SECTION_LAST_ISLE_HAS_FIN (0x1<<31)
 899 #define TSTORM_TCP_ST_CONTEXT_SECTION_LAST_ISLE_HAS_FIN_SHIFT 31
 900         u32 flags2;
 901 #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION (0xFFFFFF<<0)
 902 #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION_SHIFT 0
 903 #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN (0x1<<24)
 904 #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN_SHIFT 24
 905 #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN (0x1<<25)
 906 #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN_SHIFT 25
 907 #define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT (0x1<<26)
 908 #define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT_SHIFT 26
 909 #define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT (0x1<<27)
 910 #define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT_SHIFT 27
 911 #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<28)
 912 #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 28
 913 #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<29)
 914 #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 29
 915 #define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_RST_ATTACK (0x1<<30)
 916 #define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_RST_ATTACK_SHIFT 30
 917 #define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_SYN_ATTACK (0x1<<31)
 918 #define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_SYN_ATTACK_SHIFT 31
 919 #if defined(__BIG_ENDIAN)
 920         u16 mss;
 921         u8 tcp_sm_state;
 922         u8 rto_exp;
 923 #elif defined(__LITTLE_ENDIAN)
 924         u8 rto_exp;
 925         u8 tcp_sm_state;
 926         u16 mss;
 927 #endif
 928         u32 rcv_nxt;
 929         u32 timestamp_recent;
 930         u32 timestamp_recent_time;
 931         u32 cwnd;
 932         u32 ss_thresh;
 933         u32 cwnd_accum;
 934         u32 prev_seg_seq;
 935         u32 expected_rel_seq;
 936         u32 recover;
 937 #if defined(__BIG_ENDIAN)
 938         u8 retransmit_count;
 939         u8 ka_max_probe_count;
 940         u8 persist_probe_count;
 941         u8 ka_probe_count;
 942 #elif defined(__LITTLE_ENDIAN)
 943         u8 ka_probe_count;
 944         u8 persist_probe_count;
 945         u8 ka_max_probe_count;
 946         u8 retransmit_count;
 947 #endif
 948 #if defined(__BIG_ENDIAN)
 949         u8 statistics_counter_id;
 950         u8 ooo_support_mode;
 951         u8 snd_wnd_scale;
 952         u8 dup_ack_count;
 953 #elif defined(__LITTLE_ENDIAN)
 954         u8 dup_ack_count;
 955         u8 snd_wnd_scale;
 956         u8 ooo_support_mode;
 957         u8 statistics_counter_id;
 958 #endif
 959         u32 retransmit_start_time;
 960         u32 ka_timeout;
 961         u32 ka_interval;
 962         u32 isle_start_seq;
 963         u32 isle_end_seq;
 964 #if defined(__BIG_ENDIAN)
 965         u16 second_isle_address;
 966         u16 recent_seg_wnd;
 967 #elif defined(__LITTLE_ENDIAN)
 968         u16 recent_seg_wnd;
 969         u16 second_isle_address;
 970 #endif
 971 #if defined(__BIG_ENDIAN)
 972         u8 max_isles_ever_happened;
 973         u8 isles_number;
 974         u16 last_isle_address;
 975 #elif defined(__LITTLE_ENDIAN)
 976         u16 last_isle_address;
 977         u8 isles_number;
 978         u8 max_isles_ever_happened;
 979 #endif
 980         u32 max_rt_time;
 981 #if defined(__BIG_ENDIAN)
 982         u16 lsb_mac_address;
 983         u16 vlan_id;
 984 #elif defined(__LITTLE_ENDIAN)
 985         u16 vlan_id;
 986         u16 lsb_mac_address;
 987 #endif
 988         u32 msb_mac_address;
 989         u32 rightmost_received_seq;
 990 };
 991
 992 /*
 993  * Termination variables
 994  */
 995 struct iscsi_term_vars {
 996         u8 BitMap;
 997 #define ISCSI_TERM_VARS_TCP_STATE (0xF<<0)
 998 #define ISCSI_TERM_VARS_TCP_STATE_SHIFT 0
 999 #define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT (0x1<<4)
1000 #define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT_SHIFT 4
1001 #define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT (0x1<<5)
1002 #define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT_SHIFT 5
1003 #define ISCSI_TERM_VARS_TERM_ON_CHIP (0x1<<6)
1004 #define ISCSI_TERM_VARS_TERM_ON_CHIP_SHIFT 6
1005 #define ISCSI_TERM_VARS_RSRV (0x1<<7)
1006 #define ISCSI_TERM_VARS_RSRV_SHIFT 7
1007 };
1008
1009 /*
1010  * iSCSI context region, used only in iSCSI
1011  */
1012 struct tstorm_iscsi_st_context_section {
1013 #if defined(__BIG_ENDIAN)
1014         u16 rem_tcp_data_len;
1015         u16 brb_offset;
1016 #elif defined(__LITTLE_ENDIAN)
1017         u16 brb_offset;
1018         u16 rem_tcp_data_len;
1019 #endif
1020         u32 b2nh;
1021 #if defined(__BIG_ENDIAN)
1022         u16 rq_cons;
1023         u8 flags;
1024 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0)
1025 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 0
1026 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1)
1027 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 1
1028 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2)
1029 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 2
1030 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3)
1031 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 3
1032 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4)
1033 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 4
1034 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV (0x7<<5)
1035 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV_SHIFT 5
1036         u8 hdr_bytes_2_fetch;
1037 #elif defined(__LITTLE_ENDIAN)
1038         u8 hdr_bytes_2_fetch;
1039         u8 flags;
1040 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0)
1041 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 0
1042 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1)
1043 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 1
1044 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2)
1045 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 2
1046 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3)
1047 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 3
1048 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4)
1049 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 4
1050 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV (0x7<<5)
1051 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV_SHIFT 5
1052         u16 rq_cons;
1053 #endif
1054         struct regpair rq_db_phy_addr;
1055 #if defined(__BIG_ENDIAN)
1056         struct iscsi_term_vars term_vars;
1057         u8 scratchpad_idx;
1058         u16 iscsi_conn_id;
1059 #elif defined(__LITTLE_ENDIAN)
1060         u16 iscsi_conn_id;
1061         u8 scratchpad_idx;
1062         struct iscsi_term_vars term_vars;
1063 #endif
1064         u32 process_nxt;
1065 };
1066
1067 /*
1068  * The iSCSI non-aggregative context of Tstorm
1069  */
1070 struct tstorm_iscsi_st_context {
1071         struct tstorm_tcp_st_context_section tcp;
1072         struct tstorm_iscsi_st_context_section iscsi;
1073 };
1074
1075 /*
1076  * The tcp aggregative context section of Xstorm
1077  */
1078 struct xstorm_tcp_tcp_ag_context_section {
1079 #if defined(__BIG_ENDIAN)
1080         u8 __tcp_agg_vars1;
1081         u8 __da_cnt;
1082         u16 mss;
1083 #elif defined(__LITTLE_ENDIAN)
1084         u16 mss;
1085         u8 __da_cnt;
1086         u8 __tcp_agg_vars1;
1087 #endif
1088         u32 snd_nxt;
1089         u32 tx_wnd;
1090         u32 snd_una;
1091         u32 local_adv_wnd;
1092 #if defined(__BIG_ENDIAN)
1093         u8 __agg_val8_th;
1094         u8 __agg_val8;
1095         u16 tcp_agg_vars2;
1096 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0)
1097 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 0
1098 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED (0x1<<1)
1099 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED_SHIFT 1
1100 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE (0x1<<2)
1101 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE_SHIFT 2
1102 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3)
1103 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3
1104 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4)
1105 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 4
1106 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE (0x1<<5)
1107 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 5
1108 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6)
1109 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 6
1110 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN (0x1<<7)
1111 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN_SHIFT 7
1112 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8)
1113 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 8
1114 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9)
1115 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 9
1116 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10)
1117 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10
1118 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12)
1119 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12
1120 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF (0x3<<14)
1121 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_SHIFT 14
1122 #elif defined(__LITTLE_ENDIAN)
1123         u16 tcp_agg_vars2;
1124 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0)
1125 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 0
1126 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED (0x1<<1)
1127 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED_SHIFT 1
1128 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE (0x1<<2)
1129 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE_SHIFT 2
1130 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3)
1131 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3
1132 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4)
1133 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 4
1134 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE (0x1<<5)
1135 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 5
1136 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6)
1137 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 6
1138 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN (0x1<<7)
1139 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN_SHIFT 7
1140 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8)
1141 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 8
1142 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9)
1143 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 9
1144 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10)
1145 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10
1146 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12)
1147 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12
1148 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF (0x3<<14)
1149 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_SHIFT 14
1150         u8 __agg_val8;
1151         u8 __agg_val8_th;
1152 #endif
1153         u32 ack_to_far_end;
1154         u32 rto_timer;
1155         u32 ka_timer;
1156         u32 ts_to_echo;
1157 #if defined(__BIG_ENDIAN)
1158         u16 __agg_val7_th;
1159         u16 __agg_val7;
1160 #elif defined(__LITTLE_ENDIAN)
1161         u16 __agg_val7;
1162         u16 __agg_val7_th;
1163 #endif
1164 #if defined(__BIG_ENDIAN)
1165         u8 __tcp_agg_vars5;
1166         u8 __tcp_agg_vars4;
1167         u8 __tcp_agg_vars3;
1168         u8 __force_pure_ack_cnt;
1169 #elif defined(__LITTLE_ENDIAN)
1170         u8 __force_pure_ack_cnt;
1171         u8 __tcp_agg_vars3;
1172         u8 __tcp_agg_vars4;
1173         u8 __tcp_agg_vars5;
1174 #endif
1175         u32 tcp_agg_vars6;
1176 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN (0x1<<0)
1177 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN_SHIFT 0
1178 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_EN (0x1<<1)
1179 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_EN_SHIFT 1
1180 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN (0x1<<2)
1181 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN_SHIFT 2
1182 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<3)
1183 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 3
1184 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX6_FLAG (0x1<<4)
1185 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX6_FLAG_SHIFT 4
1186 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX7_FLAG (0x1<<5)
1187 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX7_FLAG_SHIFT 5
1188 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX5_CF (0x3<<6)
1189 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX5_CF_SHIFT 6
1190 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF (0x3<<8)
1191 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_SHIFT 8
1192 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF (0x3<<10)
1193 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_SHIFT 10
1194 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF (0x3<<12)
1195 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_SHIFT 12
1196 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF (0x3<<14)
1197 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_SHIFT 14
1198 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX13_CF (0x3<<16)
1199 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX13_CF_SHIFT 16
1200 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX14_CF (0x3<<18)
1201 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX14_CF_SHIFT 18
1202 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX15_CF (0x3<<20)
1203 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX15_CF_SHIFT 20
1204 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX16_CF (0x3<<22)
1205 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX16_CF_SHIFT 22
1206 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX17_CF (0x3<<24)
1207 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX17_CF_SHIFT 24
1208 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ECE_FLAG (0x1<<26)
1209 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ECE_FLAG_SHIFT 26
1210 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED71 (0x1<<27)
1211 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED71_SHIFT 27
1212 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_FORCE_PURE_ACK_CNT_DIRTY (0x1<<28)
1213 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_FORCE_PURE_ACK_CNT_DIRTY_SHIFT 28
1214 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TCP_AUTO_STOP_FLAG (0x1<<29)
1215 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TCP_AUTO_STOP_FLAG_SHIFT 29
1216 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DO_TS_UPDATE_FLAG (0x1<<30)
1217 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DO_TS_UPDATE_FLAG_SHIFT 30
1218 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CANCEL_RETRANSMIT_FLAG (0x1<<31)
1219 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CANCEL_RETRANSMIT_FLAG_SHIFT 31
1220 #if defined(__BIG_ENDIAN)
1221         u16 __agg_misc6;
1222         u16 __tcp_agg_vars7;
1223 #elif defined(__LITTLE_ENDIAN)
1224         u16 __tcp_agg_vars7;
1225         u16 __agg_misc6;
1226 #endif
1227         u32 __agg_val10;
1228         u32 __agg_val10_th;
1229 #if defined(__BIG_ENDIAN)
1230         u16 __reserved3;
1231         u8 __reserved2;
1232         u8 __da_only_cnt;
1233 #elif defined(__LITTLE_ENDIAN)
1234         u8 __da_only_cnt;
1235         u8 __reserved2;
1236         u16 __reserved3;
1237 #endif
1238 };
1239
1240 /*
1241  * The iscsi aggregative context of Xstorm
1242  */
1243 struct xstorm_iscsi_ag_context {
1244 #if defined(__BIG_ENDIAN)
1245         u16 agg_val1;
1246         u8 agg_vars1;
1247 #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
1248 #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
1249 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
1250 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
1251 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
1252 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
1253 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
1254 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
1255 #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4)
1256 #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4
1257 #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN (0x1<<5)
1258 #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN_SHIFT 5
1259 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6)
1260 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 6
1261 #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7)
1262 #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 7
1263         u8 state;
1264 #elif defined(__LITTLE_ENDIAN)
1265         u8 state;
1266         u8 agg_vars1;
1267 #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
1268 #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
1269 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
1270 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
1271 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
1272 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
1273 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
1274 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
1275 #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4)
1276 #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4
1277 #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN (0x1<<5)
1278 #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN_SHIFT 5
1279 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6)
1280 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 6
1281 #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7)
1282 #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 7
1283         u16 agg_val1;
1284 #endif
1285 #if defined(__BIG_ENDIAN)
1286         u8 cdu_reserved;
1287         u8 __agg_vars4;
1288         u8 agg_vars3;
1289 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0)
1290 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0
1291 #define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF (0x3<<6)
1292 #define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF_SHIFT 6
1293         u8 agg_vars2;
1294 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF (0x3<<0)
1295 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_SHIFT 0
1296 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2)
1297 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 2
1298 #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG (0x1<<3)
1299 #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG_SHIFT 3
1300 #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG (0x1<<4)
1301 #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG_SHIFT 4
1302 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1 (0x3<<5)
1303 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1_SHIFT 5
1304 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7)
1305 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7
1306 #elif defined(__LITTLE_ENDIAN)
1307         u8 agg_vars2;
1308 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF (0x3<<0)
1309 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_SHIFT 0
1310 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2)
1311 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 2
1312 #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG (0x1<<3)
1313 #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG_SHIFT 3
1314 #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG (0x1<<4)
1315 #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG_SHIFT 4
1316 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1 (0x3<<5)
1317 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1_SHIFT 5
1318 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7)
1319 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7
1320         u8 agg_vars3;
1321 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0)
1322 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0
1323 #define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF (0x3<<6)
1324 #define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF_SHIFT 6
1325         u8 __agg_vars4;
1326         u8 cdu_reserved;
1327 #endif
1328         u32 more_to_send;
1329 #if defined(__BIG_ENDIAN)
1330         u16 agg_vars5;
1331 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5 (0x3<<0)
1332 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5_SHIFT 0
1333 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2)
1334 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2
1335 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8)
1336 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8
1337 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2 (0x3<<14)
1338 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2_SHIFT 14
1339         u16 sq_cons;
1340 #elif defined(__LITTLE_ENDIAN)
1341         u16 sq_cons;
1342         u16 agg_vars5;
1343 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5 (0x3<<0)
1344 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5_SHIFT 0
1345 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2)
1346 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2
1347 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8)
1348 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8
1349 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2 (0x3<<14)
1350 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2_SHIFT 14
1351 #endif
1352         struct xstorm_tcp_tcp_ag_context_section tcp;
1353 #if defined(__BIG_ENDIAN)
1354         u16 agg_vars7;
1355 #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0)
1356 #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 0
1357 #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG (0x1<<3)
1358 #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG_SHIFT 3
1359 #define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF (0x3<<4)
1360 #define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF_SHIFT 4
1361 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3 (0x3<<6)
1362 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3_SHIFT 6
1363 #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF (0x3<<8)
1364 #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_SHIFT 8
1365 #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10)
1366 #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 10
1367 #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<11)
1368 #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 11
1369 #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG (0x1<<12)
1370 #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG_SHIFT 12
1371 #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG (0x1<<13)
1372 #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG_SHIFT 13
1373 #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG (0x1<<14)
1374 #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG_SHIFT 14
1375 #define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN (0x1<<15)
1376 #define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN_SHIFT 15
1377         u8 agg_val3_th;
1378         u8 agg_vars6;
1379 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6 (0x7<<0)
1380 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6_SHIFT 0
1381 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7 (0x7<<3)
1382 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7_SHIFT 3
1383 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4 (0x3<<6)
1384 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4_SHIFT 6
1385 #elif defined(__LITTLE_ENDIAN)
1386         u8 agg_vars6;
1387 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6 (0x7<<0)
1388 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6_SHIFT 0
1389 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7 (0x7<<3)
1390 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7_SHIFT 3
1391 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4 (0x3<<6)
1392 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4_SHIFT 6
1393         u8 agg_val3_th;
1394         u16 agg_vars7;
1395 #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0)
1396 #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 0
1397 #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG (0x1<<3)
1398 #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG_SHIFT 3
1399 #define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF (0x3<<4)
1400 #define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF_SHIFT 4
1401 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3 (0x3<<6)
1402 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3_SHIFT 6
1403 #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF (0x3<<8)
1404 #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_SHIFT 8
1405 #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10)
1406 #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 10
1407 #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<11)
1408 #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 11
1409 #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG (0x1<<12)
1410 #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG_SHIFT 12
1411 #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG (0x1<<13)
1412 #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG_SHIFT 13
1413 #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG (0x1<<14)
1414 #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG_SHIFT 14
1415 #define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN (0x1<<15)
1416 #define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN_SHIFT 15
1417 #endif
1418 #if defined(__BIG_ENDIAN)
1419         u16 __agg_val11_th;
1420         u16 __gen_data;
1421 #elif defined(__LITTLE_ENDIAN)
1422         u16 __gen_data;
1423         u16 __agg_val11_th;
1424 #endif
1425 #if defined(__BIG_ENDIAN)
1426         u8 __reserved1;
1427         u8 __agg_val6_th;
1428         u16 __agg_val9;
1429 #elif defined(__LITTLE_ENDIAN)
1430         u16 __agg_val9;
1431         u8 __agg_val6_th;
1432         u8 __reserved1;
1433 #endif
1434 #if defined(__BIG_ENDIAN)
1435         u16 hq_prod;
1436         u16 hq_cons;
1437 #elif defined(__LITTLE_ENDIAN)
1438         u16 hq_cons;
1439         u16 hq_prod;
1440 #endif
1441         u32 agg_vars8;
1442 #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC2 (0xFFFFFF<<0)
1443 #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC2_SHIFT 0
1444 #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC3 (0xFF<<24)
1445 #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC3_SHIFT 24
1446 #if defined(__BIG_ENDIAN)
1447         u16 r2tq_prod;
1448         u16 sq_prod;
1449 #elif defined(__LITTLE_ENDIAN)
1450         u16 sq_prod;
1451         u16 r2tq_prod;
1452 #endif
1453 #if defined(__BIG_ENDIAN)
1454         u8 agg_val3;
1455         u8 agg_val6;
1456         u8 agg_val5_th;
1457         u8 agg_val5;
1458 #elif defined(__LITTLE_ENDIAN)
1459         u8 agg_val5;
1460         u8 agg_val5_th;
1461         u8 agg_val6;
1462         u8 agg_val3;
1463 #endif
1464 #if defined(__BIG_ENDIAN)
1465         u16 __agg_misc1;
1466         u16 agg_limit1;
1467 #elif defined(__LITTLE_ENDIAN)
1468         u16 agg_limit1;
1469         u16 __agg_misc1;
1470 #endif
1471         u32 hq_cons_tcp_seq;
1472         u32 exp_stat_sn;
1473         u32 rst_seq_num;
1474 };
1475
1476 /*
1477  * The tcp aggregative context section of Tstorm
1478  */
1479 struct tstorm_tcp_tcp_ag_context_section {
1480         u32 __agg_val1;
1481 #if defined(__BIG_ENDIAN)
1482         u8 __tcp_agg_vars2;
1483         u8 __agg_val3;
1484         u16 __agg_val2;
1485 #elif defined(__LITTLE_ENDIAN)
1486         u16 __agg_val2;
1487         u8 __agg_val3;
1488         u8 __tcp_agg_vars2;
1489 #endif
1490 #if defined(__BIG_ENDIAN)
1491         u16 __agg_val5;
1492         u8 __agg_val6;
1493         u8 __tcp_agg_vars3;
1494 #elif defined(__LITTLE_ENDIAN)
1495         u8 __tcp_agg_vars3;
1496         u8 __agg_val6;
1497         u16 __agg_val5;
1498 #endif
1499         u32 snd_nxt;
1500         u32 rtt_seq;
1501         u32 rtt_time;
1502         u32 __reserved66;
1503         u32 wnd_right_edge;
1504         u32 tcp_agg_vars1;
1505 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0)
1506 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0
1507 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1)
1508 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1
1509 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2)
1510 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2
1511 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4)
1512 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4
1513 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6)
1514 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6
1515 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7)
1516 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7
1517 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8)
1518 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8
1519 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN (0x1<<9)
1520 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN_SHIFT 9
1521 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10)
1522 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10
1523 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11)
1524 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11
1525 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12)
1526 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12
1527 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13)
1528 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13
1529 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14)
1530 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14
1531 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16)
1532 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16
1533 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18)
1534 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18
1535 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19)
1536 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19
1537 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20)
1538 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20
1539 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21)
1540 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21
1541 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22)
1542 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22
1543 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24)
1544 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24
1545 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28)
1546 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28
1547         u32 snd_max;
1548         u32 snd_una;
1549         u32 __reserved2;
1550 };
1551
1552 /*
1553  * The iscsi aggregative context of Tstorm
1554  */
1555 struct tstorm_iscsi_ag_context {
1556 #if defined(__BIG_ENDIAN)
1557         u16 ulp_credit;
1558         u8 agg_vars1;
1559 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
1560 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
1561 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
1562 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
1563 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
1564 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
1565 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
1566 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
1567 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4)
1568 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4
1569 #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6)
1570 #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6
1571 #define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7)
1572 #define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7
1573         u8 state;
1574 #elif defined(__LITTLE_ENDIAN)
1575         u8 state;
1576         u8 agg_vars1;
1577 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
1578 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
1579 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
1580 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
1581 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
1582 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
1583 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
1584 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
1585 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4)
1586 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4
1587 #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6)
1588 #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6
1589 #define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7)
1590 #define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7
1591         u16 ulp_credit;
1592 #endif
1593 #if defined(__BIG_ENDIAN)
1594         u16 __agg_val4;
1595         u16 agg_vars2;
1596 #define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0)
1597 #define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0
1598 #define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1)
1599 #define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1
1600 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2)
1601 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 2
1602 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4)
1603 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 4
1604 #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6)
1605 #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6
1606 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8)
1607 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8
1608 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10)
1609 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10
1610 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11)
1611 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11
1612 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12)
1613 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 12
1614 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13)
1615 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 13
1616 #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14)
1617 #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14
1618 #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15)
1619 #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15
1620 #elif defined(__LITTLE_ENDIAN)
1621         u16 agg_vars2;
1622 #define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0)
1623 #define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0
1624 #define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1)
1625 #define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1
1626 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2)
1627 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 2
1628 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4)
1629 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 4
1630 #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6)
1631 #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6
1632 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8)
1633 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8
1634 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10)
1635 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10
1636 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11)
1637 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11
1638 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12)
1639 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 12
1640 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13)
1641 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 13
1642 #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14)
1643 #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14
1644 #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15)
1645 #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15
1646         u16 __agg_val4;
1647 #endif
1648         struct tstorm_tcp_tcp_ag_context_section tcp;
1649 };
1650
1651 /*
1652  * The iscsi aggregative context of Ustorm
1653  */
1654 struct ustorm_iscsi_ag_context {
1655 #if defined(__BIG_ENDIAN)
1656         u8 __aux_counter_flags;
1657         u8 agg_vars2;
1658 #define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0)
1659 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0
1660 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2)
1661 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2
1662 #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4)
1663 #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4
1664 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7)
1665 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7
1666         u8 agg_vars1;
1667 #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
1668 #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
1669 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
1670 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
1671 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
1672 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
1673 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
1674 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
1675 #define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4)
1676 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4
1677 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6)
1678 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6
1679         u8 state;
1680 #elif defined(__LITTLE_ENDIAN)
1681         u8 state;
1682         u8 agg_vars1;
1683 #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)
1684 #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0
1685 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)
1686 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1
1687 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)
1688 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2
1689 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)
1690 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3
1691 #define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4)
1692 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4
1693 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6)
1694 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6
1695         u8 agg_vars2;
1696 #define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0)
1697 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0
1698 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2)
1699 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2
1700 #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4)
1701 #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4
1702 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7)
1703 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7
1704         u8 __aux_counter_flags;
1705 #endif
1706 #if defined(__BIG_ENDIAN)
1707         u8 cdu_usage;
1708         u8 agg_misc2;
1709         u16 __cq_local_comp_itt_val;
1710 #elif defined(__LITTLE_ENDIAN)
1711         u16 __cq_local_comp_itt_val;
1712         u8 agg_misc2;
1713         u8 cdu_usage;
1714 #endif
1715         u32 agg_misc4;
1716 #if defined(__BIG_ENDIAN)
1717         u8 agg_val3_th;
1718         u8 agg_val3;
1719         u16 agg_misc3;
1720 #elif defined(__LITTLE_ENDIAN)
1721         u16 agg_misc3;
1722         u8 agg_val3;
1723         u8 agg_val3_th;
1724 #endif
1725         u32 agg_val1;
1726         u32 agg_misc4_th;
1727 #if defined(__BIG_ENDIAN)
1728         u16 agg_val2_th;
1729         u16 agg_val2;
1730 #elif defined(__LITTLE_ENDIAN)
1731         u16 agg_val2;
1732         u16 agg_val2_th;
1733 #endif
1734 #if defined(__BIG_ENDIAN)
1735         u16 __reserved2;
1736         u8 decision_rules;
1737 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0)
1738 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0
1739 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3)
1740 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3
1741 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6)
1742 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6
1743 #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7)
1744 #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7
1745         u8 decision_rule_enable_bits;
1746 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0)
1747 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0
1748 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1)
1749 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1
1750 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2)
1751 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2
1752 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3)
1753 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3
1754 #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4)
1755 #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4
1756 #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5)
1757 #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5
1758 #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6)
1759 #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6
1760 #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7)
1761 #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7
1762 #elif defined(__LITTLE_ENDIAN)
1763         u8 decision_rule_enable_bits;
1764 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0)
1765 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0
1766 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1)
1767 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1
1768 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2)
1769 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2
1770 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3)
1771 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3
1772 #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4)
1773 #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4
1774 #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5)
1775 #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5
1776 #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6)
1777 #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6
1778 #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7)
1779 #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7
1780         u8 decision_rules;
1781 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0)
1782 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0
1783 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3)
1784 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3
1785 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6)
1786 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6
1787 #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7)
1788 #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7
1789         u16 __reserved2;
1790 #endif
1791 };
1792
1793 /*
1794  * Ethernet context section, shared in TOE, RDMA and ISCSI
1795  */
1796 struct xstorm_eth_context_section {
1797 #if defined(__BIG_ENDIAN)
1798         u8 remote_addr_4;
1799         u8 remote_addr_5;
1800         u8 local_addr_0;
1801         u8 local_addr_1;
1802 #elif defined(__LITTLE_ENDIAN)
1803         u8 local_addr_1;
1804         u8 local_addr_0;
1805         u8 remote_addr_5;
1806         u8 remote_addr_4;
1807 #endif
1808 #if defined(__BIG_ENDIAN)
1809         u8 remote_addr_0;
1810         u8 remote_addr_1;
1811         u8 remote_addr_2;
1812         u8 remote_addr_3;
1813 #elif defined(__LITTLE_ENDIAN)
1814         u8 remote_addr_3;
1815         u8 remote_addr_2;
1816         u8 remote_addr_1;
1817         u8 remote_addr_0;
1818 #endif
1819 #if defined(__BIG_ENDIAN)
1820         u16 reserved_vlan_type;
1821         u16 params;
1822 #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0)
1823 #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0
1824 #define XSTORM_ETH_CONTEXT_SECTION_CFI (0x1<<12)
1825 #define XSTORM_ETH_CONTEXT_SECTION_CFI_SHIFT 12
1826 #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13)
1827 #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13
1828 #elif defined(__LITTLE_ENDIAN)
1829         u16 params;
1830 #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0)
1831 #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0
1832 #define XSTORM_ETH_CONTEXT_SECTION_CFI (0x1<<12)
1833 #define XSTORM_ETH_CONTEXT_SECTION_CFI_SHIFT 12
1834 #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13)
1835 #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13
1836         u16 reserved_vlan_type;
1837 #endif
1838 #if defined(__BIG_ENDIAN)
1839         u8 local_addr_2;
1840         u8 local_addr_3;
1841         u8 local_addr_4;
1842         u8 local_addr_5;
1843 #elif defined(__LITTLE_ENDIAN)
1844         u8 local_addr_5;
1845         u8 local_addr_4;
1846         u8 local_addr_3;
1847         u8 local_addr_2;
1848 #endif
1849 };
1850
1851 /*
1852  * IpV4 context section, shared in TOE, RDMA and ISCSI
1853  */
1854 struct xstorm_ip_v4_context_section {
1855 #if defined(__BIG_ENDIAN)
1856         u16 __pbf_hdr_cmd_rsvd_id;
1857         u16 __pbf_hdr_cmd_rsvd_flags_offset;
1858 #elif defined(__LITTLE_ENDIAN)
1859         u16 __pbf_hdr_cmd_rsvd_flags_offset;
1860         u16 __pbf_hdr_cmd_rsvd_id;
1861 #endif
1862 #if defined(__BIG_ENDIAN)
1863         u8 __pbf_hdr_cmd_rsvd_ver_ihl;
1864         u8 tos;
1865         u16 __pbf_hdr_cmd_rsvd_length;
1866 #elif defined(__LITTLE_ENDIAN)
1867         u16 __pbf_hdr_cmd_rsvd_length;
1868         u8 tos;
1869         u8 __pbf_hdr_cmd_rsvd_ver_ihl;
1870 #endif
1871         u32 ip_local_addr;
1872 #if defined(__BIG_ENDIAN)
1873         u8 ttl;
1874         u8 __pbf_hdr_cmd_rsvd_protocol;
1875         u16 __pbf_hdr_cmd_rsvd_csum;
1876 #elif defined(__LITTLE_ENDIAN)
1877         u16 __pbf_hdr_cmd_rsvd_csum;
1878         u8 __pbf_hdr_cmd_rsvd_protocol;
1879         u8 ttl;
1880 #endif
1881         u32 __pbf_hdr_cmd_rsvd_1;
1882         u32 ip_remote_addr;
1883 };
1884
1885 /*
1886  * context section, shared in TOE, RDMA and ISCSI
1887  */
1888 struct xstorm_padded_ip_v4_context_section {
1889         struct xstorm_ip_v4_context_section ip_v4;
1890         u32 reserved1[4];
1891 };
1892
1893 /*
1894  * IpV6 context section, shared in TOE, RDMA and ISCSI
1895  */
1896 struct xstorm_ip_v6_context_section {
1897 #if defined(__BIG_ENDIAN)
1898         u16 pbf_hdr_cmd_rsvd_payload_len;
1899         u8 pbf_hdr_cmd_rsvd_nxt_hdr;
1900         u8 hop_limit;
1901 #elif defined(__LITTLE_ENDIAN)
1902         u8 hop_limit;
1903         u8 pbf_hdr_cmd_rsvd_nxt_hdr;
1904         u16 pbf_hdr_cmd_rsvd_payload_len;
1905 #endif
1906         u32 priority_flow_label;
1907 #define XSTORM_IP_V6_CONTEXT_SECTION_FLOW_LABEL (0xFFFFF<<0)
1908 #define XSTORM_IP_V6_CONTEXT_SECTION_FLOW_LABEL_SHIFT 0
1909 #define XSTORM_IP_V6_CONTEXT_SECTION_TRAFFIC_CLASS (0xFF<<20)
1910 #define XSTORM_IP_V6_CONTEXT_SECTION_TRAFFIC_CLASS_SHIFT 20
1911 #define XSTORM_IP_V6_CONTEXT_SECTION_PBF_HDR_CMD_RSVD_VER (0xF<<28)
1912 #define XSTORM_IP_V6_CONTEXT_SECTION_PBF_HDR_CMD_RSVD_VER_SHIFT 28
1913         u32 ip_local_addr_lo_hi;
1914         u32 ip_local_addr_lo_lo;
1915         u32 ip_local_addr_hi_hi;
1916         u32 ip_local_addr_hi_lo;
1917         u32 ip_remote_addr_lo_hi;
1918         u32 ip_remote_addr_lo_lo;
1919         u32 ip_remote_addr_hi_hi;
1920         u32 ip_remote_addr_hi_lo;
1921 };
1922
1923 union xstorm_ip_context_section_types {
1924         struct xstorm_padded_ip_v4_context_section padded_ip_v4;
1925         struct xstorm_ip_v6_context_section ip_v6;
1926 };
1927
1928 /*
1929  * TCP context section, shared in TOE, RDMA and ISCSI
1930  */
1931 struct xstorm_tcp_context_section {
1932         u32 snd_max;
1933 #if defined(__BIG_ENDIAN)
1934         u16 remote_port;
1935         u16 local_port;
1936 #elif defined(__LITTLE_ENDIAN)
1937         u16 local_port;
1938         u16 remote_port;
1939 #endif
1940 #if defined(__BIG_ENDIAN)
1941         u8 original_nagle_1b;
1942         u8 ts_enabled;
1943         u16 tcp_params;
1944 #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE (0xFF<<0)
1945 #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE_SHIFT 0
1946 #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT (0x1<<8)
1947 #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT_SHIFT 8
1948 #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED (0x1<<9)
1949 #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED_SHIFT 9
1950 #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED (0x1<<10)
1951 #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED_SHIFT 10
1952 #define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV (0x1<<11)
1953 #define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV_SHIFT 11
1954 #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<12)
1955 #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 12
1956 #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED (0x1<<13)
1957 #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED_SHIFT 13
1958 #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER (0x3<<14)
1959 #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER_SHIFT 14
1960 #elif defined(__LITTLE_ENDIAN)
1961         u16 tcp_params;
1962 #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE (0xFF<<0)
1963 #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE_SHIFT 0
1964 #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT (0x1<<8)
1965 #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT_SHIFT 8
1966 #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED (0x1<<9)
1967 #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED_SHIFT 9
1968 #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED (0x1<<10)
1969 #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED_SHIFT 10
1970 #define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV (0x1<<11)
1971 #define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV_SHIFT 11
1972 #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<12)
1973 #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 12
1974 #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED (0x1<<13)
1975 #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED_SHIFT 13
1976 #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER (0x3<<14)
1977 #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER_SHIFT 14
1978         u8 ts_enabled;
1979         u8 original_nagle_1b;
1980 #endif
1981 #if defined(__BIG_ENDIAN)
1982         u16 pseudo_csum;
1983         u16 window_scaling_factor;
1984 #elif defined(__LITTLE_ENDIAN)
1985         u16 window_scaling_factor;
1986         u16 pseudo_csum;
1987 #endif
1988         u32 reserved2;
1989         u32 ts_time_diff;
1990         u32 __next_timer_expir;
1991 };
1992
1993 /*
1994  * Common context section, shared in TOE, RDMA and ISCSI
1995  */
1996 struct xstorm_common_context_section {
1997         struct xstorm_eth_context_section ethernet;
1998         union xstorm_ip_context_section_types ip_union;
1999         struct xstorm_tcp_context_section tcp;
2000 #if defined(__BIG_ENDIAN)
2001         u16 reserved;
2002         u8 statistics_params;
2003 #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0)
2004 #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 0
2005 #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1)
2006 #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 1
2007 #define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID (0x1F<<2)
2008 #define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID_SHIFT 2
2009 #define XSTORM_COMMON_CONTEXT_SECTION_DCB_EXISTS (0x1<<7)
2010 #define XSTORM_COMMON_CONTEXT_SECTION_DCB_EXISTS_SHIFT 7
2011         u8 ip_version_1b;
2012 #elif defined(__LITTLE_ENDIAN)
2013         u8 ip_version_1b;
2014         u8 statistics_params;
2015 #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0)
2016 #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 0
2017 #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1)
2018 #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 1
2019 #define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID (0x1F<<2)
2020 #define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID_SHIFT 2
2021 #define XSTORM_COMMON_CONTEXT_SECTION_DCB_EXISTS (0x1<<7)
2022 #define XSTORM_COMMON_CONTEXT_SECTION_DCB_EXISTS_SHIFT 7
2023         u16 reserved;
2024 #endif
2025 };
2026
2027 /*
2028  * Flags used in ISCSI context section
2029  */
2030 struct xstorm_iscsi_context_flags {
2031         u8 flags;
2032 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA (0x1<<0)
2033 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA_SHIFT 0
2034 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T (0x1<<1)
2035 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T_SHIFT 1
2036 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_HEADER_DIGEST (0x1<<2)
2037 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_HEADER_DIGEST_SHIFT 2
2038 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_DATA_DIGEST (0x1<<3)
2039 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_DATA_DIGEST_SHIFT 3
2040 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_HQ_BD_WRITTEN (0x1<<4)
2041 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_HQ_BD_WRITTEN_SHIFT 4
2042 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_LAST_OP_SQ (0x1<<5)
2043 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_LAST_OP_SQ_SHIFT 5
2044 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_UPDATE_SND_NXT (0x1<<6)
2045 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_UPDATE_SND_NXT_SHIFT 6
2046 #define XSTORM_ISCSI_CONTEXT_FLAGS_RESERVED4 (0x1<<7)
2047 #define XSTORM_ISCSI_CONTEXT_FLAGS_RESERVED4_SHIFT 7
2048 };
2049
2050 struct iscsi_task_context_entry_x {
2051         u32 data_out_buffer_offset;
2052         u32 itt;
2053         u32 data_sn;
2054 };
2055
2056 struct iscsi_task_context_entry_xuc_x_write_only {
2057         u32 tx_r2t_sn;
2058 };
2059
2060 struct iscsi_task_context_entry_xuc_xu_write_both {
2061         u32 sgl_base_lo;
2062         u32 sgl_base_hi;
2063 #if defined(__BIG_ENDIAN)
2064         u8 sgl_size;
2065         u8 sge_index;
2066         u16 sge_offset;
2067 #elif defined(__LITTLE_ENDIAN)
2068         u16 sge_offset;
2069         u8 sge_index;
2070         u8 sgl_size;
2071 #endif
2072 };
2073
2074 /*
2075  * iSCSI context section
2076  */
2077 struct xstorm_iscsi_context_section {
2078         u32 first_burst_length;
2079         u32 max_send_pdu_length;
2080         struct regpair sq_pbl_base;
2081         struct regpair sq_curr_pbe;
2082         struct regpair hq_pbl_base;
2083         struct regpair hq_curr_pbe_base;
2084         struct regpair r2tq_pbl_base;
2085         struct regpair r2tq_curr_pbe_base;
2086         struct regpair task_pbl_base;
2087 #if defined(__BIG_ENDIAN)
2088         u16 data_out_count;
2089         struct xstorm_iscsi_context_flags flags;
2090         u8 task_pbl_cache_idx;
2091 #elif defined(__LITTLE_ENDIAN)
2092         u8 task_pbl_cache_idx;
2093         struct xstorm_iscsi_context_flags flags;
2094         u16 data_out_count;
2095 #endif
2096         u32 seq_more_2_send;
2097         u32 pdu_more_2_send;
2098         struct iscsi_task_context_entry_x temp_tce_x;
2099         struct iscsi_task_context_entry_xuc_x_write_only temp_tce_x_wr;
2100         struct iscsi_task_context_entry_xuc_xu_write_both temp_tce_xu_wr;
2101         struct regpair lun;
2102         u32 exp_data_transfer_len_ttt;
2103         u32 pdu_data_2_rxmit;
2104         u32 rxmit_bytes_2_dr;
2105 #if defined(__BIG_ENDIAN)
2106         u16 rxmit_sge_offset;
2107         u16 hq_rxmit_cons;
2108 #elif defined(__LITTLE_ENDIAN)
2109         u16 hq_rxmit_cons;
2110         u16 rxmit_sge_offset;
2111 #endif
2112 #if defined(__BIG_ENDIAN)
2113         u16 r2tq_cons;
2114         u8 rxmit_flags;
2115 #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD (0x1<<0)
2116 #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD_SHIFT 0
2117 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR (0x1<<1)
2118 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR_SHIFT 1
2119 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU (0x1<<2)
2120 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU_SHIFT 2
2121 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR (0x1<<3)
2122 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR_SHIFT 3
2123 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR (0x1<<4)
2124 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR_SHIFT 4
2125 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING (0x3<<5)
2126 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING_SHIFT 5
2127 #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT (0x1<<7)
2128 #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT_SHIFT 7
2129         u8 rxmit_sge_idx;
2130 #elif defined(__LITTLE_ENDIAN)
2131         u8 rxmit_sge_idx;
2132         u8 rxmit_flags;
2133 #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD (0x1<<0)
2134 #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD_SHIFT 0
2135 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR (0x1<<1)
2136 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR_SHIFT 1
2137 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU (0x1<<2)
2138 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU_SHIFT 2
2139 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR (0x1<<3)
2140 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR_SHIFT 3
2141 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR (0x1<<4)
2142 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR_SHIFT 4
2143 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING (0x3<<5)
2144 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING_SHIFT 5
2145 #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT (0x1<<7)
2146 #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT_SHIFT 7
2147         u16 r2tq_cons;
2148 #endif
2149         u32 hq_rxmit_tcp_seq;
2150 };
2151
2152 /*
2153  * Xstorm iSCSI Storm Context
2154  */
2155 struct xstorm_iscsi_st_context {
2156         struct xstorm_common_context_section common;
2157         struct xstorm_iscsi_context_section iscsi;
2158 };
2159
2160 /*
2161  * CQ DB CQ producer and pending completion counter
2162  */
2163 struct iscsi_cq_db_prod_pnd_cmpltn_cnt {
2164 #if defined(__BIG_ENDIAN)
2165         u16 cntr;
2166         u16 prod;
2167 #elif defined(__LITTLE_ENDIAN)
2168         u16 prod;
2169         u16 cntr;
2170 #endif
2171 };
2172
2173 /*
2174  * CQ DB pending completion ITT array
2175  */
2176 struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr {
2177         struct iscsi_cq_db_prod_pnd_cmpltn_cnt prod_pend_comp[8];
2178 };
2179
2180 /*
2181  * Cstorm CQ sequence to notify array, updated by driver
2182  */
2183 struct iscsi_cq_db_sqn_2_notify_arr {
2184         u16 sqn[8];
2185 };
2186
2187 /*
2188  * Cstorm iSCSI Storm Context
2189  */
2190 struct cstorm_iscsi_st_context {
2191         struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr cq_c_prod_pend_comp_ctr_arr;
2192         struct iscsi_cq_db_sqn_2_notify_arr cq_c_prod_sqn_arr;
2193         struct iscsi_cq_db_sqn_2_notify_arr cq_c_sqn_2_notify_arr;
2194         struct regpair hq_pbl_base;
2195         struct regpair hq_curr_pbe;
2196         struct regpair task_pbl_base;
2197         struct regpair cq_db_base;
2198 #if defined(__BIG_ENDIAN)
2199         u16 hq_bd_itt;
2200         u16 iscsi_conn_id;
2201 #elif defined(__LITTLE_ENDIAN)
2202         u16 iscsi_conn_id;
2203         u16 hq_bd_itt;
2204 #endif
2205         u32 hq_bd_data_segment_len;
2206         u32 hq_bd_buffer_offset;
2207 #if defined(__BIG_ENDIAN)
2208         u8 timer_entry_idx;
2209         u8 cq_proc_en_bit_map;
2210         u8 cq_pend_comp_itt_valid_bit_map;
2211         u8 hq_bd_opcode;
2212 #elif defined(__LITTLE_ENDIAN)
2213         u8 hq_bd_opcode;
2214         u8 cq_pend_comp_itt_valid_bit_map;
2215         u8 cq_proc_en_bit_map;
2216         u8 timer_entry_idx;
2217 #endif
2218         u32 hq_tcp_seq;
2219 #if defined(__BIG_ENDIAN)
2220         u16 flags;
2221 #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0)
2222 #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 0
2223 #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1)
2224 #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 1
2225 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2)
2226 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 2
2227 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3)
2228 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 3
2229 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4)
2230 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 4
2231 #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5)
2232 #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 5
2233         u16 hq_cons;
2234 #elif defined(__LITTLE_ENDIAN)
2235         u16 hq_cons;
2236         u16 flags;
2237 #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0)
2238 #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 0
2239 #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1)
2240 #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 1
2241 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2)
2242 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 2
2243 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3)
2244 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 3
2245 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4)
2246 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 4
2247 #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5)
2248 #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 5
2249 #endif
2250         struct regpair rsrv1;
2251 };
2252
2253 /*
2254  * Iscsi connection context
2255  */
2256 struct iscsi_context {
2257         struct ustorm_iscsi_st_context ustorm_st_context;
2258         struct tstorm_iscsi_st_context tstorm_st_context;
2259         struct xstorm_iscsi_ag_context xstorm_ag_context;
2260         struct tstorm_iscsi_ag_context tstorm_ag_context;
2261         struct cstorm_iscsi_ag_context cstorm_ag_context;
2262         struct ustorm_iscsi_ag_context ustorm_ag_context;
2263         struct timers_block_context timers_context;
2264         struct regpair upb_context;
2265         struct xstorm_iscsi_st_context xstorm_st_context;
2266         struct regpair xpb_context;
2267         struct cstorm_iscsi_st_context cstorm_st_context;
2268 };
2269
2270 /*
2271  * Buffer per connection, used in Tstorm
2272  */
2273 struct iscsi_conn_buf {
2274         struct regpair reserved[8];
2275 };
2276
2277 /*
2278  * ipv6 structure
2279  */
2280 struct ip_v6_addr {
2281         u32 ip_addr_lo_lo;
2282         u32 ip_addr_lo_hi;
2283         u32 ip_addr_hi_lo;
2284         u32 ip_addr_hi_hi;
2285 };
2286
2287 /*
2288  * l5cm- connection identification params
2289  */
2290 struct l5cm_conn_addr_params {
2291         u32 pmtu;
2292 #if defined(__BIG_ENDIAN)
2293         u8 remote_addr_3;
2294         u8 remote_addr_2;
2295         u8 remote_addr_1;
2296         u8 remote_addr_0;
2297 #elif defined(__LITTLE_ENDIAN)
2298         u8 remote_addr_0;
2299         u8 remote_addr_1;
2300         u8 remote_addr_2;
2301         u8 remote_addr_3;
2302 #endif
2303 #if defined(__BIG_ENDIAN)
2304         u16 params;
2305 #define L5CM_CONN_ADDR_PARAMS_IP_VERSION (0x1<<0)
2306 #define L5CM_CONN_ADDR_PARAMS_IP_VERSION_SHIFT 0
2307 #define L5CM_CONN_ADDR_PARAMS_RSRV (0x7FFF<<1)
2308 #define L5CM_CONN_ADDR_PARAMS_RSRV_SHIFT 1
2309         u8 remote_addr_5;
2310         u8 remote_addr_4;
2311 #elif defined(__LITTLE_ENDIAN)
2312         u8 remote_addr_4;
2313         u8 remote_addr_5;
2314         u16 params;
2315 #define L5CM_CONN_ADDR_PARAMS_IP_VERSION (0x1<<0)
2316 #define L5CM_CONN_ADDR_PARAMS_IP_VERSION_SHIFT 0
2317 #define L5CM_CONN_ADDR_PARAMS_RSRV (0x7FFF<<1)
2318 #define L5CM_CONN_ADDR_PARAMS_RSRV_SHIFT 1
2319 #endif
2320         struct ip_v6_addr local_ip_addr;
2321         struct ip_v6_addr remote_ip_addr;
2322         u32 ipv6_flow_label_20b;
2323         u32 reserved1;
2324 #if defined(__BIG_ENDIAN)
2325         u16 remote_tcp_port;
2326         u16 local_tcp_port;
2327 #elif defined(__LITTLE_ENDIAN)
2328         u16 local_tcp_port;
2329         u16 remote_tcp_port;
2330 #endif
2331 };
2332
2333 /*
2334  * l5cm-xstorm connection buffer
2335  */
2336 struct l5cm_xstorm_conn_buffer {
2337 #if defined(__BIG_ENDIAN)
2338         u16 rsrv1;
2339         u16 params;
2340 #define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE (0x1<<0)
2341 #define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE_SHIFT 0
2342 #define L5CM_XSTORM_CONN_BUFFER_RSRV (0x7FFF<<1)
2343 #define L5CM_XSTORM_CONN_BUFFER_RSRV_SHIFT 1
2344 #elif defined(__LITTLE_ENDIAN)
2345         u16 params;
2346 #define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE (0x1<<0)
2347 #define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE_SHIFT 0
2348 #define L5CM_XSTORM_CONN_BUFFER_RSRV (0x7FFF<<1)
2349 #define L5CM_XSTORM_CONN_BUFFER_RSRV_SHIFT 1
2350         u16 rsrv1;
2351 #endif
2352 #if defined(__BIG_ENDIAN)
2353         u16 mss;
2354         u16 pseudo_header_checksum;
2355 #elif defined(__LITTLE_ENDIAN)
2356         u16 pseudo_header_checksum;
2357         u16 mss;
2358 #endif
2359         u32 rcv_buf;
2360         u32 rsrv2;
2361         struct regpair context_addr;
2362 };
2363
2364 /*
2365  * l5cm-tstorm connection buffer
2366  */
2367 struct l5cm_tstorm_conn_buffer {
2368         u32 snd_buf;
2369         u32 rcv_buf;
2370 #if defined(__BIG_ENDIAN)
2371         u16 params;
2372 #define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE (0x1<<0)
2373 #define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE_SHIFT 0
2374 #define L5CM_TSTORM_CONN_BUFFER_RSRV (0x7FFF<<1)
2375 #define L5CM_TSTORM_CONN_BUFFER_RSRV_SHIFT 1
2376         u8 ka_max_probe_count;
2377         u8 ka_enable;
2378 #elif defined(__LITTLE_ENDIAN)
2379         u8 ka_enable;
2380         u8 ka_max_probe_count;
2381         u16 params;
2382 #define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE (0x1<<0)
2383 #define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE_SHIFT 0
2384 #define L5CM_TSTORM_CONN_BUFFER_RSRV (0x7FFF<<1)
2385 #define L5CM_TSTORM_CONN_BUFFER_RSRV_SHIFT 1
2386 #endif
2387         u32 ka_timeout;
2388         u32 ka_interval;
2389         u32 max_rt_time;
2390 };
2391
2392 /*
2393  * l5cm connection buffer for active side
2394  */
2395 struct l5cm_active_conn_buffer {
2396         struct l5cm_conn_addr_params conn_addr_buf;
2397         struct l5cm_xstorm_conn_buffer xstorm_conn_buffer;
2398         struct l5cm_tstorm_conn_buffer tstorm_conn_buffer;
2399 };
2400
2401 /*
2402  * l5cm slow path element
2403  */
2404 struct l5cm_packet_size {
2405         u32 size;
2406         u32 rsrv;
2407 };
2408
2409 /*
2410  * l5cm connection parameters
2411  */
2412 union l5cm_reduce_param_union {
2413         u32 opaque1;
2414         u32 opaque2;
2415 };
2416
2417 /*
2418  * l5cm connection parameters
2419  */
2420 struct l5cm_reduce_conn {
2421         union l5cm_reduce_param_union opaque1;
2422         u32 opaque2;
2423 };
2424
2425 /*
2426  * l5cm slow path element
2427  */
2428 union l5cm_specific_data {
2429         u8 protocol_data[8];
2430         struct regpair phy_address;
2431         struct l5cm_packet_size packet_size;
2432         struct l5cm_reduce_conn reduced_conn;
2433 };
2434
2435 /*
2436  * l5 slow path element
2437  */
2438 struct l5cm_spe {
2439         struct spe_hdr hdr;
2440         union l5cm_specific_data data;
2441 };
2442
2443 /*
2444  * Tstorm Tcp flags
2445  */
2446 struct tstorm_l5cm_tcp_flags {
2447         u16 flags;
2448 #define TSTORM_L5CM_TCP_FLAGS_VLAN_ID (0xFFF<<0)
2449 #define TSTORM_L5CM_TCP_FLAGS_VLAN_ID_SHIFT 0
2450 #define TSTORM_L5CM_TCP_FLAGS_RSRV0 (0x1<<12)
2451 #define TSTORM_L5CM_TCP_FLAGS_RSRV0_SHIFT 12
2452 #define TSTORM_L5CM_TCP_FLAGS_TS_ENABLED (0x1<<13)
2453 #define TSTORM_L5CM_TCP_FLAGS_TS_ENABLED_SHIFT 13
2454 #define TSTORM_L5CM_TCP_FLAGS_RSRV1 (0x3<<14)
2455 #define TSTORM_L5CM_TCP_FLAGS_RSRV1_SHIFT 14
2456 };
2457
2458 /*
2459  * Xstorm Tcp flags
2460  */
2461 struct xstorm_l5cm_tcp_flags {
2462         u8 flags;
2463 #define XSTORM_L5CM_TCP_FLAGS_ENC_ENABLED (0x1<<0)
2464 #define XSTORM_L5CM_TCP_FLAGS_ENC_ENABLED_SHIFT 0
2465 #define XSTORM_L5CM_TCP_FLAGS_TS_ENABLED (0x1<<1)
2466 #define XSTORM_L5CM_TCP_FLAGS_TS_ENABLED_SHIFT 1
2467 #define XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN (0x1<<2)
2468 #define XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN_SHIFT 2
2469 #define XSTORM_L5CM_TCP_FLAGS_RSRV (0x1F<<3)
2470 #define XSTORM_L5CM_TCP_FLAGS_RSRV_SHIFT 3
2471 };
2472
2473 #endif /* CNIC_DEFS_H */