drivers/net/cxgb3/firmware_exports.h

   1 /*
   2  * ----------------------------------------------------------------------------
   3  * >>>>>>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<<<<<
   4  * ----------------------------------------------------------------------------
   5  * Copyright 2004 (C) Chelsio Communications, Inc. (Chelsio)
   6  *
   7  * Chelsio Communications, Inc. owns the sole copyright to this software.
   8  * You may not make a copy, you may not derive works herefrom, and you may
   9  * not distribute this work to others. Other restrictions of rights may apply
  10  * as well. This is unpublished, confidential information. All rights reserved.
  11  * This software contains confidential information and trade secrets of Chelsio
  12  * Communications, Inc. Use, disclosure, or reproduction is prohibited without
  13  * the prior express written permission of Chelsio Communications, Inc.
  14  * ----------------------------------------------------------------------------
  15  * >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> Warranty <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
  16  * ----------------------------------------------------------------------------
  17  * CHELSIO MAKES NO WARRANTY OF ANY KIND WITH REGARD TO THE USE OF THIS
  18  * SOFTWARE, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
  20  * ----------------------------------------------------------------------------
  21  *
  22  * This is the firmware_exports.h header file, firmware interface defines.
  23  *
  24  * Written January 2005 by felix marti (felix@chelsio.com)
  25  */
  26 #ifndef _FIRMWARE_EXPORTS_H_
  27 #define _FIRMWARE_EXPORTS_H_
  28
  29 /* WR OPCODES supported by the firmware.
  30  */
  31 #define FW_WROPCODE_FORWARD                     0x01
  32 #define FW_WROPCODE_BYPASS                      0x05
  33
  34 #define FW_WROPCODE_TUNNEL_TX_PKT               0x03
  35
  36 #define FW_WROPOCDE_ULPTX_DATA_SGL              0x00
  37 #define FW_WROPCODE_ULPTX_MEM_READ              0x02
  38 #define FW_WROPCODE_ULPTX_PKT                   0x04
  39 #define FW_WROPCODE_ULPTX_INVALIDATE            0x06
  40
  41 #define FW_WROPCODE_TUNNEL_RX_PKT               0x07
  42
  43 #define FW_WROPCODE_OFLD_GETTCB_RPL             0x08
  44 #define FW_WROPCODE_OFLD_CLOSE_CON              0x09
  45 #define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ       0x0A
  46 #define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL     0x0F
  47 #define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ     0x0B
  48 #define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL       0x0C
  49 #define FW_WROPCODE_OFLD_TX_DATA                0x0D
  50 #define FW_WROPCODE_OFLD_TX_DATA_ACK            0x0E
  51
  52 #define FW_WROPCODE_RI_RDMA_INIT                0x10
  53 #define FW_WROPCODE_RI_RDMA_WRITE               0x11
  54 #define FW_WROPCODE_RI_RDMA_READ_REQ            0x12
  55 #define FW_WROPCODE_RI_RDMA_READ_RESP           0x13
  56 #define FW_WROPCODE_RI_SEND                     0x14
  57 #define FW_WROPCODE_RI_TERMINATE                0x15
  58 #define FW_WROPCODE_RI_RDMA_READ                0x16
  59 #define FW_WROPCODE_RI_RECEIVE                  0x17
  60 #define FW_WROPCODE_RI_BIND_MW                  0x18
  61 #define FW_WROPCODE_RI_FASTREGISTER_MR          0x19
  62 #define FW_WROPCODE_RI_LOCAL_INV                0x1A
  63 #define FW_WROPCODE_RI_MODIFY_QP                0x1B
  64 #define FW_WROPCODE_RI_BYPASS                   0x1C
  65
  66 #define FW_WROPOCDE_RSVD                        0x1E
  67
  68 #define FW_WROPCODE_SGE_EGRESSCONTEXT_RR        0x1F
  69
  70 #define FW_WROPCODE_MNGT                        0x1D
  71 #define FW_MNGTOPCODE_PKTSCHED_SET              0x00
  72
  73 /* Maximum size of a WR sent from the host, limited by the SGE.
  74  *
  75  * Note: WR coming from ULP or TP are only limited by CIM.
  76  */
  77 #define FW_WR_SIZE                      128
  78
  79 /* Maximum number of outstanding WRs sent from the host. Value must be
  80  * programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by
  81  * offload modules to limit the number of WRs per connection.
  82  */
  83 #define FW_T3_WR_NUM                    16
  84 #define FW_N3_WR_NUM                    7
  85
  86 #ifndef N3
  87 # define FW_WR_NUM                      FW_T3_WR_NUM
  88 #else
  89 # define FW_WR_NUM                      FW_N3_WR_NUM
  90 #endif
  91
  92 /* FW_TUNNEL_NUM corresponds to the number of supported TUNNEL Queues. These
  93  * queues must start at SGE Egress Context FW_TUNNEL_SGEEC_START and must
  94  * start at 'TID' (or 'uP Token') FW_TUNNEL_TID_START.
  95  *
  96  * Ingress Traffic (e.g. DMA completion credit)  for TUNNEL Queue[i] is sent
  97  * to RESP Queue[i].
  98  */
  99 #define FW_TUNNEL_NUM                   8
 100 #define FW_TUNNEL_SGEEC_START           8
 101 #define FW_TUNNEL_TID_START             65544
 102
 103 /* FW_CTRL_NUM corresponds to the number of supported CTRL Queues. These queues
 104  * must start at SGE Egress Context FW_CTRL_SGEEC_START and must start at 'TID'
 105  * (or 'uP Token') FW_CTRL_TID_START.
 106  *
 107  * Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i].
 108  */
 109 #define FW_CTRL_NUM                     8
 110 #define FW_CTRL_SGEEC_START             65528
 111 #define FW_CTRL_TID_START               65536
 112
 113 /* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These
 114  * queues must start at SGE Egress Context FW_OFLD_SGEEC_START.
 115  *
 116  * Note: the 'uP Token' in the SGE Egress Context fields is irrelevant for
 117  * OFFLOAD Queues, as the host is responsible for providing the correct TID in
 118  * every WR.
 119  *
 120  * Ingress Trafffic for OFFLOAD Queue[i] is sent to RESP Queue[i].
 121  */
 122 #define FW_OFLD_NUM                     8
 123 #define FW_OFLD_SGEEC_START             0
 124
 125 /*
 126  *
 127  */
 128 #define FW_RI_NUM                       1
 129 #define FW_RI_SGEEC_START               65527
 130 #define FW_RI_TID_START                 65552
 131
 132 /*
 133  * The RX_PKT_TID
 134  */
 135 #define FW_RX_PKT_NUM                   1
 136 #define FW_RX_PKT_TID_START             65553
 137
 138 /* FW_WRC_NUM corresponds to the number of Work Request Context that supported
 139  * by the firmware.
 140  */
 141 #define FW_WRC_NUM                      \
 142     (65536 + FW_TUNNEL_NUM + FW_CTRL_NUM + FW_RI_NUM + FW_RX_PKT_NUM)
 143
 144 /*
 145  * FW type and version.
 146  */
 147 #define S_FW_VERSION_TYPE               28
 148 #define M_FW_VERSION_TYPE               0xF
 149 #define V_FW_VERSION_TYPE(x)            ((x) << S_FW_VERSION_TYPE)
 150 #define G_FW_VERSION_TYPE(x)            \
 151     (((x) >> S_FW_VERSION_TYPE) & M_FW_VERSION_TYPE)
 152
 153 #define S_FW_VERSION_MAJOR              16
 154 #define M_FW_VERSION_MAJOR              0xFFF
 155 #define V_FW_VERSION_MAJOR(x)           ((x) << S_FW_VERSION_MAJOR)
 156 #define G_FW_VERSION_MAJOR(x)           \
 157     (((x) >> S_FW_VERSION_MAJOR) & M_FW_VERSION_MAJOR)
 158
 159 #define S_FW_VERSION_MINOR              8
 160 #define M_FW_VERSION_MINOR              0xFF
 161 #define V_FW_VERSION_MINOR(x)           ((x) << S_FW_VERSION_MINOR)
 162 #define G_FW_VERSION_MINOR(x)           \
 163     (((x) >> S_FW_VERSION_MINOR) & M_FW_VERSION_MINOR)
 164
 165 #define S_FW_VERSION_MICRO              0
 166 #define M_FW_VERSION_MICRO              0xFF
 167 #define V_FW_VERSION_MICRO(x)           ((x) << S_FW_VERSION_MICRO)
 168 #define G_FW_VERSION_MICRO(x)           \
 169     (((x) >> S_FW_VERSION_MICRO) & M_FW_VERSION_MICRO)
 170
 171 #endif                          /* _FIRMWARE_EXPORTS_H_ */