drivers/net/cxgb3/vsc8211.c

   1 /*
   2  * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #include "common.h"
  33
  34 /* VSC8211 PHY specific registers. */
  35 enum {
  36         VSC8211_SIGDET_CTRL = 19,
  37         VSC8211_EXT_CTRL = 23,
  38         VSC8211_INTR_ENABLE = 25,
  39         VSC8211_INTR_STATUS = 26,
  40         VSC8211_LED_CTRL = 27,
  41         VSC8211_AUX_CTRL_STAT = 28,
  42         VSC8211_EXT_PAGE_AXS = 31,
  43 };
  44
  45 enum {
  46         VSC_INTR_RX_ERR = 1 << 0,
  47         VSC_INTR_MS_ERR = 1 << 1,  /* master/slave resolution error */
  48         VSC_INTR_CABLE = 1 << 2,  /* cable impairment */
  49         VSC_INTR_FALSE_CARR = 1 << 3,  /* false carrier */
  50         VSC_INTR_MEDIA_CHG = 1 << 4,  /* AMS media change */
  51         VSC_INTR_RX_FIFO = 1 << 5,  /* Rx FIFO over/underflow */
  52         VSC_INTR_TX_FIFO = 1 << 6,  /* Tx FIFO over/underflow */
  53         VSC_INTR_DESCRAMBL = 1 << 7,  /* descrambler lock-lost */
  54         VSC_INTR_SYMBOL_ERR = 1 << 8,  /* symbol error */
  55         VSC_INTR_NEG_DONE = 1 << 10, /* autoneg done */
  56         VSC_INTR_NEG_ERR = 1 << 11, /* autoneg error */
  57         VSC_INTR_DPLX_CHG = 1 << 12, /* duplex change */
  58         VSC_INTR_LINK_CHG = 1 << 13, /* link change */
  59         VSC_INTR_SPD_CHG = 1 << 14, /* speed change */
  60         VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */
  61 };
  62
  63 enum {
  64         VSC_CTRL_CLAUSE37_VIEW = 1 << 4,   /* Switch to Clause 37 view */
  65         VSC_CTRL_MEDIA_MODE_HI = 0xf000    /* High part of media mode select */
  66 };
  67
  68 #define CFG_CHG_INTR_MASK (VSC_INTR_LINK_CHG | VSC_INTR_NEG_ERR | \
  69                            VSC_INTR_DPLX_CHG | VSC_INTR_SPD_CHG | \
  70                            VSC_INTR_NEG_DONE)
  71 #define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \
  72                    VSC_INTR_ENABLE)
  73
  74 /* PHY specific auxiliary control & status register fields */
  75 #define S_ACSR_ACTIPHY_TMR    0
  76 #define M_ACSR_ACTIPHY_TMR    0x3
  77 #define V_ACSR_ACTIPHY_TMR(x) ((x) << S_ACSR_ACTIPHY_TMR)
  78
  79 #define S_ACSR_SPEED    3
  80 #define M_ACSR_SPEED    0x3
  81 #define G_ACSR_SPEED(x) (((x) >> S_ACSR_SPEED) & M_ACSR_SPEED)
  82
  83 #define S_ACSR_DUPLEX 5
  84 #define F_ACSR_DUPLEX (1 << S_ACSR_DUPLEX)
  85
  86 #define S_ACSR_ACTIPHY 6
  87 #define F_ACSR_ACTIPHY (1 << S_ACSR_ACTIPHY)
  88
  89 /*
  90  * Reset the PHY.  This PHY completes reset immediately so we never wait.
  91  */
  92 static int vsc8211_reset(struct cphy *cphy, int wait)
  93 {
  94         return t3_phy_reset(cphy, 0, 0);
  95 }
  96
  97 static int vsc8211_intr_enable(struct cphy *cphy)
  98 {
  99         return mdio_write(cphy, 0, VSC8211_INTR_ENABLE, INTR_MASK);
 100 }
 101
 102 static int vsc8211_intr_disable(struct cphy *cphy)
 103 {
 104         return mdio_write(cphy, 0, VSC8211_INTR_ENABLE, 0);
 105 }
 106
 107 static int vsc8211_intr_clear(struct cphy *cphy)
 108 {
 109         u32 val;
 110
 111         /* Clear PHY interrupts by reading the register. */
 112         return mdio_read(cphy, 0, VSC8211_INTR_STATUS, &val);
 113 }
 114
 115 static int vsc8211_autoneg_enable(struct cphy *cphy)
 116 {
 117         return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE,
 118                                    BMCR_ANENABLE | BMCR_ANRESTART);
 119 }
 120
 121 static int vsc8211_autoneg_restart(struct cphy *cphy)
 122 {
 123         return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE,
 124                                    BMCR_ANRESTART);
 125 }
 126
 127 static int vsc8211_get_link_status(struct cphy *cphy, int *link_ok,
 128                                    int *speed, int *duplex, int *fc)
 129 {
 130         unsigned int bmcr, status, lpa, adv;
 131         int err, sp = -1, dplx = -1, pause = 0;
 132
 133         err = mdio_read(cphy, 0, MII_BMCR, &bmcr);
 134         if (!err)
 135                 err = mdio_read(cphy, 0, MII_BMSR, &status);
 136         if (err)
 137                 return err;
 138
 139         if (link_ok) {
 140                 /*
 141                  * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it
 142                  * once more to get the current link state.
 143                  */
 144                 if (!(status & BMSR_LSTATUS))
 145                         err = mdio_read(cphy, 0, MII_BMSR, &status);
 146                 if (err)
 147                         return err;
 148                 *link_ok = (status & BMSR_LSTATUS) != 0;
 149         }
 150         if (!(bmcr & BMCR_ANENABLE)) {
 151                 dplx = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
 152                 if (bmcr & BMCR_SPEED1000)
 153                         sp = SPEED_1000;
 154                 else if (bmcr & BMCR_SPEED100)
 155                         sp = SPEED_100;
 156                 else
 157                         sp = SPEED_10;
 158         } else if (status & BMSR_ANEGCOMPLETE) {
 159                 err = mdio_read(cphy, 0, VSC8211_AUX_CTRL_STAT, &status);
 160                 if (err)
 161                         return err;
 162
 163                 dplx = (status & F_ACSR_DUPLEX) ? DUPLEX_FULL : DUPLEX_HALF;
 164                 sp = G_ACSR_SPEED(status);
 165                 if (sp == 0)
 166                         sp = SPEED_10;
 167                 else if (sp == 1)
 168                         sp = SPEED_100;
 169                 else
 170                         sp = SPEED_1000;
 171
 172                 if (fc && dplx == DUPLEX_FULL) {
 173                         err = mdio_read(cphy, 0, MII_LPA, &lpa);
 174                         if (!err)
 175                                 err = mdio_read(cphy, 0, MII_ADVERTISE, &adv);
 176                         if (err)
 177                                 return err;
 178
 179                         if (lpa & adv & ADVERTISE_PAUSE_CAP)
 180                                 pause = PAUSE_RX | PAUSE_TX;
 181                         else if ((lpa & ADVERTISE_PAUSE_CAP) &&
 182                                  (lpa & ADVERTISE_PAUSE_ASYM) &&
 183                                  (adv & ADVERTISE_PAUSE_ASYM))
 184                                 pause = PAUSE_TX;
 185                         else if ((lpa & ADVERTISE_PAUSE_ASYM) &&
 186                                  (adv & ADVERTISE_PAUSE_CAP))
 187                                 pause = PAUSE_RX;
 188                 }
 189         }
 190         if (speed)
 191                 *speed = sp;
 192         if (duplex)
 193                 *duplex = dplx;
 194         if (fc)
 195                 *fc = pause;
 196         return 0;
 197 }
 198
 199 static int vsc8211_get_link_status_fiber(struct cphy *cphy, int *link_ok,
 200                                          int *speed, int *duplex, int *fc)
 201 {
 202         unsigned int bmcr, status, lpa, adv;
 203         int err, sp = -1, dplx = -1, pause = 0;
 204
 205         err = mdio_read(cphy, 0, MII_BMCR, &bmcr);
 206         if (!err)
 207                 err = mdio_read(cphy, 0, MII_BMSR, &status);
 208         if (err)
 209                 return err;
 210
 211         if (link_ok) {
 212                 /*
 213                  * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it
 214                  * once more to get the current link state.
 215                  */
 216                 if (!(status & BMSR_LSTATUS))
 217                         err = mdio_read(cphy, 0, MII_BMSR, &status);
 218                 if (err)
 219                         return err;
 220                 *link_ok = (status & BMSR_LSTATUS) != 0;
 221         }
 222         if (!(bmcr & BMCR_ANENABLE)) {
 223                 dplx = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
 224                 if (bmcr & BMCR_SPEED1000)
 225                         sp = SPEED_1000;
 226                 else if (bmcr & BMCR_SPEED100)
 227                         sp = SPEED_100;
 228                 else
 229                         sp = SPEED_10;
 230         } else if (status & BMSR_ANEGCOMPLETE) {
 231                 err = mdio_read(cphy, 0, MII_LPA, &lpa);
 232                 if (!err)
 233                         err = mdio_read(cphy, 0, MII_ADVERTISE, &adv);
 234                 if (err)
 235                         return err;
 236
 237                 if (adv & lpa & ADVERTISE_1000XFULL) {
 238                         dplx = DUPLEX_FULL;
 239                         sp = SPEED_1000;
 240                 } else if (adv & lpa & ADVERTISE_1000XHALF) {
 241                         dplx = DUPLEX_HALF;
 242                         sp = SPEED_1000;
 243                 }
 244
 245                 if (fc && dplx == DUPLEX_FULL) {
 246                         if (lpa & adv & ADVERTISE_1000XPAUSE)
 247                                 pause = PAUSE_RX | PAUSE_TX;
 248                         else if ((lpa & ADVERTISE_1000XPAUSE) &&
 249                                  (adv & lpa & ADVERTISE_1000XPSE_ASYM))
 250                                 pause = PAUSE_TX;
 251                         else if ((lpa & ADVERTISE_1000XPSE_ASYM) &&
 252                                  (adv & ADVERTISE_1000XPAUSE))
 253                                 pause = PAUSE_RX;
 254                 }
 255         }
 256         if (speed)
 257                 *speed = sp;
 258         if (duplex)
 259                 *duplex = dplx;
 260         if (fc)
 261                 *fc = pause;
 262         return 0;
 263 }
 264
 265 #ifdef UNUSED
 266 /*
 267  * Enable/disable auto MDI/MDI-X in forced link speed mode.
 268  */
 269 static int vsc8211_set_automdi(struct cphy *phy, int enable)
 270 {
 271         int err;
 272
 273         err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0x52b5);
 274         if (err)
 275                 return err;
 276
 277         err = mdio_write(phy, 0, 18, 0x12);
 278         if (err)
 279                 return err;
 280
 281         err = mdio_write(phy, 0, 17, enable ? 0x2803 : 0x3003);
 282         if (err)
 283                 return err;
 284
 285         err = mdio_write(phy, 0, 16, 0x87fa);
 286         if (err)
 287                 return err;
 288
 289         err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0);
 290         if (err)
 291                 return err;
 292
 293         return 0;
 294 }
 295
 296 int vsc8211_set_speed_duplex(struct cphy *phy, int speed, int duplex)
 297 {
 298         int err;
 299
 300         err = t3_set_phy_speed_duplex(phy, speed, duplex);
 301         if (!err)
 302                 err = vsc8211_set_automdi(phy, 1);
 303         return err;
 304 }
 305 #endif /* UNUSED */
 306
 307 static int vsc8211_power_down(struct cphy *cphy, int enable)
 308 {
 309         return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN,
 310                                    enable ? BMCR_PDOWN : 0);
 311 }
 312
 313 static int vsc8211_intr_handler(struct cphy *cphy)
 314 {
 315         unsigned int cause;
 316         int err, cphy_cause = 0;
 317
 318         err = mdio_read(cphy, 0, VSC8211_INTR_STATUS, &cause);
 319         if (err)
 320                 return err;
 321
 322         cause &= INTR_MASK;
 323         if (cause & CFG_CHG_INTR_MASK)
 324                 cphy_cause |= cphy_cause_link_change;
 325         if (cause & (VSC_INTR_RX_FIFO | VSC_INTR_TX_FIFO))
 326                 cphy_cause |= cphy_cause_fifo_error;
 327         return cphy_cause;
 328 }
 329
 330 static struct cphy_ops vsc8211_ops = {
 331         .reset = vsc8211_reset,
 332         .intr_enable = vsc8211_intr_enable,
 333         .intr_disable = vsc8211_intr_disable,
 334         .intr_clear = vsc8211_intr_clear,
 335         .intr_handler = vsc8211_intr_handler,
 336         .autoneg_enable = vsc8211_autoneg_enable,
 337         .autoneg_restart = vsc8211_autoneg_restart,
 338         .advertise = t3_phy_advertise,
 339         .set_speed_duplex = t3_set_phy_speed_duplex,
 340         .get_link_status = vsc8211_get_link_status,
 341         .power_down = vsc8211_power_down,
 342 };
 343
 344 static struct cphy_ops vsc8211_fiber_ops = {
 345         .reset = vsc8211_reset,
 346         .intr_enable = vsc8211_intr_enable,
 347         .intr_disable = vsc8211_intr_disable,
 348         .intr_clear = vsc8211_intr_clear,
 349         .intr_handler = vsc8211_intr_handler,
 350         .autoneg_enable = vsc8211_autoneg_enable,
 351         .autoneg_restart = vsc8211_autoneg_restart,
 352         .advertise = t3_phy_advertise_fiber,
 353         .set_speed_duplex = t3_set_phy_speed_duplex,
 354         .get_link_status = vsc8211_get_link_status_fiber,
 355         .power_down = vsc8211_power_down,
 356 };
 357
 358 int t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
 359                         int phy_addr, const struct mdio_ops *mdio_ops)
 360 {
 361         int err;
 362         unsigned int val;
 363
 364         cphy_init(phy, adapter, phy_addr, &vsc8211_ops, mdio_ops,
 365                   SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full |
 366                   SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_MII |
 367                   SUPPORTED_TP | SUPPORTED_IRQ, "10/100/1000BASE-T");
 368         msleep(20);       /* PHY needs ~10ms to start responding to MDIO */
 369
 370         err = mdio_read(phy, 0, VSC8211_EXT_CTRL, &val);
 371         if (err)
 372                 return err;
 373         if (val & VSC_CTRL_MEDIA_MODE_HI) {
 374                 /* copper interface, just need to configure the LEDs */
 375                 return mdio_write(phy, 0, VSC8211_LED_CTRL, 0x100);
 376         }
 377
 378         phy->caps = SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg |
 379                     SUPPORTED_MII | SUPPORTED_FIBRE | SUPPORTED_IRQ;
 380         phy->desc = "1000BASE-X";
 381         phy->ops = &vsc8211_fiber_ops;
 382
 383         err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 1);
 384         if (err)
 385                 return err;
 386
 387         err = mdio_write(phy, 0, VSC8211_SIGDET_CTRL, 1);
 388         if (err)
 389                 return err;
 390
 391         err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0);
 392         if (err)
 393                 return err;
 394
 395         err = mdio_write(phy, 0, VSC8211_EXT_CTRL,
 396                          val | VSC_CTRL_CLAUSE37_VIEW);
 397         if (err)
 398                 return err;
 399
 400         err = vsc8211_reset(phy, 0);
 401         if (err)
 402                 return err;
 403
 404         udelay(5); /* delay after reset before next SMI */
 405         return 0;
 406 }