DM9000: Use msleep() instead of udelay()
[deliverable/linux.git] / drivers / net / dm9000.c
1 /*
2 * dm9000.c: Version 1.2 03/18/2003
3 *
4 * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
5 * Copyright (C) 1997 Sten Wang
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
18 *
19 * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
20 * 06/22/2001 Support DM9801 progrmming
21 * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
22 * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
23 * R17 = (R17 & 0xfff0) | NF + 3
24 * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
25 * R17 = (R17 & 0xfff0) | NF
26 *
27 * v1.00 modify by simon 2001.9.5
28 * change for kernel 2.4.x
29 *
30 * v1.1 11/09/2001 fix force mode bug
31 *
32 * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
33 * Fixed phy reset.
34 * Added tx/rx 32 bit mode.
35 * Cleaned up for kernel merge.
36 *
37 * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
38 * Port to 2.6 kernel
39 *
40 * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
41 * Cleanup of code to remove ifdefs
42 * Allowed platform device data to influence access width
43 * Reformatting areas of code
44 *
45 * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
46 * * removed 2.4 style module parameters
47 * * removed removed unused stat counter and fixed
48 * net_device_stats
49 * * introduced tx_timeout function
50 * * reworked locking
51 *
52 * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
53 * * fixed spinlock call without pointer
54 * * ensure spinlock is initialised
55 */
56
57 #include <linux/module.h>
58 #include <linux/ioport.h>
59 #include <linux/netdevice.h>
60 #include <linux/etherdevice.h>
61 #include <linux/init.h>
62 #include <linux/skbuff.h>
63 #include <linux/spinlock.h>
64 #include <linux/crc32.h>
65 #include <linux/mii.h>
66 #include <linux/ethtool.h>
67 #include <linux/dm9000.h>
68 #include <linux/delay.h>
69 #include <linux/platform_device.h>
70 #include <linux/irq.h>
71
72 #include <asm/delay.h>
73 #include <asm/irq.h>
74 #include <asm/io.h>
75
76 #include "dm9000.h"
77
78 /* Board/System/Debug information/definition ---------------- */
79
80 #define DM9000_PHY 0x40 /* PHY address 0x01 */
81
82 #define CARDNAME "dm9000"
83 #define PFX CARDNAME ": "
84 #define DRV_VERSION "1.30"
85
86 #ifdef CONFIG_BLACKFIN
87 #define readsb insb
88 #define readsw insw
89 #define readsl insl
90 #define writesb outsb
91 #define writesw outsw
92 #define writesl outsl
93 #define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
94 #else
95 #define DEFAULT_TRIGGER (0)
96 #endif
97
98 /*
99 * Transmit timeout, default 5 seconds.
100 */
101 static int watchdog = 5000;
102 module_param(watchdog, int, 0400);
103 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
104
105 /* Structure/enum declaration ------------------------------- */
106 typedef struct board_info {
107
108 void __iomem *io_addr; /* Register I/O base address */
109 void __iomem *io_data; /* Data I/O address */
110 u16 irq; /* IRQ */
111
112 u16 tx_pkt_cnt;
113 u16 queue_pkt_len;
114 u16 queue_start_addr;
115 u16 dbug_cnt;
116 u8 io_mode; /* 0:word, 2:byte */
117 u8 phy_addr;
118 unsigned int flags;
119 unsigned int in_suspend :1;
120
121 int debug_level;
122
123 void (*inblk)(void __iomem *port, void *data, int length);
124 void (*outblk)(void __iomem *port, void *data, int length);
125 void (*dumpblk)(void __iomem *port, int length);
126
127 struct device *dev; /* parent device */
128
129 struct resource *addr_res; /* resources found */
130 struct resource *data_res;
131 struct resource *addr_req; /* resources requested */
132 struct resource *data_req;
133 struct resource *irq_res;
134
135 unsigned char srom[128];
136 spinlock_t lock;
137
138 struct mii_if_info mii;
139 u32 msg_enable;
140 } board_info_t;
141
142 /* debug code */
143
144 #define dm9000_dbg(db, lev, msg...) do { \
145 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
146 (lev) < db->debug_level) { \
147 dev_dbg(db->dev, msg); \
148 } \
149 } while (0)
150
151 static inline board_info_t *to_dm9000_board(struct net_device *dev)
152 {
153 return dev->priv;
154 }
155
156 /* function declaration ------------------------------------- */
157 static int dm9000_probe(struct platform_device *);
158 static int dm9000_open(struct net_device *);
159 static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
160 static int dm9000_stop(struct net_device *);
161
162 static void dm9000_init_dm9000(struct net_device *);
163
164 static irqreturn_t dm9000_interrupt(int, void *);
165
166 static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
167 static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
168 int value);
169 static u16 read_srom_word(board_info_t *, int);
170 static void dm9000_rx(struct net_device *);
171 static void dm9000_hash_table(struct net_device *);
172
173 //#define DM9000_PROGRAM_EEPROM
174 #ifdef DM9000_PROGRAM_EEPROM
175 static void program_eeprom(board_info_t * db);
176 #endif
177 /* DM9000 network board routine ---------------------------- */
178
179 static void
180 dm9000_reset(board_info_t * db)
181 {
182 dev_dbg(db->dev, "resetting device\n");
183
184 /* RESET device */
185 writeb(DM9000_NCR, db->io_addr);
186 udelay(200);
187 writeb(NCR_RST, db->io_data);
188 udelay(200);
189 }
190
191 /*
192 * Read a byte from I/O port
193 */
194 static u8
195 ior(board_info_t * db, int reg)
196 {
197 writeb(reg, db->io_addr);
198 return readb(db->io_data);
199 }
200
201 /*
202 * Write a byte to I/O port
203 */
204
205 static void
206 iow(board_info_t * db, int reg, int value)
207 {
208 writeb(reg, db->io_addr);
209 writeb(value, db->io_data);
210 }
211
212 /* routines for sending block to chip */
213
214 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
215 {
216 writesb(reg, data, count);
217 }
218
219 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
220 {
221 writesw(reg, data, (count+1) >> 1);
222 }
223
224 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
225 {
226 writesl(reg, data, (count+3) >> 2);
227 }
228
229 /* input block from chip to memory */
230
231 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
232 {
233 readsb(reg, data, count);
234 }
235
236
237 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
238 {
239 readsw(reg, data, (count+1) >> 1);
240 }
241
242 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
243 {
244 readsl(reg, data, (count+3) >> 2);
245 }
246
247 /* dump block from chip to null */
248
249 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
250 {
251 int i;
252 int tmp;
253
254 for (i = 0; i < count; i++)
255 tmp = readb(reg);
256 }
257
258 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
259 {
260 int i;
261 int tmp;
262
263 count = (count + 1) >> 1;
264
265 for (i = 0; i < count; i++)
266 tmp = readw(reg);
267 }
268
269 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
270 {
271 int i;
272 int tmp;
273
274 count = (count + 3) >> 2;
275
276 for (i = 0; i < count; i++)
277 tmp = readl(reg);
278 }
279
280 /* dm9000_set_io
281 *
282 * select the specified set of io routines to use with the
283 * device
284 */
285
286 static void dm9000_set_io(struct board_info *db, int byte_width)
287 {
288 /* use the size of the data resource to work out what IO
289 * routines we want to use
290 */
291
292 switch (byte_width) {
293 case 1:
294 db->dumpblk = dm9000_dumpblk_8bit;
295 db->outblk = dm9000_outblk_8bit;
296 db->inblk = dm9000_inblk_8bit;
297 break;
298
299
300 case 3:
301 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
302 case 2:
303 db->dumpblk = dm9000_dumpblk_16bit;
304 db->outblk = dm9000_outblk_16bit;
305 db->inblk = dm9000_inblk_16bit;
306 break;
307
308 case 4:
309 default:
310 db->dumpblk = dm9000_dumpblk_32bit;
311 db->outblk = dm9000_outblk_32bit;
312 db->inblk = dm9000_inblk_32bit;
313 break;
314 }
315 }
316
317
318 /* Our watchdog timed out. Called by the networking layer */
319 static void dm9000_timeout(struct net_device *dev)
320 {
321 board_info_t *db = (board_info_t *) dev->priv;
322 u8 reg_save;
323 unsigned long flags;
324
325 /* Save previous register address */
326 reg_save = readb(db->io_addr);
327 spin_lock_irqsave(&db->lock,flags);
328
329 netif_stop_queue(dev);
330 dm9000_reset(db);
331 dm9000_init_dm9000(dev);
332 /* We can accept TX packets again */
333 dev->trans_start = jiffies;
334 netif_wake_queue(dev);
335
336 /* Restore previous register address */
337 writeb(reg_save, db->io_addr);
338 spin_unlock_irqrestore(&db->lock,flags);
339 }
340
341 #ifdef CONFIG_NET_POLL_CONTROLLER
342 /*
343 *Used by netconsole
344 */
345 static void dm9000_poll_controller(struct net_device *dev)
346 {
347 disable_irq(dev->irq);
348 dm9000_interrupt(dev->irq,dev);
349 enable_irq(dev->irq);
350 }
351 #endif
352
353 /* ethtool ops */
354
355 static void dm9000_get_drvinfo(struct net_device *dev,
356 struct ethtool_drvinfo *info)
357 {
358 board_info_t *dm = to_dm9000_board(dev);
359
360 strcpy(info->driver, CARDNAME);
361 strcpy(info->version, DRV_VERSION);
362 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
363 }
364
365 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
366 {
367 board_info_t *dm = to_dm9000_board(dev);
368 unsigned long flags;
369
370 spin_lock_irqsave(&dm->lock, flags);
371 mii_ethtool_gset(&dm->mii, cmd);
372 spin_lock_irqsave(&dm->lock, flags);
373
374 return 0;
375 }
376
377 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
378 {
379 board_info_t *dm = to_dm9000_board(dev);
380 unsigned long flags;
381 int rc;
382
383 spin_lock_irqsave(&dm->lock, flags);
384 rc = mii_ethtool_sset(&dm->mii, cmd);
385 spin_lock_irqsave(&dm->lock, flags);
386
387 return rc;
388 }
389
390 static int dm9000_nway_reset(struct net_device *dev)
391 {
392 board_info_t *dm = to_dm9000_board(dev);
393 return mii_nway_restart(&dm->mii);
394 }
395
396 static u32 dm9000_get_link(struct net_device *dev)
397 {
398 board_info_t *dm = to_dm9000_board(dev);
399 return mii_link_ok(&dm->mii);
400 }
401
402 static const struct ethtool_ops dm9000_ethtool_ops = {
403 .get_drvinfo = dm9000_get_drvinfo,
404 .get_settings = dm9000_get_settings,
405 .set_settings = dm9000_set_settings,
406 .nway_reset = dm9000_nway_reset,
407 .get_link = dm9000_get_link,
408 };
409
410
411 /* dm9000_release_board
412 *
413 * release a board, and any mapped resources
414 */
415
416 static void
417 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
418 {
419 if (db->data_res == NULL) {
420 if (db->addr_res != NULL)
421 release_mem_region((unsigned long)db->io_addr, 4);
422 return;
423 }
424
425 /* unmap our resources */
426
427 iounmap(db->io_addr);
428 iounmap(db->io_data);
429
430 /* release the resources */
431
432 if (db->data_req != NULL) {
433 release_resource(db->data_req);
434 kfree(db->data_req);
435 }
436
437 if (db->addr_req != NULL) {
438 release_resource(db->addr_req);
439 kfree(db->addr_req);
440 }
441 }
442
443 #define res_size(_r) (((_r)->end - (_r)->start) + 1)
444
445 /*
446 * Search DM9000 board, allocate space and register it
447 */
448 static int
449 dm9000_probe(struct platform_device *pdev)
450 {
451 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
452 struct board_info *db; /* Point a board information structure */
453 struct net_device *ndev;
454 unsigned long base;
455 int ret = 0;
456 int iosize;
457 int i;
458 u32 id_val;
459
460 /* Init network device */
461 ndev = alloc_etherdev(sizeof (struct board_info));
462 if (!ndev) {
463 dev_err(&pdev->dev, "could not allocate device.\n");
464 return -ENOMEM;
465 }
466
467 SET_NETDEV_DEV(ndev, &pdev->dev);
468
469 dev_dbg(&pdev->dev, "dm9000_probe()");
470
471 /* setup board info structure */
472 db = (struct board_info *) ndev->priv;
473 memset(db, 0, sizeof (*db));
474
475 db->dev = &pdev->dev;
476
477 spin_lock_init(&db->lock);
478
479 if (pdev->num_resources < 2) {
480 ret = -ENODEV;
481 goto out;
482 } else if (pdev->num_resources == 2) {
483 base = pdev->resource[0].start;
484
485 if (!request_mem_region(base, 4, ndev->name)) {
486 ret = -EBUSY;
487 goto out;
488 }
489
490 ndev->base_addr = base;
491 ndev->irq = pdev->resource[1].start;
492 db->io_addr = (void __iomem *)base;
493 db->io_data = (void __iomem *)(base + 4);
494
495 /* ensure at least we have a default set of IO routines */
496 dm9000_set_io(db, 2);
497
498 } else {
499 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
500 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
501 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
502
503 if (db->addr_res == NULL || db->data_res == NULL ||
504 db->irq_res == NULL) {
505 dev_err(db->dev, "insufficient resources\n");
506 ret = -ENOENT;
507 goto out;
508 }
509
510 i = res_size(db->addr_res);
511 db->addr_req = request_mem_region(db->addr_res->start, i,
512 pdev->name);
513
514 if (db->addr_req == NULL) {
515 dev_err(db->dev, "cannot claim address reg area\n");
516 ret = -EIO;
517 goto out;
518 }
519
520 db->io_addr = ioremap(db->addr_res->start, i);
521
522 if (db->io_addr == NULL) {
523 dev_err(db->dev, "failed to ioremap address reg\n");
524 ret = -EINVAL;
525 goto out;
526 }
527
528 iosize = res_size(db->data_res);
529 db->data_req = request_mem_region(db->data_res->start, iosize,
530 pdev->name);
531
532 if (db->data_req == NULL) {
533 dev_err(db->dev, "cannot claim data reg area\n");
534 ret = -EIO;
535 goto out;
536 }
537
538 db->io_data = ioremap(db->data_res->start, iosize);
539
540 if (db->io_data == NULL) {
541 dev_err(db->dev,"failed to ioremap data reg\n");
542 ret = -EINVAL;
543 goto out;
544 }
545
546 /* fill in parameters for net-dev structure */
547
548 ndev->base_addr = (unsigned long)db->io_addr;
549 ndev->irq = db->irq_res->start;
550
551 /* ensure at least we have a default set of IO routines */
552 dm9000_set_io(db, iosize);
553 }
554
555 /* check to see if anything is being over-ridden */
556 if (pdata != NULL) {
557 /* check to see if the driver wants to over-ride the
558 * default IO width */
559
560 if (pdata->flags & DM9000_PLATF_8BITONLY)
561 dm9000_set_io(db, 1);
562
563 if (pdata->flags & DM9000_PLATF_16BITONLY)
564 dm9000_set_io(db, 2);
565
566 if (pdata->flags & DM9000_PLATF_32BITONLY)
567 dm9000_set_io(db, 4);
568
569 /* check to see if there are any IO routine
570 * over-rides */
571
572 if (pdata->inblk != NULL)
573 db->inblk = pdata->inblk;
574
575 if (pdata->outblk != NULL)
576 db->outblk = pdata->outblk;
577
578 if (pdata->dumpblk != NULL)
579 db->dumpblk = pdata->dumpblk;
580
581 db->flags = pdata->flags;
582 }
583
584 dm9000_reset(db);
585
586 /* try two times, DM9000 sometimes gets the first read wrong */
587 for (i = 0; i < 2; i++) {
588 id_val = ior(db, DM9000_VIDL);
589 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
590 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
591 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
592
593 if (id_val == DM9000_ID)
594 break;
595 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
596 }
597
598 if (id_val != DM9000_ID) {
599 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
600 ret = -ENODEV;
601 goto out;
602 }
603
604 /* from this point we assume that we have found a DM9000 */
605
606 /* driver system function */
607 ether_setup(ndev);
608
609 ndev->open = &dm9000_open;
610 ndev->hard_start_xmit = &dm9000_start_xmit;
611 ndev->tx_timeout = &dm9000_timeout;
612 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
613 ndev->stop = &dm9000_stop;
614 ndev->set_multicast_list = &dm9000_hash_table;
615 ndev->ethtool_ops = &dm9000_ethtool_ops;
616
617 #ifdef CONFIG_NET_POLL_CONTROLLER
618 ndev->poll_controller = &dm9000_poll_controller;
619 #endif
620
621 #ifdef DM9000_PROGRAM_EEPROM
622 program_eeprom(db);
623 #endif
624 db->msg_enable = NETIF_MSG_LINK;
625 db->mii.phy_id_mask = 0x1f;
626 db->mii.reg_num_mask = 0x1f;
627 db->mii.force_media = 0;
628 db->mii.full_duplex = 0;
629 db->mii.dev = ndev;
630 db->mii.mdio_read = dm9000_phy_read;
631 db->mii.mdio_write = dm9000_phy_write;
632
633 /* Read SROM content */
634 for (i = 0; i < 64; i++)
635 ((u16 *) db->srom)[i] = read_srom_word(db, i);
636
637 /* Set Node Address */
638 for (i = 0; i < 6; i++)
639 ndev->dev_addr[i] = db->srom[i];
640
641 if (!is_valid_ether_addr(ndev->dev_addr)) {
642 /* try reading from mac */
643
644 for (i = 0; i < 6; i++)
645 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
646 }
647
648 if (!is_valid_ether_addr(ndev->dev_addr))
649 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
650 "set using ifconfig\n", ndev->name);
651
652 platform_set_drvdata(pdev, ndev);
653 ret = register_netdev(ndev);
654
655 if (ret == 0) {
656 DECLARE_MAC_BUF(mac);
657 printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n",
658 ndev->name, db->io_addr, db->io_data, ndev->irq,
659 print_mac(mac, ndev->dev_addr));
660 }
661 return 0;
662
663 out:
664 dev_err(db->dev, "not found (%d).\n", ret);
665
666 dm9000_release_board(pdev, db);
667 free_netdev(ndev);
668
669 return ret;
670 }
671
672 /*
673 * Open the interface.
674 * The interface is opened whenever "ifconfig" actives it.
675 */
676 static int
677 dm9000_open(struct net_device *dev)
678 {
679 board_info_t *db = (board_info_t *) dev->priv;
680 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
681
682 dev_dbg(db->dev, "entering %s\n", __func__);
683
684 /* If there is no IRQ type specified, default to something that
685 * may work, and tell the user that this is a problem */
686
687 if (irqflags == IRQF_TRIGGER_NONE) {
688 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
689 irqflags = DEFAULT_TRIGGER;
690 }
691
692 irqflags |= IRQF_SHARED;
693
694 if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
695 return -EAGAIN;
696
697 /* Initialize DM9000 board */
698 dm9000_reset(db);
699 dm9000_init_dm9000(dev);
700
701 /* Init driver variable */
702 db->dbug_cnt = 0;
703
704 mii_check_media(&db->mii, netif_msg_link(db), 1);
705 netif_start_queue(dev);
706
707 return 0;
708 }
709
710 /*
711 * Initilize dm9000 board
712 */
713 static void
714 dm9000_init_dm9000(struct net_device *dev)
715 {
716 board_info_t *db = (board_info_t *) dev->priv;
717
718 dm9000_dbg(db, 1, "entering %s\n", __func__);
719
720 /* I/O mode */
721 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
722
723 /* GPIO0 on pre-activate PHY */
724 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
725 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
726 iow(db, DM9000_GPR, 0); /* Enable PHY */
727
728 if (db->flags & DM9000_PLATF_EXT_PHY)
729 iow(db, DM9000_NCR, NCR_EXT_PHY);
730
731 /* Program operating register */
732 iow(db, DM9000_TCR, 0); /* TX Polling clear */
733 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
734 iow(db, DM9000_FCR, 0xff); /* Flow Control */
735 iow(db, DM9000_SMCR, 0); /* Special Mode */
736 /* clear TX status */
737 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
738 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
739
740 /* Set address filter table */
741 dm9000_hash_table(dev);
742
743 /* Activate DM9000 */
744 iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
745 /* Enable TX/RX interrupt mask */
746 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
747
748 /* Init Driver variable */
749 db->tx_pkt_cnt = 0;
750 db->queue_pkt_len = 0;
751 dev->trans_start = 0;
752 }
753
754 /*
755 * Hardware start transmission.
756 * Send a packet to media from the upper layer.
757 */
758 static int
759 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
760 {
761 unsigned long flags;
762 board_info_t *db = (board_info_t *) dev->priv;
763
764 dm9000_dbg(db, 3, "%s:\n", __func__);
765
766 if (db->tx_pkt_cnt > 1)
767 return 1;
768
769 spin_lock_irqsave(&db->lock, flags);
770
771 /* Move data to DM9000 TX RAM */
772 writeb(DM9000_MWCMD, db->io_addr);
773
774 (db->outblk)(db->io_data, skb->data, skb->len);
775 dev->stats.tx_bytes += skb->len;
776
777 db->tx_pkt_cnt++;
778 /* TX control: First packet immediately send, second packet queue */
779 if (db->tx_pkt_cnt == 1) {
780 /* Set TX length to DM9000 */
781 iow(db, DM9000_TXPLL, skb->len & 0xff);
782 iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
783
784 /* Issue TX polling command */
785 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
786
787 dev->trans_start = jiffies; /* save the time stamp */
788 } else {
789 /* Second packet */
790 db->queue_pkt_len = skb->len;
791 netif_stop_queue(dev);
792 }
793
794 spin_unlock_irqrestore(&db->lock, flags);
795
796 /* free this SKB */
797 dev_kfree_skb(skb);
798
799 return 0;
800 }
801
802 static void
803 dm9000_shutdown(struct net_device *dev)
804 {
805 board_info_t *db = (board_info_t *) dev->priv;
806
807 /* RESET device */
808 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
809 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
810 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
811 iow(db, DM9000_RCR, 0x00); /* Disable RX */
812 }
813
814 /*
815 * Stop the interface.
816 * The interface is stopped when it is brought.
817 */
818 static int
819 dm9000_stop(struct net_device *ndev)
820 {
821 board_info_t *db = (board_info_t *) ndev->priv;
822
823 dm9000_dbg(db, 1, "entering %s\n", __func__);
824
825 netif_stop_queue(ndev);
826 netif_carrier_off(ndev);
827
828 /* free interrupt */
829 free_irq(ndev->irq, ndev);
830
831 dm9000_shutdown(ndev);
832
833 return 0;
834 }
835
836 /*
837 * DM9000 interrupt handler
838 * receive the packet to upper layer, free the transmitted packet
839 */
840
841 static void
842 dm9000_tx_done(struct net_device *dev, board_info_t * db)
843 {
844 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
845
846 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
847 /* One packet sent complete */
848 db->tx_pkt_cnt--;
849 dev->stats.tx_packets++;
850
851 /* Queue packet check & send */
852 if (db->tx_pkt_cnt > 0) {
853 iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
854 iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
855 iow(db, DM9000_TCR, TCR_TXREQ);
856 dev->trans_start = jiffies;
857 }
858 netif_wake_queue(dev);
859 }
860 }
861
862 static irqreturn_t
863 dm9000_interrupt(int irq, void *dev_id)
864 {
865 struct net_device *dev = dev_id;
866 board_info_t *db = (board_info_t *) dev->priv;
867 int int_status;
868 u8 reg_save;
869
870 dm9000_dbg(db, 3, "entering %s\n", __func__);
871
872 /* A real interrupt coming */
873
874 spin_lock(&db->lock);
875
876 /* Save previous register address */
877 reg_save = readb(db->io_addr);
878
879 /* Disable all interrupts */
880 iow(db, DM9000_IMR, IMR_PAR);
881
882 /* Got DM9000 interrupt status */
883 int_status = ior(db, DM9000_ISR); /* Got ISR */
884 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
885
886 /* Received the coming packet */
887 if (int_status & ISR_PRS)
888 dm9000_rx(dev);
889
890 /* Trnasmit Interrupt check */
891 if (int_status & ISR_PTS)
892 dm9000_tx_done(dev, db);
893
894 /* Re-enable interrupt mask */
895 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
896
897 /* Restore previous register address */
898 writeb(reg_save, db->io_addr);
899
900 spin_unlock(&db->lock);
901
902 return IRQ_HANDLED;
903 }
904
905 struct dm9000_rxhdr {
906 u8 RxPktReady;
907 u8 RxStatus;
908 u16 RxLen;
909 } __attribute__((__packed__));
910
911 /*
912 * Received a packet and pass to upper layer
913 */
914 static void
915 dm9000_rx(struct net_device *dev)
916 {
917 board_info_t *db = (board_info_t *) dev->priv;
918 struct dm9000_rxhdr rxhdr;
919 struct sk_buff *skb;
920 u8 rxbyte, *rdptr;
921 bool GoodPacket;
922 int RxLen;
923
924 /* Check packet ready or not */
925 do {
926 ior(db, DM9000_MRCMDX); /* Dummy read */
927
928 /* Get most updated data */
929 rxbyte = readb(db->io_data);
930
931 /* Status check: this byte must be 0 or 1 */
932 if (rxbyte > DM9000_PKT_RDY) {
933 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
934 iow(db, DM9000_RCR, 0x00); /* Stop Device */
935 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
936 return;
937 }
938
939 if (rxbyte != DM9000_PKT_RDY)
940 return;
941
942 /* A packet ready now & Get status/length */
943 GoodPacket = true;
944 writeb(DM9000_MRCMD, db->io_addr);
945
946 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
947
948 RxLen = le16_to_cpu(rxhdr.RxLen);
949
950 /* Packet Status check */
951 if (RxLen < 0x40) {
952 GoodPacket = false;
953 dev_dbg(db->dev, "Bad Packet received (runt)\n");
954 }
955
956 if (RxLen > DM9000_PKT_MAX) {
957 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
958 }
959
960 if (rxhdr.RxStatus & 0xbf) {
961 GoodPacket = false;
962 if (rxhdr.RxStatus & 0x01) {
963 dev_dbg(db->dev, "fifo error\n");
964 dev->stats.rx_fifo_errors++;
965 }
966 if (rxhdr.RxStatus & 0x02) {
967 dev_dbg(db->dev, "crc error\n");
968 dev->stats.rx_crc_errors++;
969 }
970 if (rxhdr.RxStatus & 0x80) {
971 dev_dbg(db->dev, "length error\n");
972 dev->stats.rx_length_errors++;
973 }
974 }
975
976 /* Move data from DM9000 */
977 if (GoodPacket
978 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
979 skb_reserve(skb, 2);
980 rdptr = (u8 *) skb_put(skb, RxLen - 4);
981
982 /* Read received packet from RX SRAM */
983
984 (db->inblk)(db->io_data, rdptr, RxLen);
985 dev->stats.rx_bytes += RxLen;
986
987 /* Pass to upper layer */
988 skb->protocol = eth_type_trans(skb, dev);
989 netif_rx(skb);
990 dev->stats.rx_packets++;
991
992 } else {
993 /* need to dump the packet's data */
994
995 (db->dumpblk)(db->io_data, RxLen);
996 }
997 } while (rxbyte == DM9000_PKT_RDY);
998 }
999
1000 /*
1001 * Read a word data from SROM
1002 */
1003 static u16
1004 read_srom_word(board_info_t * db, int offset)
1005 {
1006 iow(db, DM9000_EPAR, offset);
1007 iow(db, DM9000_EPCR, EPCR_ERPRR);
1008 mdelay(8); /* according to the datasheet 200us should be enough,
1009 but it doesn't work */
1010 iow(db, DM9000_EPCR, 0x0);
1011 return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
1012 }
1013
1014 #ifdef DM9000_PROGRAM_EEPROM
1015 /*
1016 * Write a word data to SROM
1017 */
1018 static void
1019 write_srom_word(board_info_t * db, int offset, u16 val)
1020 {
1021 iow(db, DM9000_EPAR, offset);
1022 iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
1023 iow(db, DM9000_EPDRL, (val & 0xff));
1024 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
1025 mdelay(8); /* same shit */
1026 iow(db, DM9000_EPCR, 0);
1027 }
1028
1029 /*
1030 * Only for development:
1031 * Here we write static data to the eeprom in case
1032 * we don't have valid content on a new board
1033 */
1034 static void
1035 program_eeprom(board_info_t * db)
1036 {
1037 u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
1038 0x0000, /* Autoload: accept nothing */
1039 0x0a46, 0x9000, /* Vendor / Product ID */
1040 0x0000, /* pin control */
1041 0x0000,
1042 }; /* Wake-up mode control */
1043 int i;
1044 for (i = 0; i < 8; i++)
1045 write_srom_word(db, i, eeprom[i]);
1046 }
1047 #endif
1048
1049
1050 /*
1051 * Calculate the CRC valude of the Rx packet
1052 * flag = 1 : return the reverse CRC (for the received packet CRC)
1053 * 0 : return the normal CRC (for Hash Table index)
1054 */
1055
1056 static unsigned long
1057 cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
1058 {
1059
1060 u32 crc = ether_crc_le(Len, Data);
1061
1062 if (flag)
1063 return ~crc;
1064
1065 return crc;
1066 }
1067
1068 /*
1069 * Set DM9000 multicast address
1070 */
1071 static void
1072 dm9000_hash_table(struct net_device *dev)
1073 {
1074 board_info_t *db = (board_info_t *) dev->priv;
1075 struct dev_mc_list *mcptr = dev->mc_list;
1076 int mc_cnt = dev->mc_count;
1077 u32 hash_val;
1078 u16 i, oft, hash_table[4];
1079 unsigned long flags;
1080
1081 dm9000_dbg(db, 1, "entering %s\n", __func__);
1082
1083 spin_lock_irqsave(&db->lock,flags);
1084
1085 for (i = 0, oft = 0x10; i < 6; i++, oft++)
1086 iow(db, oft, dev->dev_addr[i]);
1087
1088 /* Clear Hash Table */
1089 for (i = 0; i < 4; i++)
1090 hash_table[i] = 0x0;
1091
1092 /* broadcast address */
1093 hash_table[3] = 0x8000;
1094
1095 /* the multicast address in Hash Table : 64 bits */
1096 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1097 hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
1098 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
1099 }
1100
1101 /* Write the hash table to MAC MD table */
1102 for (i = 0, oft = 0x16; i < 4; i++) {
1103 iow(db, oft++, hash_table[i] & 0xff);
1104 iow(db, oft++, (hash_table[i] >> 8) & 0xff);
1105 }
1106
1107 spin_unlock_irqrestore(&db->lock,flags);
1108 }
1109
1110
1111 /*
1112 * Sleep, either by using msleep() or if we are suspending, then
1113 * use mdelay() to sleep.
1114 */
1115 static void dm9000_msleep(board_info_t *db, unsigned int ms)
1116 {
1117 if (db->in_suspend)
1118 mdelay(ms);
1119 else
1120 msleep(ms);
1121 }
1122
1123 /*
1124 * Read a word from phyxcer
1125 */
1126 static int
1127 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1128 {
1129 board_info_t *db = (board_info_t *) dev->priv;
1130 unsigned long flags;
1131 unsigned int reg_save;
1132 int ret;
1133
1134 spin_lock_irqsave(&db->lock,flags);
1135
1136 /* Save previous register address */
1137 reg_save = readb(db->io_addr);
1138
1139 /* Fill the phyxcer register into REG_0C */
1140 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1141
1142 iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
1143
1144 writeb(reg_save, db->io_addr);
1145 spin_unlock_irqrestore(&db->lock,flags);
1146
1147 dm9000_msleep(db, 1); /* Wait read complete */
1148
1149 spin_lock_irqsave(&db->lock,flags);
1150 reg_save = readb(db->io_addr);
1151
1152 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1153
1154 /* The read data keeps on REG_0D & REG_0E */
1155 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1156
1157 /* restore the previous address */
1158 writeb(reg_save, db->io_addr);
1159 spin_unlock_irqrestore(&db->lock,flags);
1160
1161 return ret;
1162 }
1163
1164 /*
1165 * Write a word to phyxcer
1166 */
1167 static void
1168 dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
1169 {
1170 board_info_t *db = (board_info_t *) dev->priv;
1171 unsigned long flags;
1172 unsigned long reg_save;
1173
1174 spin_lock_irqsave(&db->lock,flags);
1175
1176 /* Save previous register address */
1177 reg_save = readb(db->io_addr);
1178
1179 /* Fill the phyxcer register into REG_0C */
1180 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1181
1182 /* Fill the written data into REG_0D & REG_0E */
1183 iow(db, DM9000_EPDRL, (value & 0xff));
1184 iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
1185
1186 iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
1187
1188 writeb(reg_save, db->io_addr);
1189 spin_unlock_irqrestore(&db->lock,flags);
1190
1191 dm9000_msleep(db, 1); /* Wait write complete */
1192
1193 spin_lock_irqsave(&db->lock,flags);
1194 reg_save = readb(db->io_addr);
1195
1196 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1197
1198 /* restore the previous address */
1199 writeb(reg_save, db->io_addr);
1200
1201 spin_unlock_irqrestore(&db->lock,flags);
1202 }
1203
1204 static int
1205 dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
1206 {
1207 struct net_device *ndev = platform_get_drvdata(dev);
1208 board_info_t *db;
1209
1210 if (ndev) {
1211 db = (board_info_t *) ndev->priv;
1212 db->in_suspend = 1;
1213
1214 if (netif_running(ndev)) {
1215 netif_device_detach(ndev);
1216 dm9000_shutdown(ndev);
1217 }
1218 }
1219 return 0;
1220 }
1221
1222 static int
1223 dm9000_drv_resume(struct platform_device *dev)
1224 {
1225 struct net_device *ndev = platform_get_drvdata(dev);
1226 board_info_t *db = (board_info_t *) ndev->priv;
1227
1228 if (ndev) {
1229
1230 if (netif_running(ndev)) {
1231 dm9000_reset(db);
1232 dm9000_init_dm9000(ndev);
1233
1234 netif_device_attach(ndev);
1235 }
1236
1237 db->in_suspend = 0;
1238 }
1239 return 0;
1240 }
1241
1242 static int
1243 dm9000_drv_remove(struct platform_device *pdev)
1244 {
1245 struct net_device *ndev = platform_get_drvdata(pdev);
1246
1247 platform_set_drvdata(pdev, NULL);
1248
1249 unregister_netdev(ndev);
1250 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
1251 free_netdev(ndev); /* free device structure */
1252
1253 dev_dbg(&pdev->dev, "released and freed device\n");
1254 return 0;
1255 }
1256
1257 static struct platform_driver dm9000_driver = {
1258 .driver = {
1259 .name = "dm9000",
1260 .owner = THIS_MODULE,
1261 },
1262 .probe = dm9000_probe,
1263 .remove = dm9000_drv_remove,
1264 .suspend = dm9000_drv_suspend,
1265 .resume = dm9000_drv_resume,
1266 };
1267
1268 static int __init
1269 dm9000_init(void)
1270 {
1271 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1272
1273 return platform_driver_register(&dm9000_driver); /* search board and register */
1274 }
1275
1276 static void __exit
1277 dm9000_cleanup(void)
1278 {
1279 platform_driver_unregister(&dm9000_driver);
1280 }
1281
1282 module_init(dm9000_init);
1283 module_exit(dm9000_cleanup);
1284
1285 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1286 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1287 MODULE_LICENSE("GPL");
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