2 * net/dsa/mv88e6131.c - Marvell 88e6095/6095f/6131 switch chip support
3 * Copyright (c) 2008-2009 Marvell Semiconductor
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
11 #include <linux/delay.h>
12 #include <linux/jiffies.h>
13 #include <linux/list.h>
14 #include <linux/module.h>
15 #include <linux/netdevice.h>
16 #include <linux/phy.h>
18 #include "mv88e6xxx.h"
20 static const struct mv88e6xxx_switch_id mv88e6131_table
[] = {
21 { PORT_SWITCH_ID_6085
, "Marvell 88E6085" },
22 { PORT_SWITCH_ID_6095
, "Marvell 88E6095/88E6095F" },
23 { PORT_SWITCH_ID_6131
, "Marvell 88E6131" },
24 { PORT_SWITCH_ID_6131_B2
, "Marvell 88E6131 (B2)" },
25 { PORT_SWITCH_ID_6185
, "Marvell 88E6185" },
28 static char *mv88e6131_probe(struct device
*dsa_dev
, struct device
*host_dev
,
29 int sw_addr
, void **priv
)
31 return mv88e6xxx_drv_probe(dsa_dev
, host_dev
, sw_addr
, priv
,
33 ARRAY_SIZE(mv88e6131_table
));
36 static int mv88e6131_setup_global(struct dsa_switch
*ds
)
38 u32 upstream_port
= dsa_upstream_port(ds
);
42 ret
= mv88e6xxx_setup_global(ds
);
46 /* Enable the PHY polling unit, don't discard packets with
47 * excessive collisions, use a weighted fair queueing scheme
48 * to arbitrate between packet queues, set the maximum frame
49 * size to 1632, and mask all interrupt sources.
51 REG_WRITE(REG_GLOBAL
, GLOBAL_CONTROL
,
52 GLOBAL_CONTROL_PPU_ENABLE
| GLOBAL_CONTROL_MAX_FRAME_1632
);
54 /* Set the VLAN ethertype to 0x8100. */
55 REG_WRITE(REG_GLOBAL
, GLOBAL_CORE_TAG_TYPE
, 0x8100);
57 /* Disable ARP mirroring, and configure the upstream port as
58 * the port to which ingress and egress monitor frames are to
61 reg
= upstream_port
<< GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT
|
62 upstream_port
<< GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT
|
63 GLOBAL_MONITOR_CONTROL_ARP_DISABLED
;
64 REG_WRITE(REG_GLOBAL
, GLOBAL_MONITOR_CONTROL
, reg
);
66 /* Disable cascade port functionality unless this device
67 * is used in a cascade configuration, and set the switch's
70 if (ds
->dst
->pd
->nr_chips
> 1)
71 REG_WRITE(REG_GLOBAL
, GLOBAL_CONTROL_2
,
72 GLOBAL_CONTROL_2_MULTIPLE_CASCADE
|
75 REG_WRITE(REG_GLOBAL
, GLOBAL_CONTROL_2
,
76 GLOBAL_CONTROL_2_NO_CASCADE
|
79 /* Force the priority of IGMP/MLD snoop frames and ARP frames
80 * to the highest setting.
82 REG_WRITE(REG_GLOBAL2
, GLOBAL2_PRIO_OVERRIDE
,
83 GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP
|
84 7 << GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT
|
85 GLOBAL2_PRIO_OVERRIDE_FORCE_ARP
|
86 7 << GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT
);
91 static int mv88e6131_setup(struct dsa_switch
*ds
)
93 struct mv88e6xxx_priv_state
*ps
= ds_to_priv(ds
);
98 ret
= mv88e6xxx_setup_common(ds
);
102 mv88e6xxx_ppu_state_init(ds
);
105 case PORT_SWITCH_ID_6085
:
106 case PORT_SWITCH_ID_6185
:
109 case PORT_SWITCH_ID_6095
:
112 case PORT_SWITCH_ID_6131
:
113 case PORT_SWITCH_ID_6131_B2
:
120 ret
= mv88e6xxx_switch_reset(ds
, false);
124 ret
= mv88e6131_setup_global(ds
);
128 return mv88e6xxx_setup_ports(ds
);
131 static int mv88e6131_port_to_phy_addr(struct dsa_switch
*ds
, int port
)
133 struct mv88e6xxx_priv_state
*ps
= ds_to_priv(ds
);
135 if (port
>= 0 && port
< ps
->num_ports
)
142 mv88e6131_phy_read(struct dsa_switch
*ds
, int port
, int regnum
)
144 int addr
= mv88e6131_port_to_phy_addr(ds
, port
);
149 return mv88e6xxx_phy_read_ppu(ds
, addr
, regnum
);
153 mv88e6131_phy_write(struct dsa_switch
*ds
,
154 int port
, int regnum
, u16 val
)
156 int addr
= mv88e6131_port_to_phy_addr(ds
, port
);
161 return mv88e6xxx_phy_write_ppu(ds
, addr
, regnum
, val
);
164 struct dsa_switch_driver mv88e6131_switch_driver
= {
165 .tag_protocol
= DSA_TAG_PROTO_DSA
,
166 .probe
= mv88e6131_probe
,
167 .setup
= mv88e6131_setup
,
168 .set_addr
= mv88e6xxx_set_addr_direct
,
169 .phy_read
= mv88e6131_phy_read
,
170 .phy_write
= mv88e6131_phy_write
,
171 .get_strings
= mv88e6xxx_get_strings
,
172 .get_ethtool_stats
= mv88e6xxx_get_ethtool_stats
,
173 .get_sset_count
= mv88e6xxx_get_sset_count
,
174 .adjust_link
= mv88e6xxx_adjust_link
,
175 .port_bridge_join
= mv88e6xxx_port_bridge_join
,
176 .port_bridge_leave
= mv88e6xxx_port_bridge_leave
,
177 .port_vlan_filtering
= mv88e6xxx_port_vlan_filtering
,
178 .port_vlan_prepare
= mv88e6xxx_port_vlan_prepare
,
179 .port_vlan_add
= mv88e6xxx_port_vlan_add
,
180 .port_vlan_del
= mv88e6xxx_port_vlan_del
,
181 .port_vlan_dump
= mv88e6xxx_port_vlan_dump
,
182 .port_fdb_prepare
= mv88e6xxx_port_fdb_prepare
,
183 .port_fdb_add
= mv88e6xxx_port_fdb_add
,
184 .port_fdb_del
= mv88e6xxx_port_fdb_del
,
185 .port_fdb_dump
= mv88e6xxx_port_fdb_dump
,
188 MODULE_ALIAS("platform:mv88e6085");
189 MODULE_ALIAS("platform:mv88e6095");
190 MODULE_ALIAS("platform:mv88e6095f");
191 MODULE_ALIAS("platform:mv88e6131");