1 /* net/dsa/mv88e6171.c - Marvell 88e6171 switch chip support
2 * Copyright (c) 2008-2009 Marvell Semiconductor
3 * Copyright (c) 2014 Claudio Leite <leitec@staticky.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
11 #include <linux/delay.h>
12 #include <linux/jiffies.h>
13 #include <linux/list.h>
14 #include <linux/module.h>
15 #include <linux/netdevice.h>
16 #include <linux/phy.h>
18 #include "mv88e6xxx.h"
20 static char *mv88e6171_probe(struct device
*host_dev
, int sw_addr
)
22 struct mii_bus
*bus
= dsa_host_dev_to_mii_bus(host_dev
);
28 ret
= __mv88e6xxx_reg_read(bus
, sw_addr
, REG_PORT(0), PORT_SWITCH_ID
);
30 if ((ret
& 0xfff0) == PORT_SWITCH_ID_6171
)
31 return "Marvell 88E6171";
32 if ((ret
& 0xfff0) == PORT_SWITCH_ID_6175
)
33 return "Marvell 88E6175";
34 if ((ret
& 0xfff0) == PORT_SWITCH_ID_6350
)
35 return "Marvell 88E6350";
36 if ((ret
& 0xfff0) == PORT_SWITCH_ID_6351
)
37 return "Marvell 88E6351";
43 static int mv88e6171_setup_global(struct dsa_switch
*ds
)
45 u32 upstream_port
= dsa_upstream_port(ds
);
49 ret
= mv88e6xxx_setup_global(ds
);
53 /* Discard packets with excessive collisions, mask all
54 * interrupt sources, enable PPU.
56 REG_WRITE(REG_GLOBAL
, GLOBAL_CONTROL
,
57 GLOBAL_CONTROL_PPU_ENABLE
| GLOBAL_CONTROL_DISCARD_EXCESS
);
59 /* Configure the upstream port, and configure the upstream
60 * port as the port to which ingress and egress monitor frames
63 reg
= upstream_port
<< GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT
|
64 upstream_port
<< GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT
|
65 upstream_port
<< GLOBAL_MONITOR_CONTROL_ARP_SHIFT
|
66 upstream_port
<< GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT
;
67 REG_WRITE(REG_GLOBAL
, GLOBAL_MONITOR_CONTROL
, reg
);
69 /* Disable remote management for now, and set the switch's
72 REG_WRITE(REG_GLOBAL
, GLOBAL_CONTROL_2
, ds
->index
& 0x1f);
77 static int mv88e6171_setup(struct dsa_switch
*ds
)
79 struct mv88e6xxx_priv_state
*ps
= ds_to_priv(ds
);
82 ret
= mv88e6xxx_setup_common(ds
);
88 ret
= mv88e6xxx_switch_reset(ds
, true);
92 ret
= mv88e6171_setup_global(ds
);
96 return mv88e6xxx_setup_ports(ds
);
99 struct dsa_switch_driver mv88e6171_switch_driver
= {
100 .tag_protocol
= DSA_TAG_PROTO_EDSA
,
101 .priv_size
= sizeof(struct mv88e6xxx_priv_state
),
102 .probe
= mv88e6171_probe
,
103 .setup
= mv88e6171_setup
,
104 .set_addr
= mv88e6xxx_set_addr_indirect
,
105 .phy_read
= mv88e6xxx_phy_read_indirect
,
106 .phy_write
= mv88e6xxx_phy_write_indirect
,
107 .get_strings
= mv88e6xxx_get_strings
,
108 .get_ethtool_stats
= mv88e6xxx_get_ethtool_stats
,
109 .get_sset_count
= mv88e6xxx_get_sset_count
,
110 .adjust_link
= mv88e6xxx_adjust_link
,
111 #ifdef CONFIG_NET_DSA_HWMON
112 .get_temp
= mv88e6xxx_get_temp
,
114 .get_regs_len
= mv88e6xxx_get_regs_len
,
115 .get_regs
= mv88e6xxx_get_regs
,
116 .port_stp_update
= mv88e6xxx_port_stp_update
,
117 .port_pvid_get
= mv88e6xxx_port_pvid_get
,
118 .port_pvid_set
= mv88e6xxx_port_pvid_set
,
119 .port_vlan_add
= mv88e6xxx_port_vlan_add
,
120 .port_vlan_del
= mv88e6xxx_port_vlan_del
,
121 .vlan_getnext
= mv88e6xxx_vlan_getnext
,
122 .port_fdb_prepare
= mv88e6xxx_port_fdb_prepare
,
123 .port_fdb_add
= mv88e6xxx_port_fdb_add
,
124 .port_fdb_del
= mv88e6xxx_port_fdb_del
,
125 .port_fdb_getnext
= mv88e6xxx_port_fdb_getnext
,
126 .port_fdb_dump
= mv88e6xxx_port_fdb_dump
,
129 MODULE_ALIAS("platform:mv88e6171");
130 MODULE_ALIAS("platform:mv88e6175");
131 MODULE_ALIAS("platform:mv88e6350");
132 MODULE_ALIAS("platform:mv88e6351");