drivers/net/dsa/mv88e6171.c

   1 /* net/dsa/mv88e6171.c - Marvell 88e6171 switch chip support
   2  * Copyright (c) 2008-2009 Marvell Semiconductor
   3  * Copyright (c) 2014 Claudio Leite <leitec@staticky.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  */
  10
  11 #include <linux/delay.h>
  12 #include <linux/jiffies.h>
  13 #include <linux/list.h>
  14 #include <linux/module.h>
  15 #include <linux/netdevice.h>
  16 #include <linux/phy.h>
  17 #include <net/dsa.h>
  18 #include "mv88e6xxx.h"
  19
  20 static const struct mv88e6xxx_switch_id mv88e6171_table[] = {
  21         { PORT_SWITCH_ID_6171, "Marvell 88E6171" },
  22         { PORT_SWITCH_ID_6175, "Marvell 88E6175" },
  23         { PORT_SWITCH_ID_6350, "Marvell 88E6350" },
  24         { PORT_SWITCH_ID_6351, "Marvell 88E6351" },
  25 };
  26
  27 static const char *mv88e6171_drv_probe(struct device *dsa_dev,
  28                                        struct device *host_dev, int sw_addr,
  29                                        void **priv)
  30 {
  31         return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv,
  32                                    mv88e6171_table,
  33                                    ARRAY_SIZE(mv88e6171_table));
  34 }
  35
  36 static int mv88e6171_setup_global(struct dsa_switch *ds)
  37 {
  38         u32 upstream_port = dsa_upstream_port(ds);
  39         int ret;
  40         u32 reg;
  41
  42         ret = mv88e6xxx_setup_global(ds);
  43         if (ret)
  44                 return ret;
  45
  46         /* Discard packets with excessive collisions, mask all
  47          * interrupt sources, enable PPU.
  48          */
  49         ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL,
  50                                   GLOBAL_CONTROL_PPU_ENABLE |
  51                                   GLOBAL_CONTROL_DISCARD_EXCESS);
  52         if (ret)
  53                 return ret;
  54
  55         /* Configure the upstream port, and configure the upstream
  56          * port as the port to which ingress and egress monitor frames
  57          * are to be sent.
  58          */
  59         reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
  60                 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
  61                 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT |
  62                 upstream_port << GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT;
  63         ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
  64         if (ret)
  65                 return ret;
  66
  67         /* Disable remote management for now, and set the switch's
  68          * DSA device number.
  69          */
  70         return mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL_2,
  71                                    ds->index & 0x1f);
  72 }
  73
  74 static int mv88e6171_setup(struct dsa_switch *ds)
  75 {
  76         struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
  77         int ret;
  78
  79         ps->ds = ds;
  80
  81         ret = mv88e6xxx_setup_common(ds);
  82         if (ret < 0)
  83                 return ret;
  84
  85         ps->num_ports = 7;
  86
  87         ret = mv88e6xxx_switch_reset(ds, true);
  88         if (ret < 0)
  89                 return ret;
  90
  91         ret = mv88e6171_setup_global(ds);
  92         if (ret < 0)
  93                 return ret;
  94
  95         return mv88e6xxx_setup_ports(ds);
  96 }
  97
  98 struct dsa_switch_driver mv88e6171_switch_driver = {
  99         .tag_protocol           = DSA_TAG_PROTO_EDSA,
 100         .probe                  = mv88e6171_drv_probe,
 101         .setup                  = mv88e6171_setup,
 102         .set_addr               = mv88e6xxx_set_addr_indirect,
 103         .phy_read               = mv88e6xxx_phy_read_indirect,
 104         .phy_write              = mv88e6xxx_phy_write_indirect,
 105         .get_strings            = mv88e6xxx_get_strings,
 106         .get_ethtool_stats      = mv88e6xxx_get_ethtool_stats,
 107         .get_sset_count         = mv88e6xxx_get_sset_count,
 108         .adjust_link            = mv88e6xxx_adjust_link,
 109 #ifdef CONFIG_NET_DSA_HWMON
 110         .get_temp               = mv88e6xxx_get_temp,
 111 #endif
 112         .get_regs_len           = mv88e6xxx_get_regs_len,
 113         .get_regs               = mv88e6xxx_get_regs,
 114         .port_bridge_join       = mv88e6xxx_port_bridge_join,
 115         .port_bridge_leave      = mv88e6xxx_port_bridge_leave,
 116         .port_stp_state_set     = mv88e6xxx_port_stp_state_set,
 117         .port_vlan_filtering    = mv88e6xxx_port_vlan_filtering,
 118         .port_vlan_prepare      = mv88e6xxx_port_vlan_prepare,
 119         .port_vlan_add          = mv88e6xxx_port_vlan_add,
 120         .port_vlan_del          = mv88e6xxx_port_vlan_del,
 121         .port_vlan_dump         = mv88e6xxx_port_vlan_dump,
 122         .port_fdb_prepare       = mv88e6xxx_port_fdb_prepare,
 123         .port_fdb_add           = mv88e6xxx_port_fdb_add,
 124         .port_fdb_del           = mv88e6xxx_port_fdb_del,
 125         .port_fdb_dump          = mv88e6xxx_port_fdb_dump,
 126 };
 127
 128 MODULE_ALIAS("platform:mv88e6171");
 129 MODULE_ALIAS("platform:mv88e6175");
 130 MODULE_ALIAS("platform:mv88e6350");
 131 MODULE_ALIAS("platform:mv88e6351");