1 /* net/dsa/mv88e6171.c - Marvell 88e6171 switch chip support
2 * Copyright (c) 2008-2009 Marvell Semiconductor
3 * Copyright (c) 2014 Claudio Leite <leitec@staticky.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
11 #include <linux/delay.h>
12 #include <linux/jiffies.h>
13 #include <linux/list.h>
14 #include <linux/module.h>
15 #include <linux/netdevice.h>
16 #include <linux/phy.h>
18 #include "mv88e6xxx.h"
20 static const struct mv88e6xxx_switch_id mv88e6171_table
[] = {
21 { PORT_SWITCH_ID_6171
, "Marvell 88E6171" },
22 { PORT_SWITCH_ID_6175
, "Marvell 88E6175" },
23 { PORT_SWITCH_ID_6350
, "Marvell 88E6350" },
24 { PORT_SWITCH_ID_6351
, "Marvell 88E6351" },
27 static char *mv88e6171_drv_probe(struct device
*dsa_dev
,
28 struct device
*host_dev
,
29 int sw_addr
, void **priv
)
31 return mv88e6xxx_drv_probe(dsa_dev
, host_dev
, sw_addr
, priv
,
33 ARRAY_SIZE(mv88e6171_table
));
36 static int mv88e6171_setup_global(struct dsa_switch
*ds
)
38 u32 upstream_port
= dsa_upstream_port(ds
);
42 ret
= mv88e6xxx_setup_global(ds
);
46 /* Discard packets with excessive collisions, mask all
47 * interrupt sources, enable PPU.
49 REG_WRITE(REG_GLOBAL
, GLOBAL_CONTROL
,
50 GLOBAL_CONTROL_PPU_ENABLE
| GLOBAL_CONTROL_DISCARD_EXCESS
);
52 /* Configure the upstream port, and configure the upstream
53 * port as the port to which ingress and egress monitor frames
56 reg
= upstream_port
<< GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT
|
57 upstream_port
<< GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT
|
58 upstream_port
<< GLOBAL_MONITOR_CONTROL_ARP_SHIFT
|
59 upstream_port
<< GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT
;
60 REG_WRITE(REG_GLOBAL
, GLOBAL_MONITOR_CONTROL
, reg
);
62 /* Disable remote management for now, and set the switch's
65 REG_WRITE(REG_GLOBAL
, GLOBAL_CONTROL_2
, ds
->index
& 0x1f);
70 static int mv88e6171_setup(struct dsa_switch
*ds
)
72 struct mv88e6xxx_priv_state
*ps
= ds_to_priv(ds
);
77 ret
= mv88e6xxx_setup_common(ds
);
83 ret
= mv88e6xxx_switch_reset(ds
, true);
87 ret
= mv88e6171_setup_global(ds
);
91 return mv88e6xxx_setup_ports(ds
);
94 struct dsa_switch_driver mv88e6171_switch_driver
= {
95 .tag_protocol
= DSA_TAG_PROTO_EDSA
,
96 .probe
= mv88e6171_drv_probe
,
97 .setup
= mv88e6171_setup
,
98 .set_addr
= mv88e6xxx_set_addr_indirect
,
99 .phy_read
= mv88e6xxx_phy_read_indirect
,
100 .phy_write
= mv88e6xxx_phy_write_indirect
,
101 .get_strings
= mv88e6xxx_get_strings
,
102 .get_ethtool_stats
= mv88e6xxx_get_ethtool_stats
,
103 .get_sset_count
= mv88e6xxx_get_sset_count
,
104 .adjust_link
= mv88e6xxx_adjust_link
,
105 #ifdef CONFIG_NET_DSA_HWMON
106 .get_temp
= mv88e6xxx_get_temp
,
108 .get_regs_len
= mv88e6xxx_get_regs_len
,
109 .get_regs
= mv88e6xxx_get_regs
,
110 .port_bridge_join
= mv88e6xxx_port_bridge_join
,
111 .port_bridge_leave
= mv88e6xxx_port_bridge_leave
,
112 .port_stp_state_set
= mv88e6xxx_port_stp_state_set
,
113 .port_vlan_filtering
= mv88e6xxx_port_vlan_filtering
,
114 .port_vlan_prepare
= mv88e6xxx_port_vlan_prepare
,
115 .port_vlan_add
= mv88e6xxx_port_vlan_add
,
116 .port_vlan_del
= mv88e6xxx_port_vlan_del
,
117 .port_vlan_dump
= mv88e6xxx_port_vlan_dump
,
118 .port_fdb_prepare
= mv88e6xxx_port_fdb_prepare
,
119 .port_fdb_add
= mv88e6xxx_port_fdb_add
,
120 .port_fdb_del
= mv88e6xxx_port_fdb_del
,
121 .port_fdb_dump
= mv88e6xxx_port_fdb_dump
,
124 MODULE_ALIAS("platform:mv88e6171");
125 MODULE_ALIAS("platform:mv88e6175");
126 MODULE_ALIAS("platform:mv88e6350");
127 MODULE_ALIAS("platform:mv88e6351");