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[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
1 /*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 /* Change Log
32 * 6.0.58 4/20/05
33 * o Accepted ethtool cleanup patch from Stephen Hemminger
34 * 6.0.44+ 2/15/05
35 * o applied Anton's patch to resolve tx hang in hardware
36 * o Applied Andrew Mortons patch - e1000 stops working after resume
37 */
38
39 char e1000_driver_name[] = "e1000";
40 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
41 #ifndef CONFIG_E1000_NAPI
42 #define DRIVERNAPI
43 #else
44 #define DRIVERNAPI "-NAPI"
45 #endif
46 #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
47 char e1000_driver_version[] = DRV_VERSION;
48 static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
49
50 /* e1000_pci_tbl - PCI Device ID Table
51 *
52 * Last entry must be all 0s
53 *
54 * Macro expands to...
55 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
56 */
57 static struct pci_device_id e1000_pci_tbl[] = {
58 INTEL_E1000_ETHERNET_DEVICE(0x1000),
59 INTEL_E1000_ETHERNET_DEVICE(0x1001),
60 INTEL_E1000_ETHERNET_DEVICE(0x1004),
61 INTEL_E1000_ETHERNET_DEVICE(0x1008),
62 INTEL_E1000_ETHERNET_DEVICE(0x1009),
63 INTEL_E1000_ETHERNET_DEVICE(0x100C),
64 INTEL_E1000_ETHERNET_DEVICE(0x100D),
65 INTEL_E1000_ETHERNET_DEVICE(0x100E),
66 INTEL_E1000_ETHERNET_DEVICE(0x100F),
67 INTEL_E1000_ETHERNET_DEVICE(0x1010),
68 INTEL_E1000_ETHERNET_DEVICE(0x1011),
69 INTEL_E1000_ETHERNET_DEVICE(0x1012),
70 INTEL_E1000_ETHERNET_DEVICE(0x1013),
71 INTEL_E1000_ETHERNET_DEVICE(0x1014),
72 INTEL_E1000_ETHERNET_DEVICE(0x1015),
73 INTEL_E1000_ETHERNET_DEVICE(0x1016),
74 INTEL_E1000_ETHERNET_DEVICE(0x1017),
75 INTEL_E1000_ETHERNET_DEVICE(0x1018),
76 INTEL_E1000_ETHERNET_DEVICE(0x1019),
77 INTEL_E1000_ETHERNET_DEVICE(0x101A),
78 INTEL_E1000_ETHERNET_DEVICE(0x101D),
79 INTEL_E1000_ETHERNET_DEVICE(0x101E),
80 INTEL_E1000_ETHERNET_DEVICE(0x1026),
81 INTEL_E1000_ETHERNET_DEVICE(0x1027),
82 INTEL_E1000_ETHERNET_DEVICE(0x1028),
83 INTEL_E1000_ETHERNET_DEVICE(0x105E),
84 INTEL_E1000_ETHERNET_DEVICE(0x105F),
85 INTEL_E1000_ETHERNET_DEVICE(0x1060),
86 INTEL_E1000_ETHERNET_DEVICE(0x1075),
87 INTEL_E1000_ETHERNET_DEVICE(0x1076),
88 INTEL_E1000_ETHERNET_DEVICE(0x1077),
89 INTEL_E1000_ETHERNET_DEVICE(0x1078),
90 INTEL_E1000_ETHERNET_DEVICE(0x1079),
91 INTEL_E1000_ETHERNET_DEVICE(0x107A),
92 INTEL_E1000_ETHERNET_DEVICE(0x107B),
93 INTEL_E1000_ETHERNET_DEVICE(0x107C),
94 INTEL_E1000_ETHERNET_DEVICE(0x107D),
95 INTEL_E1000_ETHERNET_DEVICE(0x107E),
96 INTEL_E1000_ETHERNET_DEVICE(0x107F),
97 INTEL_E1000_ETHERNET_DEVICE(0x108A),
98 INTEL_E1000_ETHERNET_DEVICE(0x108B),
99 INTEL_E1000_ETHERNET_DEVICE(0x108C),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
103 /* required last entry */
104 {0,}
105 };
106
107 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
108
109 int e1000_up(struct e1000_adapter *adapter);
110 void e1000_down(struct e1000_adapter *adapter);
111 void e1000_reset(struct e1000_adapter *adapter);
112 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
113 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
114 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
115 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
116 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
117 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
118 struct e1000_tx_ring *txdr);
119 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
120 struct e1000_rx_ring *rxdr);
121 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
122 struct e1000_tx_ring *tx_ring);
123 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
124 struct e1000_rx_ring *rx_ring);
125 void e1000_update_stats(struct e1000_adapter *adapter);
126
127 /* Local Function Prototypes */
128
129 static int e1000_init_module(void);
130 static void e1000_exit_module(void);
131 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
132 static void __devexit e1000_remove(struct pci_dev *pdev);
133 static int e1000_alloc_queues(struct e1000_adapter *adapter);
134 #ifdef CONFIG_E1000_MQ
135 static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
136 #endif
137 static int e1000_sw_init(struct e1000_adapter *adapter);
138 static int e1000_open(struct net_device *netdev);
139 static int e1000_close(struct net_device *netdev);
140 static void e1000_configure_tx(struct e1000_adapter *adapter);
141 static void e1000_configure_rx(struct e1000_adapter *adapter);
142 static void e1000_setup_rctl(struct e1000_adapter *adapter);
143 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
144 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
145 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
146 struct e1000_tx_ring *tx_ring);
147 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
148 struct e1000_rx_ring *rx_ring);
149 static void e1000_set_multi(struct net_device *netdev);
150 static void e1000_update_phy_info(unsigned long data);
151 static void e1000_watchdog(unsigned long data);
152 static void e1000_watchdog_task(struct e1000_adapter *adapter);
153 static void e1000_82547_tx_fifo_stall(unsigned long data);
154 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
155 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
156 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
157 static int e1000_set_mac(struct net_device *netdev, void *p);
158 static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
159 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
160 struct e1000_tx_ring *tx_ring);
161 #ifdef CONFIG_E1000_NAPI
162 static int e1000_clean(struct net_device *poll_dev, int *budget);
163 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
164 struct e1000_rx_ring *rx_ring,
165 int *work_done, int work_to_do);
166 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
167 struct e1000_rx_ring *rx_ring,
168 int *work_done, int work_to_do);
169 #else
170 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
172 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
173 struct e1000_rx_ring *rx_ring);
174 #endif
175 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring,
177 int cleaned_count);
178 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
179 struct e1000_rx_ring *rx_ring,
180 int cleaned_count);
181 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
182 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
183 int cmd);
184 void e1000_set_ethtool_ops(struct net_device *netdev);
185 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
186 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
187 static void e1000_tx_timeout(struct net_device *dev);
188 static void e1000_tx_timeout_task(struct net_device *dev);
189 static void e1000_smartspeed(struct e1000_adapter *adapter);
190 static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
191 struct sk_buff *skb);
192
193 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
194 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
195 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
196 static void e1000_restore_vlan(struct e1000_adapter *adapter);
197
198 #ifdef CONFIG_PM
199 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
200 static int e1000_resume(struct pci_dev *pdev);
201 #endif
202
203 #ifdef CONFIG_NET_POLL_CONTROLLER
204 /* for netdump / net console */
205 static void e1000_netpoll (struct net_device *netdev);
206 #endif
207
208 #ifdef CONFIG_E1000_MQ
209 /* for multiple Rx queues */
210 void e1000_rx_schedule(void *data);
211 #endif
212
213 /* Exported from other modules */
214
215 extern void e1000_check_options(struct e1000_adapter *adapter);
216
217 static struct pci_driver e1000_driver = {
218 .name = e1000_driver_name,
219 .id_table = e1000_pci_tbl,
220 .probe = e1000_probe,
221 .remove = __devexit_p(e1000_remove),
222 /* Power Managment Hooks */
223 #ifdef CONFIG_PM
224 .suspend = e1000_suspend,
225 .resume = e1000_resume
226 #endif
227 };
228
229 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
230 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
231 MODULE_LICENSE("GPL");
232 MODULE_VERSION(DRV_VERSION);
233
234 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
235 module_param(debug, int, 0);
236 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
237
238 /**
239 * e1000_init_module - Driver Registration Routine
240 *
241 * e1000_init_module is the first routine called when the driver is
242 * loaded. All it does is register with the PCI subsystem.
243 **/
244
245 static int __init
246 e1000_init_module(void)
247 {
248 int ret;
249 printk(KERN_INFO "%s - version %s\n",
250 e1000_driver_string, e1000_driver_version);
251
252 printk(KERN_INFO "%s\n", e1000_copyright);
253
254 ret = pci_module_init(&e1000_driver);
255
256 return ret;
257 }
258
259 module_init(e1000_init_module);
260
261 /**
262 * e1000_exit_module - Driver Exit Cleanup Routine
263 *
264 * e1000_exit_module is called just before the driver is removed
265 * from memory.
266 **/
267
268 static void __exit
269 e1000_exit_module(void)
270 {
271 pci_unregister_driver(&e1000_driver);
272 }
273
274 module_exit(e1000_exit_module);
275
276 /**
277 * e1000_irq_disable - Mask off interrupt generation on the NIC
278 * @adapter: board private structure
279 **/
280
281 static inline void
282 e1000_irq_disable(struct e1000_adapter *adapter)
283 {
284 atomic_inc(&adapter->irq_sem);
285 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
286 E1000_WRITE_FLUSH(&adapter->hw);
287 synchronize_irq(adapter->pdev->irq);
288 }
289
290 /**
291 * e1000_irq_enable - Enable default interrupt generation settings
292 * @adapter: board private structure
293 **/
294
295 static inline void
296 e1000_irq_enable(struct e1000_adapter *adapter)
297 {
298 if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
299 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
300 E1000_WRITE_FLUSH(&adapter->hw);
301 }
302 }
303
304 static void
305 e1000_update_mng_vlan(struct e1000_adapter *adapter)
306 {
307 struct net_device *netdev = adapter->netdev;
308 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
309 uint16_t old_vid = adapter->mng_vlan_id;
310 if(adapter->vlgrp) {
311 if(!adapter->vlgrp->vlan_devices[vid]) {
312 if(adapter->hw.mng_cookie.status &
313 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
314 e1000_vlan_rx_add_vid(netdev, vid);
315 adapter->mng_vlan_id = vid;
316 } else
317 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
318
319 if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
320 (vid != old_vid) &&
321 !adapter->vlgrp->vlan_devices[old_vid])
322 e1000_vlan_rx_kill_vid(netdev, old_vid);
323 }
324 }
325 }
326
327 /**
328 * e1000_release_hw_control - release control of the h/w to f/w
329 * @adapter: address of board private structure
330 *
331 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
332 * For ASF and Pass Through versions of f/w this means that the
333 * driver is no longer loaded. For AMT version (only with 82573) i
334 * of the f/w this means that the netowrk i/f is closed.
335 *
336 **/
337
338 static inline void
339 e1000_release_hw_control(struct e1000_adapter *adapter)
340 {
341 uint32_t ctrl_ext;
342 uint32_t swsm;
343
344 /* Let firmware taken over control of h/w */
345 switch (adapter->hw.mac_type) {
346 case e1000_82571:
347 case e1000_82572:
348 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
349 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
350 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
351 break;
352 case e1000_82573:
353 swsm = E1000_READ_REG(&adapter->hw, SWSM);
354 E1000_WRITE_REG(&adapter->hw, SWSM,
355 swsm & ~E1000_SWSM_DRV_LOAD);
356 default:
357 break;
358 }
359 }
360
361 /**
362 * e1000_get_hw_control - get control of the h/w from f/w
363 * @adapter: address of board private structure
364 *
365 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
366 * For ASF and Pass Through versions of f/w this means that
367 * the driver is loaded. For AMT version (only with 82573)
368 * of the f/w this means that the netowrk i/f is open.
369 *
370 **/
371
372 static inline void
373 e1000_get_hw_control(struct e1000_adapter *adapter)
374 {
375 uint32_t ctrl_ext;
376 uint32_t swsm;
377 /* Let firmware know the driver has taken over */
378 switch (adapter->hw.mac_type) {
379 case e1000_82571:
380 case e1000_82572:
381 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
382 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
383 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
384 break;
385 case e1000_82573:
386 swsm = E1000_READ_REG(&adapter->hw, SWSM);
387 E1000_WRITE_REG(&adapter->hw, SWSM,
388 swsm | E1000_SWSM_DRV_LOAD);
389 break;
390 default:
391 break;
392 }
393 }
394
395 int
396 e1000_up(struct e1000_adapter *adapter)
397 {
398 struct net_device *netdev = adapter->netdev;
399 int i, err;
400
401 /* hardware has been reset, we need to reload some things */
402
403 /* Reset the PHY if it was previously powered down */
404 if(adapter->hw.media_type == e1000_media_type_copper) {
405 uint16_t mii_reg;
406 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
407 if(mii_reg & MII_CR_POWER_DOWN)
408 e1000_phy_reset(&adapter->hw);
409 }
410
411 e1000_set_multi(netdev);
412
413 e1000_restore_vlan(adapter);
414
415 e1000_configure_tx(adapter);
416 e1000_setup_rctl(adapter);
417 e1000_configure_rx(adapter);
418 /* call E1000_DESC_UNUSED which always leaves
419 * at least 1 descriptor unused to make sure
420 * next_to_use != next_to_clean */
421 for (i = 0; i < adapter->num_rx_queues; i++) {
422 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
423 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
424 }
425
426 #ifdef CONFIG_PCI_MSI
427 if(adapter->hw.mac_type > e1000_82547_rev_2) {
428 adapter->have_msi = TRUE;
429 if((err = pci_enable_msi(adapter->pdev))) {
430 DPRINTK(PROBE, ERR,
431 "Unable to allocate MSI interrupt Error: %d\n", err);
432 adapter->have_msi = FALSE;
433 }
434 }
435 #endif
436 if((err = request_irq(adapter->pdev->irq, &e1000_intr,
437 SA_SHIRQ | SA_SAMPLE_RANDOM,
438 netdev->name, netdev))) {
439 DPRINTK(PROBE, ERR,
440 "Unable to allocate interrupt Error: %d\n", err);
441 return err;
442 }
443
444 #ifdef CONFIG_E1000_MQ
445 e1000_setup_queue_mapping(adapter);
446 #endif
447
448 adapter->tx_queue_len = netdev->tx_queue_len;
449
450 mod_timer(&adapter->watchdog_timer, jiffies);
451
452 #ifdef CONFIG_E1000_NAPI
453 netif_poll_enable(netdev);
454 #endif
455 e1000_irq_enable(adapter);
456
457 return 0;
458 }
459
460 void
461 e1000_down(struct e1000_adapter *adapter)
462 {
463 struct net_device *netdev = adapter->netdev;
464 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
465 e1000_check_mng_mode(&adapter->hw);
466
467 e1000_irq_disable(adapter);
468 #ifdef CONFIG_E1000_MQ
469 while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
470 #endif
471 free_irq(adapter->pdev->irq, netdev);
472 #ifdef CONFIG_PCI_MSI
473 if(adapter->hw.mac_type > e1000_82547_rev_2 &&
474 adapter->have_msi == TRUE)
475 pci_disable_msi(adapter->pdev);
476 #endif
477 del_timer_sync(&adapter->tx_fifo_stall_timer);
478 del_timer_sync(&adapter->watchdog_timer);
479 del_timer_sync(&adapter->phy_info_timer);
480
481 #ifdef CONFIG_E1000_NAPI
482 netif_poll_disable(netdev);
483 #endif
484 netdev->tx_queue_len = adapter->tx_queue_len;
485 adapter->link_speed = 0;
486 adapter->link_duplex = 0;
487 netif_carrier_off(netdev);
488 netif_stop_queue(netdev);
489
490 e1000_reset(adapter);
491 e1000_clean_all_tx_rings(adapter);
492 e1000_clean_all_rx_rings(adapter);
493
494 /* Power down the PHY so no link is implied when interface is down *
495 * The PHY cannot be powered down if any of the following is TRUE *
496 * (a) WoL is enabled
497 * (b) AMT is active
498 * (c) SoL/IDER session is active */
499 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
500 adapter->hw.media_type == e1000_media_type_copper &&
501 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
502 !mng_mode_enabled &&
503 !e1000_check_phy_reset_block(&adapter->hw)) {
504 uint16_t mii_reg;
505 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
506 mii_reg |= MII_CR_POWER_DOWN;
507 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
508 mdelay(1);
509 }
510 }
511
512 void
513 e1000_reset(struct e1000_adapter *adapter)
514 {
515 uint32_t pba, manc;
516 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
517
518 /* Repartition Pba for greater than 9k mtu
519 * To take effect CTRL.RST is required.
520 */
521
522 switch (adapter->hw.mac_type) {
523 case e1000_82547:
524 case e1000_82547_rev_2:
525 pba = E1000_PBA_30K;
526 break;
527 case e1000_82571:
528 case e1000_82572:
529 pba = E1000_PBA_38K;
530 break;
531 case e1000_82573:
532 pba = E1000_PBA_12K;
533 break;
534 default:
535 pba = E1000_PBA_48K;
536 break;
537 }
538
539 if((adapter->hw.mac_type != e1000_82573) &&
540 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
541 pba -= 8; /* allocate more FIFO for Tx */
542
543
544 if(adapter->hw.mac_type == e1000_82547) {
545 adapter->tx_fifo_head = 0;
546 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
547 adapter->tx_fifo_size =
548 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
549 atomic_set(&adapter->tx_fifo_stall, 0);
550 }
551
552 E1000_WRITE_REG(&adapter->hw, PBA, pba);
553
554 /* flow control settings */
555 /* Set the FC high water mark to 90% of the FIFO size.
556 * Required to clear last 3 LSB */
557 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
558
559 adapter->hw.fc_high_water = fc_high_water_mark;
560 adapter->hw.fc_low_water = fc_high_water_mark - 8;
561 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
562 adapter->hw.fc_send_xon = 1;
563 adapter->hw.fc = adapter->hw.original_fc;
564
565 /* Allow time for pending master requests to run */
566 e1000_reset_hw(&adapter->hw);
567 if(adapter->hw.mac_type >= e1000_82544)
568 E1000_WRITE_REG(&adapter->hw, WUC, 0);
569 if(e1000_init_hw(&adapter->hw))
570 DPRINTK(PROBE, ERR, "Hardware Error\n");
571 e1000_update_mng_vlan(adapter);
572 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
573 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
574
575 e1000_reset_adaptive(&adapter->hw);
576 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
577 if (adapter->en_mng_pt) {
578 manc = E1000_READ_REG(&adapter->hw, MANC);
579 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
580 E1000_WRITE_REG(&adapter->hw, MANC, manc);
581 }
582 }
583
584 /**
585 * e1000_probe - Device Initialization Routine
586 * @pdev: PCI device information struct
587 * @ent: entry in e1000_pci_tbl
588 *
589 * Returns 0 on success, negative on failure
590 *
591 * e1000_probe initializes an adapter identified by a pci_dev structure.
592 * The OS initialization, configuring of the adapter private structure,
593 * and a hardware reset occur.
594 **/
595
596 static int __devinit
597 e1000_probe(struct pci_dev *pdev,
598 const struct pci_device_id *ent)
599 {
600 struct net_device *netdev;
601 struct e1000_adapter *adapter;
602 unsigned long mmio_start, mmio_len;
603
604 static int cards_found = 0;
605 int i, err, pci_using_dac;
606 uint16_t eeprom_data;
607 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
608 if((err = pci_enable_device(pdev)))
609 return err;
610
611 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
612 pci_using_dac = 1;
613 } else {
614 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
615 E1000_ERR("No usable DMA configuration, aborting\n");
616 return err;
617 }
618 pci_using_dac = 0;
619 }
620
621 if((err = pci_request_regions(pdev, e1000_driver_name)))
622 return err;
623
624 pci_set_master(pdev);
625
626 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
627 if(!netdev) {
628 err = -ENOMEM;
629 goto err_alloc_etherdev;
630 }
631
632 SET_MODULE_OWNER(netdev);
633 SET_NETDEV_DEV(netdev, &pdev->dev);
634
635 pci_set_drvdata(pdev, netdev);
636 adapter = netdev_priv(netdev);
637 adapter->netdev = netdev;
638 adapter->pdev = pdev;
639 adapter->hw.back = adapter;
640 adapter->msg_enable = (1 << debug) - 1;
641
642 mmio_start = pci_resource_start(pdev, BAR_0);
643 mmio_len = pci_resource_len(pdev, BAR_0);
644
645 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
646 if(!adapter->hw.hw_addr) {
647 err = -EIO;
648 goto err_ioremap;
649 }
650
651 for(i = BAR_1; i <= BAR_5; i++) {
652 if(pci_resource_len(pdev, i) == 0)
653 continue;
654 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
655 adapter->hw.io_base = pci_resource_start(pdev, i);
656 break;
657 }
658 }
659
660 netdev->open = &e1000_open;
661 netdev->stop = &e1000_close;
662 netdev->hard_start_xmit = &e1000_xmit_frame;
663 netdev->get_stats = &e1000_get_stats;
664 netdev->set_multicast_list = &e1000_set_multi;
665 netdev->set_mac_address = &e1000_set_mac;
666 netdev->change_mtu = &e1000_change_mtu;
667 netdev->do_ioctl = &e1000_ioctl;
668 e1000_set_ethtool_ops(netdev);
669 netdev->tx_timeout = &e1000_tx_timeout;
670 netdev->watchdog_timeo = 5 * HZ;
671 #ifdef CONFIG_E1000_NAPI
672 netdev->poll = &e1000_clean;
673 netdev->weight = 64;
674 #endif
675 netdev->vlan_rx_register = e1000_vlan_rx_register;
676 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
677 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
678 #ifdef CONFIG_NET_POLL_CONTROLLER
679 netdev->poll_controller = e1000_netpoll;
680 #endif
681 strcpy(netdev->name, pci_name(pdev));
682
683 netdev->mem_start = mmio_start;
684 netdev->mem_end = mmio_start + mmio_len;
685 netdev->base_addr = adapter->hw.io_base;
686
687 adapter->bd_number = cards_found;
688
689 /* setup the private structure */
690
691 if((err = e1000_sw_init(adapter)))
692 goto err_sw_init;
693
694 if((err = e1000_check_phy_reset_block(&adapter->hw)))
695 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
696
697 if(adapter->hw.mac_type >= e1000_82543) {
698 netdev->features = NETIF_F_SG |
699 NETIF_F_HW_CSUM |
700 NETIF_F_HW_VLAN_TX |
701 NETIF_F_HW_VLAN_RX |
702 NETIF_F_HW_VLAN_FILTER;
703 }
704
705 #ifdef NETIF_F_TSO
706 if((adapter->hw.mac_type >= e1000_82544) &&
707 (adapter->hw.mac_type != e1000_82547))
708 netdev->features |= NETIF_F_TSO;
709
710 #ifdef NETIF_F_TSO_IPV6
711 if(adapter->hw.mac_type > e1000_82547_rev_2)
712 netdev->features |= NETIF_F_TSO_IPV6;
713 #endif
714 #endif
715 if(pci_using_dac)
716 netdev->features |= NETIF_F_HIGHDMA;
717
718 /* hard_start_xmit is safe against parallel locking */
719 netdev->features |= NETIF_F_LLTX;
720
721 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
722
723 /* before reading the EEPROM, reset the controller to
724 * put the device in a known good starting state */
725
726 e1000_reset_hw(&adapter->hw);
727
728 /* make sure the EEPROM is good */
729
730 if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
731 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
732 err = -EIO;
733 goto err_eeprom;
734 }
735
736 /* copy the MAC address out of the EEPROM */
737
738 if(e1000_read_mac_addr(&adapter->hw))
739 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
740 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
741 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
742
743 if(!is_valid_ether_addr(netdev->perm_addr)) {
744 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
745 err = -EIO;
746 goto err_eeprom;
747 }
748
749 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
750
751 e1000_get_bus_info(&adapter->hw);
752
753 init_timer(&adapter->tx_fifo_stall_timer);
754 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
755 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
756
757 init_timer(&adapter->watchdog_timer);
758 adapter->watchdog_timer.function = &e1000_watchdog;
759 adapter->watchdog_timer.data = (unsigned long) adapter;
760
761 INIT_WORK(&adapter->watchdog_task,
762 (void (*)(void *))e1000_watchdog_task, adapter);
763
764 init_timer(&adapter->phy_info_timer);
765 adapter->phy_info_timer.function = &e1000_update_phy_info;
766 adapter->phy_info_timer.data = (unsigned long) adapter;
767
768 INIT_WORK(&adapter->tx_timeout_task,
769 (void (*)(void *))e1000_tx_timeout_task, netdev);
770
771 /* we're going to reset, so assume we have no link for now */
772
773 netif_carrier_off(netdev);
774 netif_stop_queue(netdev);
775
776 e1000_check_options(adapter);
777
778 /* Initial Wake on LAN setting
779 * If APM wake is enabled in the EEPROM,
780 * enable the ACPI Magic Packet filter
781 */
782
783 switch(adapter->hw.mac_type) {
784 case e1000_82542_rev2_0:
785 case e1000_82542_rev2_1:
786 case e1000_82543:
787 break;
788 case e1000_82544:
789 e1000_read_eeprom(&adapter->hw,
790 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
791 eeprom_apme_mask = E1000_EEPROM_82544_APM;
792 break;
793 case e1000_82546:
794 case e1000_82546_rev_3:
795 case e1000_82571:
796 if(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
797 e1000_read_eeprom(&adapter->hw,
798 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
799 break;
800 }
801 /* Fall Through */
802 default:
803 e1000_read_eeprom(&adapter->hw,
804 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
805 break;
806 }
807 if(eeprom_data & eeprom_apme_mask)
808 adapter->wol |= E1000_WUFC_MAG;
809
810 /* print bus type/speed/width info */
811 {
812 struct e1000_hw *hw = &adapter->hw;
813 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
814 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
815 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
816 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
817 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
818 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
819 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
820 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
821 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
822 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
823 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
824 "32-bit"));
825 }
826
827 for (i = 0; i < 6; i++)
828 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
829
830 /* reset the hardware with the new settings */
831 e1000_reset(adapter);
832
833 /* If the controller is 82573 and f/w is AMT, do not set
834 * DRV_LOAD until the interface is up. For all other cases,
835 * let the f/w know that the h/w is now under the control
836 * of the driver. */
837 if (adapter->hw.mac_type != e1000_82573 ||
838 !e1000_check_mng_mode(&adapter->hw))
839 e1000_get_hw_control(adapter);
840
841 strcpy(netdev->name, "eth%d");
842 if((err = register_netdev(netdev)))
843 goto err_register;
844
845 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
846
847 cards_found++;
848 return 0;
849
850 err_register:
851 err_sw_init:
852 err_eeprom:
853 iounmap(adapter->hw.hw_addr);
854 err_ioremap:
855 free_netdev(netdev);
856 err_alloc_etherdev:
857 pci_release_regions(pdev);
858 return err;
859 }
860
861 /**
862 * e1000_remove - Device Removal Routine
863 * @pdev: PCI device information struct
864 *
865 * e1000_remove is called by the PCI subsystem to alert the driver
866 * that it should release a PCI device. The could be caused by a
867 * Hot-Plug event, or because the driver is going to be removed from
868 * memory.
869 **/
870
871 static void __devexit
872 e1000_remove(struct pci_dev *pdev)
873 {
874 struct net_device *netdev = pci_get_drvdata(pdev);
875 struct e1000_adapter *adapter = netdev_priv(netdev);
876 uint32_t manc;
877 #ifdef CONFIG_E1000_NAPI
878 int i;
879 #endif
880
881 flush_scheduled_work();
882
883 if(adapter->hw.mac_type >= e1000_82540 &&
884 adapter->hw.media_type == e1000_media_type_copper) {
885 manc = E1000_READ_REG(&adapter->hw, MANC);
886 if(manc & E1000_MANC_SMBUS_EN) {
887 manc |= E1000_MANC_ARP_EN;
888 E1000_WRITE_REG(&adapter->hw, MANC, manc);
889 }
890 }
891
892 /* Release control of h/w to f/w. If f/w is AMT enabled, this
893 * would have already happened in close and is redundant. */
894 e1000_release_hw_control(adapter);
895
896 unregister_netdev(netdev);
897 #ifdef CONFIG_E1000_NAPI
898 for (i = 0; i < adapter->num_rx_queues; i++)
899 __dev_put(&adapter->polling_netdev[i]);
900 #endif
901
902 if(!e1000_check_phy_reset_block(&adapter->hw))
903 e1000_phy_hw_reset(&adapter->hw);
904
905 kfree(adapter->tx_ring);
906 kfree(adapter->rx_ring);
907 #ifdef CONFIG_E1000_NAPI
908 kfree(adapter->polling_netdev);
909 #endif
910
911 iounmap(adapter->hw.hw_addr);
912 pci_release_regions(pdev);
913
914 #ifdef CONFIG_E1000_MQ
915 free_percpu(adapter->cpu_netdev);
916 free_percpu(adapter->cpu_tx_ring);
917 #endif
918 free_netdev(netdev);
919
920 pci_disable_device(pdev);
921 }
922
923 /**
924 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
925 * @adapter: board private structure to initialize
926 *
927 * e1000_sw_init initializes the Adapter private data structure.
928 * Fields are initialized based on PCI device information and
929 * OS network device settings (MTU size).
930 **/
931
932 static int __devinit
933 e1000_sw_init(struct e1000_adapter *adapter)
934 {
935 struct e1000_hw *hw = &adapter->hw;
936 struct net_device *netdev = adapter->netdev;
937 struct pci_dev *pdev = adapter->pdev;
938 #ifdef CONFIG_E1000_NAPI
939 int i;
940 #endif
941
942 /* PCI config space info */
943
944 hw->vendor_id = pdev->vendor;
945 hw->device_id = pdev->device;
946 hw->subsystem_vendor_id = pdev->subsystem_vendor;
947 hw->subsystem_id = pdev->subsystem_device;
948
949 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
950
951 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
952
953 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
954 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
955 hw->max_frame_size = netdev->mtu +
956 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
957 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
958
959 /* identify the MAC */
960
961 if(e1000_set_mac_type(hw)) {
962 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
963 return -EIO;
964 }
965
966 /* initialize eeprom parameters */
967
968 if(e1000_init_eeprom_params(hw)) {
969 E1000_ERR("EEPROM initialization failed\n");
970 return -EIO;
971 }
972
973 switch(hw->mac_type) {
974 default:
975 break;
976 case e1000_82541:
977 case e1000_82547:
978 case e1000_82541_rev_2:
979 case e1000_82547_rev_2:
980 hw->phy_init_script = 1;
981 break;
982 }
983
984 e1000_set_media_type(hw);
985
986 hw->wait_autoneg_complete = FALSE;
987 hw->tbi_compatibility_en = TRUE;
988 hw->adaptive_ifs = TRUE;
989
990 /* Copper options */
991
992 if(hw->media_type == e1000_media_type_copper) {
993 hw->mdix = AUTO_ALL_MODES;
994 hw->disable_polarity_correction = FALSE;
995 hw->master_slave = E1000_MASTER_SLAVE;
996 }
997
998 #ifdef CONFIG_E1000_MQ
999 /* Number of supported queues */
1000 switch (hw->mac_type) {
1001 case e1000_82571:
1002 case e1000_82572:
1003 /* These controllers support 2 tx queues, but with a single
1004 * qdisc implementation, multiple tx queues aren't quite as
1005 * interesting. If we can find a logical way of mapping
1006 * flows to a queue, then perhaps we can up the num_tx_queue
1007 * count back to its default. Until then, we run the risk of
1008 * terrible performance due to SACK overload. */
1009 adapter->num_tx_queues = 1;
1010 adapter->num_rx_queues = 2;
1011 break;
1012 default:
1013 adapter->num_tx_queues = 1;
1014 adapter->num_rx_queues = 1;
1015 break;
1016 }
1017 adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
1018 adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
1019 DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
1020 adapter->num_rx_queues,
1021 ((adapter->num_rx_queues == 1)
1022 ? ((num_online_cpus() > 1)
1023 ? "(due to unsupported feature in current adapter)"
1024 : "(due to unsupported system configuration)")
1025 : ""));
1026 DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
1027 adapter->num_tx_queues);
1028 #else
1029 adapter->num_tx_queues = 1;
1030 adapter->num_rx_queues = 1;
1031 #endif
1032
1033 if (e1000_alloc_queues(adapter)) {
1034 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1035 return -ENOMEM;
1036 }
1037
1038 #ifdef CONFIG_E1000_NAPI
1039 for (i = 0; i < adapter->num_rx_queues; i++) {
1040 adapter->polling_netdev[i].priv = adapter;
1041 adapter->polling_netdev[i].poll = &e1000_clean;
1042 adapter->polling_netdev[i].weight = 64;
1043 dev_hold(&adapter->polling_netdev[i]);
1044 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1045 }
1046 spin_lock_init(&adapter->tx_queue_lock);
1047 #endif
1048
1049 atomic_set(&adapter->irq_sem, 1);
1050 spin_lock_init(&adapter->stats_lock);
1051
1052 return 0;
1053 }
1054
1055 /**
1056 * e1000_alloc_queues - Allocate memory for all rings
1057 * @adapter: board private structure to initialize
1058 *
1059 * We allocate one ring per queue at run-time since we don't know the
1060 * number of queues at compile-time. The polling_netdev array is
1061 * intended for Multiqueue, but should work fine with a single queue.
1062 **/
1063
1064 static int __devinit
1065 e1000_alloc_queues(struct e1000_adapter *adapter)
1066 {
1067 int size;
1068
1069 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1070 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1071 if (!adapter->tx_ring)
1072 return -ENOMEM;
1073 memset(adapter->tx_ring, 0, size);
1074
1075 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1076 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1077 if (!adapter->rx_ring) {
1078 kfree(adapter->tx_ring);
1079 return -ENOMEM;
1080 }
1081 memset(adapter->rx_ring, 0, size);
1082
1083 #ifdef CONFIG_E1000_NAPI
1084 size = sizeof(struct net_device) * adapter->num_rx_queues;
1085 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1086 if (!adapter->polling_netdev) {
1087 kfree(adapter->tx_ring);
1088 kfree(adapter->rx_ring);
1089 return -ENOMEM;
1090 }
1091 memset(adapter->polling_netdev, 0, size);
1092 #endif
1093
1094 #ifdef CONFIG_E1000_MQ
1095 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1096 adapter->rx_sched_call_data.info = adapter->netdev;
1097
1098 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1099 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1100 #endif
1101
1102 return E1000_SUCCESS;
1103 }
1104
1105 #ifdef CONFIG_E1000_MQ
1106 static void __devinit
1107 e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1108 {
1109 int i, cpu;
1110
1111 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1112 adapter->rx_sched_call_data.info = adapter->netdev;
1113 cpus_clear(adapter->rx_sched_call_data.cpumask);
1114
1115 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1116 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1117
1118 lock_cpu_hotplug();
1119 i = 0;
1120 for_each_online_cpu(cpu) {
1121 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
1122 /* This is incomplete because we'd like to assign separate
1123 * physical cpus to these netdev polling structures and
1124 * avoid saturating a subset of cpus.
1125 */
1126 if (i < adapter->num_rx_queues) {
1127 *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
1128 adapter->rx_ring[i].cpu = cpu;
1129 cpu_set(cpu, adapter->cpumask);
1130 } else
1131 *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1132
1133 i++;
1134 }
1135 unlock_cpu_hotplug();
1136 }
1137 #endif
1138
1139 /**
1140 * e1000_open - Called when a network interface is made active
1141 * @netdev: network interface device structure
1142 *
1143 * Returns 0 on success, negative value on failure
1144 *
1145 * The open entry point is called when a network interface is made
1146 * active by the system (IFF_UP). At this point all resources needed
1147 * for transmit and receive operations are allocated, the interrupt
1148 * handler is registered with the OS, the watchdog timer is started,
1149 * and the stack is notified that the interface is ready.
1150 **/
1151
1152 static int
1153 e1000_open(struct net_device *netdev)
1154 {
1155 struct e1000_adapter *adapter = netdev_priv(netdev);
1156 int err;
1157
1158 /* allocate transmit descriptors */
1159
1160 if ((err = e1000_setup_all_tx_resources(adapter)))
1161 goto err_setup_tx;
1162
1163 /* allocate receive descriptors */
1164
1165 if ((err = e1000_setup_all_rx_resources(adapter)))
1166 goto err_setup_rx;
1167
1168 if((err = e1000_up(adapter)))
1169 goto err_up;
1170 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1171 if((adapter->hw.mng_cookie.status &
1172 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1173 e1000_update_mng_vlan(adapter);
1174 }
1175
1176 /* If AMT is enabled, let the firmware know that the network
1177 * interface is now open */
1178 if (adapter->hw.mac_type == e1000_82573 &&
1179 e1000_check_mng_mode(&adapter->hw))
1180 e1000_get_hw_control(adapter);
1181
1182 return E1000_SUCCESS;
1183
1184 err_up:
1185 e1000_free_all_rx_resources(adapter);
1186 err_setup_rx:
1187 e1000_free_all_tx_resources(adapter);
1188 err_setup_tx:
1189 e1000_reset(adapter);
1190
1191 return err;
1192 }
1193
1194 /**
1195 * e1000_close - Disables a network interface
1196 * @netdev: network interface device structure
1197 *
1198 * Returns 0, this is not allowed to fail
1199 *
1200 * The close entry point is called when an interface is de-activated
1201 * by the OS. The hardware is still under the drivers control, but
1202 * needs to be disabled. A global MAC reset is issued to stop the
1203 * hardware, and all transmit and receive resources are freed.
1204 **/
1205
1206 static int
1207 e1000_close(struct net_device *netdev)
1208 {
1209 struct e1000_adapter *adapter = netdev_priv(netdev);
1210
1211 e1000_down(adapter);
1212
1213 e1000_free_all_tx_resources(adapter);
1214 e1000_free_all_rx_resources(adapter);
1215
1216 if((adapter->hw.mng_cookie.status &
1217 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1218 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1219 }
1220
1221 /* If AMT is enabled, let the firmware know that the network
1222 * interface is now closed */
1223 if (adapter->hw.mac_type == e1000_82573 &&
1224 e1000_check_mng_mode(&adapter->hw))
1225 e1000_release_hw_control(adapter);
1226
1227 return 0;
1228 }
1229
1230 /**
1231 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1232 * @adapter: address of board private structure
1233 * @start: address of beginning of memory
1234 * @len: length of memory
1235 **/
1236 static inline boolean_t
1237 e1000_check_64k_bound(struct e1000_adapter *adapter,
1238 void *start, unsigned long len)
1239 {
1240 unsigned long begin = (unsigned long) start;
1241 unsigned long end = begin + len;
1242
1243 /* First rev 82545 and 82546 need to not allow any memory
1244 * write location to cross 64k boundary due to errata 23 */
1245 if (adapter->hw.mac_type == e1000_82545 ||
1246 adapter->hw.mac_type == e1000_82546) {
1247 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1248 }
1249
1250 return TRUE;
1251 }
1252
1253 /**
1254 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1255 * @adapter: board private structure
1256 * @txdr: tx descriptor ring (for a specific queue) to setup
1257 *
1258 * Return 0 on success, negative on failure
1259 **/
1260
1261 static int
1262 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1263 struct e1000_tx_ring *txdr)
1264 {
1265 struct pci_dev *pdev = adapter->pdev;
1266 int size;
1267
1268 size = sizeof(struct e1000_buffer) * txdr->count;
1269
1270 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1271 if(!txdr->buffer_info) {
1272 DPRINTK(PROBE, ERR,
1273 "Unable to allocate memory for the transmit descriptor ring\n");
1274 return -ENOMEM;
1275 }
1276 memset(txdr->buffer_info, 0, size);
1277
1278 /* round up to nearest 4K */
1279
1280 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1281 E1000_ROUNDUP(txdr->size, 4096);
1282
1283 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1284 if(!txdr->desc) {
1285 setup_tx_desc_die:
1286 vfree(txdr->buffer_info);
1287 DPRINTK(PROBE, ERR,
1288 "Unable to allocate memory for the transmit descriptor ring\n");
1289 return -ENOMEM;
1290 }
1291
1292 /* Fix for errata 23, can't cross 64kB boundary */
1293 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1294 void *olddesc = txdr->desc;
1295 dma_addr_t olddma = txdr->dma;
1296 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1297 "at %p\n", txdr->size, txdr->desc);
1298 /* Try again, without freeing the previous */
1299 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1300 if(!txdr->desc) {
1301 /* Failed allocation, critical failure */
1302 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1303 goto setup_tx_desc_die;
1304 }
1305
1306 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1307 /* give up */
1308 pci_free_consistent(pdev, txdr->size, txdr->desc,
1309 txdr->dma);
1310 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1311 DPRINTK(PROBE, ERR,
1312 "Unable to allocate aligned memory "
1313 "for the transmit descriptor ring\n");
1314 vfree(txdr->buffer_info);
1315 return -ENOMEM;
1316 } else {
1317 /* Free old allocation, new allocation was successful */
1318 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1319 }
1320 }
1321 memset(txdr->desc, 0, txdr->size);
1322
1323 txdr->next_to_use = 0;
1324 txdr->next_to_clean = 0;
1325 spin_lock_init(&txdr->tx_lock);
1326
1327 return 0;
1328 }
1329
1330 /**
1331 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1332 * (Descriptors) for all queues
1333 * @adapter: board private structure
1334 *
1335 * If this function returns with an error, then it's possible one or
1336 * more of the rings is populated (while the rest are not). It is the
1337 * callers duty to clean those orphaned rings.
1338 *
1339 * Return 0 on success, negative on failure
1340 **/
1341
1342 int
1343 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1344 {
1345 int i, err = 0;
1346
1347 for (i = 0; i < adapter->num_tx_queues; i++) {
1348 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1349 if (err) {
1350 DPRINTK(PROBE, ERR,
1351 "Allocation for Tx Queue %u failed\n", i);
1352 break;
1353 }
1354 }
1355
1356 return err;
1357 }
1358
1359 /**
1360 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1361 * @adapter: board private structure
1362 *
1363 * Configure the Tx unit of the MAC after a reset.
1364 **/
1365
1366 static void
1367 e1000_configure_tx(struct e1000_adapter *adapter)
1368 {
1369 uint64_t tdba;
1370 struct e1000_hw *hw = &adapter->hw;
1371 uint32_t tdlen, tctl, tipg, tarc;
1372 uint32_t ipgr1, ipgr2;
1373
1374 /* Setup the HW Tx Head and Tail descriptor pointers */
1375
1376 switch (adapter->num_tx_queues) {
1377 case 2:
1378 tdba = adapter->tx_ring[1].dma;
1379 tdlen = adapter->tx_ring[1].count *
1380 sizeof(struct e1000_tx_desc);
1381 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1382 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1383 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1384 E1000_WRITE_REG(hw, TDH1, 0);
1385 E1000_WRITE_REG(hw, TDT1, 0);
1386 adapter->tx_ring[1].tdh = E1000_TDH1;
1387 adapter->tx_ring[1].tdt = E1000_TDT1;
1388 /* Fall Through */
1389 case 1:
1390 default:
1391 tdba = adapter->tx_ring[0].dma;
1392 tdlen = adapter->tx_ring[0].count *
1393 sizeof(struct e1000_tx_desc);
1394 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1395 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1396 E1000_WRITE_REG(hw, TDLEN, tdlen);
1397 E1000_WRITE_REG(hw, TDH, 0);
1398 E1000_WRITE_REG(hw, TDT, 0);
1399 adapter->tx_ring[0].tdh = E1000_TDH;
1400 adapter->tx_ring[0].tdt = E1000_TDT;
1401 break;
1402 }
1403
1404 /* Set the default values for the Tx Inter Packet Gap timer */
1405
1406 if (hw->media_type == e1000_media_type_fiber ||
1407 hw->media_type == e1000_media_type_internal_serdes)
1408 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1409 else
1410 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1411
1412 switch (hw->mac_type) {
1413 case e1000_82542_rev2_0:
1414 case e1000_82542_rev2_1:
1415 tipg = DEFAULT_82542_TIPG_IPGT;
1416 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1417 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1418 break;
1419 default:
1420 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1421 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1422 break;
1423 }
1424 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1425 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1426 E1000_WRITE_REG(hw, TIPG, tipg);
1427
1428 /* Set the Tx Interrupt Delay register */
1429
1430 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1431 if (hw->mac_type >= e1000_82540)
1432 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1433
1434 /* Program the Transmit Control Register */
1435
1436 tctl = E1000_READ_REG(hw, TCTL);
1437
1438 tctl &= ~E1000_TCTL_CT;
1439 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1440 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1441
1442 E1000_WRITE_REG(hw, TCTL, tctl);
1443
1444 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1445 tarc = E1000_READ_REG(hw, TARC0);
1446 tarc |= ((1 << 25) | (1 << 21));
1447 E1000_WRITE_REG(hw, TARC0, tarc);
1448 tarc = E1000_READ_REG(hw, TARC1);
1449 tarc |= (1 << 25);
1450 if (tctl & E1000_TCTL_MULR)
1451 tarc &= ~(1 << 28);
1452 else
1453 tarc |= (1 << 28);
1454 E1000_WRITE_REG(hw, TARC1, tarc);
1455 }
1456
1457 e1000_config_collision_dist(hw);
1458
1459 /* Setup Transmit Descriptor Settings for eop descriptor */
1460 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1461 E1000_TXD_CMD_IFCS;
1462
1463 if (hw->mac_type < e1000_82543)
1464 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1465 else
1466 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1467
1468 /* Cache if we're 82544 running in PCI-X because we'll
1469 * need this to apply a workaround later in the send path. */
1470 if (hw->mac_type == e1000_82544 &&
1471 hw->bus_type == e1000_bus_type_pcix)
1472 adapter->pcix_82544 = 1;
1473 }
1474
1475 /**
1476 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1477 * @adapter: board private structure
1478 * @rxdr: rx descriptor ring (for a specific queue) to setup
1479 *
1480 * Returns 0 on success, negative on failure
1481 **/
1482
1483 static int
1484 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1485 struct e1000_rx_ring *rxdr)
1486 {
1487 struct pci_dev *pdev = adapter->pdev;
1488 int size, desc_len;
1489
1490 size = sizeof(struct e1000_buffer) * rxdr->count;
1491 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1492 if (!rxdr->buffer_info) {
1493 DPRINTK(PROBE, ERR,
1494 "Unable to allocate memory for the receive descriptor ring\n");
1495 return -ENOMEM;
1496 }
1497 memset(rxdr->buffer_info, 0, size);
1498
1499 size = sizeof(struct e1000_ps_page) * rxdr->count;
1500 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1501 if(!rxdr->ps_page) {
1502 vfree(rxdr->buffer_info);
1503 DPRINTK(PROBE, ERR,
1504 "Unable to allocate memory for the receive descriptor ring\n");
1505 return -ENOMEM;
1506 }
1507 memset(rxdr->ps_page, 0, size);
1508
1509 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1510 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1511 if(!rxdr->ps_page_dma) {
1512 vfree(rxdr->buffer_info);
1513 kfree(rxdr->ps_page);
1514 DPRINTK(PROBE, ERR,
1515 "Unable to allocate memory for the receive descriptor ring\n");
1516 return -ENOMEM;
1517 }
1518 memset(rxdr->ps_page_dma, 0, size);
1519
1520 if(adapter->hw.mac_type <= e1000_82547_rev_2)
1521 desc_len = sizeof(struct e1000_rx_desc);
1522 else
1523 desc_len = sizeof(union e1000_rx_desc_packet_split);
1524
1525 /* Round up to nearest 4K */
1526
1527 rxdr->size = rxdr->count * desc_len;
1528 E1000_ROUNDUP(rxdr->size, 4096);
1529
1530 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1531
1532 if (!rxdr->desc) {
1533 DPRINTK(PROBE, ERR,
1534 "Unable to allocate memory for the receive descriptor ring\n");
1535 setup_rx_desc_die:
1536 vfree(rxdr->buffer_info);
1537 kfree(rxdr->ps_page);
1538 kfree(rxdr->ps_page_dma);
1539 return -ENOMEM;
1540 }
1541
1542 /* Fix for errata 23, can't cross 64kB boundary */
1543 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1544 void *olddesc = rxdr->desc;
1545 dma_addr_t olddma = rxdr->dma;
1546 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1547 "at %p\n", rxdr->size, rxdr->desc);
1548 /* Try again, without freeing the previous */
1549 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1550 /* Failed allocation, critical failure */
1551 if (!rxdr->desc) {
1552 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1553 DPRINTK(PROBE, ERR,
1554 "Unable to allocate memory "
1555 "for the receive descriptor ring\n");
1556 goto setup_rx_desc_die;
1557 }
1558
1559 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1560 /* give up */
1561 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1562 rxdr->dma);
1563 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1564 DPRINTK(PROBE, ERR,
1565 "Unable to allocate aligned memory "
1566 "for the receive descriptor ring\n");
1567 goto setup_rx_desc_die;
1568 } else {
1569 /* Free old allocation, new allocation was successful */
1570 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1571 }
1572 }
1573 memset(rxdr->desc, 0, rxdr->size);
1574
1575 rxdr->next_to_clean = 0;
1576 rxdr->next_to_use = 0;
1577 rxdr->rx_skb_top = NULL;
1578 rxdr->rx_skb_prev = NULL;
1579
1580 return 0;
1581 }
1582
1583 /**
1584 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1585 * (Descriptors) for all queues
1586 * @adapter: board private structure
1587 *
1588 * If this function returns with an error, then it's possible one or
1589 * more of the rings is populated (while the rest are not). It is the
1590 * callers duty to clean those orphaned rings.
1591 *
1592 * Return 0 on success, negative on failure
1593 **/
1594
1595 int
1596 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1597 {
1598 int i, err = 0;
1599
1600 for (i = 0; i < adapter->num_rx_queues; i++) {
1601 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1602 if (err) {
1603 DPRINTK(PROBE, ERR,
1604 "Allocation for Rx Queue %u failed\n", i);
1605 break;
1606 }
1607 }
1608
1609 return err;
1610 }
1611
1612 /**
1613 * e1000_setup_rctl - configure the receive control registers
1614 * @adapter: Board private structure
1615 **/
1616 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1617 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1618 static void
1619 e1000_setup_rctl(struct e1000_adapter *adapter)
1620 {
1621 uint32_t rctl, rfctl;
1622 uint32_t psrctl = 0;
1623 #ifdef CONFIG_E1000_PACKET_SPLIT
1624 uint32_t pages = 0;
1625 #endif
1626
1627 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1628
1629 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1630
1631 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1632 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1633 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1634
1635 if (adapter->hw.mac_type > e1000_82543)
1636 rctl |= E1000_RCTL_SECRC;
1637
1638 if (adapter->hw.tbi_compatibility_on == 1)
1639 rctl |= E1000_RCTL_SBP;
1640 else
1641 rctl &= ~E1000_RCTL_SBP;
1642
1643 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1644 rctl &= ~E1000_RCTL_LPE;
1645 else
1646 rctl |= E1000_RCTL_LPE;
1647
1648 /* Setup buffer sizes */
1649 if(adapter->hw.mac_type >= e1000_82571) {
1650 /* We can now specify buffers in 1K increments.
1651 * BSIZE and BSEX are ignored in this case. */
1652 rctl |= adapter->rx_buffer_len << 0x11;
1653 } else {
1654 rctl &= ~E1000_RCTL_SZ_4096;
1655 rctl |= E1000_RCTL_BSEX;
1656 switch (adapter->rx_buffer_len) {
1657 case E1000_RXBUFFER_2048:
1658 default:
1659 rctl |= E1000_RCTL_SZ_2048;
1660 rctl &= ~E1000_RCTL_BSEX;
1661 break;
1662 case E1000_RXBUFFER_4096:
1663 rctl |= E1000_RCTL_SZ_4096;
1664 break;
1665 case E1000_RXBUFFER_8192:
1666 rctl |= E1000_RCTL_SZ_8192;
1667 break;
1668 case E1000_RXBUFFER_16384:
1669 rctl |= E1000_RCTL_SZ_16384;
1670 break;
1671 }
1672 }
1673
1674 #ifdef CONFIG_E1000_PACKET_SPLIT
1675 /* 82571 and greater support packet-split where the protocol
1676 * header is placed in skb->data and the packet data is
1677 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1678 * In the case of a non-split, skb->data is linearly filled,
1679 * followed by the page buffers. Therefore, skb->data is
1680 * sized to hold the largest protocol header.
1681 */
1682 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1683 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1684 PAGE_SIZE <= 16384)
1685 adapter->rx_ps_pages = pages;
1686 else
1687 adapter->rx_ps_pages = 0;
1688 #endif
1689 if (adapter->rx_ps_pages) {
1690 /* Configure extra packet-split registers */
1691 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1692 rfctl |= E1000_RFCTL_EXTEN;
1693 /* disable IPv6 packet split support */
1694 rfctl |= E1000_RFCTL_IPV6_DIS;
1695 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1696
1697 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1698
1699 psrctl |= adapter->rx_ps_bsize0 >>
1700 E1000_PSRCTL_BSIZE0_SHIFT;
1701
1702 switch (adapter->rx_ps_pages) {
1703 case 3:
1704 psrctl |= PAGE_SIZE <<
1705 E1000_PSRCTL_BSIZE3_SHIFT;
1706 case 2:
1707 psrctl |= PAGE_SIZE <<
1708 E1000_PSRCTL_BSIZE2_SHIFT;
1709 case 1:
1710 psrctl |= PAGE_SIZE >>
1711 E1000_PSRCTL_BSIZE1_SHIFT;
1712 break;
1713 }
1714
1715 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1716 }
1717
1718 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1719 }
1720
1721 /**
1722 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1723 * @adapter: board private structure
1724 *
1725 * Configure the Rx unit of the MAC after a reset.
1726 **/
1727
1728 static void
1729 e1000_configure_rx(struct e1000_adapter *adapter)
1730 {
1731 uint64_t rdba;
1732 struct e1000_hw *hw = &adapter->hw;
1733 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1734 #ifdef CONFIG_E1000_MQ
1735 uint32_t reta, mrqc;
1736 int i;
1737 #endif
1738
1739 if (adapter->rx_ps_pages) {
1740 rdlen = adapter->rx_ring[0].count *
1741 sizeof(union e1000_rx_desc_packet_split);
1742 adapter->clean_rx = e1000_clean_rx_irq_ps;
1743 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1744 } else {
1745 rdlen = adapter->rx_ring[0].count *
1746 sizeof(struct e1000_rx_desc);
1747 adapter->clean_rx = e1000_clean_rx_irq;
1748 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1749 }
1750
1751 /* disable receives while setting up the descriptors */
1752 rctl = E1000_READ_REG(hw, RCTL);
1753 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1754
1755 /* set the Receive Delay Timer Register */
1756 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1757
1758 if (hw->mac_type >= e1000_82540) {
1759 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1760 if(adapter->itr > 1)
1761 E1000_WRITE_REG(hw, ITR,
1762 1000000000 / (adapter->itr * 256));
1763 }
1764
1765 if (hw->mac_type >= e1000_82571) {
1766 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1767 /* Reset delay timers after every interrupt */
1768 ctrl_ext |= E1000_CTRL_EXT_CANC;
1769 #ifdef CONFIG_E1000_NAPI
1770 /* Auto-Mask interrupts upon ICR read. */
1771 ctrl_ext |= E1000_CTRL_EXT_IAME;
1772 #endif
1773 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1774 E1000_WRITE_REG(hw, IAM, ~0);
1775 E1000_WRITE_FLUSH(hw);
1776 }
1777
1778 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1779 * the Base and Length of the Rx Descriptor Ring */
1780 switch (adapter->num_rx_queues) {
1781 #ifdef CONFIG_E1000_MQ
1782 case 2:
1783 rdba = adapter->rx_ring[1].dma;
1784 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1785 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1786 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1787 E1000_WRITE_REG(hw, RDH1, 0);
1788 E1000_WRITE_REG(hw, RDT1, 0);
1789 adapter->rx_ring[1].rdh = E1000_RDH1;
1790 adapter->rx_ring[1].rdt = E1000_RDT1;
1791 /* Fall Through */
1792 #endif
1793 case 1:
1794 default:
1795 rdba = adapter->rx_ring[0].dma;
1796 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1797 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1798 E1000_WRITE_REG(hw, RDLEN, rdlen);
1799 E1000_WRITE_REG(hw, RDH, 0);
1800 E1000_WRITE_REG(hw, RDT, 0);
1801 adapter->rx_ring[0].rdh = E1000_RDH;
1802 adapter->rx_ring[0].rdt = E1000_RDT;
1803 break;
1804 }
1805
1806 #ifdef CONFIG_E1000_MQ
1807 if (adapter->num_rx_queues > 1) {
1808 uint32_t random[10];
1809
1810 get_random_bytes(&random[0], 40);
1811
1812 if (hw->mac_type <= e1000_82572) {
1813 E1000_WRITE_REG(hw, RSSIR, 0);
1814 E1000_WRITE_REG(hw, RSSIM, 0);
1815 }
1816
1817 switch (adapter->num_rx_queues) {
1818 case 2:
1819 default:
1820 reta = 0x00800080;
1821 mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1822 break;
1823 }
1824
1825 /* Fill out redirection table */
1826 for (i = 0; i < 32; i++)
1827 E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1828 /* Fill out hash function seeds */
1829 for (i = 0; i < 10; i++)
1830 E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1831
1832 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1833 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1834 E1000_WRITE_REG(hw, MRQC, mrqc);
1835 }
1836
1837 /* Multiqueue and packet checksumming are mutually exclusive. */
1838 if (hw->mac_type >= e1000_82571) {
1839 rxcsum = E1000_READ_REG(hw, RXCSUM);
1840 rxcsum |= E1000_RXCSUM_PCSD;
1841 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1842 }
1843
1844 #else
1845
1846 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1847 if (hw->mac_type >= e1000_82543) {
1848 rxcsum = E1000_READ_REG(hw, RXCSUM);
1849 if(adapter->rx_csum == TRUE) {
1850 rxcsum |= E1000_RXCSUM_TUOFL;
1851
1852 /* Enable 82571 IPv4 payload checksum for UDP fragments
1853 * Must be used in conjunction with packet-split. */
1854 if ((hw->mac_type >= e1000_82571) &&
1855 (adapter->rx_ps_pages)) {
1856 rxcsum |= E1000_RXCSUM_IPPCSE;
1857 }
1858 } else {
1859 rxcsum &= ~E1000_RXCSUM_TUOFL;
1860 /* don't need to clear IPPCSE as it defaults to 0 */
1861 }
1862 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1863 }
1864 #endif /* CONFIG_E1000_MQ */
1865
1866 if (hw->mac_type == e1000_82573)
1867 E1000_WRITE_REG(hw, ERT, 0x0100);
1868
1869 /* Enable Receives */
1870 E1000_WRITE_REG(hw, RCTL, rctl);
1871 }
1872
1873 /**
1874 * e1000_free_tx_resources - Free Tx Resources per Queue
1875 * @adapter: board private structure
1876 * @tx_ring: Tx descriptor ring for a specific queue
1877 *
1878 * Free all transmit software resources
1879 **/
1880
1881 static void
1882 e1000_free_tx_resources(struct e1000_adapter *adapter,
1883 struct e1000_tx_ring *tx_ring)
1884 {
1885 struct pci_dev *pdev = adapter->pdev;
1886
1887 e1000_clean_tx_ring(adapter, tx_ring);
1888
1889 vfree(tx_ring->buffer_info);
1890 tx_ring->buffer_info = NULL;
1891
1892 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1893
1894 tx_ring->desc = NULL;
1895 }
1896
1897 /**
1898 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1899 * @adapter: board private structure
1900 *
1901 * Free all transmit software resources
1902 **/
1903
1904 void
1905 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1906 {
1907 int i;
1908
1909 for (i = 0; i < adapter->num_tx_queues; i++)
1910 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1911 }
1912
1913 static inline void
1914 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1915 struct e1000_buffer *buffer_info)
1916 {
1917 if(buffer_info->dma) {
1918 pci_unmap_page(adapter->pdev,
1919 buffer_info->dma,
1920 buffer_info->length,
1921 PCI_DMA_TODEVICE);
1922 buffer_info->dma = 0;
1923 }
1924 if(buffer_info->skb) {
1925 dev_kfree_skb_any(buffer_info->skb);
1926 buffer_info->skb = NULL;
1927 }
1928 }
1929
1930 /**
1931 * e1000_clean_tx_ring - Free Tx Buffers
1932 * @adapter: board private structure
1933 * @tx_ring: ring to be cleaned
1934 **/
1935
1936 static void
1937 e1000_clean_tx_ring(struct e1000_adapter *adapter,
1938 struct e1000_tx_ring *tx_ring)
1939 {
1940 struct e1000_buffer *buffer_info;
1941 unsigned long size;
1942 unsigned int i;
1943
1944 /* Free all the Tx ring sk_buffs */
1945
1946 for(i = 0; i < tx_ring->count; i++) {
1947 buffer_info = &tx_ring->buffer_info[i];
1948 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1949 }
1950
1951 size = sizeof(struct e1000_buffer) * tx_ring->count;
1952 memset(tx_ring->buffer_info, 0, size);
1953
1954 /* Zero out the descriptor ring */
1955
1956 memset(tx_ring->desc, 0, tx_ring->size);
1957
1958 tx_ring->next_to_use = 0;
1959 tx_ring->next_to_clean = 0;
1960 tx_ring->last_tx_tso = 0;
1961
1962 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1963 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1964 }
1965
1966 /**
1967 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1968 * @adapter: board private structure
1969 **/
1970
1971 static void
1972 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1973 {
1974 int i;
1975
1976 for (i = 0; i < adapter->num_tx_queues; i++)
1977 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1978 }
1979
1980 /**
1981 * e1000_free_rx_resources - Free Rx Resources
1982 * @adapter: board private structure
1983 * @rx_ring: ring to clean the resources from
1984 *
1985 * Free all receive software resources
1986 **/
1987
1988 static void
1989 e1000_free_rx_resources(struct e1000_adapter *adapter,
1990 struct e1000_rx_ring *rx_ring)
1991 {
1992 struct pci_dev *pdev = adapter->pdev;
1993
1994 e1000_clean_rx_ring(adapter, rx_ring);
1995
1996 vfree(rx_ring->buffer_info);
1997 rx_ring->buffer_info = NULL;
1998 kfree(rx_ring->ps_page);
1999 rx_ring->ps_page = NULL;
2000 kfree(rx_ring->ps_page_dma);
2001 rx_ring->ps_page_dma = NULL;
2002
2003 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2004
2005 rx_ring->desc = NULL;
2006 }
2007
2008 /**
2009 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2010 * @adapter: board private structure
2011 *
2012 * Free all receive software resources
2013 **/
2014
2015 void
2016 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2017 {
2018 int i;
2019
2020 for (i = 0; i < adapter->num_rx_queues; i++)
2021 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2022 }
2023
2024 /**
2025 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2026 * @adapter: board private structure
2027 * @rx_ring: ring to free buffers from
2028 **/
2029
2030 static void
2031 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2032 struct e1000_rx_ring *rx_ring)
2033 {
2034 struct e1000_buffer *buffer_info;
2035 struct e1000_ps_page *ps_page;
2036 struct e1000_ps_page_dma *ps_page_dma;
2037 struct pci_dev *pdev = adapter->pdev;
2038 unsigned long size;
2039 unsigned int i, j;
2040
2041 /* Free all the Rx ring sk_buffs */
2042
2043 for(i = 0; i < rx_ring->count; i++) {
2044 buffer_info = &rx_ring->buffer_info[i];
2045 if(buffer_info->skb) {
2046 ps_page = &rx_ring->ps_page[i];
2047 ps_page_dma = &rx_ring->ps_page_dma[i];
2048 pci_unmap_single(pdev,
2049 buffer_info->dma,
2050 buffer_info->length,
2051 PCI_DMA_FROMDEVICE);
2052
2053 dev_kfree_skb(buffer_info->skb);
2054 buffer_info->skb = NULL;
2055 }
2056 ps_page = &rx_ring->ps_page[i];
2057 ps_page_dma = &rx_ring->ps_page_dma[i];
2058 for (j = 0; j < adapter->rx_ps_pages; j++) {
2059 if (!ps_page->ps_page[j]) break;
2060 pci_unmap_page(pdev,
2061 ps_page_dma->ps_page_dma[j],
2062 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2063 ps_page_dma->ps_page_dma[j] = 0;
2064 put_page(ps_page->ps_page[j]);
2065 ps_page->ps_page[j] = NULL;
2066 }
2067 }
2068
2069 /* there also may be some cached data in our adapter */
2070 if (rx_ring->rx_skb_top) {
2071 dev_kfree_skb(rx_ring->rx_skb_top);
2072
2073 /* rx_skb_prev will be wiped out by rx_skb_top */
2074 rx_ring->rx_skb_top = NULL;
2075 rx_ring->rx_skb_prev = NULL;
2076 }
2077
2078
2079 size = sizeof(struct e1000_buffer) * rx_ring->count;
2080 memset(rx_ring->buffer_info, 0, size);
2081 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2082 memset(rx_ring->ps_page, 0, size);
2083 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2084 memset(rx_ring->ps_page_dma, 0, size);
2085
2086 /* Zero out the descriptor ring */
2087
2088 memset(rx_ring->desc, 0, rx_ring->size);
2089
2090 rx_ring->next_to_clean = 0;
2091 rx_ring->next_to_use = 0;
2092
2093 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2094 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2095 }
2096
2097 /**
2098 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2099 * @adapter: board private structure
2100 **/
2101
2102 static void
2103 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2104 {
2105 int i;
2106
2107 for (i = 0; i < adapter->num_rx_queues; i++)
2108 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2109 }
2110
2111 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2112 * and memory write and invalidate disabled for certain operations
2113 */
2114 static void
2115 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2116 {
2117 struct net_device *netdev = adapter->netdev;
2118 uint32_t rctl;
2119
2120 e1000_pci_clear_mwi(&adapter->hw);
2121
2122 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2123 rctl |= E1000_RCTL_RST;
2124 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2125 E1000_WRITE_FLUSH(&adapter->hw);
2126 mdelay(5);
2127
2128 if(netif_running(netdev))
2129 e1000_clean_all_rx_rings(adapter);
2130 }
2131
2132 static void
2133 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2134 {
2135 struct net_device *netdev = adapter->netdev;
2136 uint32_t rctl;
2137
2138 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2139 rctl &= ~E1000_RCTL_RST;
2140 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2141 E1000_WRITE_FLUSH(&adapter->hw);
2142 mdelay(5);
2143
2144 if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2145 e1000_pci_set_mwi(&adapter->hw);
2146
2147 if(netif_running(netdev)) {
2148 e1000_configure_rx(adapter);
2149 /* No need to loop, because 82542 supports only 1 queue */
2150 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2151 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2152 }
2153 }
2154
2155 /**
2156 * e1000_set_mac - Change the Ethernet Address of the NIC
2157 * @netdev: network interface device structure
2158 * @p: pointer to an address structure
2159 *
2160 * Returns 0 on success, negative on failure
2161 **/
2162
2163 static int
2164 e1000_set_mac(struct net_device *netdev, void *p)
2165 {
2166 struct e1000_adapter *adapter = netdev_priv(netdev);
2167 struct sockaddr *addr = p;
2168
2169 if(!is_valid_ether_addr(addr->sa_data))
2170 return -EADDRNOTAVAIL;
2171
2172 /* 82542 2.0 needs to be in reset to write receive address registers */
2173
2174 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2175 e1000_enter_82542_rst(adapter);
2176
2177 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2178 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2179
2180 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2181
2182 /* With 82571 controllers, LAA may be overwritten (with the default)
2183 * due to controller reset from the other port. */
2184 if (adapter->hw.mac_type == e1000_82571) {
2185 /* activate the work around */
2186 adapter->hw.laa_is_present = 1;
2187
2188 /* Hold a copy of the LAA in RAR[14] This is done so that
2189 * between the time RAR[0] gets clobbered and the time it
2190 * gets fixed (in e1000_watchdog), the actual LAA is in one
2191 * of the RARs and no incoming packets directed to this port
2192 * are dropped. Eventaully the LAA will be in RAR[0] and
2193 * RAR[14] */
2194 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2195 E1000_RAR_ENTRIES - 1);
2196 }
2197
2198 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2199 e1000_leave_82542_rst(adapter);
2200
2201 return 0;
2202 }
2203
2204 /**
2205 * e1000_set_multi - Multicast and Promiscuous mode set
2206 * @netdev: network interface device structure
2207 *
2208 * The set_multi entry point is called whenever the multicast address
2209 * list or the network interface flags are updated. This routine is
2210 * responsible for configuring the hardware for proper multicast,
2211 * promiscuous mode, and all-multi behavior.
2212 **/
2213
2214 static void
2215 e1000_set_multi(struct net_device *netdev)
2216 {
2217 struct e1000_adapter *adapter = netdev_priv(netdev);
2218 struct e1000_hw *hw = &adapter->hw;
2219 struct dev_mc_list *mc_ptr;
2220 uint32_t rctl;
2221 uint32_t hash_value;
2222 int i, rar_entries = E1000_RAR_ENTRIES;
2223
2224 /* reserve RAR[14] for LAA over-write work-around */
2225 if (adapter->hw.mac_type == e1000_82571)
2226 rar_entries--;
2227
2228 /* Check for Promiscuous and All Multicast modes */
2229
2230 rctl = E1000_READ_REG(hw, RCTL);
2231
2232 if(netdev->flags & IFF_PROMISC) {
2233 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2234 } else if(netdev->flags & IFF_ALLMULTI) {
2235 rctl |= E1000_RCTL_MPE;
2236 rctl &= ~E1000_RCTL_UPE;
2237 } else {
2238 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2239 }
2240
2241 E1000_WRITE_REG(hw, RCTL, rctl);
2242
2243 /* 82542 2.0 needs to be in reset to write receive address registers */
2244
2245 if(hw->mac_type == e1000_82542_rev2_0)
2246 e1000_enter_82542_rst(adapter);
2247
2248 /* load the first 14 multicast address into the exact filters 1-14
2249 * RAR 0 is used for the station MAC adddress
2250 * if there are not 14 addresses, go ahead and clear the filters
2251 * -- with 82571 controllers only 0-13 entries are filled here
2252 */
2253 mc_ptr = netdev->mc_list;
2254
2255 for(i = 1; i < rar_entries; i++) {
2256 if (mc_ptr) {
2257 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2258 mc_ptr = mc_ptr->next;
2259 } else {
2260 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2261 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2262 }
2263 }
2264
2265 /* clear the old settings from the multicast hash table */
2266
2267 for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
2268 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2269
2270 /* load any remaining addresses into the hash table */
2271
2272 for(; mc_ptr; mc_ptr = mc_ptr->next) {
2273 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2274 e1000_mta_set(hw, hash_value);
2275 }
2276
2277 if(hw->mac_type == e1000_82542_rev2_0)
2278 e1000_leave_82542_rst(adapter);
2279 }
2280
2281 /* Need to wait a few seconds after link up to get diagnostic information from
2282 * the phy */
2283
2284 static void
2285 e1000_update_phy_info(unsigned long data)
2286 {
2287 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2288 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2289 }
2290
2291 /**
2292 * e1000_82547_tx_fifo_stall - Timer Call-back
2293 * @data: pointer to adapter cast into an unsigned long
2294 **/
2295
2296 static void
2297 e1000_82547_tx_fifo_stall(unsigned long data)
2298 {
2299 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2300 struct net_device *netdev = adapter->netdev;
2301 uint32_t tctl;
2302
2303 if(atomic_read(&adapter->tx_fifo_stall)) {
2304 if((E1000_READ_REG(&adapter->hw, TDT) ==
2305 E1000_READ_REG(&adapter->hw, TDH)) &&
2306 (E1000_READ_REG(&adapter->hw, TDFT) ==
2307 E1000_READ_REG(&adapter->hw, TDFH)) &&
2308 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2309 E1000_READ_REG(&adapter->hw, TDFHS))) {
2310 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2311 E1000_WRITE_REG(&adapter->hw, TCTL,
2312 tctl & ~E1000_TCTL_EN);
2313 E1000_WRITE_REG(&adapter->hw, TDFT,
2314 adapter->tx_head_addr);
2315 E1000_WRITE_REG(&adapter->hw, TDFH,
2316 adapter->tx_head_addr);
2317 E1000_WRITE_REG(&adapter->hw, TDFTS,
2318 adapter->tx_head_addr);
2319 E1000_WRITE_REG(&adapter->hw, TDFHS,
2320 adapter->tx_head_addr);
2321 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2322 E1000_WRITE_FLUSH(&adapter->hw);
2323
2324 adapter->tx_fifo_head = 0;
2325 atomic_set(&adapter->tx_fifo_stall, 0);
2326 netif_wake_queue(netdev);
2327 } else {
2328 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2329 }
2330 }
2331 }
2332
2333 /**
2334 * e1000_watchdog - Timer Call-back
2335 * @data: pointer to adapter cast into an unsigned long
2336 **/
2337 static void
2338 e1000_watchdog(unsigned long data)
2339 {
2340 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2341
2342 /* Do the rest outside of interrupt context */
2343 schedule_work(&adapter->watchdog_task);
2344 }
2345
2346 static void
2347 e1000_watchdog_task(struct e1000_adapter *adapter)
2348 {
2349 struct net_device *netdev = adapter->netdev;
2350 struct e1000_tx_ring *txdr = adapter->tx_ring;
2351 uint32_t link;
2352
2353 e1000_check_for_link(&adapter->hw);
2354 if (adapter->hw.mac_type == e1000_82573) {
2355 e1000_enable_tx_pkt_filtering(&adapter->hw);
2356 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2357 e1000_update_mng_vlan(adapter);
2358 }
2359
2360 if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2361 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2362 link = !adapter->hw.serdes_link_down;
2363 else
2364 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2365
2366 if(link) {
2367 if(!netif_carrier_ok(netdev)) {
2368 e1000_get_speed_and_duplex(&adapter->hw,
2369 &adapter->link_speed,
2370 &adapter->link_duplex);
2371
2372 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2373 adapter->link_speed,
2374 adapter->link_duplex == FULL_DUPLEX ?
2375 "Full Duplex" : "Half Duplex");
2376
2377 /* tweak tx_queue_len according to speed/duplex */
2378 netdev->tx_queue_len = adapter->tx_queue_len;
2379 adapter->tx_timeout_factor = 1;
2380 if (adapter->link_duplex == HALF_DUPLEX) {
2381 switch (adapter->link_speed) {
2382 case SPEED_10:
2383 netdev->tx_queue_len = 10;
2384 adapter->tx_timeout_factor = 8;
2385 break;
2386 case SPEED_100:
2387 netdev->tx_queue_len = 100;
2388 break;
2389 }
2390 }
2391
2392 netif_carrier_on(netdev);
2393 netif_wake_queue(netdev);
2394 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2395 adapter->smartspeed = 0;
2396 }
2397 } else {
2398 if(netif_carrier_ok(netdev)) {
2399 adapter->link_speed = 0;
2400 adapter->link_duplex = 0;
2401 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2402 netif_carrier_off(netdev);
2403 netif_stop_queue(netdev);
2404 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2405 }
2406
2407 e1000_smartspeed(adapter);
2408 }
2409
2410 e1000_update_stats(adapter);
2411
2412 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2413 adapter->tpt_old = adapter->stats.tpt;
2414 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2415 adapter->colc_old = adapter->stats.colc;
2416
2417 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2418 adapter->gorcl_old = adapter->stats.gorcl;
2419 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2420 adapter->gotcl_old = adapter->stats.gotcl;
2421
2422 e1000_update_adaptive(&adapter->hw);
2423
2424 #ifdef CONFIG_E1000_MQ
2425 txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2426 #endif
2427 if (!netif_carrier_ok(netdev)) {
2428 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2429 /* We've lost link, so the controller stops DMA,
2430 * but we've got queued Tx work that's never going
2431 * to get done, so reset controller to flush Tx.
2432 * (Do the reset outside of interrupt context). */
2433 schedule_work(&adapter->tx_timeout_task);
2434 }
2435 }
2436
2437 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2438 if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2439 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2440 * asymmetrical Tx or Rx gets ITR=8000; everyone
2441 * else is between 2000-8000. */
2442 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2443 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2444 adapter->gotcl - adapter->gorcl :
2445 adapter->gorcl - adapter->gotcl) / 10000;
2446 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2447 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2448 }
2449
2450 /* Cause software interrupt to ensure rx ring is cleaned */
2451 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2452
2453 /* Force detection of hung controller every watchdog period */
2454 adapter->detect_tx_hung = TRUE;
2455
2456 /* With 82571 controllers, LAA may be overwritten due to controller
2457 * reset from the other port. Set the appropriate LAA in RAR[0] */
2458 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2459 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2460
2461 /* Reset the timer */
2462 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2463 }
2464
2465 #define E1000_TX_FLAGS_CSUM 0x00000001
2466 #define E1000_TX_FLAGS_VLAN 0x00000002
2467 #define E1000_TX_FLAGS_TSO 0x00000004
2468 #define E1000_TX_FLAGS_IPV4 0x00000008
2469 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2470 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2471
2472 static inline int
2473 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2474 struct sk_buff *skb)
2475 {
2476 #ifdef NETIF_F_TSO
2477 struct e1000_context_desc *context_desc;
2478 struct e1000_buffer *buffer_info;
2479 unsigned int i;
2480 uint32_t cmd_length = 0;
2481 uint16_t ipcse = 0, tucse, mss;
2482 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2483 int err;
2484
2485 if(skb_shinfo(skb)->tso_size) {
2486 if (skb_header_cloned(skb)) {
2487 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2488 if (err)
2489 return err;
2490 }
2491
2492 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2493 mss = skb_shinfo(skb)->tso_size;
2494 if(skb->protocol == ntohs(ETH_P_IP)) {
2495 skb->nh.iph->tot_len = 0;
2496 skb->nh.iph->check = 0;
2497 skb->h.th->check =
2498 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2499 skb->nh.iph->daddr,
2500 0,
2501 IPPROTO_TCP,
2502 0);
2503 cmd_length = E1000_TXD_CMD_IP;
2504 ipcse = skb->h.raw - skb->data - 1;
2505 #ifdef NETIF_F_TSO_IPV6
2506 } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
2507 skb->nh.ipv6h->payload_len = 0;
2508 skb->h.th->check =
2509 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2510 &skb->nh.ipv6h->daddr,
2511 0,
2512 IPPROTO_TCP,
2513 0);
2514 ipcse = 0;
2515 #endif
2516 }
2517 ipcss = skb->nh.raw - skb->data;
2518 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2519 tucss = skb->h.raw - skb->data;
2520 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2521 tucse = 0;
2522
2523 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2524 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2525
2526 i = tx_ring->next_to_use;
2527 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2528 buffer_info = &tx_ring->buffer_info[i];
2529
2530 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2531 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2532 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2533 context_desc->upper_setup.tcp_fields.tucss = tucss;
2534 context_desc->upper_setup.tcp_fields.tucso = tucso;
2535 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2536 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2537 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2538 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2539
2540 buffer_info->time_stamp = jiffies;
2541
2542 if (++i == tx_ring->count) i = 0;
2543 tx_ring->next_to_use = i;
2544
2545 return 1;
2546 }
2547 #endif
2548
2549 return 0;
2550 }
2551
2552 static inline boolean_t
2553 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2554 struct sk_buff *skb)
2555 {
2556 struct e1000_context_desc *context_desc;
2557 struct e1000_buffer *buffer_info;
2558 unsigned int i;
2559 uint8_t css;
2560
2561 if(likely(skb->ip_summed == CHECKSUM_HW)) {
2562 css = skb->h.raw - skb->data;
2563
2564 i = tx_ring->next_to_use;
2565 buffer_info = &tx_ring->buffer_info[i];
2566 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2567
2568 context_desc->upper_setup.tcp_fields.tucss = css;
2569 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2570 context_desc->upper_setup.tcp_fields.tucse = 0;
2571 context_desc->tcp_seg_setup.data = 0;
2572 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2573
2574 buffer_info->time_stamp = jiffies;
2575
2576 if (unlikely(++i == tx_ring->count)) i = 0;
2577 tx_ring->next_to_use = i;
2578
2579 return TRUE;
2580 }
2581
2582 return FALSE;
2583 }
2584
2585 #define E1000_MAX_TXD_PWR 12
2586 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2587
2588 static inline int
2589 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2590 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2591 unsigned int nr_frags, unsigned int mss)
2592 {
2593 struct e1000_buffer *buffer_info;
2594 unsigned int len = skb->len;
2595 unsigned int offset = 0, size, count = 0, i;
2596 unsigned int f;
2597 len -= skb->data_len;
2598
2599 i = tx_ring->next_to_use;
2600
2601 while(len) {
2602 buffer_info = &tx_ring->buffer_info[i];
2603 size = min(len, max_per_txd);
2604 #ifdef NETIF_F_TSO
2605 /* Workaround for Controller erratum --
2606 * descriptor for non-tso packet in a linear SKB that follows a
2607 * tso gets written back prematurely before the data is fully
2608 * DMAd to the controller */
2609 if (!skb->data_len && tx_ring->last_tx_tso &&
2610 !skb_shinfo(skb)->tso_size) {
2611 tx_ring->last_tx_tso = 0;
2612 size -= 4;
2613 }
2614
2615 /* Workaround for premature desc write-backs
2616 * in TSO mode. Append 4-byte sentinel desc */
2617 if(unlikely(mss && !nr_frags && size == len && size > 8))
2618 size -= 4;
2619 #endif
2620 /* work-around for errata 10 and it applies
2621 * to all controllers in PCI-X mode
2622 * The fix is to make sure that the first descriptor of a
2623 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2624 */
2625 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2626 (size > 2015) && count == 0))
2627 size = 2015;
2628
2629 /* Workaround for potential 82544 hang in PCI-X. Avoid
2630 * terminating buffers within evenly-aligned dwords. */
2631 if(unlikely(adapter->pcix_82544 &&
2632 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2633 size > 4))
2634 size -= 4;
2635
2636 buffer_info->length = size;
2637 buffer_info->dma =
2638 pci_map_single(adapter->pdev,
2639 skb->data + offset,
2640 size,
2641 PCI_DMA_TODEVICE);
2642 buffer_info->time_stamp = jiffies;
2643
2644 len -= size;
2645 offset += size;
2646 count++;
2647 if(unlikely(++i == tx_ring->count)) i = 0;
2648 }
2649
2650 for(f = 0; f < nr_frags; f++) {
2651 struct skb_frag_struct *frag;
2652
2653 frag = &skb_shinfo(skb)->frags[f];
2654 len = frag->size;
2655 offset = frag->page_offset;
2656
2657 while(len) {
2658 buffer_info = &tx_ring->buffer_info[i];
2659 size = min(len, max_per_txd);
2660 #ifdef NETIF_F_TSO
2661 /* Workaround for premature desc write-backs
2662 * in TSO mode. Append 4-byte sentinel desc */
2663 if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2664 size -= 4;
2665 #endif
2666 /* Workaround for potential 82544 hang in PCI-X.
2667 * Avoid terminating buffers within evenly-aligned
2668 * dwords. */
2669 if(unlikely(adapter->pcix_82544 &&
2670 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2671 size > 4))
2672 size -= 4;
2673
2674 buffer_info->length = size;
2675 buffer_info->dma =
2676 pci_map_page(adapter->pdev,
2677 frag->page,
2678 offset,
2679 size,
2680 PCI_DMA_TODEVICE);
2681 buffer_info->time_stamp = jiffies;
2682
2683 len -= size;
2684 offset += size;
2685 count++;
2686 if(unlikely(++i == tx_ring->count)) i = 0;
2687 }
2688 }
2689
2690 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2691 tx_ring->buffer_info[i].skb = skb;
2692 tx_ring->buffer_info[first].next_to_watch = i;
2693
2694 return count;
2695 }
2696
2697 static inline void
2698 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2699 int tx_flags, int count)
2700 {
2701 struct e1000_tx_desc *tx_desc = NULL;
2702 struct e1000_buffer *buffer_info;
2703 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2704 unsigned int i;
2705
2706 if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2707 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2708 E1000_TXD_CMD_TSE;
2709 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2710
2711 if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
2712 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2713 }
2714
2715 if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2716 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2717 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2718 }
2719
2720 if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2721 txd_lower |= E1000_TXD_CMD_VLE;
2722 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2723 }
2724
2725 i = tx_ring->next_to_use;
2726
2727 while(count--) {
2728 buffer_info = &tx_ring->buffer_info[i];
2729 tx_desc = E1000_TX_DESC(*tx_ring, i);
2730 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2731 tx_desc->lower.data =
2732 cpu_to_le32(txd_lower | buffer_info->length);
2733 tx_desc->upper.data = cpu_to_le32(txd_upper);
2734 if(unlikely(++i == tx_ring->count)) i = 0;
2735 }
2736
2737 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2738
2739 /* Force memory writes to complete before letting h/w
2740 * know there are new descriptors to fetch. (Only
2741 * applicable for weak-ordered memory model archs,
2742 * such as IA-64). */
2743 wmb();
2744
2745 tx_ring->next_to_use = i;
2746 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2747 }
2748
2749 /**
2750 * 82547 workaround to avoid controller hang in half-duplex environment.
2751 * The workaround is to avoid queuing a large packet that would span
2752 * the internal Tx FIFO ring boundary by notifying the stack to resend
2753 * the packet at a later time. This gives the Tx FIFO an opportunity to
2754 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2755 * to the beginning of the Tx FIFO.
2756 **/
2757
2758 #define E1000_FIFO_HDR 0x10
2759 #define E1000_82547_PAD_LEN 0x3E0
2760
2761 static inline int
2762 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2763 {
2764 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2765 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2766
2767 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2768
2769 if(adapter->link_duplex != HALF_DUPLEX)
2770 goto no_fifo_stall_required;
2771
2772 if(atomic_read(&adapter->tx_fifo_stall))
2773 return 1;
2774
2775 if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2776 atomic_set(&adapter->tx_fifo_stall, 1);
2777 return 1;
2778 }
2779
2780 no_fifo_stall_required:
2781 adapter->tx_fifo_head += skb_fifo_len;
2782 if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
2783 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2784 return 0;
2785 }
2786
2787 #define MINIMUM_DHCP_PACKET_SIZE 282
2788 static inline int
2789 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2790 {
2791 struct e1000_hw *hw = &adapter->hw;
2792 uint16_t length, offset;
2793 if(vlan_tx_tag_present(skb)) {
2794 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2795 ( adapter->hw.mng_cookie.status &
2796 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2797 return 0;
2798 }
2799 if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2800 struct ethhdr *eth = (struct ethhdr *) skb->data;
2801 if((htons(ETH_P_IP) == eth->h_proto)) {
2802 const struct iphdr *ip =
2803 (struct iphdr *)((uint8_t *)skb->data+14);
2804 if(IPPROTO_UDP == ip->protocol) {
2805 struct udphdr *udp =
2806 (struct udphdr *)((uint8_t *)ip +
2807 (ip->ihl << 2));
2808 if(ntohs(udp->dest) == 67) {
2809 offset = (uint8_t *)udp + 8 - skb->data;
2810 length = skb->len - offset;
2811
2812 return e1000_mng_write_dhcp_info(hw,
2813 (uint8_t *)udp + 8,
2814 length);
2815 }
2816 }
2817 }
2818 }
2819 return 0;
2820 }
2821
2822 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2823 static int
2824 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2825 {
2826 struct e1000_adapter *adapter = netdev_priv(netdev);
2827 struct e1000_tx_ring *tx_ring;
2828 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2829 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2830 unsigned int tx_flags = 0;
2831 unsigned int len = skb->len;
2832 unsigned long flags;
2833 unsigned int nr_frags = 0;
2834 unsigned int mss = 0;
2835 int count = 0;
2836 int tso;
2837 unsigned int f;
2838 len -= skb->data_len;
2839
2840 #ifdef CONFIG_E1000_MQ
2841 tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2842 #else
2843 tx_ring = adapter->tx_ring;
2844 #endif
2845
2846 if (unlikely(skb->len <= 0)) {
2847 dev_kfree_skb_any(skb);
2848 return NETDEV_TX_OK;
2849 }
2850
2851 #ifdef NETIF_F_TSO
2852 mss = skb_shinfo(skb)->tso_size;
2853 /* The controller does a simple calculation to
2854 * make sure there is enough room in the FIFO before
2855 * initiating the DMA for each buffer. The calc is:
2856 * 4 = ceil(buffer len/mss). To make sure we don't
2857 * overrun the FIFO, adjust the max buffer len if mss
2858 * drops. */
2859 if(mss) {
2860 uint8_t hdr_len;
2861 max_per_txd = min(mss << 2, max_per_txd);
2862 max_txd_pwr = fls(max_per_txd) - 1;
2863
2864 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2865 * points to just header, pull a few bytes of payload from
2866 * frags into skb->data */
2867 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2868 if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
2869 (adapter->hw.mac_type == e1000_82571 ||
2870 adapter->hw.mac_type == e1000_82572)) {
2871 unsigned int pull_size;
2872 pull_size = min((unsigned int)4, skb->data_len);
2873 if (!__pskb_pull_tail(skb, pull_size)) {
2874 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2875 dev_kfree_skb_any(skb);
2876 return -EFAULT;
2877 }
2878 len = skb->len - skb->data_len;
2879 }
2880 }
2881
2882 if((mss) || (skb->ip_summed == CHECKSUM_HW))
2883 /* reserve a descriptor for the offload context */
2884 count++;
2885 count++;
2886 #else
2887 if(skb->ip_summed == CHECKSUM_HW)
2888 count++;
2889 #endif
2890
2891 #ifdef NETIF_F_TSO
2892 /* Controller Erratum workaround */
2893 if (!skb->data_len && tx_ring->last_tx_tso &&
2894 !skb_shinfo(skb)->tso_size)
2895 count++;
2896 #endif
2897
2898 count += TXD_USE_COUNT(len, max_txd_pwr);
2899
2900 if(adapter->pcix_82544)
2901 count++;
2902
2903 /* work-around for errata 10 and it applies to all controllers
2904 * in PCI-X mode, so add one more descriptor to the count
2905 */
2906 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2907 (len > 2015)))
2908 count++;
2909
2910 nr_frags = skb_shinfo(skb)->nr_frags;
2911 for(f = 0; f < nr_frags; f++)
2912 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2913 max_txd_pwr);
2914 if(adapter->pcix_82544)
2915 count += nr_frags;
2916
2917 if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2918 e1000_transfer_dhcp_info(adapter, skb);
2919
2920 local_irq_save(flags);
2921 if (!spin_trylock(&tx_ring->tx_lock)) {
2922 /* Collision - tell upper layer to requeue */
2923 local_irq_restore(flags);
2924 return NETDEV_TX_LOCKED;
2925 }
2926
2927 /* need: count + 2 desc gap to keep tail from touching
2928 * head, otherwise try next time */
2929 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
2930 netif_stop_queue(netdev);
2931 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2932 return NETDEV_TX_BUSY;
2933 }
2934
2935 if(unlikely(adapter->hw.mac_type == e1000_82547)) {
2936 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2937 netif_stop_queue(netdev);
2938 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
2939 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2940 return NETDEV_TX_BUSY;
2941 }
2942 }
2943
2944 if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2945 tx_flags |= E1000_TX_FLAGS_VLAN;
2946 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2947 }
2948
2949 first = tx_ring->next_to_use;
2950
2951 tso = e1000_tso(adapter, tx_ring, skb);
2952 if (tso < 0) {
2953 dev_kfree_skb_any(skb);
2954 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2955 return NETDEV_TX_OK;
2956 }
2957
2958 if (likely(tso)) {
2959 tx_ring->last_tx_tso = 1;
2960 tx_flags |= E1000_TX_FLAGS_TSO;
2961 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
2962 tx_flags |= E1000_TX_FLAGS_CSUM;
2963
2964 /* Old method was to assume IPv4 packet by default if TSO was enabled.
2965 * 82571 hardware supports TSO capabilities for IPv6 as well...
2966 * no longer assume, we must. */
2967 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2968 tx_flags |= E1000_TX_FLAGS_IPV4;
2969
2970 e1000_tx_queue(adapter, tx_ring, tx_flags,
2971 e1000_tx_map(adapter, tx_ring, skb, first,
2972 max_per_txd, nr_frags, mss));
2973
2974 netdev->trans_start = jiffies;
2975
2976 /* Make sure there is space in the ring for the next send. */
2977 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
2978 netif_stop_queue(netdev);
2979
2980 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2981 return NETDEV_TX_OK;
2982 }
2983
2984 /**
2985 * e1000_tx_timeout - Respond to a Tx Hang
2986 * @netdev: network interface device structure
2987 **/
2988
2989 static void
2990 e1000_tx_timeout(struct net_device *netdev)
2991 {
2992 struct e1000_adapter *adapter = netdev_priv(netdev);
2993
2994 /* Do the reset outside of interrupt context */
2995 schedule_work(&adapter->tx_timeout_task);
2996 }
2997
2998 static void
2999 e1000_tx_timeout_task(struct net_device *netdev)
3000 {
3001 struct e1000_adapter *adapter = netdev_priv(netdev);
3002
3003 adapter->tx_timeout_count++;
3004 e1000_down(adapter);
3005 e1000_up(adapter);
3006 }
3007
3008 /**
3009 * e1000_get_stats - Get System Network Statistics
3010 * @netdev: network interface device structure
3011 *
3012 * Returns the address of the device statistics structure.
3013 * The statistics are actually updated from the timer callback.
3014 **/
3015
3016 static struct net_device_stats *
3017 e1000_get_stats(struct net_device *netdev)
3018 {
3019 struct e1000_adapter *adapter = netdev_priv(netdev);
3020
3021 /* only return the current stats */
3022 return &adapter->net_stats;
3023 }
3024
3025 /**
3026 * e1000_change_mtu - Change the Maximum Transfer Unit
3027 * @netdev: network interface device structure
3028 * @new_mtu: new value for maximum frame size
3029 *
3030 * Returns 0 on success, negative on failure
3031 **/
3032
3033 static int
3034 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3035 {
3036 struct e1000_adapter *adapter = netdev_priv(netdev);
3037 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3038
3039 if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3040 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3041 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3042 return -EINVAL;
3043 }
3044
3045 /* Adapter-specific max frame size limits. */
3046 switch (adapter->hw.mac_type) {
3047 case e1000_82542_rev2_0:
3048 case e1000_82542_rev2_1:
3049 case e1000_82573:
3050 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3051 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3052 return -EINVAL;
3053 }
3054 break;
3055 case e1000_82571:
3056 case e1000_82572:
3057 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3058 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3059 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3060 return -EINVAL;
3061 }
3062 break;
3063 default:
3064 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3065 break;
3066 }
3067
3068 /* since the driver code now supports splitting a packet across
3069 * multiple descriptors, most of the fifo related limitations on
3070 * jumbo frame traffic have gone away.
3071 * simply use 2k descriptors for everything.
3072 *
3073 * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3074 * means we reserve 2 more, this pushes us to allocate from the next
3075 * larger slab size
3076 * i.e. RXBUFFER_2048 --> size-4096 slab */
3077
3078 /* recent hardware supports 1KB granularity */
3079 if (adapter->hw.mac_type > e1000_82547_rev_2) {
3080 adapter->rx_buffer_len =
3081 ((max_frame < E1000_RXBUFFER_2048) ?
3082 max_frame : E1000_RXBUFFER_2048);
3083 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
3084 } else
3085 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3086
3087 netdev->mtu = new_mtu;
3088
3089 if(netif_running(netdev)) {
3090 e1000_down(adapter);
3091 e1000_up(adapter);
3092 }
3093
3094 adapter->hw.max_frame_size = max_frame;
3095
3096 return 0;
3097 }
3098
3099 /**
3100 * e1000_update_stats - Update the board statistics counters
3101 * @adapter: board private structure
3102 **/
3103
3104 void
3105 e1000_update_stats(struct e1000_adapter *adapter)
3106 {
3107 struct e1000_hw *hw = &adapter->hw;
3108 unsigned long flags;
3109 uint16_t phy_tmp;
3110
3111 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3112
3113 spin_lock_irqsave(&adapter->stats_lock, flags);
3114
3115 /* these counters are modified from e1000_adjust_tbi_stats,
3116 * called from the interrupt context, so they must only
3117 * be written while holding adapter->stats_lock
3118 */
3119
3120 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3121 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3122 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3123 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3124 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3125 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3126 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3127 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3128 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3129 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3130 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3131 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3132 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3133
3134 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3135 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3136 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3137 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3138 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3139 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3140 adapter->stats.dc += E1000_READ_REG(hw, DC);
3141 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3142 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3143 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3144 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3145 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3146 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3147 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3148 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3149 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3150 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3151 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3152 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3153 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3154 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3155 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3156 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3157 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3158 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3159 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3160 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3161 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3162 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3163 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3164 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3165 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3166 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3167 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3168
3169 /* used for adaptive IFS */
3170
3171 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3172 adapter->stats.tpt += hw->tx_packet_delta;
3173 hw->collision_delta = E1000_READ_REG(hw, COLC);
3174 adapter->stats.colc += hw->collision_delta;
3175
3176 if(hw->mac_type >= e1000_82543) {
3177 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3178 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3179 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3180 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3181 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3182 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3183 }
3184 if(hw->mac_type > e1000_82547_rev_2) {
3185 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3186 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3187 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3188 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3189 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3190 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3191 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3192 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3193 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3194 }
3195
3196 /* Fill out the OS statistics structure */
3197
3198 adapter->net_stats.rx_packets = adapter->stats.gprc;
3199 adapter->net_stats.tx_packets = adapter->stats.gptc;
3200 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3201 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3202 adapter->net_stats.multicast = adapter->stats.mprc;
3203 adapter->net_stats.collisions = adapter->stats.colc;
3204
3205 /* Rx Errors */
3206
3207 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3208 adapter->stats.crcerrs + adapter->stats.algnerrc +
3209 adapter->stats.rlec + adapter->stats.cexterr;
3210 adapter->net_stats.rx_dropped = 0;
3211 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3212 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3213 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3214 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3215
3216 /* Tx Errors */
3217
3218 adapter->net_stats.tx_errors = adapter->stats.ecol +
3219 adapter->stats.latecol;
3220 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3221 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3222 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3223
3224 /* Tx Dropped needs to be maintained elsewhere */
3225
3226 /* Phy Stats */
3227
3228 if(hw->media_type == e1000_media_type_copper) {
3229 if((adapter->link_speed == SPEED_1000) &&
3230 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3231 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3232 adapter->phy_stats.idle_errors += phy_tmp;
3233 }
3234
3235 if((hw->mac_type <= e1000_82546) &&
3236 (hw->phy_type == e1000_phy_m88) &&
3237 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3238 adapter->phy_stats.receive_errors += phy_tmp;
3239 }
3240
3241 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3242 }
3243
3244 #ifdef CONFIG_E1000_MQ
3245 void
3246 e1000_rx_schedule(void *data)
3247 {
3248 struct net_device *poll_dev, *netdev = data;
3249 struct e1000_adapter *adapter = netdev->priv;
3250 int this_cpu = get_cpu();
3251
3252 poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3253 if (poll_dev == NULL) {
3254 put_cpu();
3255 return;
3256 }
3257
3258 if (likely(netif_rx_schedule_prep(poll_dev)))
3259 __netif_rx_schedule(poll_dev);
3260 else
3261 e1000_irq_enable(adapter);
3262
3263 put_cpu();
3264 }
3265 #endif
3266
3267 /**
3268 * e1000_intr - Interrupt Handler
3269 * @irq: interrupt number
3270 * @data: pointer to a network interface device structure
3271 * @pt_regs: CPU registers structure
3272 **/
3273
3274 static irqreturn_t
3275 e1000_intr(int irq, void *data, struct pt_regs *regs)
3276 {
3277 struct net_device *netdev = data;
3278 struct e1000_adapter *adapter = netdev_priv(netdev);
3279 struct e1000_hw *hw = &adapter->hw;
3280 uint32_t icr = E1000_READ_REG(hw, ICR);
3281 #ifndef CONFIG_E1000_NAPI
3282 int i;
3283 #else
3284 /* Interrupt Auto-Mask...upon reading ICR,
3285 * interrupts are masked. No need for the
3286 * IMC write, but it does mean we should
3287 * account for it ASAP. */
3288 if (likely(hw->mac_type >= e1000_82571))
3289 atomic_inc(&adapter->irq_sem);
3290 #endif
3291
3292 if (unlikely(!icr)) {
3293 #ifdef CONFIG_E1000_NAPI
3294 if (hw->mac_type >= e1000_82571)
3295 e1000_irq_enable(adapter);
3296 #endif
3297 return IRQ_NONE; /* Not our interrupt */
3298 }
3299
3300 if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3301 hw->get_link_status = 1;
3302 mod_timer(&adapter->watchdog_timer, jiffies);
3303 }
3304
3305 #ifdef CONFIG_E1000_NAPI
3306 if (unlikely(hw->mac_type < e1000_82571)) {
3307 atomic_inc(&adapter->irq_sem);
3308 E1000_WRITE_REG(hw, IMC, ~0);
3309 E1000_WRITE_FLUSH(hw);
3310 }
3311 #ifdef CONFIG_E1000_MQ
3312 if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
3313 /* We must setup the cpumask once count == 0 since
3314 * each cpu bit is cleared when the work is done. */
3315 adapter->rx_sched_call_data.cpumask = adapter->cpumask;
3316 atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
3317 atomic_set(&adapter->rx_sched_call_data.count,
3318 adapter->num_rx_queues);
3319 smp_call_async_mask(&adapter->rx_sched_call_data);
3320 } else {
3321 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
3322 }
3323 #else /* if !CONFIG_E1000_MQ */
3324 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3325 __netif_rx_schedule(&adapter->polling_netdev[0]);
3326 else
3327 e1000_irq_enable(adapter);
3328 #endif /* CONFIG_E1000_MQ */
3329
3330 #else /* if !CONFIG_E1000_NAPI */
3331 /* Writing IMC and IMS is needed for 82547.
3332 Due to Hub Link bus being occupied, an interrupt
3333 de-assertion message is not able to be sent.
3334 When an interrupt assertion message is generated later,
3335 two messages are re-ordered and sent out.
3336 That causes APIC to think 82547 is in de-assertion
3337 state, while 82547 is in assertion state, resulting
3338 in dead lock. Writing IMC forces 82547 into
3339 de-assertion state.
3340 */
3341 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
3342 atomic_inc(&adapter->irq_sem);
3343 E1000_WRITE_REG(hw, IMC, ~0);
3344 }
3345
3346 for(i = 0; i < E1000_MAX_INTR; i++)
3347 if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3348 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3349 break;
3350
3351 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3352 e1000_irq_enable(adapter);
3353
3354 #endif /* CONFIG_E1000_NAPI */
3355
3356 return IRQ_HANDLED;
3357 }
3358
3359 #ifdef CONFIG_E1000_NAPI
3360 /**
3361 * e1000_clean - NAPI Rx polling callback
3362 * @adapter: board private structure
3363 **/
3364
3365 static int
3366 e1000_clean(struct net_device *poll_dev, int *budget)
3367 {
3368 struct e1000_adapter *adapter;
3369 int work_to_do = min(*budget, poll_dev->quota);
3370 int tx_cleaned, i = 0, work_done = 0;
3371
3372 /* Must NOT use netdev_priv macro here. */
3373 adapter = poll_dev->priv;
3374
3375 /* Keep link state information with original netdev */
3376 if (!netif_carrier_ok(adapter->netdev))
3377 goto quit_polling;
3378
3379 while (poll_dev != &adapter->polling_netdev[i]) {
3380 i++;
3381 if (unlikely(i == adapter->num_rx_queues))
3382 BUG();
3383 }
3384
3385 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3386 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3387 &work_done, work_to_do);
3388
3389 *budget -= work_done;
3390 poll_dev->quota -= work_done;
3391
3392 /* If no Tx and not enough Rx work done, exit the polling mode */
3393 if((!tx_cleaned && (work_done == 0)) ||
3394 !netif_running(adapter->netdev)) {
3395 quit_polling:
3396 netif_rx_complete(poll_dev);
3397 e1000_irq_enable(adapter);
3398 return 0;
3399 }
3400
3401 return 1;
3402 }
3403
3404 #endif
3405 /**
3406 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3407 * @adapter: board private structure
3408 **/
3409
3410 static boolean_t
3411 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3412 struct e1000_tx_ring *tx_ring)
3413 {
3414 struct net_device *netdev = adapter->netdev;
3415 struct e1000_tx_desc *tx_desc, *eop_desc;
3416 struct e1000_buffer *buffer_info;
3417 unsigned int i, eop;
3418 boolean_t cleaned = FALSE;
3419
3420 i = tx_ring->next_to_clean;
3421 eop = tx_ring->buffer_info[i].next_to_watch;
3422 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3423
3424 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3425 for(cleaned = FALSE; !cleaned; ) {
3426 tx_desc = E1000_TX_DESC(*tx_ring, i);
3427 buffer_info = &tx_ring->buffer_info[i];
3428 cleaned = (i == eop);
3429
3430 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3431
3432 tx_desc->buffer_addr = 0;
3433 tx_desc->lower.data = 0;
3434 tx_desc->upper.data = 0;
3435
3436 if(unlikely(++i == tx_ring->count)) i = 0;
3437 }
3438
3439 #ifdef CONFIG_E1000_MQ
3440 tx_ring->tx_stats.packets++;
3441 #endif
3442
3443 eop = tx_ring->buffer_info[i].next_to_watch;
3444 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3445 }
3446
3447 tx_ring->next_to_clean = i;
3448
3449 spin_lock(&tx_ring->tx_lock);
3450
3451 if(unlikely(cleaned && netif_queue_stopped(netdev) &&
3452 netif_carrier_ok(netdev)))
3453 netif_wake_queue(netdev);
3454
3455 spin_unlock(&tx_ring->tx_lock);
3456
3457 if (adapter->detect_tx_hung) {
3458 /* Detect a transmit hang in hardware, this serializes the
3459 * check with the clearing of time_stamp and movement of i */
3460 adapter->detect_tx_hung = FALSE;
3461 if (tx_ring->buffer_info[eop].dma &&
3462 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3463 adapter->tx_timeout_factor * HZ)
3464 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3465 E1000_STATUS_TXOFF)) {
3466
3467 /* detected Tx unit hang */
3468 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3469 " Tx Queue <%lu>\n"
3470 " TDH <%x>\n"
3471 " TDT <%x>\n"
3472 " next_to_use <%x>\n"
3473 " next_to_clean <%x>\n"
3474 "buffer_info[next_to_clean]\n"
3475 " time_stamp <%lx>\n"
3476 " next_to_watch <%x>\n"
3477 " jiffies <%lx>\n"
3478 " next_to_watch.status <%x>\n",
3479 (unsigned long)((tx_ring - adapter->tx_ring) /
3480 sizeof(struct e1000_tx_ring)),
3481 readl(adapter->hw.hw_addr + tx_ring->tdh),
3482 readl(adapter->hw.hw_addr + tx_ring->tdt),
3483 tx_ring->next_to_use,
3484 tx_ring->next_to_clean,
3485 tx_ring->buffer_info[eop].time_stamp,
3486 eop,
3487 jiffies,
3488 eop_desc->upper.fields.status);
3489 netif_stop_queue(netdev);
3490 }
3491 }
3492 return cleaned;
3493 }
3494
3495 /**
3496 * e1000_rx_checksum - Receive Checksum Offload for 82543
3497 * @adapter: board private structure
3498 * @status_err: receive descriptor status and error fields
3499 * @csum: receive descriptor csum field
3500 * @sk_buff: socket buffer with received data
3501 **/
3502
3503 static inline void
3504 e1000_rx_checksum(struct e1000_adapter *adapter,
3505 uint32_t status_err, uint32_t csum,
3506 struct sk_buff *skb)
3507 {
3508 uint16_t status = (uint16_t)status_err;
3509 uint8_t errors = (uint8_t)(status_err >> 24);
3510 skb->ip_summed = CHECKSUM_NONE;
3511
3512 /* 82543 or newer only */
3513 if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
3514 /* Ignore Checksum bit is set */
3515 if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
3516 /* TCP/UDP checksum error bit is set */
3517 if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
3518 /* let the stack verify checksum errors */
3519 adapter->hw_csum_err++;
3520 return;
3521 }
3522 /* TCP/UDP Checksum has not been calculated */
3523 if(adapter->hw.mac_type <= e1000_82547_rev_2) {
3524 if(!(status & E1000_RXD_STAT_TCPCS))
3525 return;
3526 } else {
3527 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3528 return;
3529 }
3530 /* It must be a TCP or UDP packet with a valid checksum */
3531 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3532 /* TCP checksum is good */
3533 skb->ip_summed = CHECKSUM_UNNECESSARY;
3534 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3535 /* IP fragment with UDP payload */
3536 /* Hardware complements the payload checksum, so we undo it
3537 * and then put the value in host order for further stack use.
3538 */
3539 csum = ntohl(csum ^ 0xFFFF);
3540 skb->csum = csum;
3541 skb->ip_summed = CHECKSUM_HW;
3542 }
3543 adapter->hw_csum_good++;
3544 }
3545
3546 /**
3547 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3548 * @adapter: board private structure
3549 **/
3550
3551 static boolean_t
3552 #ifdef CONFIG_E1000_NAPI
3553 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3554 struct e1000_rx_ring *rx_ring,
3555 int *work_done, int work_to_do)
3556 #else
3557 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3558 struct e1000_rx_ring *rx_ring)
3559 #endif
3560 {
3561 struct net_device *netdev = adapter->netdev;
3562 struct pci_dev *pdev = adapter->pdev;
3563 struct e1000_rx_desc *rx_desc;
3564 struct e1000_buffer *buffer_info;
3565 struct sk_buff *skb;
3566 unsigned long flags;
3567 uint32_t length;
3568 uint8_t last_byte;
3569 unsigned int i;
3570 boolean_t cleaned = FALSE;
3571 int cleaned_count = 0;
3572
3573 i = rx_ring->next_to_clean;
3574 rx_desc = E1000_RX_DESC(*rx_ring, i);
3575
3576 while(rx_desc->status & E1000_RXD_STAT_DD) {
3577 buffer_info = &rx_ring->buffer_info[i];
3578 #ifdef CONFIG_E1000_NAPI
3579 if(*work_done >= work_to_do)
3580 break;
3581 (*work_done)++;
3582 #endif
3583
3584 cleaned = TRUE;
3585 cleaned_count++;
3586 pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
3587 PCI_DMA_FROMDEVICE);
3588
3589 skb = buffer_info->skb;
3590 length = le16_to_cpu(rx_desc->length);
3591
3592 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
3593 /* All receives must fit into a single buffer */
3594 E1000_DBG("%s: Receive packet consumed multiple"
3595 " buffers\n", netdev->name);
3596 dev_kfree_skb_irq(skb);
3597 goto next_desc;
3598 }
3599
3600 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3601 last_byte = *(skb->data + length - 1);
3602 if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
3603 rx_desc->errors, length, last_byte)) {
3604 spin_lock_irqsave(&adapter->stats_lock, flags);
3605 e1000_tbi_adjust_stats(&adapter->hw, &adapter->stats,
3606 length, skb->data);
3607 spin_unlock_irqrestore(&adapter->stats_lock,
3608 flags);
3609 length--;
3610 } else {
3611 dev_kfree_skb_irq(skb);
3612 goto next_desc;
3613 }
3614 }
3615
3616 /* Good Receive */
3617 skb_put(skb, length - ETHERNET_FCS_SIZE);
3618
3619 /* Receive Checksum Offload */
3620 e1000_rx_checksum(adapter, (uint32_t)(rx_desc->status) |
3621 ((uint32_t)(rx_desc->errors) << 24),
3622 rx_desc->csum, skb);
3623 skb->protocol = eth_type_trans(skb, netdev);
3624 #ifdef CONFIG_E1000_NAPI
3625 if(unlikely(adapter->vlgrp &&
3626 (rx_desc->status & E1000_RXD_STAT_VP))) {
3627 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3628 le16_to_cpu(rx_desc->special) &
3629 E1000_RXD_SPC_VLAN_MASK);
3630 } else {
3631 netif_receive_skb(skb);
3632 }
3633 #else /* CONFIG_E1000_NAPI */
3634 if(unlikely(adapter->vlgrp &&
3635 (rx_desc->status & E1000_RXD_STAT_VP))) {
3636 vlan_hwaccel_rx(skb, adapter->vlgrp,
3637 le16_to_cpu(rx_desc->special) &
3638 E1000_RXD_SPC_VLAN_MASK);
3639 } else {
3640 netif_rx(skb);
3641 }
3642 #endif /* CONFIG_E1000_NAPI */
3643 netdev->last_rx = jiffies;
3644 #ifdef CONFIG_E1000_MQ
3645 rx_ring->rx_stats.packets++;
3646 rx_ring->rx_stats.bytes += length;
3647 #endif
3648
3649 next_desc:
3650 rx_desc->status = 0;
3651
3652 /* return some buffers to hardware, one at a time is too slow */
3653 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3654 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3655 cleaned_count = 0;
3656 }
3657
3658 }
3659 rx_ring->next_to_clean = i;
3660
3661 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3662 if (cleaned_count)
3663 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3664
3665 return cleaned;
3666 }
3667
3668 /**
3669 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3670 * @adapter: board private structure
3671 **/
3672
3673 static boolean_t
3674 #ifdef CONFIG_E1000_NAPI
3675 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3676 struct e1000_rx_ring *rx_ring,
3677 int *work_done, int work_to_do)
3678 #else
3679 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3680 struct e1000_rx_ring *rx_ring)
3681 #endif
3682 {
3683 union e1000_rx_desc_packet_split *rx_desc;
3684 struct net_device *netdev = adapter->netdev;
3685 struct pci_dev *pdev = adapter->pdev;
3686 struct e1000_buffer *buffer_info;
3687 struct e1000_ps_page *ps_page;
3688 struct e1000_ps_page_dma *ps_page_dma;
3689 struct sk_buff *skb;
3690 unsigned int i, j;
3691 uint32_t length, staterr;
3692 int cleaned_count = 0;
3693 boolean_t cleaned = FALSE;
3694
3695 i = rx_ring->next_to_clean;
3696 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3697 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3698
3699 while(staterr & E1000_RXD_STAT_DD) {
3700 buffer_info = &rx_ring->buffer_info[i];
3701 ps_page = &rx_ring->ps_page[i];
3702 ps_page_dma = &rx_ring->ps_page_dma[i];
3703 #ifdef CONFIG_E1000_NAPI
3704 if(unlikely(*work_done >= work_to_do))
3705 break;
3706 (*work_done)++;
3707 #endif
3708 cleaned = TRUE;
3709 cleaned_count++;
3710 pci_unmap_single(pdev, buffer_info->dma,
3711 buffer_info->length,
3712 PCI_DMA_FROMDEVICE);
3713
3714 skb = buffer_info->skb;
3715
3716 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3717 E1000_DBG("%s: Packet Split buffers didn't pick up"
3718 " the full packet\n", netdev->name);
3719 dev_kfree_skb_irq(skb);
3720 goto next_desc;
3721 }
3722
3723 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3724 dev_kfree_skb_irq(skb);
3725 goto next_desc;
3726 }
3727
3728 length = le16_to_cpu(rx_desc->wb.middle.length0);
3729
3730 if(unlikely(!length)) {
3731 E1000_DBG("%s: Last part of the packet spanning"
3732 " multiple descriptors\n", netdev->name);
3733 dev_kfree_skb_irq(skb);
3734 goto next_desc;
3735 }
3736
3737 /* Good Receive */
3738 skb_put(skb, length);
3739
3740 for(j = 0; j < adapter->rx_ps_pages; j++) {
3741 if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3742 break;
3743
3744 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3745 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3746 ps_page_dma->ps_page_dma[j] = 0;
3747 skb_shinfo(skb)->frags[j].page =
3748 ps_page->ps_page[j];
3749 ps_page->ps_page[j] = NULL;
3750 skb_shinfo(skb)->frags[j].page_offset = 0;
3751 skb_shinfo(skb)->frags[j].size = length;
3752 skb_shinfo(skb)->nr_frags++;
3753 skb->len += length;
3754 skb->data_len += length;
3755 }
3756
3757 e1000_rx_checksum(adapter, staterr,
3758 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3759 skb->protocol = eth_type_trans(skb, netdev);
3760
3761 if(likely(rx_desc->wb.upper.header_status &
3762 E1000_RXDPS_HDRSTAT_HDRSP)) {
3763 adapter->rx_hdr_split++;
3764 #ifdef HAVE_RX_ZERO_COPY
3765 skb_shinfo(skb)->zero_copy = TRUE;
3766 #endif
3767 }
3768 #ifdef CONFIG_E1000_NAPI
3769 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3770 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3771 le16_to_cpu(rx_desc->wb.middle.vlan) &
3772 E1000_RXD_SPC_VLAN_MASK);
3773 } else {
3774 netif_receive_skb(skb);
3775 }
3776 #else /* CONFIG_E1000_NAPI */
3777 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3778 vlan_hwaccel_rx(skb, adapter->vlgrp,
3779 le16_to_cpu(rx_desc->wb.middle.vlan) &
3780 E1000_RXD_SPC_VLAN_MASK);
3781 } else {
3782 netif_rx(skb);
3783 }
3784 #endif /* CONFIG_E1000_NAPI */
3785 netdev->last_rx = jiffies;
3786 #ifdef CONFIG_E1000_MQ
3787 rx_ring->rx_stats.packets++;
3788 rx_ring->rx_stats.bytes += length;
3789 #endif
3790
3791 next_desc:
3792 rx_desc->wb.middle.status_error &= ~0xFF;
3793 buffer_info->skb = NULL;
3794
3795 /* return some buffers to hardware, one at a time is too slow */
3796 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3797 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3798 cleaned_count = 0;
3799 }
3800
3801 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3802 }
3803 rx_ring->next_to_clean = i;
3804
3805 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3806 if (cleaned_count)
3807 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3808
3809 return cleaned;
3810 }
3811
3812 /**
3813 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
3814 * @adapter: address of board private structure
3815 **/
3816
3817 static void
3818 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3819 struct e1000_rx_ring *rx_ring,
3820 int cleaned_count)
3821 {
3822 struct net_device *netdev = adapter->netdev;
3823 struct pci_dev *pdev = adapter->pdev;
3824 struct e1000_rx_desc *rx_desc;
3825 struct e1000_buffer *buffer_info;
3826 struct sk_buff *skb;
3827 unsigned int i;
3828 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
3829
3830 i = rx_ring->next_to_use;
3831 buffer_info = &rx_ring->buffer_info[i];
3832
3833 while(!buffer_info->skb) {
3834 skb = dev_alloc_skb(bufsz);
3835
3836 if(unlikely(!skb)) {
3837 /* Better luck next round */
3838 adapter->alloc_rx_buff_failed++;
3839 break;
3840 }
3841
3842 /* Fix for errata 23, can't cross 64kB boundary */
3843 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3844 struct sk_buff *oldskb = skb;
3845 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3846 "at %p\n", bufsz, skb->data);
3847 /* Try again, without freeing the previous */
3848 skb = dev_alloc_skb(bufsz);
3849 /* Failed allocation, critical failure */
3850 if (!skb) {
3851 dev_kfree_skb(oldskb);
3852 break;
3853 }
3854
3855 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3856 /* give up */
3857 dev_kfree_skb(skb);
3858 dev_kfree_skb(oldskb);
3859 break; /* while !buffer_info->skb */
3860 } else {
3861 /* Use new allocation */
3862 dev_kfree_skb(oldskb);
3863 }
3864 }
3865 /* Make buffer alignment 2 beyond a 16 byte boundary
3866 * this will result in a 16 byte aligned IP header after
3867 * the 14 byte MAC header is removed
3868 */
3869 skb_reserve(skb, NET_IP_ALIGN);
3870
3871 skb->dev = netdev;
3872
3873 buffer_info->skb = skb;
3874 buffer_info->length = adapter->rx_buffer_len;
3875 buffer_info->dma = pci_map_single(pdev,
3876 skb->data,
3877 adapter->rx_buffer_len,
3878 PCI_DMA_FROMDEVICE);
3879
3880 /* Fix for errata 23, can't cross 64kB boundary */
3881 if (!e1000_check_64k_bound(adapter,
3882 (void *)(unsigned long)buffer_info->dma,
3883 adapter->rx_buffer_len)) {
3884 DPRINTK(RX_ERR, ERR,
3885 "dma align check failed: %u bytes at %p\n",
3886 adapter->rx_buffer_len,
3887 (void *)(unsigned long)buffer_info->dma);
3888 dev_kfree_skb(skb);
3889 buffer_info->skb = NULL;
3890
3891 pci_unmap_single(pdev, buffer_info->dma,
3892 adapter->rx_buffer_len,
3893 PCI_DMA_FROMDEVICE);
3894
3895 break; /* while !buffer_info->skb */
3896 }
3897 rx_desc = E1000_RX_DESC(*rx_ring, i);
3898 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3899
3900 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3901 /* Force memory writes to complete before letting h/w
3902 * know there are new descriptors to fetch. (Only
3903 * applicable for weak-ordered memory model archs,
3904 * such as IA-64). */
3905 wmb();
3906 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3907 }
3908
3909 if(unlikely(++i == rx_ring->count)) i = 0;
3910 buffer_info = &rx_ring->buffer_info[i];
3911 }
3912
3913 rx_ring->next_to_use = i;
3914 }
3915
3916 /**
3917 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3918 * @adapter: address of board private structure
3919 **/
3920
3921 static void
3922 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
3923 struct e1000_rx_ring *rx_ring,
3924 int cleaned_count)
3925 {
3926 struct net_device *netdev = adapter->netdev;
3927 struct pci_dev *pdev = adapter->pdev;
3928 union e1000_rx_desc_packet_split *rx_desc;
3929 struct e1000_buffer *buffer_info;
3930 struct e1000_ps_page *ps_page;
3931 struct e1000_ps_page_dma *ps_page_dma;
3932 struct sk_buff *skb;
3933 unsigned int i, j;
3934
3935 i = rx_ring->next_to_use;
3936 buffer_info = &rx_ring->buffer_info[i];
3937 ps_page = &rx_ring->ps_page[i];
3938 ps_page_dma = &rx_ring->ps_page_dma[i];
3939
3940 while (cleaned_count--) {
3941 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3942
3943 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
3944 if (j < adapter->rx_ps_pages) {
3945 if (likely(!ps_page->ps_page[j])) {
3946 ps_page->ps_page[j] =
3947 alloc_page(GFP_ATOMIC);
3948 if (unlikely(!ps_page->ps_page[j]))
3949 goto no_buffers;
3950 ps_page_dma->ps_page_dma[j] =
3951 pci_map_page(pdev,
3952 ps_page->ps_page[j],
3953 0, PAGE_SIZE,
3954 PCI_DMA_FROMDEVICE);
3955 }
3956 /* Refresh the desc even if buffer_addrs didn't
3957 * change because each write-back erases
3958 * this info.
3959 */
3960 rx_desc->read.buffer_addr[j+1] =
3961 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3962 } else
3963 rx_desc->read.buffer_addr[j+1] = ~0;
3964 }
3965
3966 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3967
3968 if(unlikely(!skb))
3969 break;
3970
3971 /* Make buffer alignment 2 beyond a 16 byte boundary
3972 * this will result in a 16 byte aligned IP header after
3973 * the 14 byte MAC header is removed
3974 */
3975 skb_reserve(skb, NET_IP_ALIGN);
3976
3977 skb->dev = netdev;
3978
3979 buffer_info->skb = skb;
3980 buffer_info->length = adapter->rx_ps_bsize0;
3981 buffer_info->dma = pci_map_single(pdev, skb->data,
3982 adapter->rx_ps_bsize0,
3983 PCI_DMA_FROMDEVICE);
3984
3985 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3986
3987 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3988 /* Force memory writes to complete before letting h/w
3989 * know there are new descriptors to fetch. (Only
3990 * applicable for weak-ordered memory model archs,
3991 * such as IA-64). */
3992 wmb();
3993 /* Hardware increments by 16 bytes, but packet split
3994 * descriptors are 32 bytes...so we increment tail
3995 * twice as much.
3996 */
3997 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
3998 }
3999
4000 if(unlikely(++i == rx_ring->count)) i = 0;
4001 buffer_info = &rx_ring->buffer_info[i];
4002 ps_page = &rx_ring->ps_page[i];
4003 ps_page_dma = &rx_ring->ps_page_dma[i];
4004 }
4005
4006 no_buffers:
4007 rx_ring->next_to_use = i;
4008 }
4009
4010 /**
4011 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4012 * @adapter:
4013 **/
4014
4015 static void
4016 e1000_smartspeed(struct e1000_adapter *adapter)
4017 {
4018 uint16_t phy_status;
4019 uint16_t phy_ctrl;
4020
4021 if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4022 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4023 return;
4024
4025 if(adapter->smartspeed == 0) {
4026 /* If Master/Slave config fault is asserted twice,
4027 * we assume back-to-back */
4028 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4029 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4030 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4031 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4032 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4033 if(phy_ctrl & CR_1000T_MS_ENABLE) {
4034 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4035 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4036 phy_ctrl);
4037 adapter->smartspeed++;
4038 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
4039 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4040 &phy_ctrl)) {
4041 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4042 MII_CR_RESTART_AUTO_NEG);
4043 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4044 phy_ctrl);
4045 }
4046 }
4047 return;
4048 } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4049 /* If still no link, perhaps using 2/3 pair cable */
4050 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4051 phy_ctrl |= CR_1000T_MS_ENABLE;
4052 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4053 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
4054 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4055 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4056 MII_CR_RESTART_AUTO_NEG);
4057 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4058 }
4059 }
4060 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4061 if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4062 adapter->smartspeed = 0;
4063 }
4064
4065 /**
4066 * e1000_ioctl -
4067 * @netdev:
4068 * @ifreq:
4069 * @cmd:
4070 **/
4071
4072 static int
4073 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4074 {
4075 switch (cmd) {
4076 case SIOCGMIIPHY:
4077 case SIOCGMIIREG:
4078 case SIOCSMIIREG:
4079 return e1000_mii_ioctl(netdev, ifr, cmd);
4080 default:
4081 return -EOPNOTSUPP;
4082 }
4083 }
4084
4085 /**
4086 * e1000_mii_ioctl -
4087 * @netdev:
4088 * @ifreq:
4089 * @cmd:
4090 **/
4091
4092 static int
4093 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4094 {
4095 struct e1000_adapter *adapter = netdev_priv(netdev);
4096 struct mii_ioctl_data *data = if_mii(ifr);
4097 int retval;
4098 uint16_t mii_reg;
4099 uint16_t spddplx;
4100 unsigned long flags;
4101
4102 if(adapter->hw.media_type != e1000_media_type_copper)
4103 return -EOPNOTSUPP;
4104
4105 switch (cmd) {
4106 case SIOCGMIIPHY:
4107 data->phy_id = adapter->hw.phy_addr;
4108 break;
4109 case SIOCGMIIREG:
4110 if(!capable(CAP_NET_ADMIN))
4111 return -EPERM;
4112 spin_lock_irqsave(&adapter->stats_lock, flags);
4113 if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4114 &data->val_out)) {
4115 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4116 return -EIO;
4117 }
4118 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4119 break;
4120 case SIOCSMIIREG:
4121 if(!capable(CAP_NET_ADMIN))
4122 return -EPERM;
4123 if(data->reg_num & ~(0x1F))
4124 return -EFAULT;
4125 mii_reg = data->val_in;
4126 spin_lock_irqsave(&adapter->stats_lock, flags);
4127 if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
4128 mii_reg)) {
4129 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4130 return -EIO;
4131 }
4132 if(adapter->hw.phy_type == e1000_phy_m88) {
4133 switch (data->reg_num) {
4134 case PHY_CTRL:
4135 if(mii_reg & MII_CR_POWER_DOWN)
4136 break;
4137 if(mii_reg & MII_CR_AUTO_NEG_EN) {
4138 adapter->hw.autoneg = 1;
4139 adapter->hw.autoneg_advertised = 0x2F;
4140 } else {
4141 if (mii_reg & 0x40)
4142 spddplx = SPEED_1000;
4143 else if (mii_reg & 0x2000)
4144 spddplx = SPEED_100;
4145 else
4146 spddplx = SPEED_10;
4147 spddplx += (mii_reg & 0x100)
4148 ? FULL_DUPLEX :
4149 HALF_DUPLEX;
4150 retval = e1000_set_spd_dplx(adapter,
4151 spddplx);
4152 if(retval) {
4153 spin_unlock_irqrestore(
4154 &adapter->stats_lock,
4155 flags);
4156 return retval;
4157 }
4158 }
4159 if(netif_running(adapter->netdev)) {
4160 e1000_down(adapter);
4161 e1000_up(adapter);
4162 } else
4163 e1000_reset(adapter);
4164 break;
4165 case M88E1000_PHY_SPEC_CTRL:
4166 case M88E1000_EXT_PHY_SPEC_CTRL:
4167 if(e1000_phy_reset(&adapter->hw)) {
4168 spin_unlock_irqrestore(
4169 &adapter->stats_lock, flags);
4170 return -EIO;
4171 }
4172 break;
4173 }
4174 } else {
4175 switch (data->reg_num) {
4176 case PHY_CTRL:
4177 if(mii_reg & MII_CR_POWER_DOWN)
4178 break;
4179 if(netif_running(adapter->netdev)) {
4180 e1000_down(adapter);
4181 e1000_up(adapter);
4182 } else
4183 e1000_reset(adapter);
4184 break;
4185 }
4186 }
4187 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4188 break;
4189 default:
4190 return -EOPNOTSUPP;
4191 }
4192 return E1000_SUCCESS;
4193 }
4194
4195 void
4196 e1000_pci_set_mwi(struct e1000_hw *hw)
4197 {
4198 struct e1000_adapter *adapter = hw->back;
4199 int ret_val = pci_set_mwi(adapter->pdev);
4200
4201 if(ret_val)
4202 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4203 }
4204
4205 void
4206 e1000_pci_clear_mwi(struct e1000_hw *hw)
4207 {
4208 struct e1000_adapter *adapter = hw->back;
4209
4210 pci_clear_mwi(adapter->pdev);
4211 }
4212
4213 void
4214 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4215 {
4216 struct e1000_adapter *adapter = hw->back;
4217
4218 pci_read_config_word(adapter->pdev, reg, value);
4219 }
4220
4221 void
4222 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4223 {
4224 struct e1000_adapter *adapter = hw->back;
4225
4226 pci_write_config_word(adapter->pdev, reg, *value);
4227 }
4228
4229 uint32_t
4230 e1000_io_read(struct e1000_hw *hw, unsigned long port)
4231 {
4232 return inl(port);
4233 }
4234
4235 void
4236 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4237 {
4238 outl(value, port);
4239 }
4240
4241 static void
4242 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4243 {
4244 struct e1000_adapter *adapter = netdev_priv(netdev);
4245 uint32_t ctrl, rctl;
4246
4247 e1000_irq_disable(adapter);
4248 adapter->vlgrp = grp;
4249
4250 if(grp) {
4251 /* enable VLAN tag insert/strip */
4252 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4253 ctrl |= E1000_CTRL_VME;
4254 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4255
4256 /* enable VLAN receive filtering */
4257 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4258 rctl |= E1000_RCTL_VFE;
4259 rctl &= ~E1000_RCTL_CFIEN;
4260 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4261 e1000_update_mng_vlan(adapter);
4262 } else {
4263 /* disable VLAN tag insert/strip */
4264 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4265 ctrl &= ~E1000_CTRL_VME;
4266 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4267
4268 /* disable VLAN filtering */
4269 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4270 rctl &= ~E1000_RCTL_VFE;
4271 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4272 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4273 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4274 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4275 }
4276 }
4277
4278 e1000_irq_enable(adapter);
4279 }
4280
4281 static void
4282 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4283 {
4284 struct e1000_adapter *adapter = netdev_priv(netdev);
4285 uint32_t vfta, index;
4286 if((adapter->hw.mng_cookie.status &
4287 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4288 (vid == adapter->mng_vlan_id))
4289 return;
4290 /* add VID to filter table */
4291 index = (vid >> 5) & 0x7F;
4292 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4293 vfta |= (1 << (vid & 0x1F));
4294 e1000_write_vfta(&adapter->hw, index, vfta);
4295 }
4296
4297 static void
4298 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4299 {
4300 struct e1000_adapter *adapter = netdev_priv(netdev);
4301 uint32_t vfta, index;
4302
4303 e1000_irq_disable(adapter);
4304
4305 if(adapter->vlgrp)
4306 adapter->vlgrp->vlan_devices[vid] = NULL;
4307
4308 e1000_irq_enable(adapter);
4309
4310 if((adapter->hw.mng_cookie.status &
4311 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4312 (vid == adapter->mng_vlan_id)) {
4313 /* release control to f/w */
4314 e1000_release_hw_control(adapter);
4315 return;
4316 }
4317
4318 /* remove VID from filter table */
4319 index = (vid >> 5) & 0x7F;
4320 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4321 vfta &= ~(1 << (vid & 0x1F));
4322 e1000_write_vfta(&adapter->hw, index, vfta);
4323 }
4324
4325 static void
4326 e1000_restore_vlan(struct e1000_adapter *adapter)
4327 {
4328 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4329
4330 if(adapter->vlgrp) {
4331 uint16_t vid;
4332 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4333 if(!adapter->vlgrp->vlan_devices[vid])
4334 continue;
4335 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4336 }
4337 }
4338 }
4339
4340 int
4341 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4342 {
4343 adapter->hw.autoneg = 0;
4344
4345 /* Fiber NICs only allow 1000 gbps Full duplex */
4346 if((adapter->hw.media_type == e1000_media_type_fiber) &&
4347 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4348 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4349 return -EINVAL;
4350 }
4351
4352 switch(spddplx) {
4353 case SPEED_10 + DUPLEX_HALF:
4354 adapter->hw.forced_speed_duplex = e1000_10_half;
4355 break;
4356 case SPEED_10 + DUPLEX_FULL:
4357 adapter->hw.forced_speed_duplex = e1000_10_full;
4358 break;
4359 case SPEED_100 + DUPLEX_HALF:
4360 adapter->hw.forced_speed_duplex = e1000_100_half;
4361 break;
4362 case SPEED_100 + DUPLEX_FULL:
4363 adapter->hw.forced_speed_duplex = e1000_100_full;
4364 break;
4365 case SPEED_1000 + DUPLEX_FULL:
4366 adapter->hw.autoneg = 1;
4367 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4368 break;
4369 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4370 default:
4371 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4372 return -EINVAL;
4373 }
4374 return 0;
4375 }
4376
4377 #ifdef CONFIG_PM
4378 static int
4379 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4380 {
4381 struct net_device *netdev = pci_get_drvdata(pdev);
4382 struct e1000_adapter *adapter = netdev_priv(netdev);
4383 uint32_t ctrl, ctrl_ext, rctl, manc, status;
4384 uint32_t wufc = adapter->wol;
4385 int retval = 0;
4386
4387 netif_device_detach(netdev);
4388
4389 if(netif_running(netdev))
4390 e1000_down(adapter);
4391
4392 status = E1000_READ_REG(&adapter->hw, STATUS);
4393 if(status & E1000_STATUS_LU)
4394 wufc &= ~E1000_WUFC_LNKC;
4395
4396 if(wufc) {
4397 e1000_setup_rctl(adapter);
4398 e1000_set_multi(netdev);
4399
4400 /* turn on all-multi mode if wake on multicast is enabled */
4401 if(adapter->wol & E1000_WUFC_MC) {
4402 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4403 rctl |= E1000_RCTL_MPE;
4404 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4405 }
4406
4407 if(adapter->hw.mac_type >= e1000_82540) {
4408 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4409 /* advertise wake from D3Cold */
4410 #define E1000_CTRL_ADVD3WUC 0x00100000
4411 /* phy power management enable */
4412 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4413 ctrl |= E1000_CTRL_ADVD3WUC |
4414 E1000_CTRL_EN_PHY_PWR_MGMT;
4415 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4416 }
4417
4418 if(adapter->hw.media_type == e1000_media_type_fiber ||
4419 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4420 /* keep the laser running in D3 */
4421 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4422 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4423 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4424 }
4425
4426 /* Allow time for pending master requests to run */
4427 e1000_disable_pciex_master(&adapter->hw);
4428
4429 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4430 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4431 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4432 if (retval)
4433 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4434 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4435 if (retval)
4436 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4437 } else {
4438 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4439 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4440 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4441 if (retval)
4442 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4443 retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
4444 if (retval)
4445 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4446 }
4447
4448 pci_save_state(pdev);
4449
4450 if(adapter->hw.mac_type >= e1000_82540 &&
4451 adapter->hw.media_type == e1000_media_type_copper) {
4452 manc = E1000_READ_REG(&adapter->hw, MANC);
4453 if(manc & E1000_MANC_SMBUS_EN) {
4454 manc |= E1000_MANC_ARP_EN;
4455 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4456 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4457 if (retval)
4458 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4459 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4460 if (retval)
4461 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4462 }
4463 }
4464
4465 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4466 * would have already happened in close and is redundant. */
4467 e1000_release_hw_control(adapter);
4468
4469 pci_disable_device(pdev);
4470
4471 retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
4472 if (retval)
4473 DPRINTK(PROBE, ERR, "Error in setting power state\n");
4474
4475 return 0;
4476 }
4477
4478 static int
4479 e1000_resume(struct pci_dev *pdev)
4480 {
4481 struct net_device *netdev = pci_get_drvdata(pdev);
4482 struct e1000_adapter *adapter = netdev_priv(netdev);
4483 int retval;
4484 uint32_t manc, ret_val;
4485
4486 retval = pci_set_power_state(pdev, PCI_D0);
4487 if (retval)
4488 DPRINTK(PROBE, ERR, "Error in setting power state\n");
4489 ret_val = pci_enable_device(pdev);
4490 pci_set_master(pdev);
4491
4492 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4493 if (retval)
4494 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4495 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
4496 if (retval)
4497 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4498
4499 e1000_reset(adapter);
4500 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4501
4502 if(netif_running(netdev))
4503 e1000_up(adapter);
4504
4505 netif_device_attach(netdev);
4506
4507 if(adapter->hw.mac_type >= e1000_82540 &&
4508 adapter->hw.media_type == e1000_media_type_copper) {
4509 manc = E1000_READ_REG(&adapter->hw, MANC);
4510 manc &= ~(E1000_MANC_ARP_EN);
4511 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4512 }
4513
4514 /* If the controller is 82573 and f/w is AMT, do not set
4515 * DRV_LOAD until the interface is up. For all other cases,
4516 * let the f/w know that the h/w is now under the control
4517 * of the driver. */
4518 if (adapter->hw.mac_type != e1000_82573 ||
4519 !e1000_check_mng_mode(&adapter->hw))
4520 e1000_get_hw_control(adapter);
4521
4522 return 0;
4523 }
4524 #endif
4525 #ifdef CONFIG_NET_POLL_CONTROLLER
4526 /*
4527 * Polling 'interrupt' - used by things like netconsole to send skbs
4528 * without having to re-enable interrupts. It's not called while
4529 * the interrupt routine is executing.
4530 */
4531 static void
4532 e1000_netpoll(struct net_device *netdev)
4533 {
4534 struct e1000_adapter *adapter = netdev_priv(netdev);
4535 disable_irq(adapter->pdev->irq);
4536 e1000_intr(adapter->pdev->irq, netdev, NULL);
4537 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4538 #ifndef CONFIG_E1000_NAPI
4539 adapter->clean_rx(adapter, adapter->rx_ring);
4540 #endif
4541 enable_irq(adapter->pdev->irq);
4542 }
4543 #endif
4544
4545 /* e1000_main.c */
Linux kernel - Deliverables
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