Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[deliverable/linux.git] / drivers / net / enic / enic_res.c
1 /*
2 * Copyright 2008 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20 #include <linux/kernel.h>
21 #include <linux/errno.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/netdevice.h>
25
26 #include "wq_enet_desc.h"
27 #include "rq_enet_desc.h"
28 #include "cq_enet_desc.h"
29 #include "vnic_resource.h"
30 #include "vnic_enet.h"
31 #include "vnic_dev.h"
32 #include "vnic_wq.h"
33 #include "vnic_rq.h"
34 #include "vnic_cq.h"
35 #include "vnic_intr.h"
36 #include "vnic_stats.h"
37 #include "vnic_nic.h"
38 #include "vnic_rss.h"
39 #include "enic_res.h"
40 #include "enic.h"
41
42 int enic_get_vnic_config(struct enic *enic)
43 {
44 struct vnic_enet_config *c = &enic->config;
45 int err;
46
47 err = vnic_dev_mac_addr(enic->vdev, enic->mac_addr);
48 if (err) {
49 printk(KERN_ERR PFX "Error getting MAC addr, %d\n", err);
50 return err;
51 }
52
53 #define GET_CONFIG(m) \
54 do { \
55 err = vnic_dev_spec(enic->vdev, \
56 offsetof(struct vnic_enet_config, m), \
57 sizeof(c->m), &c->m); \
58 if (err) { \
59 printk(KERN_ERR PFX \
60 "Error getting %s, %d\n", #m, err); \
61 return err; \
62 } \
63 } while (0)
64
65 GET_CONFIG(flags);
66 GET_CONFIG(wq_desc_count);
67 GET_CONFIG(rq_desc_count);
68 GET_CONFIG(mtu);
69 GET_CONFIG(intr_timer);
70 GET_CONFIG(intr_timer_type);
71 GET_CONFIG(intr_mode);
72
73 c->wq_desc_count =
74 min_t(u32, ENIC_MAX_WQ_DESCS,
75 max_t(u32, ENIC_MIN_WQ_DESCS,
76 c->wq_desc_count));
77 c->wq_desc_count &= 0xfffffff0; /* must be aligned to groups of 16 */
78
79 c->rq_desc_count =
80 min_t(u32, ENIC_MAX_RQ_DESCS,
81 max_t(u32, ENIC_MIN_RQ_DESCS,
82 c->rq_desc_count));
83 c->rq_desc_count &= 0xfffffff0; /* must be aligned to groups of 16 */
84
85 if (c->mtu == 0)
86 c->mtu = 1500;
87 c->mtu = min_t(u16, ENIC_MAX_MTU,
88 max_t(u16, ENIC_MIN_MTU,
89 c->mtu));
90
91 c->intr_timer = min_t(u16, VNIC_INTR_TIMER_MAX, c->intr_timer);
92
93 printk(KERN_INFO PFX "vNIC MAC addr %pM wq/rq %d/%d\n",
94 enic->mac_addr, c->wq_desc_count, c->rq_desc_count);
95 printk(KERN_INFO PFX "vNIC mtu %d csum tx/rx %d/%d tso/lro %d/%d "
96 "intr timer %d\n",
97 c->mtu, ENIC_SETTING(enic, TXCSUM),
98 ENIC_SETTING(enic, RXCSUM), ENIC_SETTING(enic, TSO),
99 ENIC_SETTING(enic, LRO), c->intr_timer);
100
101 return 0;
102 }
103
104 void enic_add_station_addr(struct enic *enic)
105 {
106 vnic_dev_add_addr(enic->vdev, enic->mac_addr);
107 }
108
109 void enic_add_multicast_addr(struct enic *enic, u8 *addr)
110 {
111 vnic_dev_add_addr(enic->vdev, addr);
112 }
113
114 void enic_del_multicast_addr(struct enic *enic, u8 *addr)
115 {
116 vnic_dev_del_addr(enic->vdev, addr);
117 }
118
119 void enic_add_vlan(struct enic *enic, u16 vlanid)
120 {
121 u64 a0 = vlanid, a1 = 0;
122 int wait = 1000;
123 int err;
124
125 err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
126 if (err)
127 printk(KERN_ERR PFX "Can't add vlan id, %d\n", err);
128 }
129
130 void enic_del_vlan(struct enic *enic, u16 vlanid)
131 {
132 u64 a0 = vlanid, a1 = 0;
133 int wait = 1000;
134 int err;
135
136 err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
137 if (err)
138 printk(KERN_ERR PFX "Can't delete vlan id, %d\n", err);
139 }
140
141 int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
142 u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
143 u8 ig_vlan_strip_en)
144 {
145 u64 a0, a1;
146 u32 nic_cfg;
147 int wait = 1000;
148
149 vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
150 rss_hash_type, rss_hash_bits, rss_base_cpu,
151 rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
152
153 a0 = nic_cfg;
154 a1 = 0;
155
156 return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
157 }
158
159 void enic_free_vnic_resources(struct enic *enic)
160 {
161 unsigned int i;
162
163 for (i = 0; i < enic->wq_count; i++)
164 vnic_wq_free(&enic->wq[i]);
165 for (i = 0; i < enic->rq_count; i++)
166 vnic_rq_free(&enic->rq[i]);
167 for (i = 0; i < enic->cq_count; i++)
168 vnic_cq_free(&enic->cq[i]);
169 for (i = 0; i < enic->intr_count; i++)
170 vnic_intr_free(&enic->intr[i]);
171 }
172
173 void enic_get_res_counts(struct enic *enic)
174 {
175 enic->wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);
176 enic->rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);
177 enic->cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);
178 enic->intr_count = vnic_dev_get_res_count(enic->vdev,
179 RES_TYPE_INTR_CTRL);
180
181 printk(KERN_INFO PFX "vNIC resources avail: "
182 "wq %d rq %d cq %d intr %d\n",
183 enic->wq_count, enic->rq_count,
184 enic->cq_count, enic->intr_count);
185 }
186
187 void enic_init_vnic_resources(struct enic *enic)
188 {
189 enum vnic_dev_intr_mode intr_mode;
190 unsigned int mask_on_assertion;
191 unsigned int interrupt_offset;
192 unsigned int error_interrupt_enable;
193 unsigned int error_interrupt_offset;
194 unsigned int cq_index;
195 unsigned int i;
196
197 intr_mode = vnic_dev_get_intr_mode(enic->vdev);
198
199 /* Init RQ/WQ resources.
200 *
201 * RQ[0 - n-1] point to CQ[0 - n-1]
202 * WQ[0 - m-1] point to CQ[n - n+m-1]
203 *
204 * Error interrupt is not enabled for MSI.
205 */
206
207 switch (intr_mode) {
208 case VNIC_DEV_INTR_MODE_INTX:
209 case VNIC_DEV_INTR_MODE_MSIX:
210 error_interrupt_enable = 1;
211 error_interrupt_offset = enic->intr_count - 2;
212 break;
213 default:
214 error_interrupt_enable = 0;
215 error_interrupt_offset = 0;
216 break;
217 }
218
219 for (i = 0; i < enic->rq_count; i++) {
220 cq_index = i;
221 vnic_rq_init(&enic->rq[i],
222 cq_index,
223 error_interrupt_enable,
224 error_interrupt_offset);
225 }
226
227 for (i = 0; i < enic->wq_count; i++) {
228 cq_index = enic->rq_count + i;
229 vnic_wq_init(&enic->wq[i],
230 cq_index,
231 error_interrupt_enable,
232 error_interrupt_offset);
233 }
234
235 /* Init CQ resources
236 *
237 * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
238 * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
239 */
240
241 for (i = 0; i < enic->cq_count; i++) {
242
243 switch (intr_mode) {
244 case VNIC_DEV_INTR_MODE_MSIX:
245 interrupt_offset = i;
246 break;
247 default:
248 interrupt_offset = 0;
249 break;
250 }
251
252 vnic_cq_init(&enic->cq[i],
253 0 /* flow_control_enable */,
254 1 /* color_enable */,
255 0 /* cq_head */,
256 0 /* cq_tail */,
257 1 /* cq_tail_color */,
258 1 /* interrupt_enable */,
259 1 /* cq_entry_enable */,
260 0 /* cq_message_enable */,
261 interrupt_offset,
262 0 /* cq_message_addr */);
263 }
264
265 /* Init INTR resources
266 *
267 * mask_on_assertion is not used for INTx due to the level-
268 * triggered nature of INTx
269 */
270
271 switch (intr_mode) {
272 case VNIC_DEV_INTR_MODE_MSI:
273 case VNIC_DEV_INTR_MODE_MSIX:
274 mask_on_assertion = 1;
275 break;
276 default:
277 mask_on_assertion = 0;
278 break;
279 }
280
281 for (i = 0; i < enic->intr_count; i++) {
282 vnic_intr_init(&enic->intr[i],
283 enic->config.intr_timer,
284 enic->config.intr_timer_type,
285 mask_on_assertion);
286 }
287
288 /* Clear LIF stats
289 */
290
291 vnic_dev_stats_clear(enic->vdev);
292 }
293
294 int enic_alloc_vnic_resources(struct enic *enic)
295 {
296 enum vnic_dev_intr_mode intr_mode;
297 unsigned int i;
298 int err;
299
300 intr_mode = vnic_dev_get_intr_mode(enic->vdev);
301
302 printk(KERN_INFO PFX "vNIC resources used: "
303 "wq %d rq %d cq %d intr %d intr mode %s\n",
304 enic->wq_count, enic->rq_count,
305 enic->cq_count, enic->intr_count,
306 intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
307 intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
308 intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
309 "unknown"
310 );
311
312 /* Allocate queue resources
313 */
314
315 for (i = 0; i < enic->wq_count; i++) {
316 err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
317 enic->config.wq_desc_count,
318 sizeof(struct wq_enet_desc));
319 if (err)
320 goto err_out_cleanup;
321 }
322
323 for (i = 0; i < enic->rq_count; i++) {
324 err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
325 enic->config.rq_desc_count,
326 sizeof(struct rq_enet_desc));
327 if (err)
328 goto err_out_cleanup;
329 }
330
331 for (i = 0; i < enic->cq_count; i++) {
332 if (i < enic->rq_count)
333 err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
334 enic->config.rq_desc_count,
335 sizeof(struct cq_enet_rq_desc));
336 else
337 err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
338 enic->config.wq_desc_count,
339 sizeof(struct cq_enet_wq_desc));
340 if (err)
341 goto err_out_cleanup;
342 }
343
344 for (i = 0; i < enic->intr_count; i++) {
345 err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
346 if (err)
347 goto err_out_cleanup;
348 }
349
350 /* Hook remaining resource
351 */
352
353 enic->legacy_pba = vnic_dev_get_res(enic->vdev,
354 RES_TYPE_INTR_PBA_LEGACY, 0);
355 if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
356 printk(KERN_ERR PFX "Failed to hook legacy pba resource\n");
357 err = -ENODEV;
358 goto err_out_cleanup;
359 }
360
361 return 0;
362
363 err_out_cleanup:
364 enic_free_vnic_resources(enic);
365
366 return err;
367 }
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