drivers/net/ethernet/amd/xgbe/xgbe.h

   1 /*
   2  * AMD 10Gb Ethernet driver
   3  *
   4  * This file is available to you under your choice of the following two
   5  * licenses:
   6  *
   7  * License 1: GPLv2
   8  *
   9  * Copyright (c) 2014 Advanced Micro Devices, Inc.
  10  *
  11  * This file is free software; you may copy, redistribute and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation, either version 2 of the License, or (at
  14  * your option) any later version.
  15  *
  16  * This file is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  23  *
  24  * This file incorporates work covered by the following copyright and
  25  * permission notice:
  26  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  27  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  28  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  29  *     and you.
  30  *
  31  *     The Software IS NOT an item of Licensed Software or Licensed Product
  32  *     under any End User Software License Agreement or Agreement for Licensed
  33  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  34  *     granted, free of charge, to any person obtaining a copy of this software
  35  *     annotated with this license and the Software, to deal in the Software
  36  *     without restriction, including without limitation the rights to use,
  37  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  38  *     of the Software, and to permit persons to whom the Software is furnished
  39  *     to do so, subject to the following conditions:
  40  *
  41  *     The above copyright notice and this permission notice shall be included
  42  *     in all copies or substantial portions of the Software.
  43  *
  44  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
  45  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  46  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  47  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
  48  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  49  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  50  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  51  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  52  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  53  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  54  *     THE POSSIBILITY OF SUCH DAMAGE.
  55  *
  56  *
  57  * License 2: Modified BSD
  58  *
  59  * Copyright (c) 2014 Advanced Micro Devices, Inc.
  60  * All rights reserved.
  61  *
  62  * Redistribution and use in source and binary forms, with or without
  63  * modification, are permitted provided that the following conditions are met:
  64  *     * Redistributions of source code must retain the above copyright
  65  *       notice, this list of conditions and the following disclaimer.
  66  *     * Redistributions in binary form must reproduce the above copyright
  67  *       notice, this list of conditions and the following disclaimer in the
  68  *       documentation and/or other materials provided with the distribution.
  69  *     * Neither the name of Advanced Micro Devices, Inc. nor the
  70  *       names of its contributors may be used to endorse or promote products
  71  *       derived from this software without specific prior written permission.
  72  *
  73  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  74  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  75  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  76  * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
  77  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  79  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  80  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  82  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83  *
  84  * This file incorporates work covered by the following copyright and
  85  * permission notice:
  86  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  87  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  88  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  89  *     and you.
  90  *
  91  *     The Software IS NOT an item of Licensed Software or Licensed Product
  92  *     under any End User Software License Agreement or Agreement for Licensed
  93  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  94  *     granted, free of charge, to any person obtaining a copy of this software
  95  *     annotated with this license and the Software, to deal in the Software
  96  *     without restriction, including without limitation the rights to use,
  97  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  98  *     of the Software, and to permit persons to whom the Software is furnished
  99  *     to do so, subject to the following conditions:
 100  *
 101  *     The above copyright notice and this permission notice shall be included
 102  *     in all copies or substantial portions of the Software.
 103  *
 104  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
 105  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 106  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 107  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
 108  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 109  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 110  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 111  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 112  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 113  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 114  *     THE POSSIBILITY OF SUCH DAMAGE.
 115  */
 116
 117 #ifndef __XGBE_H__
 118 #define __XGBE_H__
 119
 120 #include <linux/dma-mapping.h>
 121 #include <linux/netdevice.h>
 122 #include <linux/workqueue.h>
 123 #include <linux/phy.h>
 124 #include <linux/if_vlan.h>
 125 #include <linux/bitops.h>
 126 #include <linux/ptp_clock_kernel.h>
 127 #include <linux/clocksource.h>
 128 #include <linux/net_tstamp.h>
 129 #include <net/dcbnl.h>
 130
 131 #define XGBE_DRV_NAME           "amd-xgbe"
 132 #define XGBE_DRV_VERSION        "1.0.0-a"
 133 #define XGBE_DRV_DESC           "AMD 10 Gigabit Ethernet Driver"
 134
 135 /* Descriptor related defines */
 136 #define XGBE_TX_DESC_CNT        512
 137 #define XGBE_TX_DESC_MIN_FREE   (XGBE_TX_DESC_CNT >> 3)
 138 #define XGBE_TX_DESC_MAX_PROC   (XGBE_TX_DESC_CNT >> 1)
 139 #define XGBE_RX_DESC_CNT        512
 140
 141 #define XGBE_TX_MAX_BUF_SIZE    (0x3fff & ~(64 - 1))
 142
 143 #define XGBE_RX_MIN_BUF_SIZE    (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
 144 #define XGBE_RX_BUF_ALIGN       64
 145 #define XGBE_SKB_ALLOC_SIZE     256
 146 #define XGBE_SPH_HDSMS_SIZE     2       /* Keep in sync with SKB_ALLOC_SIZE */
 147
 148 #define XGBE_MAX_DMA_CHANNELS   16
 149 #define XGBE_MAX_QUEUES         16
 150
 151 /* DMA cache settings - Outer sharable, write-back, write-allocate */
 152 #define XGBE_DMA_OS_AXDOMAIN    0x2
 153 #define XGBE_DMA_OS_ARCACHE     0xb
 154 #define XGBE_DMA_OS_AWCACHE     0xf
 155
 156 /* DMA cache settings - System, no caches used */
 157 #define XGBE_DMA_SYS_AXDOMAIN   0x3
 158 #define XGBE_DMA_SYS_ARCACHE    0x0
 159 #define XGBE_DMA_SYS_AWCACHE    0x0
 160
 161 #define XGBE_DMA_INTERRUPT_MASK 0x31c7
 162
 163 #define XGMAC_MIN_PACKET        60
 164 #define XGMAC_STD_PACKET_MTU    1500
 165 #define XGMAC_MAX_STD_PACKET    1518
 166 #define XGMAC_JUMBO_PACKET_MTU  9000
 167 #define XGMAC_MAX_JUMBO_PACKET  9018
 168
 169 /* MDIO bus phy name */
 170 #define XGBE_PHY_NAME           "amd_xgbe_phy"
 171 #define XGBE_PRTAD              0
 172
 173 /* Device-tree clock names */
 174 #define XGBE_DMA_CLOCK          "dma_clk"
 175 #define XGBE_PTP_CLOCK          "ptp_clk"
 176 #define XGBE_DMA_IRQS           "amd,per-channel-interrupt"
 177
 178 /* Timestamp support - values based on 50MHz PTP clock
 179  *   50MHz => 20 nsec
 180  */
 181 #define XGBE_TSTAMP_SSINC       20
 182 #define XGBE_TSTAMP_SNSINC      0
 183
 184 /* Driver PMT macros */
 185 #define XGMAC_DRIVER_CONTEXT    1
 186 #define XGMAC_IOCTL_CONTEXT     2
 187
 188 #define XGBE_FIFO_MAX           81920
 189 #define XGBE_FIFO_SIZE_B(x)     (x)
 190 #define XGBE_FIFO_SIZE_KB(x)    (x * 1024)
 191
 192 #define XGBE_TC_MIN_QUANTUM     10
 193
 194 /* Helper macro for descriptor handling
 195  *  Always use XGBE_GET_DESC_DATA to access the descriptor data
 196  *  since the index is free-running and needs to be and-ed
 197  *  with the descriptor count value of the ring to index to
 198  *  the proper descriptor data.
 199  */
 200 #define XGBE_GET_DESC_DATA(_ring, _idx)                         \
 201         ((_ring)->rdata +                                       \
 202          ((_idx) & ((_ring)->rdesc_count - 1)))
 203
 204 /* Default coalescing parameters */
 205 #define XGMAC_INIT_DMA_TX_USECS         50
 206 #define XGMAC_INIT_DMA_TX_FRAMES        25
 207
 208 #define XGMAC_MAX_DMA_RIWT              0xff
 209 #define XGMAC_INIT_DMA_RX_USECS         30
 210 #define XGMAC_INIT_DMA_RX_FRAMES        25
 211
 212 /* Flow control queue count */
 213 #define XGMAC_MAX_FLOW_CONTROL_QUEUES   8
 214
 215 /* Maximum MAC address hash table size (256 bits = 8 bytes) */
 216 #define XGBE_MAC_HASH_TABLE_SIZE        8
 217
 218 struct xgbe_prv_data;
 219
 220 struct xgbe_packet_data {
 221         unsigned int attributes;
 222
 223         unsigned int errors;
 224
 225         unsigned int rdesc_count;
 226         unsigned int length;
 227
 228         unsigned int header_len;
 229         unsigned int tcp_header_len;
 230         unsigned int tcp_payload_len;
 231         unsigned short mss;
 232
 233         unsigned short vlan_ctag;
 234
 235         u64 rx_tstamp;
 236 };
 237
 238 /* Common Rx and Tx descriptor mapping */
 239 struct xgbe_ring_desc {
 240         u32 desc0;
 241         u32 desc1;
 242         u32 desc2;
 243         u32 desc3;
 244 };
 245
 246 /* Page allocation related values */
 247 struct xgbe_page_alloc {
 248         struct page *pages;
 249         unsigned int pages_len;
 250         unsigned int pages_offset;
 251
 252         dma_addr_t pages_dma;
 253 };
 254
 255 /* Ring entry buffer data */
 256 struct xgbe_buffer_data {
 257         struct xgbe_page_alloc pa;
 258         struct xgbe_page_alloc pa_unmap;
 259
 260         dma_addr_t dma;
 261         unsigned int dma_len;
 262 };
 263
 264 /* Structure used to hold information related to the descriptor
 265  * and the packet associated with the descriptor (always use
 266  * use the XGBE_GET_DESC_DATA macro to access this data from the ring)
 267  */
 268 struct xgbe_ring_data {
 269         struct xgbe_ring_desc *rdesc;   /* Virtual address of descriptor */
 270         dma_addr_t rdesc_dma;           /* DMA address of descriptor */
 271
 272         struct sk_buff *skb;            /* Virtual address of SKB */
 273         dma_addr_t skb_dma;             /* DMA address of SKB data */
 274         unsigned int skb_dma_len;       /* Length of SKB DMA area */
 275         unsigned int tso_header;        /* TSO header indicator */
 276
 277         struct xgbe_buffer_data rx_hdr; /* Header locations */
 278         struct xgbe_buffer_data rx_buf; /* Payload locations */
 279
 280         unsigned short hdr_len;         /* Length of received header */
 281         unsigned short len;             /* Length of received Rx packet */
 282
 283         unsigned int interrupt;         /* Interrupt indicator */
 284
 285         unsigned int mapped_as_page;
 286
 287         /* Incomplete receive save location.  If the budget is exhausted
 288          * or the last descriptor (last normal descriptor or a following
 289          * context descriptor) has not been DMA'd yet the current state
 290          * of the receive processing needs to be saved.
 291          */
 292         unsigned int state_saved;
 293         struct {
 294                 unsigned int incomplete;
 295                 unsigned int context_next;
 296                 struct sk_buff *skb;
 297                 unsigned int len;
 298                 unsigned int error;
 299         } state;
 300 };
 301
 302 struct xgbe_ring {
 303         /* Ring lock - used just for TX rings at the moment */
 304         spinlock_t lock;
 305
 306         /* Per packet related information */
 307         struct xgbe_packet_data packet_data;
 308
 309         /* Virtual/DMA addresses and count of allocated descriptor memory */
 310         struct xgbe_ring_desc *rdesc;
 311         dma_addr_t rdesc_dma;
 312         unsigned int rdesc_count;
 313
 314         /* Array of descriptor data corresponding the descriptor memory
 315          * (always use the XGBE_GET_DESC_DATA macro to access this data)
 316          */
 317         struct xgbe_ring_data *rdata;
 318
 319         /* Page allocation for RX buffers */
 320         struct xgbe_page_alloc rx_hdr_pa;
 321         struct xgbe_page_alloc rx_buf_pa;
 322
 323         /* Ring index values
 324          *  cur   - Tx: index of descriptor to be used for current transfer
 325          *          Rx: index of descriptor to check for packet availability
 326          *  dirty - Tx: index of descriptor to check for transfer complete
 327          *          Rx: count of descriptors in which a packet has been received
 328          *              (used with skb_realloc_index to refresh the ring)
 329          */
 330         unsigned int cur;
 331         unsigned int dirty;
 332
 333         /* Coalesce frame count used for interrupt bit setting */
 334         unsigned int coalesce_count;
 335
 336         union {
 337                 struct {
 338                         unsigned int queue_stopped;
 339                         unsigned short cur_mss;
 340                         unsigned short cur_vlan_ctag;
 341                 } tx;
 342
 343                 struct {
 344                         unsigned int realloc_index;
 345                         unsigned int realloc_threshold;
 346                 } rx;
 347         };
 348 } ____cacheline_aligned;
 349
 350 /* Structure used to describe the descriptor rings associated with
 351  * a DMA channel.
 352  */
 353 struct xgbe_channel {
 354         char name[16];
 355
 356         /* Address of private data area for device */
 357         struct xgbe_prv_data *pdata;
 358
 359         /* Queue index and base address of queue's DMA registers */
 360         unsigned int queue_index;
 361         void __iomem *dma_regs;
 362
 363         /* Per channel interrupt irq number */
 364         int dma_irq;
 365
 366         /* Netdev related settings */
 367         struct napi_struct napi;
 368
 369         unsigned int saved_ier;
 370
 371         unsigned int tx_timer_active;
 372         struct hrtimer tx_timer;
 373
 374         struct xgbe_ring *tx_ring;
 375         struct xgbe_ring *rx_ring;
 376 } ____cacheline_aligned;
 377
 378 enum xgbe_int {
 379         XGMAC_INT_DMA_CH_SR_TI,
 380         XGMAC_INT_DMA_CH_SR_TPS,
 381         XGMAC_INT_DMA_CH_SR_TBU,
 382         XGMAC_INT_DMA_CH_SR_RI,
 383         XGMAC_INT_DMA_CH_SR_RBU,
 384         XGMAC_INT_DMA_CH_SR_RPS,
 385         XGMAC_INT_DMA_CH_SR_TI_RI,
 386         XGMAC_INT_DMA_CH_SR_FBE,
 387         XGMAC_INT_DMA_ALL,
 388 };
 389
 390 enum xgbe_int_state {
 391         XGMAC_INT_STATE_SAVE,
 392         XGMAC_INT_STATE_RESTORE,
 393 };
 394
 395 enum xgbe_mtl_fifo_size {
 396         XGMAC_MTL_FIFO_SIZE_256  = 0x00,
 397         XGMAC_MTL_FIFO_SIZE_512  = 0x01,
 398         XGMAC_MTL_FIFO_SIZE_1K   = 0x03,
 399         XGMAC_MTL_FIFO_SIZE_2K   = 0x07,
 400         XGMAC_MTL_FIFO_SIZE_4K   = 0x0f,
 401         XGMAC_MTL_FIFO_SIZE_8K   = 0x1f,
 402         XGMAC_MTL_FIFO_SIZE_16K  = 0x3f,
 403         XGMAC_MTL_FIFO_SIZE_32K  = 0x7f,
 404         XGMAC_MTL_FIFO_SIZE_64K  = 0xff,
 405         XGMAC_MTL_FIFO_SIZE_128K = 0x1ff,
 406         XGMAC_MTL_FIFO_SIZE_256K = 0x3ff,
 407 };
 408
 409 struct xgbe_mmc_stats {
 410         /* Tx Stats */
 411         u64 txoctetcount_gb;
 412         u64 txframecount_gb;
 413         u64 txbroadcastframes_g;
 414         u64 txmulticastframes_g;
 415         u64 tx64octets_gb;
 416         u64 tx65to127octets_gb;
 417         u64 tx128to255octets_gb;
 418         u64 tx256to511octets_gb;
 419         u64 tx512to1023octets_gb;
 420         u64 tx1024tomaxoctets_gb;
 421         u64 txunicastframes_gb;
 422         u64 txmulticastframes_gb;
 423         u64 txbroadcastframes_gb;
 424         u64 txunderflowerror;
 425         u64 txoctetcount_g;
 426         u64 txframecount_g;
 427         u64 txpauseframes;
 428         u64 txvlanframes_g;
 429
 430         /* Rx Stats */
 431         u64 rxframecount_gb;
 432         u64 rxoctetcount_gb;
 433         u64 rxoctetcount_g;
 434         u64 rxbroadcastframes_g;
 435         u64 rxmulticastframes_g;
 436         u64 rxcrcerror;
 437         u64 rxrunterror;
 438         u64 rxjabbererror;
 439         u64 rxundersize_g;
 440         u64 rxoversize_g;
 441         u64 rx64octets_gb;
 442         u64 rx65to127octets_gb;
 443         u64 rx128to255octets_gb;
 444         u64 rx256to511octets_gb;
 445         u64 rx512to1023octets_gb;
 446         u64 rx1024tomaxoctets_gb;
 447         u64 rxunicastframes_g;
 448         u64 rxlengtherror;
 449         u64 rxoutofrangetype;
 450         u64 rxpauseframes;
 451         u64 rxfifooverflow;
 452         u64 rxvlanframes_gb;
 453         u64 rxwatchdogerror;
 454 };
 455
 456 struct xgbe_hw_if {
 457         int (*tx_complete)(struct xgbe_ring_desc *);
 458
 459         int (*set_promiscuous_mode)(struct xgbe_prv_data *, unsigned int);
 460         int (*set_all_multicast_mode)(struct xgbe_prv_data *, unsigned int);
 461         int (*add_mac_addresses)(struct xgbe_prv_data *);
 462         int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);
 463
 464         int (*enable_rx_csum)(struct xgbe_prv_data *);
 465         int (*disable_rx_csum)(struct xgbe_prv_data *);
 466
 467         int (*enable_rx_vlan_stripping)(struct xgbe_prv_data *);
 468         int (*disable_rx_vlan_stripping)(struct xgbe_prv_data *);
 469         int (*enable_rx_vlan_filtering)(struct xgbe_prv_data *);
 470         int (*disable_rx_vlan_filtering)(struct xgbe_prv_data *);
 471         int (*update_vlan_hash_table)(struct xgbe_prv_data *);
 472
 473         int (*read_mmd_regs)(struct xgbe_prv_data *, int, int);
 474         void (*write_mmd_regs)(struct xgbe_prv_data *, int, int, int);
 475         int (*set_gmii_speed)(struct xgbe_prv_data *);
 476         int (*set_gmii_2500_speed)(struct xgbe_prv_data *);
 477         int (*set_xgmii_speed)(struct xgbe_prv_data *);
 478
 479         void (*enable_tx)(struct xgbe_prv_data *);
 480         void (*disable_tx)(struct xgbe_prv_data *);
 481         void (*enable_rx)(struct xgbe_prv_data *);
 482         void (*disable_rx)(struct xgbe_prv_data *);
 483
 484         void (*powerup_tx)(struct xgbe_prv_data *);
 485         void (*powerdown_tx)(struct xgbe_prv_data *);
 486         void (*powerup_rx)(struct xgbe_prv_data *);
 487         void (*powerdown_rx)(struct xgbe_prv_data *);
 488
 489         int (*init)(struct xgbe_prv_data *);
 490         int (*exit)(struct xgbe_prv_data *);
 491
 492         int (*enable_int)(struct xgbe_channel *, enum xgbe_int);
 493         int (*disable_int)(struct xgbe_channel *, enum xgbe_int);
 494         void (*dev_xmit)(struct xgbe_channel *);
 495         int (*dev_read)(struct xgbe_channel *);
 496         void (*tx_desc_init)(struct xgbe_channel *);
 497         void (*rx_desc_init)(struct xgbe_channel *);
 498         void (*rx_desc_reset)(struct xgbe_ring_data *);
 499         void (*tx_desc_reset)(struct xgbe_ring_data *);
 500         int (*is_last_desc)(struct xgbe_ring_desc *);
 501         int (*is_context_desc)(struct xgbe_ring_desc *);
 502
 503         /* For FLOW ctrl */
 504         int (*config_tx_flow_control)(struct xgbe_prv_data *);
 505         int (*config_rx_flow_control)(struct xgbe_prv_data *);
 506
 507         /* For RX coalescing */
 508         int (*config_rx_coalesce)(struct xgbe_prv_data *);
 509         int (*config_tx_coalesce)(struct xgbe_prv_data *);
 510         unsigned int (*usec_to_riwt)(struct xgbe_prv_data *, unsigned int);
 511         unsigned int (*riwt_to_usec)(struct xgbe_prv_data *, unsigned int);
 512
 513         /* For RX and TX threshold config */
 514         int (*config_rx_threshold)(struct xgbe_prv_data *, unsigned int);
 515         int (*config_tx_threshold)(struct xgbe_prv_data *, unsigned int);
 516
 517         /* For RX and TX Store and Forward Mode config */
 518         int (*config_rsf_mode)(struct xgbe_prv_data *, unsigned int);
 519         int (*config_tsf_mode)(struct xgbe_prv_data *, unsigned int);
 520
 521         /* For TX DMA Operate on Second Frame config */
 522         int (*config_osp_mode)(struct xgbe_prv_data *);
 523
 524         /* For RX and TX PBL config */
 525         int (*config_rx_pbl_val)(struct xgbe_prv_data *);
 526         int (*get_rx_pbl_val)(struct xgbe_prv_data *);
 527         int (*config_tx_pbl_val)(struct xgbe_prv_data *);
 528         int (*get_tx_pbl_val)(struct xgbe_prv_data *);
 529         int (*config_pblx8)(struct xgbe_prv_data *);
 530
 531         /* For MMC statistics */
 532         void (*rx_mmc_int)(struct xgbe_prv_data *);
 533         void (*tx_mmc_int)(struct xgbe_prv_data *);
 534         void (*read_mmc_stats)(struct xgbe_prv_data *);
 535
 536         /* For Timestamp config */
 537         int (*config_tstamp)(struct xgbe_prv_data *, unsigned int);
 538         void (*update_tstamp_addend)(struct xgbe_prv_data *, unsigned int);
 539         void (*set_tstamp_time)(struct xgbe_prv_data *, unsigned int sec,
 540                                 unsigned int nsec);
 541         u64 (*get_tstamp_time)(struct xgbe_prv_data *);
 542         u64 (*get_tx_tstamp)(struct xgbe_prv_data *);
 543
 544         /* For Data Center Bridging config */
 545         void (*config_dcb_tc)(struct xgbe_prv_data *);
 546         void (*config_dcb_pfc)(struct xgbe_prv_data *);
 547 };
 548
 549 struct xgbe_desc_if {
 550         int (*alloc_ring_resources)(struct xgbe_prv_data *);
 551         void (*free_ring_resources)(struct xgbe_prv_data *);
 552         int (*map_tx_skb)(struct xgbe_channel *, struct sk_buff *);
 553         void (*realloc_rx_buffer)(struct xgbe_channel *);
 554         void (*unmap_rdata)(struct xgbe_prv_data *, struct xgbe_ring_data *);
 555         void (*wrapper_tx_desc_init)(struct xgbe_prv_data *);
 556         void (*wrapper_rx_desc_init)(struct xgbe_prv_data *);
 557 };
 558
 559 /* This structure contains flags that indicate what hardware features
 560  * or configurations are present in the device.
 561  */
 562 struct xgbe_hw_features {
 563         /* HW Version */
 564         unsigned int version;
 565
 566         /* HW Feature Register0 */
 567         unsigned int gmii;              /* 1000 Mbps support */
 568         unsigned int vlhash;            /* VLAN Hash Filter */
 569         unsigned int sma;               /* SMA(MDIO) Interface */
 570         unsigned int rwk;               /* PMT remote wake-up packet */
 571         unsigned int mgk;               /* PMT magic packet */
 572         unsigned int mmc;               /* RMON module */
 573         unsigned int aoe;               /* ARP Offload */
 574         unsigned int ts;                /* IEEE 1588-2008 Adavanced Timestamp */
 575         unsigned int eee;               /* Energy Efficient Ethernet */
 576         unsigned int tx_coe;            /* Tx Checksum Offload */
 577         unsigned int rx_coe;            /* Rx Checksum Offload */
 578         unsigned int addn_mac;          /* Additional MAC Addresses */
 579         unsigned int ts_src;            /* Timestamp Source */
 580         unsigned int sa_vlan_ins;       /* Source Address or VLAN Insertion */
 581
 582         /* HW Feature Register1 */
 583         unsigned int rx_fifo_size;      /* MTL Receive FIFO Size */
 584         unsigned int tx_fifo_size;      /* MTL Transmit FIFO Size */
 585         unsigned int adv_ts_hi;         /* Advance Timestamping High Word */
 586         unsigned int dcb;               /* DCB Feature */
 587         unsigned int sph;               /* Split Header Feature */
 588         unsigned int tso;               /* TCP Segmentation Offload */
 589         unsigned int dma_debug;         /* DMA Debug Registers */
 590         unsigned int rss;               /* Receive Side Scaling */
 591         unsigned int tc_cnt;            /* Number of Traffic Classes */
 592         unsigned int hash_table_size;   /* Hash Table Size */
 593         unsigned int l3l4_filter_num;   /* Number of L3-L4 Filters */
 594
 595         /* HW Feature Register2 */
 596         unsigned int rx_q_cnt;          /* Number of MTL Receive Queues */
 597         unsigned int tx_q_cnt;          /* Number of MTL Transmit Queues */
 598         unsigned int rx_ch_cnt;         /* Number of DMA Receive Channels */
 599         unsigned int tx_ch_cnt;         /* Number of DMA Transmit Channels */
 600         unsigned int pps_out_num;       /* Number of PPS outputs */
 601         unsigned int aux_snap_num;      /* Number of Aux snapshot inputs */
 602 };
 603
 604 struct xgbe_prv_data {
 605         struct net_device *netdev;
 606         struct platform_device *pdev;
 607         struct device *dev;
 608
 609         /* XGMAC/XPCS related mmio registers */
 610         void __iomem *xgmac_regs;       /* XGMAC CSRs */
 611         void __iomem *xpcs_regs;        /* XPCS MMD registers */
 612
 613         /* Overall device lock */
 614         spinlock_t lock;
 615
 616         /* XPCS indirect addressing mutex */
 617         struct mutex xpcs_mutex;
 618
 619         int dev_irq;
 620         unsigned int per_channel_irq;
 621
 622         struct xgbe_hw_if hw_if;
 623         struct xgbe_desc_if desc_if;
 624
 625         /* AXI DMA settings */
 626         unsigned int axdomain;
 627         unsigned int arcache;
 628         unsigned int awcache;
 629
 630         /* Rings for Tx/Rx on a DMA channel */
 631         struct xgbe_channel *channel;
 632         unsigned int channel_count;
 633         unsigned int tx_ring_count;
 634         unsigned int tx_desc_count;
 635         unsigned int rx_ring_count;
 636         unsigned int rx_desc_count;
 637
 638         unsigned int tx_q_count;
 639         unsigned int rx_q_count;
 640
 641         /* Tx/Rx common settings */
 642         unsigned int pblx8;
 643
 644         /* Tx settings */
 645         unsigned int tx_sf_mode;
 646         unsigned int tx_threshold;
 647         unsigned int tx_pbl;
 648         unsigned int tx_osp_mode;
 649
 650         /* Rx settings */
 651         unsigned int rx_sf_mode;
 652         unsigned int rx_threshold;
 653         unsigned int rx_pbl;
 654
 655         /* Tx coalescing settings */
 656         unsigned int tx_usecs;
 657         unsigned int tx_frames;
 658
 659         /* Rx coalescing settings */
 660         unsigned int rx_riwt;
 661         unsigned int rx_frames;
 662
 663         /* Current Rx buffer size */
 664         unsigned int rx_buf_size;
 665
 666         /* Flow control settings */
 667         unsigned int pause_autoneg;
 668         unsigned int tx_pause;
 669         unsigned int rx_pause;
 670
 671         /* MDIO settings */
 672         struct module *phy_module;
 673         char *mii_bus_id;
 674         struct mii_bus *mii;
 675         int mdio_mmd;
 676         struct phy_device *phydev;
 677         int default_autoneg;
 678         int default_speed;
 679
 680         /* Current PHY settings */
 681         phy_interface_t phy_mode;
 682         int phy_link;
 683         int phy_speed;
 684         unsigned int phy_tx_pause;
 685         unsigned int phy_rx_pause;
 686
 687         /* Netdev related settings */
 688         netdev_features_t netdev_features;
 689         struct napi_struct napi;
 690         struct xgbe_mmc_stats mmc_stats;
 691
 692         /* Filtering support */
 693         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 694
 695         /* Device clocks */
 696         struct clk *sysclk;
 697         struct clk *ptpclk;
 698
 699         /* Timestamp support */
 700         spinlock_t tstamp_lock;
 701         struct ptp_clock_info ptp_clock_info;
 702         struct ptp_clock *ptp_clock;
 703         struct hwtstamp_config tstamp_config;
 704         struct cyclecounter tstamp_cc;
 705         struct timecounter tstamp_tc;
 706         unsigned int tstamp_addend;
 707         struct work_struct tx_tstamp_work;
 708         struct sk_buff *tx_tstamp_skb;
 709         u64 tx_tstamp;
 710
 711         /* DCB support */
 712         struct ieee_ets *ets;
 713         struct ieee_pfc *pfc;
 714         unsigned int q2tc_map[XGBE_MAX_QUEUES];
 715         unsigned int prio2q_map[IEEE_8021QAZ_MAX_TCS];
 716
 717         /* Hardware features of the device */
 718         struct xgbe_hw_features hw_feat;
 719
 720         /* Device restart work structure */
 721         struct work_struct restart_work;
 722
 723         /* Keeps track of power mode */
 724         unsigned int power_down;
 725
 726 #ifdef CONFIG_DEBUG_FS
 727         struct dentry *xgbe_debugfs;
 728
 729         unsigned int debugfs_xgmac_reg;
 730
 731         unsigned int debugfs_xpcs_mmd;
 732         unsigned int debugfs_xpcs_reg;
 733 #endif
 734 };
 735
 736 /* Function prototypes*/
 737
 738 void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *);
 739 void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *);
 740 struct net_device_ops *xgbe_get_netdev_ops(void);
 741 struct ethtool_ops *xgbe_get_ethtool_ops(void);
 742 #ifdef CONFIG_AMD_XGBE_DCB
 743 const struct dcbnl_rtnl_ops *xgbe_get_dcbnl_ops(void);
 744 #endif
 745
 746 int xgbe_mdio_register(struct xgbe_prv_data *);
 747 void xgbe_mdio_unregister(struct xgbe_prv_data *);
 748 void xgbe_dump_phy_registers(struct xgbe_prv_data *);
 749 void xgbe_ptp_register(struct xgbe_prv_data *);
 750 void xgbe_ptp_unregister(struct xgbe_prv_data *);
 751 void xgbe_dump_tx_desc(struct xgbe_ring *, unsigned int, unsigned int,
 752                        unsigned int);
 753 void xgbe_dump_rx_desc(struct xgbe_ring *, struct xgbe_ring_desc *,
 754                        unsigned int);
 755 void xgbe_print_pkt(struct net_device *, struct sk_buff *, bool);
 756 void xgbe_get_all_hw_features(struct xgbe_prv_data *);
 757 int xgbe_powerup(struct net_device *, unsigned int);
 758 int xgbe_powerdown(struct net_device *, unsigned int);
 759 void xgbe_init_rx_coalesce(struct xgbe_prv_data *);
 760 void xgbe_init_tx_coalesce(struct xgbe_prv_data *);
 761
 762 #ifdef CONFIG_DEBUG_FS
 763 void xgbe_debugfs_init(struct xgbe_prv_data *);
 764 void xgbe_debugfs_exit(struct xgbe_prv_data *);
 765 #else
 766 static inline void xgbe_debugfs_init(struct xgbe_prv_data *pdata) {}
 767 static inline void xgbe_debugfs_exit(struct xgbe_prv_data *pdata) {}
 768 #endif /* CONFIG_DEBUG_FS */
 769
 770 /* NOTE: Uncomment for TX and RX DESCRIPTOR DUMP in KERNEL LOG */
 771 #if 0
 772 #define XGMAC_ENABLE_TX_DESC_DUMP
 773 #define XGMAC_ENABLE_RX_DESC_DUMP
 774 #endif
 775
 776 /* NOTE: Uncomment for TX and RX PACKET DUMP in KERNEL LOG */
 777 #if 0
 778 #define XGMAC_ENABLE_TX_PKT_DUMP
 779 #define XGMAC_ENABLE_RX_PKT_DUMP
 780 #endif
 781
 782 /* NOTE: Uncomment for function trace log messages in KERNEL LOG */
 783 #if 0
 784 #define YDEBUG
 785 #define YDEBUG_MDIO
 786 #endif
 787
 788 /* For debug prints */
 789 #ifdef YDEBUG
 790 #define DBGPR(x...) pr_alert(x)
 791 #define DBGPHY_REGS(x...) xgbe_dump_phy_registers(x)
 792 #else
 793 #define DBGPR(x...) do { } while (0)
 794 #define DBGPHY_REGS(x...) do { } while (0)
 795 #endif
 796
 797 #ifdef YDEBUG_MDIO
 798 #define DBGPR_MDIO(x...) pr_alert(x)
 799 #else
 800 #define DBGPR_MDIO(x...) do { } while (0)
 801 #endif
 802
 803 #endif