drivers/net/ethernet/amd/xgbe/xgbe.h

   1 /*
   2  * AMD 10Gb Ethernet driver
   3  *
   4  * This file is available to you under your choice of the following two
   5  * licenses:
   6  *
   7  * License 1: GPLv2
   8  *
   9  * Copyright (c) 2014 Advanced Micro Devices, Inc.
  10  *
  11  * This file is free software; you may copy, redistribute and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation, either version 2 of the License, or (at
  14  * your option) any later version.
  15  *
  16  * This file is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  23  *
  24  * This file incorporates work covered by the following copyright and
  25  * permission notice:
  26  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  27  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  28  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  29  *     and you.
  30  *
  31  *     The Software IS NOT an item of Licensed Software or Licensed Product
  32  *     under any End User Software License Agreement or Agreement for Licensed
  33  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  34  *     granted, free of charge, to any person obtaining a copy of this software
  35  *     annotated with this license and the Software, to deal in the Software
  36  *     without restriction, including without limitation the rights to use,
  37  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  38  *     of the Software, and to permit persons to whom the Software is furnished
  39  *     to do so, subject to the following conditions:
  40  *
  41  *     The above copyright notice and this permission notice shall be included
  42  *     in all copies or substantial portions of the Software.
  43  *
  44  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
  45  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  46  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  47  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
  48  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  49  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  50  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  51  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  52  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  53  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  54  *     THE POSSIBILITY OF SUCH DAMAGE.
  55  *
  56  *
  57  * License 2: Modified BSD
  58  *
  59  * Copyright (c) 2014 Advanced Micro Devices, Inc.
  60  * All rights reserved.
  61  *
  62  * Redistribution and use in source and binary forms, with or without
  63  * modification, are permitted provided that the following conditions are met:
  64  *     * Redistributions of source code must retain the above copyright
  65  *       notice, this list of conditions and the following disclaimer.
  66  *     * Redistributions in binary form must reproduce the above copyright
  67  *       notice, this list of conditions and the following disclaimer in the
  68  *       documentation and/or other materials provided with the distribution.
  69  *     * Neither the name of Advanced Micro Devices, Inc. nor the
  70  *       names of its contributors may be used to endorse or promote products
  71  *       derived from this software without specific prior written permission.
  72  *
  73  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  74  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  75  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  76  * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
  77  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  79  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  80  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  82  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83  *
  84  * This file incorporates work covered by the following copyright and
  85  * permission notice:
  86  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  87  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  88  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  89  *     and you.
  90  *
  91  *     The Software IS NOT an item of Licensed Software or Licensed Product
  92  *     under any End User Software License Agreement or Agreement for Licensed
  93  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  94  *     granted, free of charge, to any person obtaining a copy of this software
  95  *     annotated with this license and the Software, to deal in the Software
  96  *     without restriction, including without limitation the rights to use,
  97  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  98  *     of the Software, and to permit persons to whom the Software is furnished
  99  *     to do so, subject to the following conditions:
 100  *
 101  *     The above copyright notice and this permission notice shall be included
 102  *     in all copies or substantial portions of the Software.
 103  *
 104  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
 105  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 106  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 107  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
 108  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 109  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 110  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 111  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 112  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 113  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 114  *     THE POSSIBILITY OF SUCH DAMAGE.
 115  */
 116
 117 #ifndef __XGBE_H__
 118 #define __XGBE_H__
 119
 120 #include <linux/dma-mapping.h>
 121 #include <linux/netdevice.h>
 122 #include <linux/workqueue.h>
 123 #include <linux/phy.h>
 124 #include <linux/if_vlan.h>
 125 #include <linux/bitops.h>
 126
 127
 128 #define XGBE_DRV_NAME           "amd-xgbe"
 129 #define XGBE_DRV_VERSION        "1.0.0-a"
 130 #define XGBE_DRV_DESC           "AMD 10 Gigabit Ethernet Driver"
 131
 132 /* Descriptor related defines */
 133 #define XGBE_TX_DESC_CNT        512
 134 #define XGBE_TX_DESC_MIN_FREE   (XGBE_TX_DESC_CNT >> 3)
 135 #define XGBE_TX_DESC_MAX_PROC   (XGBE_TX_DESC_CNT >> 1)
 136 #define XGBE_RX_DESC_CNT        512
 137
 138 #define XGBE_TX_MAX_BUF_SIZE    (0x3fff & ~(64 - 1))
 139
 140 #define XGBE_RX_MIN_BUF_SIZE    (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
 141 #define XGBE_RX_BUF_ALIGN       64
 142
 143 #define XGBE_MAX_DMA_CHANNELS   16
 144
 145 /* DMA cache settings - Outer sharable, write-back, write-allocate */
 146 #define XGBE_DMA_OS_AXDOMAIN    0x2
 147 #define XGBE_DMA_OS_ARCACHE     0xb
 148 #define XGBE_DMA_OS_AWCACHE     0xf
 149
 150 /* DMA cache settings - System, no caches used */
 151 #define XGBE_DMA_SYS_AXDOMAIN   0x3
 152 #define XGBE_DMA_SYS_ARCACHE    0x0
 153 #define XGBE_DMA_SYS_AWCACHE    0x0
 154
 155 #define XGBE_DMA_INTERRUPT_MASK 0x31c7
 156
 157 #define XGMAC_MIN_PACKET        60
 158 #define XGMAC_STD_PACKET_MTU    1500
 159 #define XGMAC_MAX_STD_PACKET    1518
 160 #define XGMAC_JUMBO_PACKET_MTU  9000
 161 #define XGMAC_MAX_JUMBO_PACKET  9018
 162
 163 /* MDIO bus phy name */
 164 #define XGBE_PHY_NAME           "amd_xgbe_phy"
 165 #define XGBE_PRTAD              0
 166
 167 /* Driver PMT macros */
 168 #define XGMAC_DRIVER_CONTEXT    1
 169 #define XGMAC_IOCTL_CONTEXT     2
 170
 171 #define XGBE_FIFO_SIZE_B(x)     (x)
 172 #define XGBE_FIFO_SIZE_KB(x)    (x * 1024)
 173
 174 #define XGBE_TC_CNT             2
 175
 176 /* Helper macro for descriptor handling
 177  *  Always use XGBE_GET_DESC_DATA to access the descriptor data
 178  *  since the index is free-running and needs to be and-ed
 179  *  with the descriptor count value of the ring to index to
 180  *  the proper descriptor data.
 181  */
 182 #define XGBE_GET_DESC_DATA(_ring, _idx)                         \
 183         ((_ring)->rdata +                                       \
 184          ((_idx) & ((_ring)->rdesc_count - 1)))
 185
 186
 187 /* Default coalescing parameters */
 188 #define XGMAC_INIT_DMA_TX_USECS         50
 189 #define XGMAC_INIT_DMA_TX_FRAMES        25
 190
 191 #define XGMAC_MAX_DMA_RIWT              0xff
 192 #define XGMAC_INIT_DMA_RX_USECS         30
 193 #define XGMAC_INIT_DMA_RX_FRAMES        25
 194
 195 /* Flow control queue count */
 196 #define XGMAC_MAX_FLOW_CONTROL_QUEUES   8
 197
 198 /* Maximum MAC address hash table size (256 bits = 8 bytes) */
 199 #define XGBE_MAC_HASH_TABLE_SIZE        8
 200
 201 struct xgbe_prv_data;
 202
 203 struct xgbe_packet_data {
 204         unsigned int attributes;
 205
 206         unsigned int errors;
 207
 208         unsigned int rdesc_count;
 209         unsigned int length;
 210
 211         unsigned int header_len;
 212         unsigned int tcp_header_len;
 213         unsigned int tcp_payload_len;
 214         unsigned short mss;
 215
 216         unsigned short vlan_ctag;
 217 };
 218
 219 /* Common Rx and Tx descriptor mapping */
 220 struct xgbe_ring_desc {
 221         unsigned int desc0;
 222         unsigned int desc1;
 223         unsigned int desc2;
 224         unsigned int desc3;
 225 };
 226
 227 /* Structure used to hold information related to the descriptor
 228  * and the packet associated with the descriptor (always use
 229  * use the XGBE_GET_DESC_DATA macro to access this data from the ring)
 230  */
 231 struct xgbe_ring_data {
 232         struct xgbe_ring_desc *rdesc;   /* Virtual address of descriptor */
 233         dma_addr_t rdesc_dma;           /* DMA address of descriptor */
 234
 235         struct sk_buff *skb;            /* Virtual address of SKB */
 236         dma_addr_t skb_dma;             /* DMA address of SKB data */
 237         unsigned int skb_dma_len;       /* Length of SKB DMA area */
 238         unsigned int tso_header;        /* TSO header indicator */
 239
 240         unsigned short len;             /* Length of received Rx packet */
 241
 242         unsigned int interrupt;         /* Interrupt indicator */
 243
 244         unsigned int mapped_as_page;
 245 };
 246
 247 struct xgbe_ring {
 248         /* Ring lock - used just for TX rings at the moment */
 249         spinlock_t lock;
 250
 251         /* Per packet related information */
 252         struct xgbe_packet_data packet_data;
 253
 254         /* Virtual/DMA addresses and count of allocated descriptor memory */
 255         struct xgbe_ring_desc *rdesc;
 256         dma_addr_t rdesc_dma;
 257         unsigned int rdesc_count;
 258
 259         /* Array of descriptor data corresponding the descriptor memory
 260          * (always use the XGBE_GET_DESC_DATA macro to access this data)
 261          */
 262         struct xgbe_ring_data *rdata;
 263
 264         /* Ring index values
 265          *  cur   - Tx: index of descriptor to be used for current transfer
 266          *          Rx: index of descriptor to check for packet availability
 267          *  dirty - Tx: index of descriptor to check for transfer complete
 268          *          Rx: count of descriptors in which a packet has been received
 269          *              (used with skb_realloc_index to refresh the ring)
 270          */
 271         unsigned int cur;
 272         unsigned int dirty;
 273
 274         /* Coalesce frame count used for interrupt bit setting */
 275         unsigned int coalesce_count;
 276
 277         union {
 278                 struct {
 279                         unsigned int queue_stopped;
 280                         unsigned short cur_mss;
 281                         unsigned short cur_vlan_ctag;
 282                 } tx;
 283
 284                 struct {
 285                         unsigned int realloc_index;
 286                         unsigned int realloc_threshold;
 287                 } rx;
 288         };
 289 } ____cacheline_aligned;
 290
 291 /* Structure used to describe the descriptor rings associated with
 292  * a DMA channel.
 293  */
 294 struct xgbe_channel {
 295         char name[16];
 296
 297         /* Address of private data area for device */
 298         struct xgbe_prv_data *pdata;
 299
 300         /* Queue index and base address of queue's DMA registers */
 301         unsigned int queue_index;
 302         void __iomem *dma_regs;
 303
 304         unsigned int saved_ier;
 305
 306         unsigned int tx_timer_active;
 307         struct hrtimer tx_timer;
 308
 309         struct xgbe_ring *tx_ring;
 310         struct xgbe_ring *rx_ring;
 311 } ____cacheline_aligned;
 312
 313 enum xgbe_int {
 314         XGMAC_INT_DMA_CH_SR_TI,
 315         XGMAC_INT_DMA_CH_SR_TPS,
 316         XGMAC_INT_DMA_CH_SR_TBU,
 317         XGMAC_INT_DMA_CH_SR_RI,
 318         XGMAC_INT_DMA_CH_SR_RBU,
 319         XGMAC_INT_DMA_CH_SR_RPS,
 320         XGMAC_INT_DMA_CH_SR_TI_RI,
 321         XGMAC_INT_DMA_CH_SR_FBE,
 322         XGMAC_INT_DMA_ALL,
 323 };
 324
 325 enum xgbe_int_state {
 326         XGMAC_INT_STATE_SAVE,
 327         XGMAC_INT_STATE_RESTORE,
 328 };
 329
 330 enum xgbe_mtl_fifo_size {
 331         XGMAC_MTL_FIFO_SIZE_256  = 0x00,
 332         XGMAC_MTL_FIFO_SIZE_512  = 0x01,
 333         XGMAC_MTL_FIFO_SIZE_1K   = 0x03,
 334         XGMAC_MTL_FIFO_SIZE_2K   = 0x07,
 335         XGMAC_MTL_FIFO_SIZE_4K   = 0x0f,
 336         XGMAC_MTL_FIFO_SIZE_8K   = 0x1f,
 337         XGMAC_MTL_FIFO_SIZE_16K  = 0x3f,
 338         XGMAC_MTL_FIFO_SIZE_32K  = 0x7f,
 339         XGMAC_MTL_FIFO_SIZE_64K  = 0xff,
 340         XGMAC_MTL_FIFO_SIZE_128K = 0x1ff,
 341         XGMAC_MTL_FIFO_SIZE_256K = 0x3ff,
 342 };
 343
 344 struct xgbe_mmc_stats {
 345         /* Tx Stats */
 346         u64 txoctetcount_gb;
 347         u64 txframecount_gb;
 348         u64 txbroadcastframes_g;
 349         u64 txmulticastframes_g;
 350         u64 tx64octets_gb;
 351         u64 tx65to127octets_gb;
 352         u64 tx128to255octets_gb;
 353         u64 tx256to511octets_gb;
 354         u64 tx512to1023octets_gb;
 355         u64 tx1024tomaxoctets_gb;
 356         u64 txunicastframes_gb;
 357         u64 txmulticastframes_gb;
 358         u64 txbroadcastframes_gb;
 359         u64 txunderflowerror;
 360         u64 txoctetcount_g;
 361         u64 txframecount_g;
 362         u64 txpauseframes;
 363         u64 txvlanframes_g;
 364
 365         /* Rx Stats */
 366         u64 rxframecount_gb;
 367         u64 rxoctetcount_gb;
 368         u64 rxoctetcount_g;
 369         u64 rxbroadcastframes_g;
 370         u64 rxmulticastframes_g;
 371         u64 rxcrcerror;
 372         u64 rxrunterror;
 373         u64 rxjabbererror;
 374         u64 rxundersize_g;
 375         u64 rxoversize_g;
 376         u64 rx64octets_gb;
 377         u64 rx65to127octets_gb;
 378         u64 rx128to255octets_gb;
 379         u64 rx256to511octets_gb;
 380         u64 rx512to1023octets_gb;
 381         u64 rx1024tomaxoctets_gb;
 382         u64 rxunicastframes_g;
 383         u64 rxlengtherror;
 384         u64 rxoutofrangetype;
 385         u64 rxpauseframes;
 386         u64 rxfifooverflow;
 387         u64 rxvlanframes_gb;
 388         u64 rxwatchdogerror;
 389 };
 390
 391 struct xgbe_hw_if {
 392         int (*tx_complete)(struct xgbe_ring_desc *);
 393
 394         int (*set_promiscuous_mode)(struct xgbe_prv_data *, unsigned int);
 395         int (*set_all_multicast_mode)(struct xgbe_prv_data *, unsigned int);
 396         int (*add_mac_addresses)(struct xgbe_prv_data *);
 397         int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);
 398
 399         int (*enable_rx_csum)(struct xgbe_prv_data *);
 400         int (*disable_rx_csum)(struct xgbe_prv_data *);
 401
 402         int (*enable_rx_vlan_stripping)(struct xgbe_prv_data *);
 403         int (*disable_rx_vlan_stripping)(struct xgbe_prv_data *);
 404         int (*enable_rx_vlan_filtering)(struct xgbe_prv_data *);
 405         int (*disable_rx_vlan_filtering)(struct xgbe_prv_data *);
 406         int (*update_vlan_hash_table)(struct xgbe_prv_data *);
 407
 408         int (*read_mmd_regs)(struct xgbe_prv_data *, int, int);
 409         void (*write_mmd_regs)(struct xgbe_prv_data *, int, int, int);
 410         int (*set_gmii_speed)(struct xgbe_prv_data *);
 411         int (*set_gmii_2500_speed)(struct xgbe_prv_data *);
 412         int (*set_xgmii_speed)(struct xgbe_prv_data *);
 413
 414         void (*enable_tx)(struct xgbe_prv_data *);
 415         void (*disable_tx)(struct xgbe_prv_data *);
 416         void (*enable_rx)(struct xgbe_prv_data *);
 417         void (*disable_rx)(struct xgbe_prv_data *);
 418
 419         void (*powerup_tx)(struct xgbe_prv_data *);
 420         void (*powerdown_tx)(struct xgbe_prv_data *);
 421         void (*powerup_rx)(struct xgbe_prv_data *);
 422         void (*powerdown_rx)(struct xgbe_prv_data *);
 423
 424         int (*init)(struct xgbe_prv_data *);
 425         int (*exit)(struct xgbe_prv_data *);
 426
 427         int (*enable_int)(struct xgbe_channel *, enum xgbe_int);
 428         int (*disable_int)(struct xgbe_channel *, enum xgbe_int);
 429         void (*pre_xmit)(struct xgbe_channel *);
 430         int (*dev_read)(struct xgbe_channel *);
 431         void (*tx_desc_init)(struct xgbe_channel *);
 432         void (*rx_desc_init)(struct xgbe_channel *);
 433         void (*rx_desc_reset)(struct xgbe_ring_data *);
 434         void (*tx_desc_reset)(struct xgbe_ring_data *);
 435         int (*is_last_desc)(struct xgbe_ring_desc *);
 436         int (*is_context_desc)(struct xgbe_ring_desc *);
 437
 438         /* For FLOW ctrl */
 439         int (*config_tx_flow_control)(struct xgbe_prv_data *);
 440         int (*config_rx_flow_control)(struct xgbe_prv_data *);
 441
 442         /* For RX coalescing */
 443         int (*config_rx_coalesce)(struct xgbe_prv_data *);
 444         int (*config_tx_coalesce)(struct xgbe_prv_data *);
 445         unsigned int (*usec_to_riwt)(struct xgbe_prv_data *, unsigned int);
 446         unsigned int (*riwt_to_usec)(struct xgbe_prv_data *, unsigned int);
 447
 448         /* For RX and TX threshold config */
 449         int (*config_rx_threshold)(struct xgbe_prv_data *, unsigned int);
 450         int (*config_tx_threshold)(struct xgbe_prv_data *, unsigned int);
 451
 452         /* For RX and TX Store and Forward Mode config */
 453         int (*config_rsf_mode)(struct xgbe_prv_data *, unsigned int);
 454         int (*config_tsf_mode)(struct xgbe_prv_data *, unsigned int);
 455
 456         /* For TX DMA Operate on Second Frame config */
 457         int (*config_osp_mode)(struct xgbe_prv_data *);
 458
 459         /* For RX and TX PBL config */
 460         int (*config_rx_pbl_val)(struct xgbe_prv_data *);
 461         int (*get_rx_pbl_val)(struct xgbe_prv_data *);
 462         int (*config_tx_pbl_val)(struct xgbe_prv_data *);
 463         int (*get_tx_pbl_val)(struct xgbe_prv_data *);
 464         int (*config_pblx8)(struct xgbe_prv_data *);
 465
 466         /* For MMC statistics */
 467         void (*rx_mmc_int)(struct xgbe_prv_data *);
 468         void (*tx_mmc_int)(struct xgbe_prv_data *);
 469         void (*read_mmc_stats)(struct xgbe_prv_data *);
 470 };
 471
 472 struct xgbe_desc_if {
 473         int (*alloc_ring_resources)(struct xgbe_prv_data *);
 474         void (*free_ring_resources)(struct xgbe_prv_data *);
 475         int (*map_tx_skb)(struct xgbe_channel *, struct sk_buff *);
 476         void (*realloc_skb)(struct xgbe_channel *);
 477         void (*unmap_skb)(struct xgbe_prv_data *, struct xgbe_ring_data *);
 478         void (*wrapper_tx_desc_init)(struct xgbe_prv_data *);
 479         void (*wrapper_rx_desc_init)(struct xgbe_prv_data *);
 480 };
 481
 482 /* This structure contains flags that indicate what hardware features
 483  * or configurations are present in the device.
 484  */
 485 struct xgbe_hw_features {
 486         /* HW Feature Register0 */
 487         unsigned int gmii;              /* 1000 Mbps support */
 488         unsigned int vlhash;            /* VLAN Hash Filter */
 489         unsigned int sma;               /* SMA(MDIO) Interface */
 490         unsigned int rwk;               /* PMT remote wake-up packet */
 491         unsigned int mgk;               /* PMT magic packet */
 492         unsigned int mmc;               /* RMON module */
 493         unsigned int aoe;               /* ARP Offload */
 494         unsigned int ts;                /* IEEE 1588-2008 Adavanced Timestamp */
 495         unsigned int eee;               /* Energy Efficient Ethernet */
 496         unsigned int tx_coe;            /* Tx Checksum Offload */
 497         unsigned int rx_coe;            /* Rx Checksum Offload */
 498         unsigned int addn_mac;          /* Additional MAC Addresses */
 499         unsigned int ts_src;            /* Timestamp Source */
 500         unsigned int sa_vlan_ins;       /* Source Address or VLAN Insertion */
 501
 502         /* HW Feature Register1 */
 503         unsigned int rx_fifo_size;      /* MTL Receive FIFO Size */
 504         unsigned int tx_fifo_size;      /* MTL Transmit FIFO Size */
 505         unsigned int adv_ts_hi;         /* Advance Timestamping High Word */
 506         unsigned int dcb;               /* DCB Feature */
 507         unsigned int sph;               /* Split Header Feature */
 508         unsigned int tso;               /* TCP Segmentation Offload */
 509         unsigned int dma_debug;         /* DMA Debug Registers */
 510         unsigned int rss;               /* Receive Side Scaling */
 511         unsigned int hash_table_size;   /* Hash Table Size */
 512         unsigned int l3l4_filter_num;   /* Number of L3-L4 Filters */
 513
 514         /* HW Feature Register2 */
 515         unsigned int rx_q_cnt;          /* Number of MTL Receive Queues */
 516         unsigned int tx_q_cnt;          /* Number of MTL Transmit Queues */
 517         unsigned int rx_ch_cnt;         /* Number of DMA Receive Channels */
 518         unsigned int tx_ch_cnt;         /* Number of DMA Transmit Channels */
 519         unsigned int pps_out_num;       /* Number of PPS outputs */
 520         unsigned int aux_snap_num;      /* Number of Aux snapshot inputs */
 521 };
 522
 523 struct xgbe_prv_data {
 524         struct net_device *netdev;
 525         struct platform_device *pdev;
 526         struct device *dev;
 527
 528         /* XGMAC/XPCS related mmio registers */
 529         void __iomem *xgmac_regs;       /* XGMAC CSRs */
 530         void __iomem *xpcs_regs;        /* XPCS MMD registers */
 531
 532         /* Overall device lock */
 533         spinlock_t lock;
 534
 535         /* XPCS indirect addressing mutex */
 536         struct mutex xpcs_mutex;
 537
 538         int irq_number;
 539
 540         struct xgbe_hw_if hw_if;
 541         struct xgbe_desc_if desc_if;
 542
 543         /* AXI DMA settings */
 544         unsigned int axdomain;
 545         unsigned int arcache;
 546         unsigned int awcache;
 547
 548         /* Rings for Tx/Rx on a DMA channel */
 549         struct xgbe_channel *channel;
 550         unsigned int channel_count;
 551         unsigned int tx_ring_count;
 552         unsigned int tx_desc_count;
 553         unsigned int rx_ring_count;
 554         unsigned int rx_desc_count;
 555
 556         /* Tx/Rx common settings */
 557         unsigned int pblx8;
 558
 559         /* Tx settings */
 560         unsigned int tx_sf_mode;
 561         unsigned int tx_threshold;
 562         unsigned int tx_pbl;
 563         unsigned int tx_osp_mode;
 564
 565         /* Rx settings */
 566         unsigned int rx_sf_mode;
 567         unsigned int rx_threshold;
 568         unsigned int rx_pbl;
 569
 570         /* Tx coalescing settings */
 571         unsigned int tx_usecs;
 572         unsigned int tx_frames;
 573
 574         /* Rx coalescing settings */
 575         unsigned int rx_riwt;
 576         unsigned int rx_frames;
 577
 578         /* Current MTU */
 579         unsigned int rx_buf_size;
 580
 581         /* Flow control settings */
 582         unsigned int pause_autoneg;
 583         unsigned int tx_pause;
 584         unsigned int rx_pause;
 585
 586         /* MDIO settings */
 587         struct module *phy_module;
 588         char *mii_bus_id;
 589         struct mii_bus *mii;
 590         int mdio_mmd;
 591         struct phy_device *phydev;
 592         int default_autoneg;
 593         int default_speed;
 594
 595         /* Current PHY settings */
 596         phy_interface_t phy_mode;
 597         int phy_link;
 598         int phy_speed;
 599         unsigned int phy_tx_pause;
 600         unsigned int phy_rx_pause;
 601
 602         /* Netdev related settings */
 603         netdev_features_t netdev_features;
 604         struct napi_struct napi;
 605         struct xgbe_mmc_stats mmc_stats;
 606
 607         /* Filtering support */
 608         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 609
 610         /* System clock value used for Rx watchdog */
 611         struct clk *sysclock;
 612
 613         /* Hardware features of the device */
 614         struct xgbe_hw_features hw_feat;
 615
 616         /* Device restart work structure */
 617         struct work_struct restart_work;
 618
 619         /* Keeps track of power mode */
 620         unsigned int power_down;
 621
 622 #ifdef CONFIG_DEBUG_FS
 623         struct dentry *xgbe_debugfs;
 624
 625         unsigned int debugfs_xgmac_reg;
 626
 627         unsigned int debugfs_xpcs_mmd;
 628         unsigned int debugfs_xpcs_reg;
 629 #endif
 630 };
 631
 632 /* Function prototypes*/
 633
 634 void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *);
 635 void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *);
 636 struct net_device_ops *xgbe_get_netdev_ops(void);
 637 struct ethtool_ops *xgbe_get_ethtool_ops(void);
 638
 639 int xgbe_mdio_register(struct xgbe_prv_data *);
 640 void xgbe_mdio_unregister(struct xgbe_prv_data *);
 641 void xgbe_dump_phy_registers(struct xgbe_prv_data *);
 642 void xgbe_dump_tx_desc(struct xgbe_ring *, unsigned int, unsigned int,
 643                        unsigned int);
 644 void xgbe_dump_rx_desc(struct xgbe_ring *, struct xgbe_ring_desc *,
 645                        unsigned int);
 646 void xgbe_print_pkt(struct net_device *, struct sk_buff *, bool);
 647 void xgbe_get_all_hw_features(struct xgbe_prv_data *);
 648 int xgbe_powerup(struct net_device *, unsigned int);
 649 int xgbe_powerdown(struct net_device *, unsigned int);
 650 void xgbe_init_rx_coalesce(struct xgbe_prv_data *);
 651 void xgbe_init_tx_coalesce(struct xgbe_prv_data *);
 652
 653 #ifdef CONFIG_DEBUG_FS
 654 void xgbe_debugfs_init(struct xgbe_prv_data *);
 655 void xgbe_debugfs_exit(struct xgbe_prv_data *);
 656 #else
 657 static inline void xgbe_debugfs_init(struct xgbe_prv_data *pdata) {}
 658 static inline void xgbe_debugfs_exit(struct xgbe_prv_data *pdata) {}
 659 #endif /* CONFIG_DEBUG_FS */
 660
 661 /* NOTE: Uncomment for TX and RX DESCRIPTOR DUMP in KERNEL LOG */
 662 #if 0
 663 #define XGMAC_ENABLE_TX_DESC_DUMP
 664 #define XGMAC_ENABLE_RX_DESC_DUMP
 665 #endif
 666
 667 /* NOTE: Uncomment for TX and RX PACKET DUMP in KERNEL LOG */
 668 #if 0
 669 #define XGMAC_ENABLE_TX_PKT_DUMP
 670 #define XGMAC_ENABLE_RX_PKT_DUMP
 671 #endif
 672
 673 /* NOTE: Uncomment for function trace log messages in KERNEL LOG */
 674 #if 0
 675 #define YDEBUG
 676 #define YDEBUG_MDIO
 677 #endif
 678
 679 /* For debug prints */
 680 #ifdef YDEBUG
 681 #define DBGPR(x...) pr_alert(x)
 682 #define DBGPHY_REGS(x...) xgbe_dump_phy_registers(x)
 683 #else
 684 #define DBGPR(x...) do { } while (0)
 685 #define DBGPHY_REGS(x...) do { } while (0)
 686 #endif
 687
 688 #ifdef YDEBUG_MDIO
 689 #define DBGPR_MDIO(x...) pr_alert(x)
 690 #else
 691 #define DBGPR_MDIO(x...) do { } while (0)
 692 #endif
 693
 694 #endif