drivers/net/ethernet/apm/xgene/xgene_enet_main.h

   1 /* Applied Micro X-Gene SoC Ethernet Driver
   2  *
   3  * Copyright (c) 2014, Applied Micro Circuits Corporation
   4  * Authors: Iyappan Subramanian <isubramanian@apm.com>
   5  *          Ravi Patel <rapatel@apm.com>
   6  *          Keyur Chudgar <kchudgar@apm.com>
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #ifndef __XGENE_ENET_MAIN_H__
  23 #define __XGENE_ENET_MAIN_H__
  24
  25 #include <linux/acpi.h>
  26 #include <linux/clk.h>
  27 #include <linux/efi.h>
  28 #include <linux/io.h>
  29 #include <linux/of_platform.h>
  30 #include <linux/of_net.h>
  31 #include <linux/of_mdio.h>
  32 #include <linux/module.h>
  33 #include <net/ip.h>
  34 #include <linux/prefetch.h>
  35 #include <linux/if_vlan.h>
  36 #include <linux/phy.h>
  37 #include "xgene_enet_hw.h"
  38
  39 #define XGENE_DRV_VERSION       "v1.0"
  40 #define XGENE_ENET_MAX_MTU      1536
  41 #define SKB_BUFFER_SIZE         (XGENE_ENET_MAX_MTU - NET_IP_ALIGN)
  42 #define NUM_PKT_BUF     64
  43 #define NUM_BUFPOOL     32
  44
  45 #define START_CPU_BUFNUM_0      0
  46 #define START_ETH_BUFNUM_0      2
  47 #define START_BP_BUFNUM_0       0x22
  48 #define START_RING_NUM_0        8
  49 #define START_CPU_BUFNUM_1      12
  50 #define START_ETH_BUFNUM_1      10
  51 #define START_BP_BUFNUM_1       0x2A
  52 #define START_RING_NUM_1        264
  53
  54 #define IRQ_ID_SIZE             16
  55 #define XGENE_MAX_TXC_RINGS     1
  56
  57 #define PHY_POLL_LINK_ON        (10 * HZ)
  58 #define PHY_POLL_LINK_OFF       (PHY_POLL_LINK_ON / 5)
  59
  60 /* software context of a descriptor ring */
  61 struct xgene_enet_desc_ring {
  62         struct net_device *ndev;
  63         u16 id;
  64         u16 num;
  65         u16 head;
  66         u16 tail;
  67         u16 slots;
  68         u16 irq;
  69         char irq_name[IRQ_ID_SIZE];
  70         u32 size;
  71         u32 state[NUM_RING_CONFIG];
  72         void __iomem *cmd_base;
  73         void __iomem *cmd;
  74         dma_addr_t dma;
  75         u16 dst_ring_num;
  76         u8 nbufpool;
  77         struct sk_buff *(*rx_skb);
  78         struct sk_buff *(*cp_skb);
  79         enum xgene_enet_ring_cfgsize cfgsize;
  80         struct xgene_enet_desc_ring *cp_ring;
  81         struct xgene_enet_desc_ring *buf_pool;
  82         struct napi_struct napi;
  83         union {
  84                 void *desc_addr;
  85                 struct xgene_enet_raw_desc *raw_desc;
  86                 struct xgene_enet_raw_desc16 *raw_desc16;
  87         };
  88 };
  89
  90 struct xgene_mac_ops {
  91         void (*init)(struct xgene_enet_pdata *pdata);
  92         void (*reset)(struct xgene_enet_pdata *pdata);
  93         void (*tx_enable)(struct xgene_enet_pdata *pdata);
  94         void (*rx_enable)(struct xgene_enet_pdata *pdata);
  95         void (*tx_disable)(struct xgene_enet_pdata *pdata);
  96         void (*rx_disable)(struct xgene_enet_pdata *pdata);
  97         void (*set_mac_addr)(struct xgene_enet_pdata *pdata);
  98         void (*link_state)(struct work_struct *work);
  99 };
 100
 101 struct xgene_port_ops {
 102         int (*reset)(struct xgene_enet_pdata *pdata);
 103         void (*cle_bypass)(struct xgene_enet_pdata *pdata,
 104                            u32 dst_ring_num, u16 bufpool_id);
 105         void (*shutdown)(struct xgene_enet_pdata *pdata);
 106 };
 107
 108 /* ethernet private data */
 109 struct xgene_enet_pdata {
 110         struct net_device *ndev;
 111         struct mii_bus *mdio_bus;
 112         struct phy_device *phy_dev;
 113         int phy_speed;
 114         struct clk *clk;
 115         struct platform_device *pdev;
 116         struct xgene_enet_desc_ring *tx_ring;
 117         struct xgene_enet_desc_ring *rx_ring;
 118         char *dev_name;
 119         u32 rx_buff_cnt;
 120         u32 tx_qcnt_hi;
 121         u32 cp_qcnt_hi;
 122         u32 cp_qcnt_low;
 123         u32 rx_irq;
 124         u32 txc_irq;
 125         u8 cq_cnt;
 126         void __iomem *eth_csr_addr;
 127         void __iomem *eth_ring_if_addr;
 128         void __iomem *eth_diag_csr_addr;
 129         void __iomem *mcx_mac_addr;
 130         void __iomem *mcx_mac_csr_addr;
 131         void __iomem *base_addr;
 132         void __iomem *ring_csr_addr;
 133         void __iomem *ring_cmd_addr;
 134         int phy_mode;
 135         enum xgene_enet_rm rm;
 136         struct rtnl_link_stats64 stats;
 137         struct xgene_mac_ops *mac_ops;
 138         struct xgene_port_ops *port_ops;
 139         struct delayed_work link_work;
 140         u32 port_id;
 141         u8 cpu_bufnum;
 142         u8 eth_bufnum;
 143         u8 bp_bufnum;
 144         u16 ring_num;
 145 };
 146
 147 struct xgene_indirect_ctl {
 148         void __iomem *addr;
 149         void __iomem *ctl;
 150         void __iomem *cmd;
 151         void __iomem *cmd_done;
 152 };
 153
 154 /* Set the specified value into a bit-field defined by its starting position
 155  * and length within a single u64.
 156  */
 157 static inline u64 xgene_enet_set_field_value(int pos, int len, u64 val)
 158 {
 159         return (val & ((1ULL << len) - 1)) << pos;
 160 }
 161
 162 #define SET_VAL(field, val) \
 163                 xgene_enet_set_field_value(field ## _POS, field ## _LEN, val)
 164
 165 #define SET_BIT(field) \
 166                 xgene_enet_set_field_value(field ## _POS, 1, 1)
 167
 168 /* Get the value from a bit-field defined by its starting position
 169  * and length within the specified u64.
 170  */
 171 static inline u64 xgene_enet_get_field_value(int pos, int len, u64 src)
 172 {
 173         return (src >> pos) & ((1ULL << len) - 1);
 174 }
 175
 176 #define GET_VAL(field, src) \
 177                 xgene_enet_get_field_value(field ## _POS, field ## _LEN, src)
 178
 179 static inline struct device *ndev_to_dev(struct net_device *ndev)
 180 {
 181         return ndev->dev.parent;
 182 }
 183
 184 void xgene_enet_set_ethtool_ops(struct net_device *netdev);
 185
 186 #endif /* __XGENE_ENET_MAIN_H__ */