projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[deliverable/linux.git] / drivers / net / ethernet / atheros / atl1e / atl1e_main.c
1 /*
2 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1e.h"
23
24 #define DRV_VERSION "1.0.0.7-NAPI"
25
26 char atl1e_driver_name[] = "ATL1E";
27 char atl1e_driver_version[] = DRV_VERSION;
28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
29 /*
30 * atl1e_pci_tbl - PCI Device ID Table
31 *
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
34 *
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
37 */
38 static const struct pci_device_id atl1e_pci_tbl[] = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
41 /* required last entry */
42 { 0 }
43 };
44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
45
46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48 MODULE_LICENSE("GPL");
49 MODULE_VERSION(DRV_VERSION);
50
51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
52
53 static const u16
54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55 {
56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
60 };
61
62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
63 {
64 REG_RXF0_BASE_ADDR_HI,
65 REG_RXF1_BASE_ADDR_HI,
66 REG_RXF2_BASE_ADDR_HI,
67 REG_RXF3_BASE_ADDR_HI
68 };
69
70 static const u16
71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
72 {
73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
77 };
78
79 static const u16
80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
81 {
82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
86 };
87
88 static const u16 atl1e_pay_load_size[] = {
89 128, 256, 512, 1024, 2048, 4096,
90 };
91
92 /**
93 * atl1e_irq_enable - Enable default interrupt generation settings
94 * @adapter: board private structure
95 */
96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
97 {
98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
101 AT_WRITE_FLUSH(&adapter->hw);
102 }
103 }
104
105 /**
106 * atl1e_irq_disable - Mask off interrupt generation on the NIC
107 * @adapter: board private structure
108 */
109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
110 {
111 atomic_inc(&adapter->irq_sem);
112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
113 AT_WRITE_FLUSH(&adapter->hw);
114 synchronize_irq(adapter->pdev->irq);
115 }
116
117 /**
118 * atl1e_irq_reset - reset interrupt confiure on the NIC
119 * @adapter: board private structure
120 */
121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
122 {
123 atomic_set(&adapter->irq_sem, 0);
124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
126 AT_WRITE_FLUSH(&adapter->hw);
127 }
128
129 /**
130 * atl1e_phy_config - Timer Call-back
131 * @data: pointer to netdev cast into an unsigned long
132 */
133 static void atl1e_phy_config(unsigned long data)
134 {
135 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
136 struct atl1e_hw *hw = &adapter->hw;
137 unsigned long flags;
138
139 spin_lock_irqsave(&adapter->mdio_lock, flags);
140 atl1e_restart_autoneg(hw);
141 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
142 }
143
144 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
145 {
146
147 WARN_ON(in_interrupt());
148 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
149 msleep(1);
150 atl1e_down(adapter);
151 atl1e_up(adapter);
152 clear_bit(__AT_RESETTING, &adapter->flags);
153 }
154
155 static void atl1e_reset_task(struct work_struct *work)
156 {
157 struct atl1e_adapter *adapter;
158 adapter = container_of(work, struct atl1e_adapter, reset_task);
159
160 atl1e_reinit_locked(adapter);
161 }
162
163 static int atl1e_check_link(struct atl1e_adapter *adapter)
164 {
165 struct atl1e_hw *hw = &adapter->hw;
166 struct net_device *netdev = adapter->netdev;
167 int err = 0;
168 u16 speed, duplex, phy_data;
169
170 /* MII_BMSR must read twice */
171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
173 if ((phy_data & BMSR_LSTATUS) == 0) {
174 /* link down */
175 if (netif_carrier_ok(netdev)) { /* old link state: Up */
176 u32 value;
177 /* disable rx */
178 value = AT_READ_REG(hw, REG_MAC_CTRL);
179 value &= ~MAC_CTRL_RX_EN;
180 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
181 adapter->link_speed = SPEED_0;
182 netif_carrier_off(netdev);
183 netif_stop_queue(netdev);
184 }
185 } else {
186 /* Link Up */
187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
188 if (unlikely(err))
189 return err;
190
191 /* link result is our setting */
192 if (adapter->link_speed != speed ||
193 adapter->link_duplex != duplex) {
194 adapter->link_speed = speed;
195 adapter->link_duplex = duplex;
196 atl1e_setup_mac_ctrl(adapter);
197 netdev_info(netdev,
198 "NIC Link is Up <%d Mbps %s Duplex>\n",
199 adapter->link_speed,
200 adapter->link_duplex == FULL_DUPLEX ?
201 "Full" : "Half");
202 }
203
204 if (!netif_carrier_ok(netdev)) {
205 /* Link down -> Up */
206 netif_carrier_on(netdev);
207 netif_wake_queue(netdev);
208 }
209 }
210 return 0;
211 }
212
213 /**
214 * atl1e_link_chg_task - deal with link change event Out of interrupt context
215 * @netdev: network interface device structure
216 */
217 static void atl1e_link_chg_task(struct work_struct *work)
218 {
219 struct atl1e_adapter *adapter;
220 unsigned long flags;
221
222 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
223 spin_lock_irqsave(&adapter->mdio_lock, flags);
224 atl1e_check_link(adapter);
225 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
226 }
227
228 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
229 {
230 struct net_device *netdev = adapter->netdev;
231 u16 phy_data = 0;
232 u16 link_up = 0;
233
234 spin_lock(&adapter->mdio_lock);
235 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
237 spin_unlock(&adapter->mdio_lock);
238 link_up = phy_data & BMSR_LSTATUS;
239 /* notify upper layer link down ASAP */
240 if (!link_up) {
241 if (netif_carrier_ok(netdev)) {
242 /* old link state: Up */
243 netdev_info(netdev, "NIC Link is Down\n");
244 adapter->link_speed = SPEED_0;
245 netif_stop_queue(netdev);
246 }
247 }
248 schedule_work(&adapter->link_chg_task);
249 }
250
251 static void atl1e_del_timer(struct atl1e_adapter *adapter)
252 {
253 del_timer_sync(&adapter->phy_config_timer);
254 }
255
256 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
257 {
258 cancel_work_sync(&adapter->reset_task);
259 cancel_work_sync(&adapter->link_chg_task);
260 }
261
262 /**
263 * atl1e_tx_timeout - Respond to a Tx Hang
264 * @netdev: network interface device structure
265 */
266 static void atl1e_tx_timeout(struct net_device *netdev)
267 {
268 struct atl1e_adapter *adapter = netdev_priv(netdev);
269
270 /* Do the reset outside of interrupt context */
271 schedule_work(&adapter->reset_task);
272 }
273
274 /**
275 * atl1e_set_multi - Multicast and Promiscuous mode set
276 * @netdev: network interface device structure
277 *
278 * The set_multi entry point is called whenever the multicast address
279 * list or the network interface flags are updated. This routine is
280 * responsible for configuring the hardware for proper multicast,
281 * promiscuous mode, and all-multi behavior.
282 */
283 static void atl1e_set_multi(struct net_device *netdev)
284 {
285 struct atl1e_adapter *adapter = netdev_priv(netdev);
286 struct atl1e_hw *hw = &adapter->hw;
287 struct netdev_hw_addr *ha;
288 u32 mac_ctrl_data = 0;
289 u32 hash_value;
290
291 /* Check for Promiscuous and All Multicast modes */
292 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
293
294 if (netdev->flags & IFF_PROMISC) {
295 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
296 } else if (netdev->flags & IFF_ALLMULTI) {
297 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
298 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
299 } else {
300 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
301 }
302
303 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
304
305 /* clear the old settings from the multicast hash table */
306 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
307 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
308
309 /* comoute mc addresses' hash value ,and put it into hash table */
310 netdev_for_each_mc_addr(ha, netdev) {
311 hash_value = atl1e_hash_mc_addr(hw, ha->addr);
312 atl1e_hash_set(hw, hash_value);
313 }
314 }
315
316 static void __atl1e_rx_mode(netdev_features_t features, u32 *mac_ctrl_data)
317 {
318
319 if (features & NETIF_F_RXALL) {
320 /* enable RX of ALL frames */
321 *mac_ctrl_data |= MAC_CTRL_DBG;
322 } else {
323 /* disable RX of ALL frames */
324 *mac_ctrl_data &= ~MAC_CTRL_DBG;
325 }
326 }
327
328 static void atl1e_rx_mode(struct net_device *netdev,
329 netdev_features_t features)
330 {
331 struct atl1e_adapter *adapter = netdev_priv(netdev);
332 u32 mac_ctrl_data = 0;
333
334 netdev_dbg(adapter->netdev, "%s\n", __func__);
335
336 atl1e_irq_disable(adapter);
337 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
338 __atl1e_rx_mode(features, &mac_ctrl_data);
339 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
340 atl1e_irq_enable(adapter);
341 }
342
343
344 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
345 {
346 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
347 /* enable VLAN tag insert/strip */
348 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
349 } else {
350 /* disable VLAN tag insert/strip */
351 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
352 }
353 }
354
355 static void atl1e_vlan_mode(struct net_device *netdev,
356 netdev_features_t features)
357 {
358 struct atl1e_adapter *adapter = netdev_priv(netdev);
359 u32 mac_ctrl_data = 0;
360
361 netdev_dbg(adapter->netdev, "%s\n", __func__);
362
363 atl1e_irq_disable(adapter);
364 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
365 __atl1e_vlan_mode(features, &mac_ctrl_data);
366 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
367 atl1e_irq_enable(adapter);
368 }
369
370 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
371 {
372 netdev_dbg(adapter->netdev, "%s\n", __func__);
373 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features);
374 }
375
376 /**
377 * atl1e_set_mac - Change the Ethernet Address of the NIC
378 * @netdev: network interface device structure
379 * @p: pointer to an address structure
380 *
381 * Returns 0 on success, negative on failure
382 */
383 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
384 {
385 struct atl1e_adapter *adapter = netdev_priv(netdev);
386 struct sockaddr *addr = p;
387
388 if (!is_valid_ether_addr(addr->sa_data))
389 return -EADDRNOTAVAIL;
390
391 if (netif_running(netdev))
392 return -EBUSY;
393
394 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
395 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
396
397 atl1e_hw_set_mac_addr(&adapter->hw);
398
399 return 0;
400 }
401
402 static netdev_features_t atl1e_fix_features(struct net_device *netdev,
403 netdev_features_t features)
404 {
405 /*
406 * Since there is no support for separate rx/tx vlan accel
407 * enable/disable make sure tx flag is always in same state as rx.
408 */
409 if (features & NETIF_F_HW_VLAN_CTAG_RX)
410 features |= NETIF_F_HW_VLAN_CTAG_TX;
411 else
412 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
413
414 return features;
415 }
416
417 static int atl1e_set_features(struct net_device *netdev,
418 netdev_features_t features)
419 {
420 netdev_features_t changed = netdev->features ^ features;
421
422 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
423 atl1e_vlan_mode(netdev, features);
424
425 if (changed & NETIF_F_RXALL)
426 atl1e_rx_mode(netdev, features);
427
428
429 return 0;
430 }
431
432 /**
433 * atl1e_change_mtu - Change the Maximum Transfer Unit
434 * @netdev: network interface device structure
435 * @new_mtu: new value for maximum frame size
436 *
437 * Returns 0 on success, negative on failure
438 */
439 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
440 {
441 struct atl1e_adapter *adapter = netdev_priv(netdev);
442 int old_mtu = netdev->mtu;
443 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
444
445 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
446 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
447 netdev_warn(adapter->netdev, "invalid MTU setting\n");
448 return -EINVAL;
449 }
450 /* set MTU */
451 if (old_mtu != new_mtu && netif_running(netdev)) {
452 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
453 msleep(1);
454 netdev->mtu = new_mtu;
455 adapter->hw.max_frame_size = new_mtu;
456 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
457 atl1e_down(adapter);
458 atl1e_up(adapter);
459 clear_bit(__AT_RESETTING, &adapter->flags);
460 }
461 return 0;
462 }
463
464 /*
465 * caller should hold mdio_lock
466 */
467 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
468 {
469 struct atl1e_adapter *adapter = netdev_priv(netdev);
470 u16 result;
471
472 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
473 return result;
474 }
475
476 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
477 int reg_num, int val)
478 {
479 struct atl1e_adapter *adapter = netdev_priv(netdev);
480
481 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
482 }
483
484 static int atl1e_mii_ioctl(struct net_device *netdev,
485 struct ifreq *ifr, int cmd)
486 {
487 struct atl1e_adapter *adapter = netdev_priv(netdev);
488 struct mii_ioctl_data *data = if_mii(ifr);
489 unsigned long flags;
490 int retval = 0;
491
492 if (!netif_running(netdev))
493 return -EINVAL;
494
495 spin_lock_irqsave(&adapter->mdio_lock, flags);
496 switch (cmd) {
497 case SIOCGMIIPHY:
498 data->phy_id = 0;
499 break;
500
501 case SIOCGMIIREG:
502 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
503 &data->val_out)) {
504 retval = -EIO;
505 goto out;
506 }
507 break;
508
509 case SIOCSMIIREG:
510 if (data->reg_num & ~(0x1F)) {
511 retval = -EFAULT;
512 goto out;
513 }
514
515 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
516 data->reg_num, data->val_in);
517 if (atl1e_write_phy_reg(&adapter->hw,
518 data->reg_num, data->val_in)) {
519 retval = -EIO;
520 goto out;
521 }
522 break;
523
524 default:
525 retval = -EOPNOTSUPP;
526 break;
527 }
528 out:
529 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
530 return retval;
531
532 }
533
534 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
535 {
536 switch (cmd) {
537 case SIOCGMIIPHY:
538 case SIOCGMIIREG:
539 case SIOCSMIIREG:
540 return atl1e_mii_ioctl(netdev, ifr, cmd);
541 default:
542 return -EOPNOTSUPP;
543 }
544 }
545
546 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
547 {
548 u16 cmd;
549
550 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
551 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
552 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
553 pci_write_config_word(pdev, PCI_COMMAND, cmd);
554
555 /*
556 * some motherboards BIOS(PXE/EFI) driver may set PME
557 * while they transfer control to OS (Windows/Linux)
558 * so we should clear this bit before NIC work normally
559 */
560 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
561 msleep(1);
562 }
563
564 /**
565 * atl1e_alloc_queues - Allocate memory for all rings
566 * @adapter: board private structure to initialize
567 *
568 */
569 static int atl1e_alloc_queues(struct atl1e_adapter *adapter)
570 {
571 return 0;
572 }
573
574 /**
575 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
576 * @adapter: board private structure to initialize
577 *
578 * atl1e_sw_init initializes the Adapter private data structure.
579 * Fields are initialized based on PCI device information and
580 * OS network device settings (MTU size).
581 */
582 static int atl1e_sw_init(struct atl1e_adapter *adapter)
583 {
584 struct atl1e_hw *hw = &adapter->hw;
585 struct pci_dev *pdev = adapter->pdev;
586 u32 phy_status_data = 0;
587
588 adapter->wol = 0;
589 adapter->link_speed = SPEED_0; /* hardware init */
590 adapter->link_duplex = FULL_DUPLEX;
591 adapter->num_rx_queues = 1;
592
593 /* PCI config space info */
594 hw->vendor_id = pdev->vendor;
595 hw->device_id = pdev->device;
596 hw->subsystem_vendor_id = pdev->subsystem_vendor;
597 hw->subsystem_id = pdev->subsystem_device;
598 hw->revision_id = pdev->revision;
599
600 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
601
602 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
603 /* nic type */
604 if (hw->revision_id >= 0xF0) {
605 hw->nic_type = athr_l2e_revB;
606 } else {
607 if (phy_status_data & PHY_STATUS_100M)
608 hw->nic_type = athr_l1e;
609 else
610 hw->nic_type = athr_l2e_revA;
611 }
612
613 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
614
615 if (phy_status_data & PHY_STATUS_EMI_CA)
616 hw->emi_ca = true;
617 else
618 hw->emi_ca = false;
619
620 hw->phy_configured = false;
621 hw->preamble_len = 7;
622 hw->max_frame_size = adapter->netdev->mtu;
623 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
624 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
625
626 hw->rrs_type = atl1e_rrs_disable;
627 hw->indirect_tab = 0;
628 hw->base_cpu = 0;
629
630 /* need confirm */
631
632 hw->ict = 50000; /* 100ms */
633 hw->smb_timer = 200000; /* 200ms */
634 hw->tpd_burst = 5;
635 hw->rrd_thresh = 1;
636 hw->tpd_thresh = adapter->tx_ring.count / 2;
637 hw->rx_count_down = 4; /* 2us resolution */
638 hw->tx_count_down = hw->imt * 4 / 3;
639 hw->dmar_block = atl1e_dma_req_1024;
640 hw->dmaw_block = atl1e_dma_req_1024;
641 hw->dmar_dly_cnt = 15;
642 hw->dmaw_dly_cnt = 4;
643
644 if (atl1e_alloc_queues(adapter)) {
645 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n");
646 return -ENOMEM;
647 }
648
649 atomic_set(&adapter->irq_sem, 1);
650 spin_lock_init(&adapter->mdio_lock);
651
652 set_bit(__AT_DOWN, &adapter->flags);
653
654 return 0;
655 }
656
657 /**
658 * atl1e_clean_tx_ring - Free Tx-skb
659 * @adapter: board private structure
660 */
661 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
662 {
663 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
664 struct atl1e_tx_buffer *tx_buffer = NULL;
665 struct pci_dev *pdev = adapter->pdev;
666 u16 index, ring_count;
667
668 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
669 return;
670
671 ring_count = tx_ring->count;
672 /* first unmmap dma */
673 for (index = 0; index < ring_count; index++) {
674 tx_buffer = &tx_ring->tx_buffer[index];
675 if (tx_buffer->dma) {
676 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
677 pci_unmap_single(pdev, tx_buffer->dma,
678 tx_buffer->length, PCI_DMA_TODEVICE);
679 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
680 pci_unmap_page(pdev, tx_buffer->dma,
681 tx_buffer->length, PCI_DMA_TODEVICE);
682 tx_buffer->dma = 0;
683 }
684 }
685 /* second free skb */
686 for (index = 0; index < ring_count; index++) {
687 tx_buffer = &tx_ring->tx_buffer[index];
688 if (tx_buffer->skb) {
689 dev_kfree_skb_any(tx_buffer->skb);
690 tx_buffer->skb = NULL;
691 }
692 }
693 /* Zero out Tx-buffers */
694 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
695 ring_count);
696 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
697 ring_count);
698 }
699
700 /**
701 * atl1e_clean_rx_ring - Free rx-reservation skbs
702 * @adapter: board private structure
703 */
704 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
705 {
706 struct atl1e_rx_ring *rx_ring =
707 &adapter->rx_ring;
708 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
709 u16 i, j;
710
711
712 if (adapter->ring_vir_addr == NULL)
713 return;
714 /* Zero out the descriptor ring */
715 for (i = 0; i < adapter->num_rx_queues; i++) {
716 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
717 if (rx_page_desc[i].rx_page[j].addr != NULL) {
718 memset(rx_page_desc[i].rx_page[j].addr, 0,
719 rx_ring->real_page_size);
720 }
721 }
722 }
723 }
724
725 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
726 {
727 *ring_size = ((u32)(adapter->tx_ring.count *
728 sizeof(struct atl1e_tpd_desc) + 7
729 /* tx ring, qword align */
730 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
731 adapter->num_rx_queues + 31
732 /* rx ring, 32 bytes align */
733 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
734 sizeof(u32) + 3));
735 /* tx, rx cmd, dword align */
736 }
737
738 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
739 {
740 struct atl1e_rx_ring *rx_ring = NULL;
741
742 rx_ring = &adapter->rx_ring;
743
744 rx_ring->real_page_size = adapter->rx_ring.page_size
745 + adapter->hw.max_frame_size
746 + ETH_HLEN + VLAN_HLEN
747 + ETH_FCS_LEN;
748 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
749 atl1e_cal_ring_size(adapter, &adapter->ring_size);
750
751 adapter->ring_vir_addr = NULL;
752 adapter->rx_ring.desc = NULL;
753 rwlock_init(&adapter->tx_ring.tx_lock);
754 }
755
756 /*
757 * Read / Write Ptr Initialize:
758 */
759 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
760 {
761 struct atl1e_tx_ring *tx_ring = NULL;
762 struct atl1e_rx_ring *rx_ring = NULL;
763 struct atl1e_rx_page_desc *rx_page_desc = NULL;
764 int i, j;
765
766 tx_ring = &adapter->tx_ring;
767 rx_ring = &adapter->rx_ring;
768 rx_page_desc = rx_ring->rx_page_desc;
769
770 tx_ring->next_to_use = 0;
771 atomic_set(&tx_ring->next_to_clean, 0);
772
773 for (i = 0; i < adapter->num_rx_queues; i++) {
774 rx_page_desc[i].rx_using = 0;
775 rx_page_desc[i].rx_nxseq = 0;
776 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
777 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
778 rx_page_desc[i].rx_page[j].read_offset = 0;
779 }
780 }
781 }
782
783 /**
784 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
785 * @adapter: board private structure
786 *
787 * Free all transmit software resources
788 */
789 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
790 {
791 struct pci_dev *pdev = adapter->pdev;
792
793 atl1e_clean_tx_ring(adapter);
794 atl1e_clean_rx_ring(adapter);
795
796 if (adapter->ring_vir_addr) {
797 pci_free_consistent(pdev, adapter->ring_size,
798 adapter->ring_vir_addr, adapter->ring_dma);
799 adapter->ring_vir_addr = NULL;
800 }
801
802 if (adapter->tx_ring.tx_buffer) {
803 kfree(adapter->tx_ring.tx_buffer);
804 adapter->tx_ring.tx_buffer = NULL;
805 }
806 }
807
808 /**
809 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
810 * @adapter: board private structure
811 *
812 * Return 0 on success, negative on failure
813 */
814 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
815 {
816 struct pci_dev *pdev = adapter->pdev;
817 struct atl1e_tx_ring *tx_ring;
818 struct atl1e_rx_ring *rx_ring;
819 struct atl1e_rx_page_desc *rx_page_desc;
820 int size, i, j;
821 u32 offset = 0;
822 int err = 0;
823
824 if (adapter->ring_vir_addr != NULL)
825 return 0; /* alloced already */
826
827 tx_ring = &adapter->tx_ring;
828 rx_ring = &adapter->rx_ring;
829
830 /* real ring DMA buffer */
831
832 size = adapter->ring_size;
833 adapter->ring_vir_addr = pci_zalloc_consistent(pdev, adapter->ring_size,
834 &adapter->ring_dma);
835 if (adapter->ring_vir_addr == NULL) {
836 netdev_err(adapter->netdev,
837 "pci_alloc_consistent failed, size = D%d\n", size);
838 return -ENOMEM;
839 }
840
841 rx_page_desc = rx_ring->rx_page_desc;
842
843 /* Init TPD Ring */
844 tx_ring->dma = roundup(adapter->ring_dma, 8);
845 offset = tx_ring->dma - adapter->ring_dma;
846 tx_ring->desc = adapter->ring_vir_addr + offset;
847 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
848 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
849 if (tx_ring->tx_buffer == NULL) {
850 err = -ENOMEM;
851 goto failed;
852 }
853
854 /* Init RXF-Pages */
855 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
856 offset = roundup(offset, 32);
857
858 for (i = 0; i < adapter->num_rx_queues; i++) {
859 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
860 rx_page_desc[i].rx_page[j].dma =
861 adapter->ring_dma + offset;
862 rx_page_desc[i].rx_page[j].addr =
863 adapter->ring_vir_addr + offset;
864 offset += rx_ring->real_page_size;
865 }
866 }
867
868 /* Init CMB dma address */
869 tx_ring->cmb_dma = adapter->ring_dma + offset;
870 tx_ring->cmb = adapter->ring_vir_addr + offset;
871 offset += sizeof(u32);
872
873 for (i = 0; i < adapter->num_rx_queues; i++) {
874 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
875 rx_page_desc[i].rx_page[j].write_offset_dma =
876 adapter->ring_dma + offset;
877 rx_page_desc[i].rx_page[j].write_offset_addr =
878 adapter->ring_vir_addr + offset;
879 offset += sizeof(u32);
880 }
881 }
882
883 if (unlikely(offset > adapter->ring_size)) {
884 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
885 offset, adapter->ring_size);
886 err = -1;
887 goto failed;
888 }
889
890 return 0;
891 failed:
892 if (adapter->ring_vir_addr != NULL) {
893 pci_free_consistent(pdev, adapter->ring_size,
894 adapter->ring_vir_addr, adapter->ring_dma);
895 adapter->ring_vir_addr = NULL;
896 }
897 return err;
898 }
899
900 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter)
901 {
902
903 struct atl1e_hw *hw = &adapter->hw;
904 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
905 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
906 struct atl1e_rx_page_desc *rx_page_desc = NULL;
907 int i, j;
908
909 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
910 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
911 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
912 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
913 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
914 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
915 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
916
917 rx_page_desc = rx_ring->rx_page_desc;
918 /* RXF Page Physical address / Page Length */
919 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
920 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
921 (u32)((adapter->ring_dma &
922 AT_DMA_HI_ADDR_MASK) >> 32));
923 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
924 u32 page_phy_addr;
925 u32 offset_phy_addr;
926
927 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
928 offset_phy_addr =
929 rx_page_desc[i].rx_page[j].write_offset_dma;
930
931 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
932 page_phy_addr & AT_DMA_LO_ADDR_MASK);
933 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
934 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
935 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
936 }
937 }
938 /* Page Length */
939 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
940 /* Load all of base address above */
941 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
942 }
943
944 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
945 {
946 struct atl1e_hw *hw = &adapter->hw;
947 u32 dev_ctrl_data = 0;
948 u32 max_pay_load = 0;
949 u32 jumbo_thresh = 0;
950 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
951
952 /* configure TXQ param */
953 if (hw->nic_type != athr_l2e_revB) {
954 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
955 if (hw->max_frame_size <= 1500) {
956 jumbo_thresh = hw->max_frame_size + extra_size;
957 } else if (hw->max_frame_size < 6*1024) {
958 jumbo_thresh =
959 (hw->max_frame_size + extra_size) * 2 / 3;
960 } else {
961 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
962 }
963 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
964 }
965
966 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
967
968 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
969 DEVICE_CTRL_MAX_PAYLOAD_MASK;
970
971 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
972
973 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
974 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
975 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
976
977 if (hw->nic_type != athr_l2e_revB)
978 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
979 atl1e_pay_load_size[hw->dmar_block]);
980 /* enable TXQ */
981 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
982 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
983 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
984 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
985 }
986
987 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
988 {
989 struct atl1e_hw *hw = &adapter->hw;
990 u32 rxf_len = 0;
991 u32 rxf_low = 0;
992 u32 rxf_high = 0;
993 u32 rxf_thresh_data = 0;
994 u32 rxq_ctrl_data = 0;
995
996 if (hw->nic_type != athr_l2e_revB) {
997 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
998 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
999 RXQ_JMBOSZ_TH_SHIFT |
1000 (1 & RXQ_JMBO_LKAH_MASK) <<
1001 RXQ_JMBO_LKAH_SHIFT));
1002
1003 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
1004 rxf_high = rxf_len * 4 / 5;
1005 rxf_low = rxf_len / 5;
1006 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
1007 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1008 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
1009 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1010
1011 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
1012 }
1013
1014 /* RRS */
1015 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1016 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1017
1018 if (hw->rrs_type & atl1e_rrs_ipv4)
1019 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
1020
1021 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
1022 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
1023
1024 if (hw->rrs_type & atl1e_rrs_ipv6)
1025 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
1026
1027 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1028 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1029
1030 if (hw->rrs_type != atl1e_rrs_disable)
1031 rxq_ctrl_data |=
1032 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1033
1034 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1035 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1036
1037 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1038 }
1039
1040 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1041 {
1042 struct atl1e_hw *hw = &adapter->hw;
1043 u32 dma_ctrl_data = 0;
1044
1045 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1046 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1047 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1048 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1049 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1050 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1051 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1052 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1053 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1054 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1055
1056 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1057 }
1058
1059 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1060 {
1061 u32 value;
1062 struct atl1e_hw *hw = &adapter->hw;
1063 struct net_device *netdev = adapter->netdev;
1064
1065 /* Config MAC CTRL Register */
1066 value = MAC_CTRL_TX_EN |
1067 MAC_CTRL_RX_EN ;
1068
1069 if (FULL_DUPLEX == adapter->link_duplex)
1070 value |= MAC_CTRL_DUPLX;
1071
1072 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1073 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1074 MAC_CTRL_SPEED_SHIFT);
1075 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1076
1077 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1078 value |= (((u32)adapter->hw.preamble_len &
1079 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1080
1081 __atl1e_vlan_mode(netdev->features, &value);
1082
1083 value |= MAC_CTRL_BC_EN;
1084 if (netdev->flags & IFF_PROMISC)
1085 value |= MAC_CTRL_PROMIS_EN;
1086 if (netdev->flags & IFF_ALLMULTI)
1087 value |= MAC_CTRL_MC_ALL_EN;
1088 if (netdev->features & NETIF_F_RXALL)
1089 value |= MAC_CTRL_DBG;
1090 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1091 }
1092
1093 /**
1094 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1095 * @adapter: board private structure
1096 *
1097 * Configure the Tx /Rx unit of the MAC after a reset.
1098 */
1099 static int atl1e_configure(struct atl1e_adapter *adapter)
1100 {
1101 struct atl1e_hw *hw = &adapter->hw;
1102
1103 u32 intr_status_data = 0;
1104
1105 /* clear interrupt status */
1106 AT_WRITE_REG(hw, REG_ISR, ~0);
1107
1108 /* 1. set MAC Address */
1109 atl1e_hw_set_mac_addr(hw);
1110
1111 /* 2. Init the Multicast HASH table done by set_muti */
1112
1113 /* 3. Clear any WOL status */
1114 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1115
1116 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1117 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1118 * High 32bits memory */
1119 atl1e_configure_des_ring(adapter);
1120
1121 /* 5. set Interrupt Moderator Timer */
1122 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1123 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1124 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1125 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1126
1127 /* 6. rx/tx threshold to trig interrupt */
1128 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1129 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1130 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1131 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1132
1133 /* 7. set Interrupt Clear Timer */
1134 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1135
1136 /* 8. set MTU */
1137 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1138 VLAN_HLEN + ETH_FCS_LEN);
1139
1140 /* 9. config TXQ early tx threshold */
1141 atl1e_configure_tx(adapter);
1142
1143 /* 10. config RXQ */
1144 atl1e_configure_rx(adapter);
1145
1146 /* 11. config DMA Engine */
1147 atl1e_configure_dma(adapter);
1148
1149 /* 12. smb timer to trig interrupt */
1150 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1151
1152 intr_status_data = AT_READ_REG(hw, REG_ISR);
1153 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1154 netdev_err(adapter->netdev,
1155 "atl1e_configure failed, PCIE phy link down\n");
1156 return -1;
1157 }
1158
1159 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1160 return 0;
1161 }
1162
1163 /**
1164 * atl1e_get_stats - Get System Network Statistics
1165 * @netdev: network interface device structure
1166 *
1167 * Returns the address of the device statistics structure.
1168 * The statistics are actually updated from the timer callback.
1169 */
1170 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1171 {
1172 struct atl1e_adapter *adapter = netdev_priv(netdev);
1173 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1174 struct net_device_stats *net_stats = &netdev->stats;
1175
1176 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1177 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1178 net_stats->multicast = hw_stats->rx_mcast;
1179 net_stats->collisions = hw_stats->tx_1_col +
1180 hw_stats->tx_2_col +
1181 hw_stats->tx_late_col +
1182 hw_stats->tx_abort_col;
1183
1184 net_stats->rx_errors = hw_stats->rx_frag +
1185 hw_stats->rx_fcs_err +
1186 hw_stats->rx_len_err +
1187 hw_stats->rx_sz_ov +
1188 hw_stats->rx_rrd_ov +
1189 hw_stats->rx_align_err +
1190 hw_stats->rx_rxf_ov;
1191
1192 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1193 net_stats->rx_length_errors = hw_stats->rx_len_err;
1194 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1195 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1196 net_stats->rx_dropped = hw_stats->rx_rrd_ov;
1197
1198 net_stats->tx_errors = hw_stats->tx_late_col +
1199 hw_stats->tx_abort_col +
1200 hw_stats->tx_underrun +
1201 hw_stats->tx_trunc;
1202
1203 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1204 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1205 net_stats->tx_window_errors = hw_stats->tx_late_col;
1206
1207 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1208 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1209
1210 return net_stats;
1211 }
1212
1213 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1214 {
1215 u16 hw_reg_addr = 0;
1216 unsigned long *stats_item = NULL;
1217
1218 /* update rx status */
1219 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1220 stats_item = &adapter->hw_stats.rx_ok;
1221 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1222 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1223 stats_item++;
1224 hw_reg_addr += 4;
1225 }
1226 /* update tx status */
1227 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1228 stats_item = &adapter->hw_stats.tx_ok;
1229 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1230 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1231 stats_item++;
1232 hw_reg_addr += 4;
1233 }
1234 }
1235
1236 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1237 {
1238 u16 phy_data;
1239
1240 spin_lock(&adapter->mdio_lock);
1241 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1242 spin_unlock(&adapter->mdio_lock);
1243 }
1244
1245 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1246 {
1247 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1248 struct atl1e_tx_buffer *tx_buffer = NULL;
1249 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1250 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1251
1252 while (next_to_clean != hw_next_to_clean) {
1253 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1254 if (tx_buffer->dma) {
1255 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1256 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1257 tx_buffer->length, PCI_DMA_TODEVICE);
1258 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1259 pci_unmap_page(adapter->pdev, tx_buffer->dma,
1260 tx_buffer->length, PCI_DMA_TODEVICE);
1261 tx_buffer->dma = 0;
1262 }
1263
1264 if (tx_buffer->skb) {
1265 dev_kfree_skb_irq(tx_buffer->skb);
1266 tx_buffer->skb = NULL;
1267 }
1268
1269 if (++next_to_clean == tx_ring->count)
1270 next_to_clean = 0;
1271 }
1272
1273 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1274
1275 if (netif_queue_stopped(adapter->netdev) &&
1276 netif_carrier_ok(adapter->netdev)) {
1277 netif_wake_queue(adapter->netdev);
1278 }
1279
1280 return true;
1281 }
1282
1283 /**
1284 * atl1e_intr - Interrupt Handler
1285 * @irq: interrupt number
1286 * @data: pointer to a network interface device structure
1287 */
1288 static irqreturn_t atl1e_intr(int irq, void *data)
1289 {
1290 struct net_device *netdev = data;
1291 struct atl1e_adapter *adapter = netdev_priv(netdev);
1292 struct atl1e_hw *hw = &adapter->hw;
1293 int max_ints = AT_MAX_INT_WORK;
1294 int handled = IRQ_NONE;
1295 u32 status;
1296
1297 do {
1298 status = AT_READ_REG(hw, REG_ISR);
1299 if ((status & IMR_NORMAL_MASK) == 0 ||
1300 (status & ISR_DIS_INT) != 0) {
1301 if (max_ints != AT_MAX_INT_WORK)
1302 handled = IRQ_HANDLED;
1303 break;
1304 }
1305 /* link event */
1306 if (status & ISR_GPHY)
1307 atl1e_clear_phy_int(adapter);
1308 /* Ack ISR */
1309 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1310
1311 handled = IRQ_HANDLED;
1312 /* check if PCIE PHY Link down */
1313 if (status & ISR_PHY_LINKDOWN) {
1314 netdev_err(adapter->netdev,
1315 "pcie phy linkdown %x\n", status);
1316 if (netif_running(adapter->netdev)) {
1317 /* reset MAC */
1318 atl1e_irq_reset(adapter);
1319 schedule_work(&adapter->reset_task);
1320 break;
1321 }
1322 }
1323
1324 /* check if DMA read/write error */
1325 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1326 netdev_err(adapter->netdev,
1327 "PCIE DMA RW error (status = 0x%x)\n",
1328 status);
1329 atl1e_irq_reset(adapter);
1330 schedule_work(&adapter->reset_task);
1331 break;
1332 }
1333
1334 if (status & ISR_SMB)
1335 atl1e_update_hw_stats(adapter);
1336
1337 /* link event */
1338 if (status & (ISR_GPHY | ISR_MANUAL)) {
1339 netdev->stats.tx_carrier_errors++;
1340 atl1e_link_chg_event(adapter);
1341 break;
1342 }
1343
1344 /* transmit event */
1345 if (status & ISR_TX_EVENT)
1346 atl1e_clean_tx_irq(adapter);
1347
1348 if (status & ISR_RX_EVENT) {
1349 /*
1350 * disable rx interrupts, without
1351 * the synchronize_irq bit
1352 */
1353 AT_WRITE_REG(hw, REG_IMR,
1354 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1355 AT_WRITE_FLUSH(hw);
1356 if (likely(napi_schedule_prep(
1357 &adapter->napi)))
1358 __napi_schedule(&adapter->napi);
1359 }
1360 } while (--max_ints > 0);
1361 /* re-enable Interrupt*/
1362 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1363
1364 return handled;
1365 }
1366
1367 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1368 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1369 {
1370 u8 *packet = (u8 *)(prrs + 1);
1371 struct iphdr *iph;
1372 u16 head_len = ETH_HLEN;
1373 u16 pkt_flags;
1374 u16 err_flags;
1375
1376 skb_checksum_none_assert(skb);
1377 pkt_flags = prrs->pkt_flag;
1378 err_flags = prrs->err_flag;
1379 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1380 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1381 if (pkt_flags & RRS_IS_IPV4) {
1382 if (pkt_flags & RRS_IS_802_3)
1383 head_len += 8;
1384 iph = (struct iphdr *) (packet + head_len);
1385 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1386 goto hw_xsum;
1387 }
1388 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1389 skb->ip_summed = CHECKSUM_UNNECESSARY;
1390 return;
1391 }
1392 }
1393
1394 hw_xsum :
1395 return;
1396 }
1397
1398 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1399 u8 que)
1400 {
1401 struct atl1e_rx_page_desc *rx_page_desc =
1402 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1403 u8 rx_using = rx_page_desc[que].rx_using;
1404
1405 return &(rx_page_desc[que].rx_page[rx_using]);
1406 }
1407
1408 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1409 int *work_done, int work_to_do)
1410 {
1411 struct net_device *netdev = adapter->netdev;
1412 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
1413 struct atl1e_rx_page_desc *rx_page_desc =
1414 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1415 struct sk_buff *skb = NULL;
1416 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1417 u32 packet_size, write_offset;
1418 struct atl1e_recv_ret_status *prrs;
1419
1420 write_offset = *(rx_page->write_offset_addr);
1421 if (likely(rx_page->read_offset < write_offset)) {
1422 do {
1423 if (*work_done >= work_to_do)
1424 break;
1425 (*work_done)++;
1426 /* get new packet's rrs */
1427 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1428 rx_page->read_offset);
1429 /* check sequence number */
1430 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1431 netdev_err(netdev,
1432 "rx sequence number error (rx=%d) (expect=%d)\n",
1433 prrs->seq_num,
1434 rx_page_desc[que].rx_nxseq);
1435 rx_page_desc[que].rx_nxseq++;
1436 /* just for debug use */
1437 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1438 (((u32)prrs->seq_num) << 16) |
1439 rx_page_desc[que].rx_nxseq);
1440 goto fatal_err;
1441 }
1442 rx_page_desc[que].rx_nxseq++;
1443
1444 /* error packet */
1445 if ((prrs->pkt_flag & RRS_IS_ERR_FRAME) &&
1446 !(netdev->features & NETIF_F_RXALL)) {
1447 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1448 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1449 RRS_ERR_TRUNC)) {
1450 /* hardware error, discard this packet*/
1451 netdev_err(netdev,
1452 "rx packet desc error %x\n",
1453 *((u32 *)prrs + 1));
1454 goto skip_pkt;
1455 }
1456 }
1457
1458 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1459 RRS_PKT_SIZE_MASK);
1460 if (likely(!(netdev->features & NETIF_F_RXFCS)))
1461 packet_size -= 4; /* CRC */
1462
1463 skb = netdev_alloc_skb_ip_align(netdev, packet_size);
1464 if (skb == NULL)
1465 goto skip_pkt;
1466
1467 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1468 skb_put(skb, packet_size);
1469 skb->protocol = eth_type_trans(skb, netdev);
1470 atl1e_rx_checksum(adapter, skb, prrs);
1471
1472 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) {
1473 u16 vlan_tag = (prrs->vtag >> 4) |
1474 ((prrs->vtag & 7) << 13) |
1475 ((prrs->vtag & 8) << 9);
1476 netdev_dbg(netdev,
1477 "RXD VLAN TAG<RRD>=0x%04x\n",
1478 prrs->vtag);
1479 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
1480 }
1481 netif_receive_skb(skb);
1482
1483 skip_pkt:
1484 /* skip current packet whether it's ok or not. */
1485 rx_page->read_offset +=
1486 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1487 RRS_PKT_SIZE_MASK) +
1488 sizeof(struct atl1e_recv_ret_status) + 31) &
1489 0xFFFFFFE0);
1490
1491 if (rx_page->read_offset >= rx_ring->page_size) {
1492 /* mark this page clean */
1493 u16 reg_addr;
1494 u8 rx_using;
1495
1496 rx_page->read_offset =
1497 *(rx_page->write_offset_addr) = 0;
1498 rx_using = rx_page_desc[que].rx_using;
1499 reg_addr =
1500 atl1e_rx_page_vld_regs[que][rx_using];
1501 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1502 rx_page_desc[que].rx_using ^= 1;
1503 rx_page = atl1e_get_rx_page(adapter, que);
1504 }
1505 write_offset = *(rx_page->write_offset_addr);
1506 } while (rx_page->read_offset < write_offset);
1507 }
1508
1509 return;
1510
1511 fatal_err:
1512 if (!test_bit(__AT_DOWN, &adapter->flags))
1513 schedule_work(&adapter->reset_task);
1514 }
1515
1516 /**
1517 * atl1e_clean - NAPI Rx polling callback
1518 */
1519 static int atl1e_clean(struct napi_struct *napi, int budget)
1520 {
1521 struct atl1e_adapter *adapter =
1522 container_of(napi, struct atl1e_adapter, napi);
1523 u32 imr_data;
1524 int work_done = 0;
1525
1526 /* Keep link state information with original netdev */
1527 if (!netif_carrier_ok(adapter->netdev))
1528 goto quit_polling;
1529
1530 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1531
1532 /* If no Tx and not enough Rx work done, exit the polling mode */
1533 if (work_done < budget) {
1534 quit_polling:
1535 napi_complete(napi);
1536 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1537 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1538 /* test debug */
1539 if (test_bit(__AT_DOWN, &adapter->flags)) {
1540 atomic_dec(&adapter->irq_sem);
1541 netdev_err(adapter->netdev,
1542 "atl1e_clean is called when AT_DOWN\n");
1543 }
1544 /* reenable RX intr */
1545 /*atl1e_irq_enable(adapter); */
1546
1547 }
1548 return work_done;
1549 }
1550
1551 #ifdef CONFIG_NET_POLL_CONTROLLER
1552
1553 /*
1554 * Polling 'interrupt' - used by things like netconsole to send skbs
1555 * without having to re-enable interrupts. It's not called while
1556 * the interrupt routine is executing.
1557 */
1558 static void atl1e_netpoll(struct net_device *netdev)
1559 {
1560 struct atl1e_adapter *adapter = netdev_priv(netdev);
1561
1562 disable_irq(adapter->pdev->irq);
1563 atl1e_intr(adapter->pdev->irq, netdev);
1564 enable_irq(adapter->pdev->irq);
1565 }
1566 #endif
1567
1568 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1569 {
1570 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1571 u16 next_to_use = 0;
1572 u16 next_to_clean = 0;
1573
1574 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1575 next_to_use = tx_ring->next_to_use;
1576
1577 return (u16)(next_to_clean > next_to_use) ?
1578 (next_to_clean - next_to_use - 1) :
1579 (tx_ring->count + next_to_clean - next_to_use - 1);
1580 }
1581
1582 /*
1583 * get next usable tpd
1584 * Note: should call atl1e_tdp_avail to make sure
1585 * there is enough tpd to use
1586 */
1587 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1588 {
1589 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1590 u16 next_to_use = 0;
1591
1592 next_to_use = tx_ring->next_to_use;
1593 if (++tx_ring->next_to_use == tx_ring->count)
1594 tx_ring->next_to_use = 0;
1595
1596 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1597 return &tx_ring->desc[next_to_use];
1598 }
1599
1600 static struct atl1e_tx_buffer *
1601 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1602 {
1603 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1604
1605 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1606 }
1607
1608 /* Calculate the transmit packet descript needed*/
1609 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1610 {
1611 int i = 0;
1612 u16 tpd_req = 1;
1613 u16 fg_size = 0;
1614 u16 proto_hdr_len = 0;
1615
1616 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1617 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]);
1618 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1619 }
1620
1621 if (skb_is_gso(skb)) {
1622 if (skb->protocol == htons(ETH_P_IP) ||
1623 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1624 proto_hdr_len = skb_transport_offset(skb) +
1625 tcp_hdrlen(skb);
1626 if (proto_hdr_len < skb_headlen(skb)) {
1627 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1628 MAX_TX_BUF_LEN - 1) >>
1629 MAX_TX_BUF_SHIFT);
1630 }
1631 }
1632
1633 }
1634 return tpd_req;
1635 }
1636
1637 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1638 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1639 {
1640 unsigned short offload_type;
1641 u8 hdr_len;
1642 u32 real_len;
1643
1644 if (skb_is_gso(skb)) {
1645 int err;
1646
1647 err = skb_cow_head(skb, 0);
1648 if (err < 0)
1649 return err;
1650
1651 offload_type = skb_shinfo(skb)->gso_type;
1652
1653 if (offload_type & SKB_GSO_TCPV4) {
1654 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1655 + ntohs(ip_hdr(skb)->tot_len));
1656
1657 if (real_len < skb->len)
1658 pskb_trim(skb, real_len);
1659
1660 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1661 if (unlikely(skb->len == hdr_len)) {
1662 /* only xsum need */
1663 netdev_warn(adapter->netdev,
1664 "IPV4 tso with zero data??\n");
1665 goto check_sum;
1666 } else {
1667 ip_hdr(skb)->check = 0;
1668 ip_hdr(skb)->tot_len = 0;
1669 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1670 ip_hdr(skb)->saddr,
1671 ip_hdr(skb)->daddr,
1672 0, IPPROTO_TCP, 0);
1673 tpd->word3 |= (ip_hdr(skb)->ihl &
1674 TDP_V4_IPHL_MASK) <<
1675 TPD_V4_IPHL_SHIFT;
1676 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1677 TPD_TCPHDRLEN_MASK) <<
1678 TPD_TCPHDRLEN_SHIFT;
1679 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1680 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1681 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1682 }
1683 return 0;
1684 }
1685 }
1686
1687 check_sum:
1688 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1689 u8 css, cso;
1690
1691 cso = skb_checksum_start_offset(skb);
1692 if (unlikely(cso & 0x1)) {
1693 netdev_err(adapter->netdev,
1694 "payload offset should not ant event number\n");
1695 return -1;
1696 } else {
1697 css = cso + skb->csum_offset;
1698 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1699 TPD_PLOADOFFSET_SHIFT;
1700 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1701 TPD_CCSUMOFFSET_SHIFT;
1702 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1703 }
1704 }
1705
1706 return 0;
1707 }
1708
1709 static int atl1e_tx_map(struct atl1e_adapter *adapter,
1710 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1711 {
1712 struct atl1e_tpd_desc *use_tpd = NULL;
1713 struct atl1e_tx_buffer *tx_buffer = NULL;
1714 u16 buf_len = skb_headlen(skb);
1715 u16 map_len = 0;
1716 u16 mapped_len = 0;
1717 u16 hdr_len = 0;
1718 u16 nr_frags;
1719 u16 f;
1720 int segment;
1721 int ring_start = adapter->tx_ring.next_to_use;
1722 int ring_end;
1723
1724 nr_frags = skb_shinfo(skb)->nr_frags;
1725 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1726 if (segment) {
1727 /* TSO */
1728 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1729 use_tpd = tpd;
1730
1731 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1732 tx_buffer->length = map_len;
1733 tx_buffer->dma = pci_map_single(adapter->pdev,
1734 skb->data, hdr_len, PCI_DMA_TODEVICE);
1735 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma))
1736 return -ENOSPC;
1737
1738 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1739 mapped_len += map_len;
1740 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1741 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1742 ((cpu_to_le32(tx_buffer->length) &
1743 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1744 }
1745
1746 while (mapped_len < buf_len) {
1747 /* mapped_len == 0, means we should use the first tpd,
1748 which is given by caller */
1749 if (mapped_len == 0) {
1750 use_tpd = tpd;
1751 } else {
1752 use_tpd = atl1e_get_tpd(adapter);
1753 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1754 }
1755 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1756 tx_buffer->skb = NULL;
1757
1758 tx_buffer->length = map_len =
1759 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1760 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1761 tx_buffer->dma =
1762 pci_map_single(adapter->pdev, skb->data + mapped_len,
1763 map_len, PCI_DMA_TODEVICE);
1764
1765 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) {
1766 /* We need to unwind the mappings we've done */
1767 ring_end = adapter->tx_ring.next_to_use;
1768 adapter->tx_ring.next_to_use = ring_start;
1769 while (adapter->tx_ring.next_to_use != ring_end) {
1770 tpd = atl1e_get_tpd(adapter);
1771 tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1772 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1773 tx_buffer->length, PCI_DMA_TODEVICE);
1774 }
1775 /* Reset the tx rings next pointer */
1776 adapter->tx_ring.next_to_use = ring_start;
1777 return -ENOSPC;
1778 }
1779
1780 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1781 mapped_len += map_len;
1782 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1783 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1784 ((cpu_to_le32(tx_buffer->length) &
1785 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1786 }
1787
1788 for (f = 0; f < nr_frags; f++) {
1789 const struct skb_frag_struct *frag;
1790 u16 i;
1791 u16 seg_num;
1792
1793 frag = &skb_shinfo(skb)->frags[f];
1794 buf_len = skb_frag_size(frag);
1795
1796 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1797 for (i = 0; i < seg_num; i++) {
1798 use_tpd = atl1e_get_tpd(adapter);
1799 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1800
1801 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1802 BUG_ON(tx_buffer->skb);
1803
1804 tx_buffer->skb = NULL;
1805 tx_buffer->length =
1806 (buf_len > MAX_TX_BUF_LEN) ?
1807 MAX_TX_BUF_LEN : buf_len;
1808 buf_len -= tx_buffer->length;
1809
1810 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev,
1811 frag,
1812 (i * MAX_TX_BUF_LEN),
1813 tx_buffer->length,
1814 DMA_TO_DEVICE);
1815
1816 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) {
1817 /* We need to unwind the mappings we've done */
1818 ring_end = adapter->tx_ring.next_to_use;
1819 adapter->tx_ring.next_to_use = ring_start;
1820 while (adapter->tx_ring.next_to_use != ring_end) {
1821 tpd = atl1e_get_tpd(adapter);
1822 tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1823 dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma,
1824 tx_buffer->length, DMA_TO_DEVICE);
1825 }
1826
1827 /* Reset the ring next to use pointer */
1828 adapter->tx_ring.next_to_use = ring_start;
1829 return -ENOSPC;
1830 }
1831
1832 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
1833 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1834 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1835 ((cpu_to_le32(tx_buffer->length) &
1836 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1837 }
1838 }
1839
1840 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1841 /* note this one is a tcp header */
1842 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1843 /* The last tpd */
1844
1845 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1846 /* The last buffer info contain the skb address,
1847 so it will be free after unmap */
1848 tx_buffer->skb = skb;
1849 return 0;
1850 }
1851
1852 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1853 struct atl1e_tpd_desc *tpd)
1854 {
1855 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1856 /* Force memory writes to complete before letting h/w
1857 * know there are new descriptors to fetch. (Only
1858 * applicable for weak-ordered memory model archs,
1859 * such as IA-64). */
1860 wmb();
1861 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1862 }
1863
1864 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1865 struct net_device *netdev)
1866 {
1867 struct atl1e_adapter *adapter = netdev_priv(netdev);
1868 u16 tpd_req = 1;
1869 struct atl1e_tpd_desc *tpd;
1870
1871 if (test_bit(__AT_DOWN, &adapter->flags)) {
1872 dev_kfree_skb_any(skb);
1873 return NETDEV_TX_OK;
1874 }
1875
1876 if (unlikely(skb->len <= 0)) {
1877 dev_kfree_skb_any(skb);
1878 return NETDEV_TX_OK;
1879 }
1880 tpd_req = atl1e_cal_tdp_req(skb);
1881
1882 if (atl1e_tpd_avail(adapter) < tpd_req) {
1883 /* no enough descriptor, just stop queue */
1884 netif_stop_queue(netdev);
1885 return NETDEV_TX_BUSY;
1886 }
1887
1888 tpd = atl1e_get_tpd(adapter);
1889
1890 if (skb_vlan_tag_present(skb)) {
1891 u16 vlan_tag = skb_vlan_tag_get(skb);
1892 u16 atl1e_vlan_tag;
1893
1894 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1895 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1896 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1897 TPD_VLAN_SHIFT;
1898 }
1899
1900 if (skb->protocol == htons(ETH_P_8021Q))
1901 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1902
1903 if (skb_network_offset(skb) != ETH_HLEN)
1904 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1905
1906 /* do TSO and check sum */
1907 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1908 dev_kfree_skb_any(skb);
1909 return NETDEV_TX_OK;
1910 }
1911
1912 if (atl1e_tx_map(adapter, skb, tpd)) {
1913 dev_kfree_skb_any(skb);
1914 goto out;
1915 }
1916
1917 atl1e_tx_queue(adapter, tpd_req, tpd);
1918 out:
1919 return NETDEV_TX_OK;
1920 }
1921
1922 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1923 {
1924 struct net_device *netdev = adapter->netdev;
1925
1926 free_irq(adapter->pdev->irq, netdev);
1927 }
1928
1929 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1930 {
1931 struct pci_dev *pdev = adapter->pdev;
1932 struct net_device *netdev = adapter->netdev;
1933 int err = 0;
1934
1935 err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED, netdev->name,
1936 netdev);
1937 if (err) {
1938 netdev_dbg(adapter->netdev,
1939 "Unable to allocate interrupt Error: %d\n", err);
1940 return err;
1941 }
1942 netdev_dbg(netdev, "atl1e_request_irq OK\n");
1943 return err;
1944 }
1945
1946 int atl1e_up(struct atl1e_adapter *adapter)
1947 {
1948 struct net_device *netdev = adapter->netdev;
1949 int err = 0;
1950 u32 val;
1951
1952 /* hardware has been reset, we need to reload some things */
1953 err = atl1e_init_hw(&adapter->hw);
1954 if (err) {
1955 err = -EIO;
1956 return err;
1957 }
1958 atl1e_init_ring_ptrs(adapter);
1959 atl1e_set_multi(netdev);
1960 atl1e_restore_vlan(adapter);
1961
1962 if (atl1e_configure(adapter)) {
1963 err = -EIO;
1964 goto err_up;
1965 }
1966
1967 clear_bit(__AT_DOWN, &adapter->flags);
1968 napi_enable(&adapter->napi);
1969 atl1e_irq_enable(adapter);
1970 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1971 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1972 val | MASTER_CTRL_MANUAL_INT);
1973
1974 err_up:
1975 return err;
1976 }
1977
1978 void atl1e_down(struct atl1e_adapter *adapter)
1979 {
1980 struct net_device *netdev = adapter->netdev;
1981
1982 /* signal that we're down so the interrupt handler does not
1983 * reschedule our watchdog timer */
1984 set_bit(__AT_DOWN, &adapter->flags);
1985
1986 netif_stop_queue(netdev);
1987
1988 /* reset MAC to disable all RX/TX */
1989 atl1e_reset_hw(&adapter->hw);
1990 msleep(1);
1991
1992 napi_disable(&adapter->napi);
1993 atl1e_del_timer(adapter);
1994 atl1e_irq_disable(adapter);
1995
1996 netif_carrier_off(netdev);
1997 adapter->link_speed = SPEED_0;
1998 adapter->link_duplex = -1;
1999 atl1e_clean_tx_ring(adapter);
2000 atl1e_clean_rx_ring(adapter);
2001 }
2002
2003 /**
2004 * atl1e_open - Called when a network interface is made active
2005 * @netdev: network interface device structure
2006 *
2007 * Returns 0 on success, negative value on failure
2008 *
2009 * The open entry point is called when a network interface is made
2010 * active by the system (IFF_UP). At this point all resources needed
2011 * for transmit and receive operations are allocated, the interrupt
2012 * handler is registered with the OS, the watchdog timer is started,
2013 * and the stack is notified that the interface is ready.
2014 */
2015 static int atl1e_open(struct net_device *netdev)
2016 {
2017 struct atl1e_adapter *adapter = netdev_priv(netdev);
2018 int err;
2019
2020 /* disallow open during test */
2021 if (test_bit(__AT_TESTING, &adapter->flags))
2022 return -EBUSY;
2023
2024 /* allocate rx/tx dma buffer & descriptors */
2025 atl1e_init_ring_resources(adapter);
2026 err = atl1e_setup_ring_resources(adapter);
2027 if (unlikely(err))
2028 return err;
2029
2030 err = atl1e_request_irq(adapter);
2031 if (unlikely(err))
2032 goto err_req_irq;
2033
2034 err = atl1e_up(adapter);
2035 if (unlikely(err))
2036 goto err_up;
2037
2038 return 0;
2039
2040 err_up:
2041 atl1e_free_irq(adapter);
2042 err_req_irq:
2043 atl1e_free_ring_resources(adapter);
2044 atl1e_reset_hw(&adapter->hw);
2045
2046 return err;
2047 }
2048
2049 /**
2050 * atl1e_close - Disables a network interface
2051 * @netdev: network interface device structure
2052 *
2053 * Returns 0, this is not allowed to fail
2054 *
2055 * The close entry point is called when an interface is de-activated
2056 * by the OS. The hardware is still under the drivers control, but
2057 * needs to be disabled. A global MAC reset is issued to stop the
2058 * hardware, and all transmit and receive resources are freed.
2059 */
2060 static int atl1e_close(struct net_device *netdev)
2061 {
2062 struct atl1e_adapter *adapter = netdev_priv(netdev);
2063
2064 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2065 atl1e_down(adapter);
2066 atl1e_free_irq(adapter);
2067 atl1e_free_ring_resources(adapter);
2068
2069 return 0;
2070 }
2071
2072 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2073 {
2074 struct net_device *netdev = pci_get_drvdata(pdev);
2075 struct atl1e_adapter *adapter = netdev_priv(netdev);
2076 struct atl1e_hw *hw = &adapter->hw;
2077 u32 ctrl = 0;
2078 u32 mac_ctrl_data = 0;
2079 u32 wol_ctrl_data = 0;
2080 u16 mii_advertise_data = 0;
2081 u16 mii_bmsr_data = 0;
2082 u16 mii_intr_status_data = 0;
2083 u32 wufc = adapter->wol;
2084 u32 i;
2085 #ifdef CONFIG_PM
2086 int retval = 0;
2087 #endif
2088
2089 if (netif_running(netdev)) {
2090 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2091 atl1e_down(adapter);
2092 }
2093 netif_device_detach(netdev);
2094
2095 #ifdef CONFIG_PM
2096 retval = pci_save_state(pdev);
2097 if (retval)
2098 return retval;
2099 #endif
2100
2101 if (wufc) {
2102 /* get link status */
2103 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2104 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2105
2106 mii_advertise_data = ADVERTISE_10HALF;
2107
2108 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) ||
2109 (atl1e_write_phy_reg(hw,
2110 MII_ADVERTISE, mii_advertise_data) != 0) ||
2111 (atl1e_phy_commit(hw)) != 0) {
2112 netdev_dbg(adapter->netdev, "set phy register failed\n");
2113 goto wol_dis;
2114 }
2115
2116 hw->phy_configured = false; /* re-init PHY when resume */
2117
2118 /* turn on magic packet wol */
2119 if (wufc & AT_WUFC_MAG)
2120 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2121
2122 if (wufc & AT_WUFC_LNKC) {
2123 /* if orignal link status is link, just wait for retrive link */
2124 if (mii_bmsr_data & BMSR_LSTATUS) {
2125 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2126 msleep(100);
2127 atl1e_read_phy_reg(hw, MII_BMSR,
2128 &mii_bmsr_data);
2129 if (mii_bmsr_data & BMSR_LSTATUS)
2130 break;
2131 }
2132
2133 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2134 netdev_dbg(adapter->netdev,
2135 "Link may change when suspend\n");
2136 }
2137 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2138 /* only link up can wake up */
2139 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2140 netdev_dbg(adapter->netdev,
2141 "read write phy register failed\n");
2142 goto wol_dis;
2143 }
2144 }
2145 /* clear phy interrupt */
2146 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2147 /* Config MAC Ctrl register */
2148 mac_ctrl_data = MAC_CTRL_RX_EN;
2149 /* set to 10/100M halt duplex */
2150 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2151 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2152 MAC_CTRL_PRMLEN_MASK) <<
2153 MAC_CTRL_PRMLEN_SHIFT);
2154
2155 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data);
2156
2157 /* magic packet maybe Broadcast&multicast&Unicast frame */
2158 if (wufc & AT_WUFC_MAG)
2159 mac_ctrl_data |= MAC_CTRL_BC_EN;
2160
2161 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2162 mac_ctrl_data);
2163
2164 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2165 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2166 /* pcie patch */
2167 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2168 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2169 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2170 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2171 goto suspend_exit;
2172 }
2173 wol_dis:
2174
2175 /* WOL disabled */
2176 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2177
2178 /* pcie patch */
2179 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2180 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2181 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2182
2183 atl1e_force_ps(hw);
2184 hw->phy_configured = false; /* re-init PHY when resume */
2185
2186 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2187
2188 suspend_exit:
2189
2190 if (netif_running(netdev))
2191 atl1e_free_irq(adapter);
2192
2193 pci_disable_device(pdev);
2194
2195 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2196
2197 return 0;
2198 }
2199
2200 #ifdef CONFIG_PM
2201 static int atl1e_resume(struct pci_dev *pdev)
2202 {
2203 struct net_device *netdev = pci_get_drvdata(pdev);
2204 struct atl1e_adapter *adapter = netdev_priv(netdev);
2205 u32 err;
2206
2207 pci_set_power_state(pdev, PCI_D0);
2208 pci_restore_state(pdev);
2209
2210 err = pci_enable_device(pdev);
2211 if (err) {
2212 netdev_err(adapter->netdev,
2213 "Cannot enable PCI device from suspend\n");
2214 return err;
2215 }
2216
2217 pci_set_master(pdev);
2218
2219 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2220
2221 pci_enable_wake(pdev, PCI_D3hot, 0);
2222 pci_enable_wake(pdev, PCI_D3cold, 0);
2223
2224 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2225
2226 if (netif_running(netdev)) {
2227 err = atl1e_request_irq(adapter);
2228 if (err)
2229 return err;
2230 }
2231
2232 atl1e_reset_hw(&adapter->hw);
2233
2234 if (netif_running(netdev))
2235 atl1e_up(adapter);
2236
2237 netif_device_attach(netdev);
2238
2239 return 0;
2240 }
2241 #endif
2242
2243 static void atl1e_shutdown(struct pci_dev *pdev)
2244 {
2245 atl1e_suspend(pdev, PMSG_SUSPEND);
2246 }
2247
2248 static const struct net_device_ops atl1e_netdev_ops = {
2249 .ndo_open = atl1e_open,
2250 .ndo_stop = atl1e_close,
2251 .ndo_start_xmit = atl1e_xmit_frame,
2252 .ndo_get_stats = atl1e_get_stats,
2253 .ndo_set_rx_mode = atl1e_set_multi,
2254 .ndo_validate_addr = eth_validate_addr,
2255 .ndo_set_mac_address = atl1e_set_mac_addr,
2256 .ndo_fix_features = atl1e_fix_features,
2257 .ndo_set_features = atl1e_set_features,
2258 .ndo_change_mtu = atl1e_change_mtu,
2259 .ndo_do_ioctl = atl1e_ioctl,
2260 .ndo_tx_timeout = atl1e_tx_timeout,
2261 #ifdef CONFIG_NET_POLL_CONTROLLER
2262 .ndo_poll_controller = atl1e_netpoll,
2263 #endif
2264
2265 };
2266
2267 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2268 {
2269 SET_NETDEV_DEV(netdev, &pdev->dev);
2270 pci_set_drvdata(pdev, netdev);
2271
2272 netdev->netdev_ops = &atl1e_netdev_ops;
2273
2274 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2275 atl1e_set_ethtool_ops(netdev);
2276
2277 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
2278 NETIF_F_HW_VLAN_CTAG_RX;
2279 netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_TX;
2280 /* not enabled by default */
2281 netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS;
2282 return 0;
2283 }
2284
2285 /**
2286 * atl1e_probe - Device Initialization Routine
2287 * @pdev: PCI device information struct
2288 * @ent: entry in atl1e_pci_tbl
2289 *
2290 * Returns 0 on success, negative on failure
2291 *
2292 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2293 * The OS initialization, configuring of the adapter private structure,
2294 * and a hardware reset occur.
2295 */
2296 static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2297 {
2298 struct net_device *netdev;
2299 struct atl1e_adapter *adapter = NULL;
2300 static int cards_found;
2301
2302 int err = 0;
2303
2304 err = pci_enable_device(pdev);
2305 if (err) {
2306 dev_err(&pdev->dev, "cannot enable PCI device\n");
2307 return err;
2308 }
2309
2310 /*
2311 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2312 * shared register for the high 32 bits, so only a single, aligned,
2313 * 4 GB physical address range can be used at a time.
2314 *
2315 * Supporting 64-bit DMA on this hardware is more trouble than it's
2316 * worth. It is far easier to limit to 32-bit DMA than update
2317 * various kernel subsystems to support the mechanics required by a
2318 * fixed-high-32-bit system.
2319 */
2320 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2321 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2322 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2323 goto err_dma;
2324 }
2325
2326 err = pci_request_regions(pdev, atl1e_driver_name);
2327 if (err) {
2328 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2329 goto err_pci_reg;
2330 }
2331
2332 pci_set_master(pdev);
2333
2334 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2335 if (netdev == NULL) {
2336 err = -ENOMEM;
2337 goto err_alloc_etherdev;
2338 }
2339
2340 err = atl1e_init_netdev(netdev, pdev);
2341 if (err) {
2342 netdev_err(netdev, "init netdevice failed\n");
2343 goto err_init_netdev;
2344 }
2345 adapter = netdev_priv(netdev);
2346 adapter->bd_number = cards_found;
2347 adapter->netdev = netdev;
2348 adapter->pdev = pdev;
2349 adapter->hw.adapter = adapter;
2350 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2351 if (!adapter->hw.hw_addr) {
2352 err = -EIO;
2353 netdev_err(netdev, "cannot map device registers\n");
2354 goto err_ioremap;
2355 }
2356
2357 /* init mii data */
2358 adapter->mii.dev = netdev;
2359 adapter->mii.mdio_read = atl1e_mdio_read;
2360 adapter->mii.mdio_write = atl1e_mdio_write;
2361 adapter->mii.phy_id_mask = 0x1f;
2362 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2363
2364 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2365
2366 setup_timer(&adapter->phy_config_timer, atl1e_phy_config,
2367 (unsigned long)adapter);
2368
2369 /* get user settings */
2370 atl1e_check_options(adapter);
2371 /*
2372 * Mark all PCI regions associated with PCI device
2373 * pdev as being reserved by owner atl1e_driver_name
2374 * Enables bus-mastering on the device and calls
2375 * pcibios_set_master to do the needed arch specific settings
2376 */
2377 atl1e_setup_pcicmd(pdev);
2378 /* setup the private structure */
2379 err = atl1e_sw_init(adapter);
2380 if (err) {
2381 netdev_err(netdev, "net device private data init failed\n");
2382 goto err_sw_init;
2383 }
2384
2385 /* Init GPHY as early as possible due to power saving issue */
2386 atl1e_phy_init(&adapter->hw);
2387 /* reset the controller to
2388 * put the device in a known good starting state */
2389 err = atl1e_reset_hw(&adapter->hw);
2390 if (err) {
2391 err = -EIO;
2392 goto err_reset;
2393 }
2394
2395 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2396 err = -EIO;
2397 netdev_err(netdev, "get mac address failed\n");
2398 goto err_eeprom;
2399 }
2400
2401 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2402 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
2403
2404 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2405 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2406 netif_set_gso_max_size(netdev, MAX_TSO_SEG_SIZE);
2407 err = register_netdev(netdev);
2408 if (err) {
2409 netdev_err(netdev, "register netdevice failed\n");
2410 goto err_register;
2411 }
2412
2413 /* assume we have no link for now */
2414 netif_stop_queue(netdev);
2415 netif_carrier_off(netdev);
2416
2417 cards_found++;
2418
2419 return 0;
2420
2421 err_reset:
2422 err_register:
2423 err_sw_init:
2424 err_eeprom:
2425 pci_iounmap(pdev, adapter->hw.hw_addr);
2426 err_init_netdev:
2427 err_ioremap:
2428 free_netdev(netdev);
2429 err_alloc_etherdev:
2430 pci_release_regions(pdev);
2431 err_pci_reg:
2432 err_dma:
2433 pci_disable_device(pdev);
2434 return err;
2435 }
2436
2437 /**
2438 * atl1e_remove - Device Removal Routine
2439 * @pdev: PCI device information struct
2440 *
2441 * atl1e_remove is called by the PCI subsystem to alert the driver
2442 * that it should release a PCI device. The could be caused by a
2443 * Hot-Plug event, or because the driver is going to be removed from
2444 * memory.
2445 */
2446 static void atl1e_remove(struct pci_dev *pdev)
2447 {
2448 struct net_device *netdev = pci_get_drvdata(pdev);
2449 struct atl1e_adapter *adapter = netdev_priv(netdev);
2450
2451 /*
2452 * flush_scheduled work may reschedule our watchdog task, so
2453 * explicitly disable watchdog tasks from being rescheduled
2454 */
2455 set_bit(__AT_DOWN, &adapter->flags);
2456
2457 atl1e_del_timer(adapter);
2458 atl1e_cancel_work(adapter);
2459
2460 unregister_netdev(netdev);
2461 atl1e_free_ring_resources(adapter);
2462 atl1e_force_ps(&adapter->hw);
2463 pci_iounmap(pdev, adapter->hw.hw_addr);
2464 pci_release_regions(pdev);
2465 free_netdev(netdev);
2466 pci_disable_device(pdev);
2467 }
2468
2469 /**
2470 * atl1e_io_error_detected - called when PCI error is detected
2471 * @pdev: Pointer to PCI device
2472 * @state: The current pci connection state
2473 *
2474 * This function is called after a PCI bus error affecting
2475 * this device has been detected.
2476 */
2477 static pci_ers_result_t
2478 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2479 {
2480 struct net_device *netdev = pci_get_drvdata(pdev);
2481 struct atl1e_adapter *adapter = netdev_priv(netdev);
2482
2483 netif_device_detach(netdev);
2484
2485 if (state == pci_channel_io_perm_failure)
2486 return PCI_ERS_RESULT_DISCONNECT;
2487
2488 if (netif_running(netdev))
2489 atl1e_down(adapter);
2490
2491 pci_disable_device(pdev);
2492
2493 /* Request a slot slot reset. */
2494 return PCI_ERS_RESULT_NEED_RESET;
2495 }
2496
2497 /**
2498 * atl1e_io_slot_reset - called after the pci bus has been reset.
2499 * @pdev: Pointer to PCI device
2500 *
2501 * Restart the card from scratch, as if from a cold-boot. Implementation
2502 * resembles the first-half of the e1000_resume routine.
2503 */
2504 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2505 {
2506 struct net_device *netdev = pci_get_drvdata(pdev);
2507 struct atl1e_adapter *adapter = netdev_priv(netdev);
2508
2509 if (pci_enable_device(pdev)) {
2510 netdev_err(adapter->netdev,
2511 "Cannot re-enable PCI device after reset\n");
2512 return PCI_ERS_RESULT_DISCONNECT;
2513 }
2514 pci_set_master(pdev);
2515
2516 pci_enable_wake(pdev, PCI_D3hot, 0);
2517 pci_enable_wake(pdev, PCI_D3cold, 0);
2518
2519 atl1e_reset_hw(&adapter->hw);
2520
2521 return PCI_ERS_RESULT_RECOVERED;
2522 }
2523
2524 /**
2525 * atl1e_io_resume - called when traffic can start flowing again.
2526 * @pdev: Pointer to PCI device
2527 *
2528 * This callback is called when the error recovery driver tells us that
2529 * its OK to resume normal operation. Implementation resembles the
2530 * second-half of the atl1e_resume routine.
2531 */
2532 static void atl1e_io_resume(struct pci_dev *pdev)
2533 {
2534 struct net_device *netdev = pci_get_drvdata(pdev);
2535 struct atl1e_adapter *adapter = netdev_priv(netdev);
2536
2537 if (netif_running(netdev)) {
2538 if (atl1e_up(adapter)) {
2539 netdev_err(adapter->netdev,
2540 "can't bring device back up after reset\n");
2541 return;
2542 }
2543 }
2544
2545 netif_device_attach(netdev);
2546 }
2547
2548 static const struct pci_error_handlers atl1e_err_handler = {
2549 .error_detected = atl1e_io_error_detected,
2550 .slot_reset = atl1e_io_slot_reset,
2551 .resume = atl1e_io_resume,
2552 };
2553
2554 static struct pci_driver atl1e_driver = {
2555 .name = atl1e_driver_name,
2556 .id_table = atl1e_pci_tbl,
2557 .probe = atl1e_probe,
2558 .remove = atl1e_remove,
2559 /* Power Management Hooks */
2560 #ifdef CONFIG_PM
2561 .suspend = atl1e_suspend,
2562 .resume = atl1e_resume,
2563 #endif
2564 .shutdown = atl1e_shutdown,
2565 .err_handler = &atl1e_err_handler
2566 };
2567
2568 module_pci_driver(atl1e_driver);
Linux kernel - Deliverables
This page took 0.138048 seconds and 5 git commands to generate.