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ethernet: Remove casts to same type
[deliverable/linux.git] / drivers / net / ethernet / atheros / atl1e / atl1e_main.c
1 /*
2 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1e.h"
23
24 #define DRV_VERSION "1.0.0.7-NAPI"
25
26 char atl1e_driver_name[] = "ATL1E";
27 char atl1e_driver_version[] = DRV_VERSION;
28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
29 /*
30 * atl1e_pci_tbl - PCI Device ID Table
31 *
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
34 *
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
37 */
38 static DEFINE_PCI_DEVICE_TABLE(atl1e_pci_tbl) = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
41 /* required last entry */
42 { 0 }
43 };
44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
45
46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48 MODULE_LICENSE("GPL");
49 MODULE_VERSION(DRV_VERSION);
50
51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
52
53 static const u16
54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55 {
56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
60 };
61
62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
63 {
64 REG_RXF0_BASE_ADDR_HI,
65 REG_RXF1_BASE_ADDR_HI,
66 REG_RXF2_BASE_ADDR_HI,
67 REG_RXF3_BASE_ADDR_HI
68 };
69
70 static const u16
71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
72 {
73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
77 };
78
79 static const u16
80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
81 {
82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
86 };
87
88 static const u16 atl1e_pay_load_size[] = {
89 128, 256, 512, 1024, 2048, 4096,
90 };
91
92 /*
93 * atl1e_irq_enable - Enable default interrupt generation settings
94 * @adapter: board private structure
95 */
96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
97 {
98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
101 AT_WRITE_FLUSH(&adapter->hw);
102 }
103 }
104
105 /*
106 * atl1e_irq_disable - Mask off interrupt generation on the NIC
107 * @adapter: board private structure
108 */
109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
110 {
111 atomic_inc(&adapter->irq_sem);
112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
113 AT_WRITE_FLUSH(&adapter->hw);
114 synchronize_irq(adapter->pdev->irq);
115 }
116
117 /*
118 * atl1e_irq_reset - reset interrupt confiure on the NIC
119 * @adapter: board private structure
120 */
121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
122 {
123 atomic_set(&adapter->irq_sem, 0);
124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
126 AT_WRITE_FLUSH(&adapter->hw);
127 }
128
129 /*
130 * atl1e_phy_config - Timer Call-back
131 * @data: pointer to netdev cast into an unsigned long
132 */
133 static void atl1e_phy_config(unsigned long data)
134 {
135 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
136 struct atl1e_hw *hw = &adapter->hw;
137 unsigned long flags;
138
139 spin_lock_irqsave(&adapter->mdio_lock, flags);
140 atl1e_restart_autoneg(hw);
141 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
142 }
143
144 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
145 {
146
147 WARN_ON(in_interrupt());
148 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
149 msleep(1);
150 atl1e_down(adapter);
151 atl1e_up(adapter);
152 clear_bit(__AT_RESETTING, &adapter->flags);
153 }
154
155 static void atl1e_reset_task(struct work_struct *work)
156 {
157 struct atl1e_adapter *adapter;
158 adapter = container_of(work, struct atl1e_adapter, reset_task);
159
160 atl1e_reinit_locked(adapter);
161 }
162
163 static int atl1e_check_link(struct atl1e_adapter *adapter)
164 {
165 struct atl1e_hw *hw = &adapter->hw;
166 struct net_device *netdev = adapter->netdev;
167 int err = 0;
168 u16 speed, duplex, phy_data;
169
170 /* MII_BMSR must read twice */
171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
173 if ((phy_data & BMSR_LSTATUS) == 0) {
174 /* link down */
175 if (netif_carrier_ok(netdev)) { /* old link state: Up */
176 u32 value;
177 /* disable rx */
178 value = AT_READ_REG(hw, REG_MAC_CTRL);
179 value &= ~MAC_CTRL_RX_EN;
180 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
181 adapter->link_speed = SPEED_0;
182 netif_carrier_off(netdev);
183 netif_stop_queue(netdev);
184 }
185 } else {
186 /* Link Up */
187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
188 if (unlikely(err))
189 return err;
190
191 /* link result is our setting */
192 if (adapter->link_speed != speed ||
193 adapter->link_duplex != duplex) {
194 adapter->link_speed = speed;
195 adapter->link_duplex = duplex;
196 atl1e_setup_mac_ctrl(adapter);
197 netdev_info(netdev,
198 "NIC Link is Up <%d Mbps %s Duplex>\n",
199 adapter->link_speed,
200 adapter->link_duplex == FULL_DUPLEX ?
201 "Full" : "Half");
202 }
203
204 if (!netif_carrier_ok(netdev)) {
205 /* Link down -> Up */
206 netif_carrier_on(netdev);
207 netif_wake_queue(netdev);
208 }
209 }
210 return 0;
211 }
212
213 /*
214 * atl1e_link_chg_task - deal with link change event Out of interrupt context
215 * @netdev: network interface device structure
216 */
217 static void atl1e_link_chg_task(struct work_struct *work)
218 {
219 struct atl1e_adapter *adapter;
220 unsigned long flags;
221
222 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
223 spin_lock_irqsave(&adapter->mdio_lock, flags);
224 atl1e_check_link(adapter);
225 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
226 }
227
228 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
229 {
230 struct net_device *netdev = adapter->netdev;
231 u16 phy_data = 0;
232 u16 link_up = 0;
233
234 spin_lock(&adapter->mdio_lock);
235 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
237 spin_unlock(&adapter->mdio_lock);
238 link_up = phy_data & BMSR_LSTATUS;
239 /* notify upper layer link down ASAP */
240 if (!link_up) {
241 if (netif_carrier_ok(netdev)) {
242 /* old link state: Up */
243 netdev_info(netdev, "NIC Link is Down\n");
244 adapter->link_speed = SPEED_0;
245 netif_stop_queue(netdev);
246 }
247 }
248 schedule_work(&adapter->link_chg_task);
249 }
250
251 static void atl1e_del_timer(struct atl1e_adapter *adapter)
252 {
253 del_timer_sync(&adapter->phy_config_timer);
254 }
255
256 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
257 {
258 cancel_work_sync(&adapter->reset_task);
259 cancel_work_sync(&adapter->link_chg_task);
260 }
261
262 /*
263 * atl1e_tx_timeout - Respond to a Tx Hang
264 * @netdev: network interface device structure
265 */
266 static void atl1e_tx_timeout(struct net_device *netdev)
267 {
268 struct atl1e_adapter *adapter = netdev_priv(netdev);
269
270 /* Do the reset outside of interrupt context */
271 schedule_work(&adapter->reset_task);
272 }
273
274 /*
275 * atl1e_set_multi - Multicast and Promiscuous mode set
276 * @netdev: network interface device structure
277 *
278 * The set_multi entry point is called whenever the multicast address
279 * list or the network interface flags are updated. This routine is
280 * responsible for configuring the hardware for proper multicast,
281 * promiscuous mode, and all-multi behavior.
282 */
283 static void atl1e_set_multi(struct net_device *netdev)
284 {
285 struct atl1e_adapter *adapter = netdev_priv(netdev);
286 struct atl1e_hw *hw = &adapter->hw;
287 struct netdev_hw_addr *ha;
288 u32 mac_ctrl_data = 0;
289 u32 hash_value;
290
291 /* Check for Promiscuous and All Multicast modes */
292 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
293
294 if (netdev->flags & IFF_PROMISC) {
295 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
296 } else if (netdev->flags & IFF_ALLMULTI) {
297 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
298 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
299 } else {
300 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
301 }
302
303 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
304
305 /* clear the old settings from the multicast hash table */
306 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
307 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
308
309 /* comoute mc addresses' hash value ,and put it into hash table */
310 netdev_for_each_mc_addr(ha, netdev) {
311 hash_value = atl1e_hash_mc_addr(hw, ha->addr);
312 atl1e_hash_set(hw, hash_value);
313 }
314 }
315
316 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
317 {
318 if (features & NETIF_F_HW_VLAN_RX) {
319 /* enable VLAN tag insert/strip */
320 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
321 } else {
322 /* disable VLAN tag insert/strip */
323 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
324 }
325 }
326
327 static void atl1e_vlan_mode(struct net_device *netdev,
328 netdev_features_t features)
329 {
330 struct atl1e_adapter *adapter = netdev_priv(netdev);
331 u32 mac_ctrl_data = 0;
332
333 netdev_dbg(adapter->netdev, "%s\n", __func__);
334
335 atl1e_irq_disable(adapter);
336 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
337 __atl1e_vlan_mode(features, &mac_ctrl_data);
338 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
339 atl1e_irq_enable(adapter);
340 }
341
342 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
343 {
344 netdev_dbg(adapter->netdev, "%s\n", __func__);
345 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features);
346 }
347
348 /*
349 * atl1e_set_mac - Change the Ethernet Address of the NIC
350 * @netdev: network interface device structure
351 * @p: pointer to an address structure
352 *
353 * Returns 0 on success, negative on failure
354 */
355 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
356 {
357 struct atl1e_adapter *adapter = netdev_priv(netdev);
358 struct sockaddr *addr = p;
359
360 if (!is_valid_ether_addr(addr->sa_data))
361 return -EADDRNOTAVAIL;
362
363 if (netif_running(netdev))
364 return -EBUSY;
365
366 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
367 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
368
369 atl1e_hw_set_mac_addr(&adapter->hw);
370
371 return 0;
372 }
373
374 static netdev_features_t atl1e_fix_features(struct net_device *netdev,
375 netdev_features_t features)
376 {
377 /*
378 * Since there is no support for separate rx/tx vlan accel
379 * enable/disable make sure tx flag is always in same state as rx.
380 */
381 if (features & NETIF_F_HW_VLAN_RX)
382 features |= NETIF_F_HW_VLAN_TX;
383 else
384 features &= ~NETIF_F_HW_VLAN_TX;
385
386 return features;
387 }
388
389 static int atl1e_set_features(struct net_device *netdev,
390 netdev_features_t features)
391 {
392 netdev_features_t changed = netdev->features ^ features;
393
394 if (changed & NETIF_F_HW_VLAN_RX)
395 atl1e_vlan_mode(netdev, features);
396
397 return 0;
398 }
399
400 /*
401 * atl1e_change_mtu - Change the Maximum Transfer Unit
402 * @netdev: network interface device structure
403 * @new_mtu: new value for maximum frame size
404 *
405 * Returns 0 on success, negative on failure
406 */
407 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
408 {
409 struct atl1e_adapter *adapter = netdev_priv(netdev);
410 int old_mtu = netdev->mtu;
411 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
412
413 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
414 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
415 netdev_warn(adapter->netdev, "invalid MTU setting\n");
416 return -EINVAL;
417 }
418 /* set MTU */
419 if (old_mtu != new_mtu && netif_running(netdev)) {
420 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
421 msleep(1);
422 netdev->mtu = new_mtu;
423 adapter->hw.max_frame_size = new_mtu;
424 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
425 atl1e_down(adapter);
426 atl1e_up(adapter);
427 clear_bit(__AT_RESETTING, &adapter->flags);
428 }
429 return 0;
430 }
431
432 /*
433 * caller should hold mdio_lock
434 */
435 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
436 {
437 struct atl1e_adapter *adapter = netdev_priv(netdev);
438 u16 result;
439
440 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
441 return result;
442 }
443
444 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
445 int reg_num, int val)
446 {
447 struct atl1e_adapter *adapter = netdev_priv(netdev);
448
449 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
450 }
451
452 /*
453 * atl1e_mii_ioctl -
454 * @netdev:
455 * @ifreq:
456 * @cmd:
457 */
458 static int atl1e_mii_ioctl(struct net_device *netdev,
459 struct ifreq *ifr, int cmd)
460 {
461 struct atl1e_adapter *adapter = netdev_priv(netdev);
462 struct mii_ioctl_data *data = if_mii(ifr);
463 unsigned long flags;
464 int retval = 0;
465
466 if (!netif_running(netdev))
467 return -EINVAL;
468
469 spin_lock_irqsave(&adapter->mdio_lock, flags);
470 switch (cmd) {
471 case SIOCGMIIPHY:
472 data->phy_id = 0;
473 break;
474
475 case SIOCGMIIREG:
476 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
477 &data->val_out)) {
478 retval = -EIO;
479 goto out;
480 }
481 break;
482
483 case SIOCSMIIREG:
484 if (data->reg_num & ~(0x1F)) {
485 retval = -EFAULT;
486 goto out;
487 }
488
489 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
490 data->reg_num, data->val_in);
491 if (atl1e_write_phy_reg(&adapter->hw,
492 data->reg_num, data->val_in)) {
493 retval = -EIO;
494 goto out;
495 }
496 break;
497
498 default:
499 retval = -EOPNOTSUPP;
500 break;
501 }
502 out:
503 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
504 return retval;
505
506 }
507
508 /*
509 * atl1e_ioctl -
510 * @netdev:
511 * @ifreq:
512 * @cmd:
513 */
514 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
515 {
516 switch (cmd) {
517 case SIOCGMIIPHY:
518 case SIOCGMIIREG:
519 case SIOCSMIIREG:
520 return atl1e_mii_ioctl(netdev, ifr, cmd);
521 default:
522 return -EOPNOTSUPP;
523 }
524 }
525
526 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
527 {
528 u16 cmd;
529
530 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
531 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
532 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
533 pci_write_config_word(pdev, PCI_COMMAND, cmd);
534
535 /*
536 * some motherboards BIOS(PXE/EFI) driver may set PME
537 * while they transfer control to OS (Windows/Linux)
538 * so we should clear this bit before NIC work normally
539 */
540 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
541 msleep(1);
542 }
543
544 /*
545 * atl1e_alloc_queues - Allocate memory for all rings
546 * @adapter: board private structure to initialize
547 *
548 */
549 static int __devinit atl1e_alloc_queues(struct atl1e_adapter *adapter)
550 {
551 return 0;
552 }
553
554 /*
555 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
556 * @adapter: board private structure to initialize
557 *
558 * atl1e_sw_init initializes the Adapter private data structure.
559 * Fields are initialized based on PCI device information and
560 * OS network device settings (MTU size).
561 */
562 static int __devinit atl1e_sw_init(struct atl1e_adapter *adapter)
563 {
564 struct atl1e_hw *hw = &adapter->hw;
565 struct pci_dev *pdev = adapter->pdev;
566 u32 phy_status_data = 0;
567
568 adapter->wol = 0;
569 adapter->link_speed = SPEED_0; /* hardware init */
570 adapter->link_duplex = FULL_DUPLEX;
571 adapter->num_rx_queues = 1;
572
573 /* PCI config space info */
574 hw->vendor_id = pdev->vendor;
575 hw->device_id = pdev->device;
576 hw->subsystem_vendor_id = pdev->subsystem_vendor;
577 hw->subsystem_id = pdev->subsystem_device;
578 hw->revision_id = pdev->revision;
579
580 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
581
582 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
583 /* nic type */
584 if (hw->revision_id >= 0xF0) {
585 hw->nic_type = athr_l2e_revB;
586 } else {
587 if (phy_status_data & PHY_STATUS_100M)
588 hw->nic_type = athr_l1e;
589 else
590 hw->nic_type = athr_l2e_revA;
591 }
592
593 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
594
595 if (phy_status_data & PHY_STATUS_EMI_CA)
596 hw->emi_ca = true;
597 else
598 hw->emi_ca = false;
599
600 hw->phy_configured = false;
601 hw->preamble_len = 7;
602 hw->max_frame_size = adapter->netdev->mtu;
603 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
604 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
605
606 hw->rrs_type = atl1e_rrs_disable;
607 hw->indirect_tab = 0;
608 hw->base_cpu = 0;
609
610 /* need confirm */
611
612 hw->ict = 50000; /* 100ms */
613 hw->smb_timer = 200000; /* 200ms */
614 hw->tpd_burst = 5;
615 hw->rrd_thresh = 1;
616 hw->tpd_thresh = adapter->tx_ring.count / 2;
617 hw->rx_count_down = 4; /* 2us resolution */
618 hw->tx_count_down = hw->imt * 4 / 3;
619 hw->dmar_block = atl1e_dma_req_1024;
620 hw->dmaw_block = atl1e_dma_req_1024;
621 hw->dmar_dly_cnt = 15;
622 hw->dmaw_dly_cnt = 4;
623
624 if (atl1e_alloc_queues(adapter)) {
625 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n");
626 return -ENOMEM;
627 }
628
629 atomic_set(&adapter->irq_sem, 1);
630 spin_lock_init(&adapter->mdio_lock);
631 spin_lock_init(&adapter->tx_lock);
632
633 set_bit(__AT_DOWN, &adapter->flags);
634
635 return 0;
636 }
637
638 /*
639 * atl1e_clean_tx_ring - Free Tx-skb
640 * @adapter: board private structure
641 */
642 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
643 {
644 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
645 struct atl1e_tx_buffer *tx_buffer = NULL;
646 struct pci_dev *pdev = adapter->pdev;
647 u16 index, ring_count;
648
649 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
650 return;
651
652 ring_count = tx_ring->count;
653 /* first unmmap dma */
654 for (index = 0; index < ring_count; index++) {
655 tx_buffer = &tx_ring->tx_buffer[index];
656 if (tx_buffer->dma) {
657 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
658 pci_unmap_single(pdev, tx_buffer->dma,
659 tx_buffer->length, PCI_DMA_TODEVICE);
660 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
661 pci_unmap_page(pdev, tx_buffer->dma,
662 tx_buffer->length, PCI_DMA_TODEVICE);
663 tx_buffer->dma = 0;
664 }
665 }
666 /* second free skb */
667 for (index = 0; index < ring_count; index++) {
668 tx_buffer = &tx_ring->tx_buffer[index];
669 if (tx_buffer->skb) {
670 dev_kfree_skb_any(tx_buffer->skb);
671 tx_buffer->skb = NULL;
672 }
673 }
674 /* Zero out Tx-buffers */
675 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
676 ring_count);
677 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
678 ring_count);
679 }
680
681 /*
682 * atl1e_clean_rx_ring - Free rx-reservation skbs
683 * @adapter: board private structure
684 */
685 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
686 {
687 struct atl1e_rx_ring *rx_ring =
688 &adapter->rx_ring;
689 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
690 u16 i, j;
691
692
693 if (adapter->ring_vir_addr == NULL)
694 return;
695 /* Zero out the descriptor ring */
696 for (i = 0; i < adapter->num_rx_queues; i++) {
697 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
698 if (rx_page_desc[i].rx_page[j].addr != NULL) {
699 memset(rx_page_desc[i].rx_page[j].addr, 0,
700 rx_ring->real_page_size);
701 }
702 }
703 }
704 }
705
706 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
707 {
708 *ring_size = ((u32)(adapter->tx_ring.count *
709 sizeof(struct atl1e_tpd_desc) + 7
710 /* tx ring, qword align */
711 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
712 adapter->num_rx_queues + 31
713 /* rx ring, 32 bytes align */
714 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
715 sizeof(u32) + 3));
716 /* tx, rx cmd, dword align */
717 }
718
719 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
720 {
721 struct atl1e_rx_ring *rx_ring = NULL;
722
723 rx_ring = &adapter->rx_ring;
724
725 rx_ring->real_page_size = adapter->rx_ring.page_size
726 + adapter->hw.max_frame_size
727 + ETH_HLEN + VLAN_HLEN
728 + ETH_FCS_LEN;
729 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
730 atl1e_cal_ring_size(adapter, &adapter->ring_size);
731
732 adapter->ring_vir_addr = NULL;
733 adapter->rx_ring.desc = NULL;
734 rwlock_init(&adapter->tx_ring.tx_lock);
735 }
736
737 /*
738 * Read / Write Ptr Initialize:
739 */
740 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
741 {
742 struct atl1e_tx_ring *tx_ring = NULL;
743 struct atl1e_rx_ring *rx_ring = NULL;
744 struct atl1e_rx_page_desc *rx_page_desc = NULL;
745 int i, j;
746
747 tx_ring = &adapter->tx_ring;
748 rx_ring = &adapter->rx_ring;
749 rx_page_desc = rx_ring->rx_page_desc;
750
751 tx_ring->next_to_use = 0;
752 atomic_set(&tx_ring->next_to_clean, 0);
753
754 for (i = 0; i < adapter->num_rx_queues; i++) {
755 rx_page_desc[i].rx_using = 0;
756 rx_page_desc[i].rx_nxseq = 0;
757 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
758 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
759 rx_page_desc[i].rx_page[j].read_offset = 0;
760 }
761 }
762 }
763
764 /*
765 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
766 * @adapter: board private structure
767 *
768 * Free all transmit software resources
769 */
770 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
771 {
772 struct pci_dev *pdev = adapter->pdev;
773
774 atl1e_clean_tx_ring(adapter);
775 atl1e_clean_rx_ring(adapter);
776
777 if (adapter->ring_vir_addr) {
778 pci_free_consistent(pdev, adapter->ring_size,
779 adapter->ring_vir_addr, adapter->ring_dma);
780 adapter->ring_vir_addr = NULL;
781 }
782
783 if (adapter->tx_ring.tx_buffer) {
784 kfree(adapter->tx_ring.tx_buffer);
785 adapter->tx_ring.tx_buffer = NULL;
786 }
787 }
788
789 /*
790 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
791 * @adapter: board private structure
792 *
793 * Return 0 on success, negative on failure
794 */
795 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
796 {
797 struct pci_dev *pdev = adapter->pdev;
798 struct atl1e_tx_ring *tx_ring;
799 struct atl1e_rx_ring *rx_ring;
800 struct atl1e_rx_page_desc *rx_page_desc;
801 int size, i, j;
802 u32 offset = 0;
803 int err = 0;
804
805 if (adapter->ring_vir_addr != NULL)
806 return 0; /* alloced already */
807
808 tx_ring = &adapter->tx_ring;
809 rx_ring = &adapter->rx_ring;
810
811 /* real ring DMA buffer */
812
813 size = adapter->ring_size;
814 adapter->ring_vir_addr = pci_alloc_consistent(pdev,
815 adapter->ring_size, &adapter->ring_dma);
816
817 if (adapter->ring_vir_addr == NULL) {
818 netdev_err(adapter->netdev,
819 "pci_alloc_consistent failed, size = D%d\n", size);
820 return -ENOMEM;
821 }
822
823 memset(adapter->ring_vir_addr, 0, adapter->ring_size);
824
825 rx_page_desc = rx_ring->rx_page_desc;
826
827 /* Init TPD Ring */
828 tx_ring->dma = roundup(adapter->ring_dma, 8);
829 offset = tx_ring->dma - adapter->ring_dma;
830 tx_ring->desc = adapter->ring_vir_addr + offset;
831 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
832 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
833 if (tx_ring->tx_buffer == NULL) {
834 netdev_err(adapter->netdev, "kzalloc failed, size = D%d\n",
835 size);
836 err = -ENOMEM;
837 goto failed;
838 }
839
840 /* Init RXF-Pages */
841 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
842 offset = roundup(offset, 32);
843
844 for (i = 0; i < adapter->num_rx_queues; i++) {
845 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
846 rx_page_desc[i].rx_page[j].dma =
847 adapter->ring_dma + offset;
848 rx_page_desc[i].rx_page[j].addr =
849 adapter->ring_vir_addr + offset;
850 offset += rx_ring->real_page_size;
851 }
852 }
853
854 /* Init CMB dma address */
855 tx_ring->cmb_dma = adapter->ring_dma + offset;
856 tx_ring->cmb = adapter->ring_vir_addr + offset;
857 offset += sizeof(u32);
858
859 for (i = 0; i < adapter->num_rx_queues; i++) {
860 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
861 rx_page_desc[i].rx_page[j].write_offset_dma =
862 adapter->ring_dma + offset;
863 rx_page_desc[i].rx_page[j].write_offset_addr =
864 adapter->ring_vir_addr + offset;
865 offset += sizeof(u32);
866 }
867 }
868
869 if (unlikely(offset > adapter->ring_size)) {
870 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
871 offset, adapter->ring_size);
872 err = -1;
873 goto failed;
874 }
875
876 return 0;
877 failed:
878 if (adapter->ring_vir_addr != NULL) {
879 pci_free_consistent(pdev, adapter->ring_size,
880 adapter->ring_vir_addr, adapter->ring_dma);
881 adapter->ring_vir_addr = NULL;
882 }
883 return err;
884 }
885
886 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter)
887 {
888
889 struct atl1e_hw *hw = &adapter->hw;
890 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
891 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
892 struct atl1e_rx_page_desc *rx_page_desc = NULL;
893 int i, j;
894
895 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
896 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
897 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
898 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
899 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
900 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
901 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
902
903 rx_page_desc = rx_ring->rx_page_desc;
904 /* RXF Page Physical address / Page Length */
905 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
906 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
907 (u32)((adapter->ring_dma &
908 AT_DMA_HI_ADDR_MASK) >> 32));
909 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
910 u32 page_phy_addr;
911 u32 offset_phy_addr;
912
913 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
914 offset_phy_addr =
915 rx_page_desc[i].rx_page[j].write_offset_dma;
916
917 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
918 page_phy_addr & AT_DMA_LO_ADDR_MASK);
919 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
920 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
921 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
922 }
923 }
924 /* Page Length */
925 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
926 /* Load all of base address above */
927 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
928 }
929
930 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
931 {
932 struct atl1e_hw *hw = &adapter->hw;
933 u32 dev_ctrl_data = 0;
934 u32 max_pay_load = 0;
935 u32 jumbo_thresh = 0;
936 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
937
938 /* configure TXQ param */
939 if (hw->nic_type != athr_l2e_revB) {
940 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
941 if (hw->max_frame_size <= 1500) {
942 jumbo_thresh = hw->max_frame_size + extra_size;
943 } else if (hw->max_frame_size < 6*1024) {
944 jumbo_thresh =
945 (hw->max_frame_size + extra_size) * 2 / 3;
946 } else {
947 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
948 }
949 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
950 }
951
952 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
953
954 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
955 DEVICE_CTRL_MAX_PAYLOAD_MASK;
956
957 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
958
959 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
960 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
961 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
962
963 if (hw->nic_type != athr_l2e_revB)
964 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
965 atl1e_pay_load_size[hw->dmar_block]);
966 /* enable TXQ */
967 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
968 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
969 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
970 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
971 }
972
973 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
974 {
975 struct atl1e_hw *hw = &adapter->hw;
976 u32 rxf_len = 0;
977 u32 rxf_low = 0;
978 u32 rxf_high = 0;
979 u32 rxf_thresh_data = 0;
980 u32 rxq_ctrl_data = 0;
981
982 if (hw->nic_type != athr_l2e_revB) {
983 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
984 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
985 RXQ_JMBOSZ_TH_SHIFT |
986 (1 & RXQ_JMBO_LKAH_MASK) <<
987 RXQ_JMBO_LKAH_SHIFT));
988
989 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
990 rxf_high = rxf_len * 4 / 5;
991 rxf_low = rxf_len / 5;
992 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
993 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
994 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
995 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
996
997 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
998 }
999
1000 /* RRS */
1001 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1002 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1003
1004 if (hw->rrs_type & atl1e_rrs_ipv4)
1005 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
1006
1007 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
1008 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
1009
1010 if (hw->rrs_type & atl1e_rrs_ipv6)
1011 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
1012
1013 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1014 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1015
1016 if (hw->rrs_type != atl1e_rrs_disable)
1017 rxq_ctrl_data |=
1018 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1019
1020 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1021 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1022
1023 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1024 }
1025
1026 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1027 {
1028 struct atl1e_hw *hw = &adapter->hw;
1029 u32 dma_ctrl_data = 0;
1030
1031 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1032 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1033 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1034 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1035 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1036 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1037 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1038 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1039 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1040 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1041
1042 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1043 }
1044
1045 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1046 {
1047 u32 value;
1048 struct atl1e_hw *hw = &adapter->hw;
1049 struct net_device *netdev = adapter->netdev;
1050
1051 /* Config MAC CTRL Register */
1052 value = MAC_CTRL_TX_EN |
1053 MAC_CTRL_RX_EN ;
1054
1055 if (FULL_DUPLEX == adapter->link_duplex)
1056 value |= MAC_CTRL_DUPLX;
1057
1058 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1059 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1060 MAC_CTRL_SPEED_SHIFT);
1061 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1062
1063 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1064 value |= (((u32)adapter->hw.preamble_len &
1065 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1066
1067 __atl1e_vlan_mode(netdev->features, &value);
1068
1069 value |= MAC_CTRL_BC_EN;
1070 if (netdev->flags & IFF_PROMISC)
1071 value |= MAC_CTRL_PROMIS_EN;
1072 if (netdev->flags & IFF_ALLMULTI)
1073 value |= MAC_CTRL_MC_ALL_EN;
1074
1075 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1076 }
1077
1078 /*
1079 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1080 * @adapter: board private structure
1081 *
1082 * Configure the Tx /Rx unit of the MAC after a reset.
1083 */
1084 static int atl1e_configure(struct atl1e_adapter *adapter)
1085 {
1086 struct atl1e_hw *hw = &adapter->hw;
1087
1088 u32 intr_status_data = 0;
1089
1090 /* clear interrupt status */
1091 AT_WRITE_REG(hw, REG_ISR, ~0);
1092
1093 /* 1. set MAC Address */
1094 atl1e_hw_set_mac_addr(hw);
1095
1096 /* 2. Init the Multicast HASH table done by set_muti */
1097
1098 /* 3. Clear any WOL status */
1099 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1100
1101 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1102 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1103 * High 32bits memory */
1104 atl1e_configure_des_ring(adapter);
1105
1106 /* 5. set Interrupt Moderator Timer */
1107 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1108 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1109 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1110 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1111
1112 /* 6. rx/tx threshold to trig interrupt */
1113 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1114 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1115 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1116 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1117
1118 /* 7. set Interrupt Clear Timer */
1119 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1120
1121 /* 8. set MTU */
1122 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1123 VLAN_HLEN + ETH_FCS_LEN);
1124
1125 /* 9. config TXQ early tx threshold */
1126 atl1e_configure_tx(adapter);
1127
1128 /* 10. config RXQ */
1129 atl1e_configure_rx(adapter);
1130
1131 /* 11. config DMA Engine */
1132 atl1e_configure_dma(adapter);
1133
1134 /* 12. smb timer to trig interrupt */
1135 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1136
1137 intr_status_data = AT_READ_REG(hw, REG_ISR);
1138 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1139 netdev_err(adapter->netdev,
1140 "atl1e_configure failed, PCIE phy link down\n");
1141 return -1;
1142 }
1143
1144 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1145 return 0;
1146 }
1147
1148 /*
1149 * atl1e_get_stats - Get System Network Statistics
1150 * @netdev: network interface device structure
1151 *
1152 * Returns the address of the device statistics structure.
1153 * The statistics are actually updated from the timer callback.
1154 */
1155 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1156 {
1157 struct atl1e_adapter *adapter = netdev_priv(netdev);
1158 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1159 struct net_device_stats *net_stats = &netdev->stats;
1160
1161 net_stats->rx_packets = hw_stats->rx_ok;
1162 net_stats->tx_packets = hw_stats->tx_ok;
1163 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1164 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1165 net_stats->multicast = hw_stats->rx_mcast;
1166 net_stats->collisions = hw_stats->tx_1_col +
1167 hw_stats->tx_2_col * 2 +
1168 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1169
1170 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1171 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1172 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1173 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1174 net_stats->rx_length_errors = hw_stats->rx_len_err;
1175 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1176 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1177 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1178
1179 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1180
1181 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1182 hw_stats->tx_underrun + hw_stats->tx_trunc;
1183 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1184 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1185 net_stats->tx_window_errors = hw_stats->tx_late_col;
1186
1187 return net_stats;
1188 }
1189
1190 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1191 {
1192 u16 hw_reg_addr = 0;
1193 unsigned long *stats_item = NULL;
1194
1195 /* update rx status */
1196 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1197 stats_item = &adapter->hw_stats.rx_ok;
1198 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1199 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1200 stats_item++;
1201 hw_reg_addr += 4;
1202 }
1203 /* update tx status */
1204 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1205 stats_item = &adapter->hw_stats.tx_ok;
1206 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1207 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1208 stats_item++;
1209 hw_reg_addr += 4;
1210 }
1211 }
1212
1213 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1214 {
1215 u16 phy_data;
1216
1217 spin_lock(&adapter->mdio_lock);
1218 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1219 spin_unlock(&adapter->mdio_lock);
1220 }
1221
1222 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1223 {
1224 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1225 struct atl1e_tx_buffer *tx_buffer = NULL;
1226 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1227 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1228
1229 while (next_to_clean != hw_next_to_clean) {
1230 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1231 if (tx_buffer->dma) {
1232 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1233 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1234 tx_buffer->length, PCI_DMA_TODEVICE);
1235 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1236 pci_unmap_page(adapter->pdev, tx_buffer->dma,
1237 tx_buffer->length, PCI_DMA_TODEVICE);
1238 tx_buffer->dma = 0;
1239 }
1240
1241 if (tx_buffer->skb) {
1242 dev_kfree_skb_irq(tx_buffer->skb);
1243 tx_buffer->skb = NULL;
1244 }
1245
1246 if (++next_to_clean == tx_ring->count)
1247 next_to_clean = 0;
1248 }
1249
1250 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1251
1252 if (netif_queue_stopped(adapter->netdev) &&
1253 netif_carrier_ok(adapter->netdev)) {
1254 netif_wake_queue(adapter->netdev);
1255 }
1256
1257 return true;
1258 }
1259
1260 /*
1261 * atl1e_intr - Interrupt Handler
1262 * @irq: interrupt number
1263 * @data: pointer to a network interface device structure
1264 * @pt_regs: CPU registers structure
1265 */
1266 static irqreturn_t atl1e_intr(int irq, void *data)
1267 {
1268 struct net_device *netdev = data;
1269 struct atl1e_adapter *adapter = netdev_priv(netdev);
1270 struct atl1e_hw *hw = &adapter->hw;
1271 int max_ints = AT_MAX_INT_WORK;
1272 int handled = IRQ_NONE;
1273 u32 status;
1274
1275 do {
1276 status = AT_READ_REG(hw, REG_ISR);
1277 if ((status & IMR_NORMAL_MASK) == 0 ||
1278 (status & ISR_DIS_INT) != 0) {
1279 if (max_ints != AT_MAX_INT_WORK)
1280 handled = IRQ_HANDLED;
1281 break;
1282 }
1283 /* link event */
1284 if (status & ISR_GPHY)
1285 atl1e_clear_phy_int(adapter);
1286 /* Ack ISR */
1287 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1288
1289 handled = IRQ_HANDLED;
1290 /* check if PCIE PHY Link down */
1291 if (status & ISR_PHY_LINKDOWN) {
1292 netdev_err(adapter->netdev,
1293 "pcie phy linkdown %x\n", status);
1294 if (netif_running(adapter->netdev)) {
1295 /* reset MAC */
1296 atl1e_irq_reset(adapter);
1297 schedule_work(&adapter->reset_task);
1298 break;
1299 }
1300 }
1301
1302 /* check if DMA read/write error */
1303 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1304 netdev_err(adapter->netdev,
1305 "PCIE DMA RW error (status = 0x%x)\n",
1306 status);
1307 atl1e_irq_reset(adapter);
1308 schedule_work(&adapter->reset_task);
1309 break;
1310 }
1311
1312 if (status & ISR_SMB)
1313 atl1e_update_hw_stats(adapter);
1314
1315 /* link event */
1316 if (status & (ISR_GPHY | ISR_MANUAL)) {
1317 netdev->stats.tx_carrier_errors++;
1318 atl1e_link_chg_event(adapter);
1319 break;
1320 }
1321
1322 /* transmit event */
1323 if (status & ISR_TX_EVENT)
1324 atl1e_clean_tx_irq(adapter);
1325
1326 if (status & ISR_RX_EVENT) {
1327 /*
1328 * disable rx interrupts, without
1329 * the synchronize_irq bit
1330 */
1331 AT_WRITE_REG(hw, REG_IMR,
1332 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1333 AT_WRITE_FLUSH(hw);
1334 if (likely(napi_schedule_prep(
1335 &adapter->napi)))
1336 __napi_schedule(&adapter->napi);
1337 }
1338 } while (--max_ints > 0);
1339 /* re-enable Interrupt*/
1340 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1341
1342 return handled;
1343 }
1344
1345 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1346 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1347 {
1348 u8 *packet = (u8 *)(prrs + 1);
1349 struct iphdr *iph;
1350 u16 head_len = ETH_HLEN;
1351 u16 pkt_flags;
1352 u16 err_flags;
1353
1354 skb_checksum_none_assert(skb);
1355 pkt_flags = prrs->pkt_flag;
1356 err_flags = prrs->err_flag;
1357 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1358 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1359 if (pkt_flags & RRS_IS_IPV4) {
1360 if (pkt_flags & RRS_IS_802_3)
1361 head_len += 8;
1362 iph = (struct iphdr *) (packet + head_len);
1363 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1364 goto hw_xsum;
1365 }
1366 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1367 skb->ip_summed = CHECKSUM_UNNECESSARY;
1368 return;
1369 }
1370 }
1371
1372 hw_xsum :
1373 return;
1374 }
1375
1376 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1377 u8 que)
1378 {
1379 struct atl1e_rx_page_desc *rx_page_desc =
1380 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1381 u8 rx_using = rx_page_desc[que].rx_using;
1382
1383 return &(rx_page_desc[que].rx_page[rx_using]);
1384 }
1385
1386 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1387 int *work_done, int work_to_do)
1388 {
1389 struct net_device *netdev = adapter->netdev;
1390 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
1391 struct atl1e_rx_page_desc *rx_page_desc =
1392 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1393 struct sk_buff *skb = NULL;
1394 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1395 u32 packet_size, write_offset;
1396 struct atl1e_recv_ret_status *prrs;
1397
1398 write_offset = *(rx_page->write_offset_addr);
1399 if (likely(rx_page->read_offset < write_offset)) {
1400 do {
1401 if (*work_done >= work_to_do)
1402 break;
1403 (*work_done)++;
1404 /* get new packet's rrs */
1405 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1406 rx_page->read_offset);
1407 /* check sequence number */
1408 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1409 netdev_err(netdev,
1410 "rx sequence number error (rx=%d) (expect=%d)\n",
1411 prrs->seq_num,
1412 rx_page_desc[que].rx_nxseq);
1413 rx_page_desc[que].rx_nxseq++;
1414 /* just for debug use */
1415 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1416 (((u32)prrs->seq_num) << 16) |
1417 rx_page_desc[que].rx_nxseq);
1418 goto fatal_err;
1419 }
1420 rx_page_desc[que].rx_nxseq++;
1421
1422 /* error packet */
1423 if (prrs->pkt_flag & RRS_IS_ERR_FRAME) {
1424 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1425 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1426 RRS_ERR_TRUNC)) {
1427 /* hardware error, discard this packet*/
1428 netdev_err(netdev,
1429 "rx packet desc error %x\n",
1430 *((u32 *)prrs + 1));
1431 goto skip_pkt;
1432 }
1433 }
1434
1435 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1436 RRS_PKT_SIZE_MASK) - 4; /* CRC */
1437 skb = netdev_alloc_skb_ip_align(netdev, packet_size);
1438 if (skb == NULL) {
1439 netdev_warn(netdev,
1440 "Memory squeeze, deferring packet\n");
1441 goto skip_pkt;
1442 }
1443 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1444 skb_put(skb, packet_size);
1445 skb->protocol = eth_type_trans(skb, netdev);
1446 atl1e_rx_checksum(adapter, skb, prrs);
1447
1448 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) {
1449 u16 vlan_tag = (prrs->vtag >> 4) |
1450 ((prrs->vtag & 7) << 13) |
1451 ((prrs->vtag & 8) << 9);
1452 netdev_dbg(netdev,
1453 "RXD VLAN TAG<RRD>=0x%04x\n",
1454 prrs->vtag);
1455 __vlan_hwaccel_put_tag(skb, vlan_tag);
1456 }
1457 netif_receive_skb(skb);
1458
1459 skip_pkt:
1460 /* skip current packet whether it's ok or not. */
1461 rx_page->read_offset +=
1462 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1463 RRS_PKT_SIZE_MASK) +
1464 sizeof(struct atl1e_recv_ret_status) + 31) &
1465 0xFFFFFFE0);
1466
1467 if (rx_page->read_offset >= rx_ring->page_size) {
1468 /* mark this page clean */
1469 u16 reg_addr;
1470 u8 rx_using;
1471
1472 rx_page->read_offset =
1473 *(rx_page->write_offset_addr) = 0;
1474 rx_using = rx_page_desc[que].rx_using;
1475 reg_addr =
1476 atl1e_rx_page_vld_regs[que][rx_using];
1477 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1478 rx_page_desc[que].rx_using ^= 1;
1479 rx_page = atl1e_get_rx_page(adapter, que);
1480 }
1481 write_offset = *(rx_page->write_offset_addr);
1482 } while (rx_page->read_offset < write_offset);
1483 }
1484
1485 return;
1486
1487 fatal_err:
1488 if (!test_bit(__AT_DOWN, &adapter->flags))
1489 schedule_work(&adapter->reset_task);
1490 }
1491
1492 /*
1493 * atl1e_clean - NAPI Rx polling callback
1494 * @adapter: board private structure
1495 */
1496 static int atl1e_clean(struct napi_struct *napi, int budget)
1497 {
1498 struct atl1e_adapter *adapter =
1499 container_of(napi, struct atl1e_adapter, napi);
1500 u32 imr_data;
1501 int work_done = 0;
1502
1503 /* Keep link state information with original netdev */
1504 if (!netif_carrier_ok(adapter->netdev))
1505 goto quit_polling;
1506
1507 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1508
1509 /* If no Tx and not enough Rx work done, exit the polling mode */
1510 if (work_done < budget) {
1511 quit_polling:
1512 napi_complete(napi);
1513 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1514 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1515 /* test debug */
1516 if (test_bit(__AT_DOWN, &adapter->flags)) {
1517 atomic_dec(&adapter->irq_sem);
1518 netdev_err(adapter->netdev,
1519 "atl1e_clean is called when AT_DOWN\n");
1520 }
1521 /* reenable RX intr */
1522 /*atl1e_irq_enable(adapter); */
1523
1524 }
1525 return work_done;
1526 }
1527
1528 #ifdef CONFIG_NET_POLL_CONTROLLER
1529
1530 /*
1531 * Polling 'interrupt' - used by things like netconsole to send skbs
1532 * without having to re-enable interrupts. It's not called while
1533 * the interrupt routine is executing.
1534 */
1535 static void atl1e_netpoll(struct net_device *netdev)
1536 {
1537 struct atl1e_adapter *adapter = netdev_priv(netdev);
1538
1539 disable_irq(adapter->pdev->irq);
1540 atl1e_intr(adapter->pdev->irq, netdev);
1541 enable_irq(adapter->pdev->irq);
1542 }
1543 #endif
1544
1545 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1546 {
1547 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1548 u16 next_to_use = 0;
1549 u16 next_to_clean = 0;
1550
1551 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1552 next_to_use = tx_ring->next_to_use;
1553
1554 return (u16)(next_to_clean > next_to_use) ?
1555 (next_to_clean - next_to_use - 1) :
1556 (tx_ring->count + next_to_clean - next_to_use - 1);
1557 }
1558
1559 /*
1560 * get next usable tpd
1561 * Note: should call atl1e_tdp_avail to make sure
1562 * there is enough tpd to use
1563 */
1564 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1565 {
1566 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1567 u16 next_to_use = 0;
1568
1569 next_to_use = tx_ring->next_to_use;
1570 if (++tx_ring->next_to_use == tx_ring->count)
1571 tx_ring->next_to_use = 0;
1572
1573 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1574 return &tx_ring->desc[next_to_use];
1575 }
1576
1577 static struct atl1e_tx_buffer *
1578 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1579 {
1580 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1581
1582 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1583 }
1584
1585 /* Calculate the transmit packet descript needed*/
1586 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1587 {
1588 int i = 0;
1589 u16 tpd_req = 1;
1590 u16 fg_size = 0;
1591 u16 proto_hdr_len = 0;
1592
1593 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1594 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]);
1595 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1596 }
1597
1598 if (skb_is_gso(skb)) {
1599 if (skb->protocol == htons(ETH_P_IP) ||
1600 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1601 proto_hdr_len = skb_transport_offset(skb) +
1602 tcp_hdrlen(skb);
1603 if (proto_hdr_len < skb_headlen(skb)) {
1604 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1605 MAX_TX_BUF_LEN - 1) >>
1606 MAX_TX_BUF_SHIFT);
1607 }
1608 }
1609
1610 }
1611 return tpd_req;
1612 }
1613
1614 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1615 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1616 {
1617 u8 hdr_len;
1618 u32 real_len;
1619 unsigned short offload_type;
1620 int err;
1621
1622 if (skb_is_gso(skb)) {
1623 if (skb_header_cloned(skb)) {
1624 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1625 if (unlikely(err))
1626 return -1;
1627 }
1628 offload_type = skb_shinfo(skb)->gso_type;
1629
1630 if (offload_type & SKB_GSO_TCPV4) {
1631 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1632 + ntohs(ip_hdr(skb)->tot_len));
1633
1634 if (real_len < skb->len)
1635 pskb_trim(skb, real_len);
1636
1637 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1638 if (unlikely(skb->len == hdr_len)) {
1639 /* only xsum need */
1640 netdev_warn(adapter->netdev,
1641 "IPV4 tso with zero data??\n");
1642 goto check_sum;
1643 } else {
1644 ip_hdr(skb)->check = 0;
1645 ip_hdr(skb)->tot_len = 0;
1646 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1647 ip_hdr(skb)->saddr,
1648 ip_hdr(skb)->daddr,
1649 0, IPPROTO_TCP, 0);
1650 tpd->word3 |= (ip_hdr(skb)->ihl &
1651 TDP_V4_IPHL_MASK) <<
1652 TPD_V4_IPHL_SHIFT;
1653 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1654 TPD_TCPHDRLEN_MASK) <<
1655 TPD_TCPHDRLEN_SHIFT;
1656 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1657 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1658 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1659 }
1660 return 0;
1661 }
1662 }
1663
1664 check_sum:
1665 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1666 u8 css, cso;
1667
1668 cso = skb_checksum_start_offset(skb);
1669 if (unlikely(cso & 0x1)) {
1670 netdev_err(adapter->netdev,
1671 "payload offset should not ant event number\n");
1672 return -1;
1673 } else {
1674 css = cso + skb->csum_offset;
1675 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1676 TPD_PLOADOFFSET_SHIFT;
1677 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1678 TPD_CCSUMOFFSET_SHIFT;
1679 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1680 }
1681 }
1682
1683 return 0;
1684 }
1685
1686 static void atl1e_tx_map(struct atl1e_adapter *adapter,
1687 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1688 {
1689 struct atl1e_tpd_desc *use_tpd = NULL;
1690 struct atl1e_tx_buffer *tx_buffer = NULL;
1691 u16 buf_len = skb_headlen(skb);
1692 u16 map_len = 0;
1693 u16 mapped_len = 0;
1694 u16 hdr_len = 0;
1695 u16 nr_frags;
1696 u16 f;
1697 int segment;
1698
1699 nr_frags = skb_shinfo(skb)->nr_frags;
1700 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1701 if (segment) {
1702 /* TSO */
1703 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1704 use_tpd = tpd;
1705
1706 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1707 tx_buffer->length = map_len;
1708 tx_buffer->dma = pci_map_single(adapter->pdev,
1709 skb->data, hdr_len, PCI_DMA_TODEVICE);
1710 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1711 mapped_len += map_len;
1712 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1713 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1714 ((cpu_to_le32(tx_buffer->length) &
1715 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1716 }
1717
1718 while (mapped_len < buf_len) {
1719 /* mapped_len == 0, means we should use the first tpd,
1720 which is given by caller */
1721 if (mapped_len == 0) {
1722 use_tpd = tpd;
1723 } else {
1724 use_tpd = atl1e_get_tpd(adapter);
1725 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1726 }
1727 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1728 tx_buffer->skb = NULL;
1729
1730 tx_buffer->length = map_len =
1731 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1732 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1733 tx_buffer->dma =
1734 pci_map_single(adapter->pdev, skb->data + mapped_len,
1735 map_len, PCI_DMA_TODEVICE);
1736 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1737 mapped_len += map_len;
1738 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1739 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1740 ((cpu_to_le32(tx_buffer->length) &
1741 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1742 }
1743
1744 for (f = 0; f < nr_frags; f++) {
1745 const struct skb_frag_struct *frag;
1746 u16 i;
1747 u16 seg_num;
1748
1749 frag = &skb_shinfo(skb)->frags[f];
1750 buf_len = skb_frag_size(frag);
1751
1752 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1753 for (i = 0; i < seg_num; i++) {
1754 use_tpd = atl1e_get_tpd(adapter);
1755 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1756
1757 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1758 BUG_ON(tx_buffer->skb);
1759
1760 tx_buffer->skb = NULL;
1761 tx_buffer->length =
1762 (buf_len > MAX_TX_BUF_LEN) ?
1763 MAX_TX_BUF_LEN : buf_len;
1764 buf_len -= tx_buffer->length;
1765
1766 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev,
1767 frag,
1768 (i * MAX_TX_BUF_LEN),
1769 tx_buffer->length,
1770 DMA_TO_DEVICE);
1771 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
1772 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1773 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1774 ((cpu_to_le32(tx_buffer->length) &
1775 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1776 }
1777 }
1778
1779 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1780 /* note this one is a tcp header */
1781 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1782 /* The last tpd */
1783
1784 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1785 /* The last buffer info contain the skb address,
1786 so it will be free after unmap */
1787 tx_buffer->skb = skb;
1788 }
1789
1790 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1791 struct atl1e_tpd_desc *tpd)
1792 {
1793 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1794 /* Force memory writes to complete before letting h/w
1795 * know there are new descriptors to fetch. (Only
1796 * applicable for weak-ordered memory model archs,
1797 * such as IA-64). */
1798 wmb();
1799 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1800 }
1801
1802 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1803 struct net_device *netdev)
1804 {
1805 struct atl1e_adapter *adapter = netdev_priv(netdev);
1806 unsigned long flags;
1807 u16 tpd_req = 1;
1808 struct atl1e_tpd_desc *tpd;
1809
1810 if (test_bit(__AT_DOWN, &adapter->flags)) {
1811 dev_kfree_skb_any(skb);
1812 return NETDEV_TX_OK;
1813 }
1814
1815 if (unlikely(skb->len <= 0)) {
1816 dev_kfree_skb_any(skb);
1817 return NETDEV_TX_OK;
1818 }
1819 tpd_req = atl1e_cal_tdp_req(skb);
1820 if (!spin_trylock_irqsave(&adapter->tx_lock, flags))
1821 return NETDEV_TX_LOCKED;
1822
1823 if (atl1e_tpd_avail(adapter) < tpd_req) {
1824 /* no enough descriptor, just stop queue */
1825 netif_stop_queue(netdev);
1826 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1827 return NETDEV_TX_BUSY;
1828 }
1829
1830 tpd = atl1e_get_tpd(adapter);
1831
1832 if (vlan_tx_tag_present(skb)) {
1833 u16 vlan_tag = vlan_tx_tag_get(skb);
1834 u16 atl1e_vlan_tag;
1835
1836 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1837 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1838 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1839 TPD_VLAN_SHIFT;
1840 }
1841
1842 if (skb->protocol == htons(ETH_P_8021Q))
1843 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1844
1845 if (skb_network_offset(skb) != ETH_HLEN)
1846 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1847
1848 /* do TSO and check sum */
1849 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1850 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1851 dev_kfree_skb_any(skb);
1852 return NETDEV_TX_OK;
1853 }
1854
1855 atl1e_tx_map(adapter, skb, tpd);
1856 atl1e_tx_queue(adapter, tpd_req, tpd);
1857
1858 netdev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
1859 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1860 return NETDEV_TX_OK;
1861 }
1862
1863 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1864 {
1865 struct net_device *netdev = adapter->netdev;
1866
1867 free_irq(adapter->pdev->irq, netdev);
1868
1869 if (adapter->have_msi)
1870 pci_disable_msi(adapter->pdev);
1871 }
1872
1873 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1874 {
1875 struct pci_dev *pdev = adapter->pdev;
1876 struct net_device *netdev = adapter->netdev;
1877 int flags = 0;
1878 int err = 0;
1879
1880 adapter->have_msi = true;
1881 err = pci_enable_msi(pdev);
1882 if (err) {
1883 netdev_dbg(netdev,
1884 "Unable to allocate MSI interrupt Error: %d\n", err);
1885 adapter->have_msi = false;
1886 }
1887
1888 if (!adapter->have_msi)
1889 flags |= IRQF_SHARED;
1890 err = request_irq(pdev->irq, atl1e_intr, flags, netdev->name, netdev);
1891 if (err) {
1892 netdev_dbg(adapter->netdev,
1893 "Unable to allocate interrupt Error: %d\n", err);
1894 if (adapter->have_msi)
1895 pci_disable_msi(pdev);
1896 return err;
1897 }
1898 netdev_dbg(netdev, "atl1e_request_irq OK\n");
1899 return err;
1900 }
1901
1902 int atl1e_up(struct atl1e_adapter *adapter)
1903 {
1904 struct net_device *netdev = adapter->netdev;
1905 int err = 0;
1906 u32 val;
1907
1908 /* hardware has been reset, we need to reload some things */
1909 err = atl1e_init_hw(&adapter->hw);
1910 if (err) {
1911 err = -EIO;
1912 return err;
1913 }
1914 atl1e_init_ring_ptrs(adapter);
1915 atl1e_set_multi(netdev);
1916 atl1e_restore_vlan(adapter);
1917
1918 if (atl1e_configure(adapter)) {
1919 err = -EIO;
1920 goto err_up;
1921 }
1922
1923 clear_bit(__AT_DOWN, &adapter->flags);
1924 napi_enable(&adapter->napi);
1925 atl1e_irq_enable(adapter);
1926 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1927 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1928 val | MASTER_CTRL_MANUAL_INT);
1929
1930 err_up:
1931 return err;
1932 }
1933
1934 void atl1e_down(struct atl1e_adapter *adapter)
1935 {
1936 struct net_device *netdev = adapter->netdev;
1937
1938 /* signal that we're down so the interrupt handler does not
1939 * reschedule our watchdog timer */
1940 set_bit(__AT_DOWN, &adapter->flags);
1941
1942 netif_stop_queue(netdev);
1943
1944 /* reset MAC to disable all RX/TX */
1945 atl1e_reset_hw(&adapter->hw);
1946 msleep(1);
1947
1948 napi_disable(&adapter->napi);
1949 atl1e_del_timer(adapter);
1950 atl1e_irq_disable(adapter);
1951
1952 netif_carrier_off(netdev);
1953 adapter->link_speed = SPEED_0;
1954 adapter->link_duplex = -1;
1955 atl1e_clean_tx_ring(adapter);
1956 atl1e_clean_rx_ring(adapter);
1957 }
1958
1959 /*
1960 * atl1e_open - Called when a network interface is made active
1961 * @netdev: network interface device structure
1962 *
1963 * Returns 0 on success, negative value on failure
1964 *
1965 * The open entry point is called when a network interface is made
1966 * active by the system (IFF_UP). At this point all resources needed
1967 * for transmit and receive operations are allocated, the interrupt
1968 * handler is registered with the OS, the watchdog timer is started,
1969 * and the stack is notified that the interface is ready.
1970 */
1971 static int atl1e_open(struct net_device *netdev)
1972 {
1973 struct atl1e_adapter *adapter = netdev_priv(netdev);
1974 int err;
1975
1976 /* disallow open during test */
1977 if (test_bit(__AT_TESTING, &adapter->flags))
1978 return -EBUSY;
1979
1980 /* allocate rx/tx dma buffer & descriptors */
1981 atl1e_init_ring_resources(adapter);
1982 err = atl1e_setup_ring_resources(adapter);
1983 if (unlikely(err))
1984 return err;
1985
1986 err = atl1e_request_irq(adapter);
1987 if (unlikely(err))
1988 goto err_req_irq;
1989
1990 err = atl1e_up(adapter);
1991 if (unlikely(err))
1992 goto err_up;
1993
1994 return 0;
1995
1996 err_up:
1997 atl1e_free_irq(adapter);
1998 err_req_irq:
1999 atl1e_free_ring_resources(adapter);
2000 atl1e_reset_hw(&adapter->hw);
2001
2002 return err;
2003 }
2004
2005 /*
2006 * atl1e_close - Disables a network interface
2007 * @netdev: network interface device structure
2008 *
2009 * Returns 0, this is not allowed to fail
2010 *
2011 * The close entry point is called when an interface is de-activated
2012 * by the OS. The hardware is still under the drivers control, but
2013 * needs to be disabled. A global MAC reset is issued to stop the
2014 * hardware, and all transmit and receive resources are freed.
2015 */
2016 static int atl1e_close(struct net_device *netdev)
2017 {
2018 struct atl1e_adapter *adapter = netdev_priv(netdev);
2019
2020 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2021 atl1e_down(adapter);
2022 atl1e_free_irq(adapter);
2023 atl1e_free_ring_resources(adapter);
2024
2025 return 0;
2026 }
2027
2028 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2029 {
2030 struct net_device *netdev = pci_get_drvdata(pdev);
2031 struct atl1e_adapter *adapter = netdev_priv(netdev);
2032 struct atl1e_hw *hw = &adapter->hw;
2033 u32 ctrl = 0;
2034 u32 mac_ctrl_data = 0;
2035 u32 wol_ctrl_data = 0;
2036 u16 mii_advertise_data = 0;
2037 u16 mii_bmsr_data = 0;
2038 u16 mii_intr_status_data = 0;
2039 u32 wufc = adapter->wol;
2040 u32 i;
2041 #ifdef CONFIG_PM
2042 int retval = 0;
2043 #endif
2044
2045 if (netif_running(netdev)) {
2046 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2047 atl1e_down(adapter);
2048 }
2049 netif_device_detach(netdev);
2050
2051 #ifdef CONFIG_PM
2052 retval = pci_save_state(pdev);
2053 if (retval)
2054 return retval;
2055 #endif
2056
2057 if (wufc) {
2058 /* get link status */
2059 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2060 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2061
2062 mii_advertise_data = ADVERTISE_10HALF;
2063
2064 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) ||
2065 (atl1e_write_phy_reg(hw,
2066 MII_ADVERTISE, mii_advertise_data) != 0) ||
2067 (atl1e_phy_commit(hw)) != 0) {
2068 netdev_dbg(adapter->netdev, "set phy register failed\n");
2069 goto wol_dis;
2070 }
2071
2072 hw->phy_configured = false; /* re-init PHY when resume */
2073
2074 /* turn on magic packet wol */
2075 if (wufc & AT_WUFC_MAG)
2076 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2077
2078 if (wufc & AT_WUFC_LNKC) {
2079 /* if orignal link status is link, just wait for retrive link */
2080 if (mii_bmsr_data & BMSR_LSTATUS) {
2081 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2082 msleep(100);
2083 atl1e_read_phy_reg(hw, MII_BMSR,
2084 &mii_bmsr_data);
2085 if (mii_bmsr_data & BMSR_LSTATUS)
2086 break;
2087 }
2088
2089 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2090 netdev_dbg(adapter->netdev,
2091 "Link may change when suspend\n");
2092 }
2093 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2094 /* only link up can wake up */
2095 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2096 netdev_dbg(adapter->netdev,
2097 "read write phy register failed\n");
2098 goto wol_dis;
2099 }
2100 }
2101 /* clear phy interrupt */
2102 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2103 /* Config MAC Ctrl register */
2104 mac_ctrl_data = MAC_CTRL_RX_EN;
2105 /* set to 10/100M halt duplex */
2106 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2107 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2108 MAC_CTRL_PRMLEN_MASK) <<
2109 MAC_CTRL_PRMLEN_SHIFT);
2110
2111 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data);
2112
2113 /* magic packet maybe Broadcast&multicast&Unicast frame */
2114 if (wufc & AT_WUFC_MAG)
2115 mac_ctrl_data |= MAC_CTRL_BC_EN;
2116
2117 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2118 mac_ctrl_data);
2119
2120 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2121 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2122 /* pcie patch */
2123 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2124 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2125 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2126 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2127 goto suspend_exit;
2128 }
2129 wol_dis:
2130
2131 /* WOL disabled */
2132 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2133
2134 /* pcie patch */
2135 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2136 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2137 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2138
2139 atl1e_force_ps(hw);
2140 hw->phy_configured = false; /* re-init PHY when resume */
2141
2142 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2143
2144 suspend_exit:
2145
2146 if (netif_running(netdev))
2147 atl1e_free_irq(adapter);
2148
2149 pci_disable_device(pdev);
2150
2151 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2152
2153 return 0;
2154 }
2155
2156 #ifdef CONFIG_PM
2157 static int atl1e_resume(struct pci_dev *pdev)
2158 {
2159 struct net_device *netdev = pci_get_drvdata(pdev);
2160 struct atl1e_adapter *adapter = netdev_priv(netdev);
2161 u32 err;
2162
2163 pci_set_power_state(pdev, PCI_D0);
2164 pci_restore_state(pdev);
2165
2166 err = pci_enable_device(pdev);
2167 if (err) {
2168 netdev_err(adapter->netdev,
2169 "Cannot enable PCI device from suspend\n");
2170 return err;
2171 }
2172
2173 pci_set_master(pdev);
2174
2175 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2176
2177 pci_enable_wake(pdev, PCI_D3hot, 0);
2178 pci_enable_wake(pdev, PCI_D3cold, 0);
2179
2180 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2181
2182 if (netif_running(netdev)) {
2183 err = atl1e_request_irq(adapter);
2184 if (err)
2185 return err;
2186 }
2187
2188 atl1e_reset_hw(&adapter->hw);
2189
2190 if (netif_running(netdev))
2191 atl1e_up(adapter);
2192
2193 netif_device_attach(netdev);
2194
2195 return 0;
2196 }
2197 #endif
2198
2199 static void atl1e_shutdown(struct pci_dev *pdev)
2200 {
2201 atl1e_suspend(pdev, PMSG_SUSPEND);
2202 }
2203
2204 static const struct net_device_ops atl1e_netdev_ops = {
2205 .ndo_open = atl1e_open,
2206 .ndo_stop = atl1e_close,
2207 .ndo_start_xmit = atl1e_xmit_frame,
2208 .ndo_get_stats = atl1e_get_stats,
2209 .ndo_set_rx_mode = atl1e_set_multi,
2210 .ndo_validate_addr = eth_validate_addr,
2211 .ndo_set_mac_address = atl1e_set_mac_addr,
2212 .ndo_fix_features = atl1e_fix_features,
2213 .ndo_set_features = atl1e_set_features,
2214 .ndo_change_mtu = atl1e_change_mtu,
2215 .ndo_do_ioctl = atl1e_ioctl,
2216 .ndo_tx_timeout = atl1e_tx_timeout,
2217 #ifdef CONFIG_NET_POLL_CONTROLLER
2218 .ndo_poll_controller = atl1e_netpoll,
2219 #endif
2220
2221 };
2222
2223 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2224 {
2225 SET_NETDEV_DEV(netdev, &pdev->dev);
2226 pci_set_drvdata(pdev, netdev);
2227
2228 netdev->netdev_ops = &atl1e_netdev_ops;
2229
2230 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2231 atl1e_set_ethtool_ops(netdev);
2232
2233 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
2234 NETIF_F_HW_VLAN_RX;
2235 netdev->features = netdev->hw_features | NETIF_F_LLTX |
2236 NETIF_F_HW_VLAN_TX;
2237
2238 return 0;
2239 }
2240
2241 /*
2242 * atl1e_probe - Device Initialization Routine
2243 * @pdev: PCI device information struct
2244 * @ent: entry in atl1e_pci_tbl
2245 *
2246 * Returns 0 on success, negative on failure
2247 *
2248 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2249 * The OS initialization, configuring of the adapter private structure,
2250 * and a hardware reset occur.
2251 */
2252 static int __devinit atl1e_probe(struct pci_dev *pdev,
2253 const struct pci_device_id *ent)
2254 {
2255 struct net_device *netdev;
2256 struct atl1e_adapter *adapter = NULL;
2257 static int cards_found;
2258
2259 int err = 0;
2260
2261 err = pci_enable_device(pdev);
2262 if (err) {
2263 dev_err(&pdev->dev, "cannot enable PCI device\n");
2264 return err;
2265 }
2266
2267 /*
2268 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2269 * shared register for the high 32 bits, so only a single, aligned,
2270 * 4 GB physical address range can be used at a time.
2271 *
2272 * Supporting 64-bit DMA on this hardware is more trouble than it's
2273 * worth. It is far easier to limit to 32-bit DMA than update
2274 * various kernel subsystems to support the mechanics required by a
2275 * fixed-high-32-bit system.
2276 */
2277 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2278 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2279 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2280 goto err_dma;
2281 }
2282
2283 err = pci_request_regions(pdev, atl1e_driver_name);
2284 if (err) {
2285 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2286 goto err_pci_reg;
2287 }
2288
2289 pci_set_master(pdev);
2290
2291 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2292 if (netdev == NULL) {
2293 err = -ENOMEM;
2294 goto err_alloc_etherdev;
2295 }
2296
2297 err = atl1e_init_netdev(netdev, pdev);
2298 if (err) {
2299 netdev_err(netdev, "init netdevice failed\n");
2300 goto err_init_netdev;
2301 }
2302 adapter = netdev_priv(netdev);
2303 adapter->bd_number = cards_found;
2304 adapter->netdev = netdev;
2305 adapter->pdev = pdev;
2306 adapter->hw.adapter = adapter;
2307 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2308 if (!adapter->hw.hw_addr) {
2309 err = -EIO;
2310 netdev_err(netdev, "cannot map device registers\n");
2311 goto err_ioremap;
2312 }
2313
2314 /* init mii data */
2315 adapter->mii.dev = netdev;
2316 adapter->mii.mdio_read = atl1e_mdio_read;
2317 adapter->mii.mdio_write = atl1e_mdio_write;
2318 adapter->mii.phy_id_mask = 0x1f;
2319 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2320
2321 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2322
2323 init_timer(&adapter->phy_config_timer);
2324 adapter->phy_config_timer.function = atl1e_phy_config;
2325 adapter->phy_config_timer.data = (unsigned long) adapter;
2326
2327 /* get user settings */
2328 atl1e_check_options(adapter);
2329 /*
2330 * Mark all PCI regions associated with PCI device
2331 * pdev as being reserved by owner atl1e_driver_name
2332 * Enables bus-mastering on the device and calls
2333 * pcibios_set_master to do the needed arch specific settings
2334 */
2335 atl1e_setup_pcicmd(pdev);
2336 /* setup the private structure */
2337 err = atl1e_sw_init(adapter);
2338 if (err) {
2339 netdev_err(netdev, "net device private data init failed\n");
2340 goto err_sw_init;
2341 }
2342
2343 /* Init GPHY as early as possible due to power saving issue */
2344 atl1e_phy_init(&adapter->hw);
2345 /* reset the controller to
2346 * put the device in a known good starting state */
2347 err = atl1e_reset_hw(&adapter->hw);
2348 if (err) {
2349 err = -EIO;
2350 goto err_reset;
2351 }
2352
2353 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2354 err = -EIO;
2355 netdev_err(netdev, "get mac address failed\n");
2356 goto err_eeprom;
2357 }
2358
2359 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2360 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2361 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
2362
2363 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2364 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2365 err = register_netdev(netdev);
2366 if (err) {
2367 netdev_err(netdev, "register netdevice failed\n");
2368 goto err_register;
2369 }
2370
2371 /* assume we have no link for now */
2372 netif_stop_queue(netdev);
2373 netif_carrier_off(netdev);
2374
2375 cards_found++;
2376
2377 return 0;
2378
2379 err_reset:
2380 err_register:
2381 err_sw_init:
2382 err_eeprom:
2383 iounmap(adapter->hw.hw_addr);
2384 err_init_netdev:
2385 err_ioremap:
2386 free_netdev(netdev);
2387 err_alloc_etherdev:
2388 pci_release_regions(pdev);
2389 err_pci_reg:
2390 err_dma:
2391 pci_disable_device(pdev);
2392 return err;
2393 }
2394
2395 /*
2396 * atl1e_remove - Device Removal Routine
2397 * @pdev: PCI device information struct
2398 *
2399 * atl1e_remove is called by the PCI subsystem to alert the driver
2400 * that it should release a PCI device. The could be caused by a
2401 * Hot-Plug event, or because the driver is going to be removed from
2402 * memory.
2403 */
2404 static void __devexit atl1e_remove(struct pci_dev *pdev)
2405 {
2406 struct net_device *netdev = pci_get_drvdata(pdev);
2407 struct atl1e_adapter *adapter = netdev_priv(netdev);
2408
2409 /*
2410 * flush_scheduled work may reschedule our watchdog task, so
2411 * explicitly disable watchdog tasks from being rescheduled
2412 */
2413 set_bit(__AT_DOWN, &adapter->flags);
2414
2415 atl1e_del_timer(adapter);
2416 atl1e_cancel_work(adapter);
2417
2418 unregister_netdev(netdev);
2419 atl1e_free_ring_resources(adapter);
2420 atl1e_force_ps(&adapter->hw);
2421 iounmap(adapter->hw.hw_addr);
2422 pci_release_regions(pdev);
2423 free_netdev(netdev);
2424 pci_disable_device(pdev);
2425 }
2426
2427 /*
2428 * atl1e_io_error_detected - called when PCI error is detected
2429 * @pdev: Pointer to PCI device
2430 * @state: The current pci connection state
2431 *
2432 * This function is called after a PCI bus error affecting
2433 * this device has been detected.
2434 */
2435 static pci_ers_result_t
2436 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2437 {
2438 struct net_device *netdev = pci_get_drvdata(pdev);
2439 struct atl1e_adapter *adapter = netdev_priv(netdev);
2440
2441 netif_device_detach(netdev);
2442
2443 if (state == pci_channel_io_perm_failure)
2444 return PCI_ERS_RESULT_DISCONNECT;
2445
2446 if (netif_running(netdev))
2447 atl1e_down(adapter);
2448
2449 pci_disable_device(pdev);
2450
2451 /* Request a slot slot reset. */
2452 return PCI_ERS_RESULT_NEED_RESET;
2453 }
2454
2455 /*
2456 * atl1e_io_slot_reset - called after the pci bus has been reset.
2457 * @pdev: Pointer to PCI device
2458 *
2459 * Restart the card from scratch, as if from a cold-boot. Implementation
2460 * resembles the first-half of the e1000_resume routine.
2461 */
2462 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2463 {
2464 struct net_device *netdev = pci_get_drvdata(pdev);
2465 struct atl1e_adapter *adapter = netdev_priv(netdev);
2466
2467 if (pci_enable_device(pdev)) {
2468 netdev_err(adapter->netdev,
2469 "Cannot re-enable PCI device after reset\n");
2470 return PCI_ERS_RESULT_DISCONNECT;
2471 }
2472 pci_set_master(pdev);
2473
2474 pci_enable_wake(pdev, PCI_D3hot, 0);
2475 pci_enable_wake(pdev, PCI_D3cold, 0);
2476
2477 atl1e_reset_hw(&adapter->hw);
2478
2479 return PCI_ERS_RESULT_RECOVERED;
2480 }
2481
2482 /*
2483 * atl1e_io_resume - called when traffic can start flowing again.
2484 * @pdev: Pointer to PCI device
2485 *
2486 * This callback is called when the error recovery driver tells us that
2487 * its OK to resume normal operation. Implementation resembles the
2488 * second-half of the atl1e_resume routine.
2489 */
2490 static void atl1e_io_resume(struct pci_dev *pdev)
2491 {
2492 struct net_device *netdev = pci_get_drvdata(pdev);
2493 struct atl1e_adapter *adapter = netdev_priv(netdev);
2494
2495 if (netif_running(netdev)) {
2496 if (atl1e_up(adapter)) {
2497 netdev_err(adapter->netdev,
2498 "can't bring device back up after reset\n");
2499 return;
2500 }
2501 }
2502
2503 netif_device_attach(netdev);
2504 }
2505
2506 static struct pci_error_handlers atl1e_err_handler = {
2507 .error_detected = atl1e_io_error_detected,
2508 .slot_reset = atl1e_io_slot_reset,
2509 .resume = atl1e_io_resume,
2510 };
2511
2512 static struct pci_driver atl1e_driver = {
2513 .name = atl1e_driver_name,
2514 .id_table = atl1e_pci_tbl,
2515 .probe = atl1e_probe,
2516 .remove = __devexit_p(atl1e_remove),
2517 /* Power Management Hooks */
2518 #ifdef CONFIG_PM
2519 .suspend = atl1e_suspend,
2520 .resume = atl1e_resume,
2521 #endif
2522 .shutdown = atl1e_shutdown,
2523 .err_handler = &atl1e_err_handler
2524 };
2525
2526 /*
2527 * atl1e_init_module - Driver Registration Routine
2528 *
2529 * atl1e_init_module is the first routine called when the driver is
2530 * loaded. All it does is register with the PCI subsystem.
2531 */
2532 static int __init atl1e_init_module(void)
2533 {
2534 return pci_register_driver(&atl1e_driver);
2535 }
2536
2537 /*
2538 * atl1e_exit_module - Driver Exit Cleanup Routine
2539 *
2540 * atl1e_exit_module is called just before the driver is removed
2541 * from memory.
2542 */
2543 static void __exit atl1e_exit_module(void)
2544 {
2545 pci_unregister_driver(&atl1e_driver);
2546 }
2547
2548 module_init(atl1e_init_module);
2549 module_exit(atl1e_exit_module);
Linux kernel - Deliverables
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