2 * Broadcom BCM7xxx System Port Ethernet MAC driver
4 * Copyright (C) 2014 Broadcom Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
21 #include <linux/of_net.h>
22 #include <linux/of_mdio.h>
23 #include <linux/phy.h>
24 #include <linux/phy_fixed.h>
28 #include "bcmsysport.h"
30 /* I/O accessors register helpers */
31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
34 u32 reg = __raw_readl(priv->base + offset + off); \
37 static inline void name##_writel(struct bcm_sysport_priv *priv, \
40 __raw_writel(val, priv->base + offset + off); \
43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
44 BCM_SYSPORT_IO_MACRO(intrl2_1
, SYS_PORT_INTRL2_1_OFFSET
);
45 BCM_SYSPORT_IO_MACRO(umac
, SYS_PORT_UMAC_OFFSET
);
46 BCM_SYSPORT_IO_MACRO(tdma
, SYS_PORT_TDMA_OFFSET
);
47 BCM_SYSPORT_IO_MACRO(rdma
, SYS_PORT_RDMA_OFFSET
);
48 BCM_SYSPORT_IO_MACRO(rxchk
, SYS_PORT_RXCHK_OFFSET
);
49 BCM_SYSPORT_IO_MACRO(txchk
, SYS_PORT_TXCHK_OFFSET
);
50 BCM_SYSPORT_IO_MACRO(rbuf
, SYS_PORT_RBUF_OFFSET
);
51 BCM_SYSPORT_IO_MACRO(tbuf
, SYS_PORT_TBUF_OFFSET
);
52 BCM_SYSPORT_IO_MACRO(topctrl
, SYS_PORT_TOPCTRL_OFFSET
);
54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
55 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
57 #define BCM_SYSPORT_INTR_L2(which) \
58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
61 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
62 priv->irq##which##_mask &= ~(mask); \
64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
67 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
68 priv->irq##which##_mask |= (mask); \
71 BCM_SYSPORT_INTR_L2(0)
72 BCM_SYSPORT_INTR_L2(1)
74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
75 * nanoseconds), so keep the check for 64-bits explicit here to save
76 * one register write per-packet on 32-bits platforms.
78 static inline void dma_desc_set_addr(struct bcm_sysport_priv
*priv
,
82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
83 __raw_writel(upper_32_bits(addr
) & DESC_ADDR_HI_MASK
,
84 d
+ DESC_ADDR_HI_STATUS_LEN
);
86 __raw_writel(lower_32_bits(addr
), d
+ DESC_ADDR_LO
);
89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv
*priv
,
90 struct dma_desc
*desc
,
93 /* Ports are latched, so write upper address first */
94 tdma_writel(priv
, desc
->addr_status_len
, TDMA_WRITE_PORT_HI(port
));
95 tdma_writel(priv
, desc
->addr_lo
, TDMA_WRITE_PORT_LO(port
));
98 /* Ethtool operations */
99 static int bcm_sysport_set_settings(struct net_device
*dev
,
100 struct ethtool_cmd
*cmd
)
102 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
104 if (!netif_running(dev
))
107 return phy_ethtool_sset(priv
->phydev
, cmd
);
110 static int bcm_sysport_get_settings(struct net_device
*dev
,
111 struct ethtool_cmd
*cmd
)
113 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
115 if (!netif_running(dev
))
118 return phy_ethtool_gset(priv
->phydev
, cmd
);
121 static int bcm_sysport_set_rx_csum(struct net_device
*dev
,
122 netdev_features_t wanted
)
124 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
127 priv
->rx_chk_en
= !!(wanted
& NETIF_F_RXCSUM
);
128 reg
= rxchk_readl(priv
, RXCHK_CONTROL
);
134 /* If UniMAC forwards CRC, we need to skip over it to get
135 * a valid CHK bit to be set in the per-packet status word
137 if (priv
->rx_chk_en
&& priv
->crc_fwd
)
138 reg
|= RXCHK_SKIP_FCS
;
140 reg
&= ~RXCHK_SKIP_FCS
;
142 rxchk_writel(priv
, reg
, RXCHK_CONTROL
);
147 static int bcm_sysport_set_tx_csum(struct net_device
*dev
,
148 netdev_features_t wanted
)
150 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
153 /* Hardware transmit checksum requires us to enable the Transmit status
154 * block prepended to the packet contents
156 priv
->tsb_en
= !!(wanted
& (NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
));
157 reg
= tdma_readl(priv
, TDMA_CONTROL
);
162 tdma_writel(priv
, reg
, TDMA_CONTROL
);
167 static int bcm_sysport_set_features(struct net_device
*dev
,
168 netdev_features_t features
)
170 netdev_features_t changed
= features
^ dev
->features
;
171 netdev_features_t wanted
= dev
->wanted_features
;
174 if (changed
& NETIF_F_RXCSUM
)
175 ret
= bcm_sysport_set_rx_csum(dev
, wanted
);
176 if (changed
& (NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
))
177 ret
= bcm_sysport_set_tx_csum(dev
, wanted
);
182 /* Hardware counters must be kept in sync because the order/offset
183 * is important here (order in structure declaration = order in hardware)
185 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats
[] = {
187 STAT_NETDEV(rx_packets
),
188 STAT_NETDEV(tx_packets
),
189 STAT_NETDEV(rx_bytes
),
190 STAT_NETDEV(tx_bytes
),
191 STAT_NETDEV(rx_errors
),
192 STAT_NETDEV(tx_errors
),
193 STAT_NETDEV(rx_dropped
),
194 STAT_NETDEV(tx_dropped
),
195 STAT_NETDEV(multicast
),
196 /* UniMAC RSV counters */
197 STAT_MIB_RX("rx_64_octets", mib
.rx
.pkt_cnt
.cnt_64
),
198 STAT_MIB_RX("rx_65_127_oct", mib
.rx
.pkt_cnt
.cnt_127
),
199 STAT_MIB_RX("rx_128_255_oct", mib
.rx
.pkt_cnt
.cnt_255
),
200 STAT_MIB_RX("rx_256_511_oct", mib
.rx
.pkt_cnt
.cnt_511
),
201 STAT_MIB_RX("rx_512_1023_oct", mib
.rx
.pkt_cnt
.cnt_1023
),
202 STAT_MIB_RX("rx_1024_1518_oct", mib
.rx
.pkt_cnt
.cnt_1518
),
203 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib
.rx
.pkt_cnt
.cnt_mgv
),
204 STAT_MIB_RX("rx_1522_2047_oct", mib
.rx
.pkt_cnt
.cnt_2047
),
205 STAT_MIB_RX("rx_2048_4095_oct", mib
.rx
.pkt_cnt
.cnt_4095
),
206 STAT_MIB_RX("rx_4096_9216_oct", mib
.rx
.pkt_cnt
.cnt_9216
),
207 STAT_MIB_RX("rx_pkts", mib
.rx
.pkt
),
208 STAT_MIB_RX("rx_bytes", mib
.rx
.bytes
),
209 STAT_MIB_RX("rx_multicast", mib
.rx
.mca
),
210 STAT_MIB_RX("rx_broadcast", mib
.rx
.bca
),
211 STAT_MIB_RX("rx_fcs", mib
.rx
.fcs
),
212 STAT_MIB_RX("rx_control", mib
.rx
.cf
),
213 STAT_MIB_RX("rx_pause", mib
.rx
.pf
),
214 STAT_MIB_RX("rx_unknown", mib
.rx
.uo
),
215 STAT_MIB_RX("rx_align", mib
.rx
.aln
),
216 STAT_MIB_RX("rx_outrange", mib
.rx
.flr
),
217 STAT_MIB_RX("rx_code", mib
.rx
.cde
),
218 STAT_MIB_RX("rx_carrier", mib
.rx
.fcr
),
219 STAT_MIB_RX("rx_oversize", mib
.rx
.ovr
),
220 STAT_MIB_RX("rx_jabber", mib
.rx
.jbr
),
221 STAT_MIB_RX("rx_mtu_err", mib
.rx
.mtue
),
222 STAT_MIB_RX("rx_good_pkts", mib
.rx
.pok
),
223 STAT_MIB_RX("rx_unicast", mib
.rx
.uc
),
224 STAT_MIB_RX("rx_ppp", mib
.rx
.ppp
),
225 STAT_MIB_RX("rx_crc", mib
.rx
.rcrc
),
226 /* UniMAC TSV counters */
227 STAT_MIB_TX("tx_64_octets", mib
.tx
.pkt_cnt
.cnt_64
),
228 STAT_MIB_TX("tx_65_127_oct", mib
.tx
.pkt_cnt
.cnt_127
),
229 STAT_MIB_TX("tx_128_255_oct", mib
.tx
.pkt_cnt
.cnt_255
),
230 STAT_MIB_TX("tx_256_511_oct", mib
.tx
.pkt_cnt
.cnt_511
),
231 STAT_MIB_TX("tx_512_1023_oct", mib
.tx
.pkt_cnt
.cnt_1023
),
232 STAT_MIB_TX("tx_1024_1518_oct", mib
.tx
.pkt_cnt
.cnt_1518
),
233 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib
.tx
.pkt_cnt
.cnt_mgv
),
234 STAT_MIB_TX("tx_1522_2047_oct", mib
.tx
.pkt_cnt
.cnt_2047
),
235 STAT_MIB_TX("tx_2048_4095_oct", mib
.tx
.pkt_cnt
.cnt_4095
),
236 STAT_MIB_TX("tx_4096_9216_oct", mib
.tx
.pkt_cnt
.cnt_9216
),
237 STAT_MIB_TX("tx_pkts", mib
.tx
.pkts
),
238 STAT_MIB_TX("tx_multicast", mib
.tx
.mca
),
239 STAT_MIB_TX("tx_broadcast", mib
.tx
.bca
),
240 STAT_MIB_TX("tx_pause", mib
.tx
.pf
),
241 STAT_MIB_TX("tx_control", mib
.tx
.cf
),
242 STAT_MIB_TX("tx_fcs_err", mib
.tx
.fcs
),
243 STAT_MIB_TX("tx_oversize", mib
.tx
.ovr
),
244 STAT_MIB_TX("tx_defer", mib
.tx
.drf
),
245 STAT_MIB_TX("tx_excess_defer", mib
.tx
.edf
),
246 STAT_MIB_TX("tx_single_col", mib
.tx
.scl
),
247 STAT_MIB_TX("tx_multi_col", mib
.tx
.mcl
),
248 STAT_MIB_TX("tx_late_col", mib
.tx
.lcl
),
249 STAT_MIB_TX("tx_excess_col", mib
.tx
.ecl
),
250 STAT_MIB_TX("tx_frags", mib
.tx
.frg
),
251 STAT_MIB_TX("tx_total_col", mib
.tx
.ncl
),
252 STAT_MIB_TX("tx_jabber", mib
.tx
.jbr
),
253 STAT_MIB_TX("tx_bytes", mib
.tx
.bytes
),
254 STAT_MIB_TX("tx_good_pkts", mib
.tx
.pok
),
255 STAT_MIB_TX("tx_unicast", mib
.tx
.uc
),
256 /* UniMAC RUNT counters */
257 STAT_RUNT("rx_runt_pkts", mib
.rx_runt_cnt
),
258 STAT_RUNT("rx_runt_valid_fcs", mib
.rx_runt_fcs
),
259 STAT_RUNT("rx_runt_inval_fcs_align", mib
.rx_runt_fcs_align
),
260 STAT_RUNT("rx_runt_bytes", mib
.rx_runt_bytes
),
261 /* RXCHK misc statistics */
262 STAT_RXCHK("rxchk_bad_csum", mib
.rxchk_bad_csum
, RXCHK_BAD_CSUM_CNTR
),
263 STAT_RXCHK("rxchk_other_pkt_disc", mib
.rxchk_other_pkt_disc
,
264 RXCHK_OTHER_DISC_CNTR
),
265 /* RBUF misc statistics */
266 STAT_RBUF("rbuf_ovflow_cnt", mib
.rbuf_ovflow_cnt
, RBUF_OVFL_DISC_CNTR
),
267 STAT_RBUF("rbuf_err_cnt", mib
.rbuf_err_cnt
, RBUF_ERR_PKT_CNTR
),
270 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
272 static void bcm_sysport_get_drvinfo(struct net_device
*dev
,
273 struct ethtool_drvinfo
*info
)
275 strlcpy(info
->driver
, KBUILD_MODNAME
, sizeof(info
->driver
));
276 strlcpy(info
->version
, "0.1", sizeof(info
->version
));
277 strlcpy(info
->bus_info
, "platform", sizeof(info
->bus_info
));
278 info
->n_stats
= BCM_SYSPORT_STATS_LEN
;
281 static u32
bcm_sysport_get_msglvl(struct net_device
*dev
)
283 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
285 return priv
->msg_enable
;
288 static void bcm_sysport_set_msglvl(struct net_device
*dev
, u32 enable
)
290 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
292 priv
->msg_enable
= enable
;
295 static int bcm_sysport_get_sset_count(struct net_device
*dev
, int string_set
)
297 switch (string_set
) {
299 return BCM_SYSPORT_STATS_LEN
;
305 static void bcm_sysport_get_strings(struct net_device
*dev
,
306 u32 stringset
, u8
*data
)
312 for (i
= 0; i
< BCM_SYSPORT_STATS_LEN
; i
++) {
313 memcpy(data
+ i
* ETH_GSTRING_LEN
,
314 bcm_sysport_gstrings_stats
[i
].stat_string
,
323 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv
*priv
)
327 for (i
= 0; i
< BCM_SYSPORT_STATS_LEN
; i
++) {
328 const struct bcm_sysport_stats
*s
;
333 s
= &bcm_sysport_gstrings_stats
[i
];
335 case BCM_SYSPORT_STAT_NETDEV
:
337 case BCM_SYSPORT_STAT_MIB_RX
:
338 case BCM_SYSPORT_STAT_MIB_TX
:
339 case BCM_SYSPORT_STAT_RUNT
:
340 if (s
->type
!= BCM_SYSPORT_STAT_MIB_RX
)
341 offset
= UMAC_MIB_STAT_OFFSET
;
342 val
= umac_readl(priv
, UMAC_MIB_START
+ j
+ offset
);
344 case BCM_SYSPORT_STAT_RXCHK
:
345 val
= rxchk_readl(priv
, s
->reg_offset
);
347 rxchk_writel(priv
, 0, s
->reg_offset
);
349 case BCM_SYSPORT_STAT_RBUF
:
350 val
= rbuf_readl(priv
, s
->reg_offset
);
352 rbuf_writel(priv
, 0, s
->reg_offset
);
357 p
= (char *)priv
+ s
->stat_offset
;
361 netif_dbg(priv
, hw
, priv
->netdev
, "updated MIB counters\n");
364 static void bcm_sysport_get_stats(struct net_device
*dev
,
365 struct ethtool_stats
*stats
, u64
*data
)
367 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
370 if (netif_running(dev
))
371 bcm_sysport_update_mib_counters(priv
);
373 for (i
= 0; i
< BCM_SYSPORT_STATS_LEN
; i
++) {
374 const struct bcm_sysport_stats
*s
;
377 s
= &bcm_sysport_gstrings_stats
[i
];
378 if (s
->type
== BCM_SYSPORT_STAT_NETDEV
)
379 p
= (char *)&dev
->stats
;
387 static void bcm_sysport_get_wol(struct net_device
*dev
,
388 struct ethtool_wolinfo
*wol
)
390 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
393 wol
->supported
= WAKE_MAGIC
| WAKE_MAGICSECURE
;
394 wol
->wolopts
= priv
->wolopts
;
396 if (!(priv
->wolopts
& WAKE_MAGICSECURE
))
399 /* Return the programmed SecureOn password */
400 reg
= umac_readl(priv
, UMAC_PSW_MS
);
401 put_unaligned_be16(reg
, &wol
->sopass
[0]);
402 reg
= umac_readl(priv
, UMAC_PSW_LS
);
403 put_unaligned_be32(reg
, &wol
->sopass
[2]);
406 static int bcm_sysport_set_wol(struct net_device
*dev
,
407 struct ethtool_wolinfo
*wol
)
409 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
410 struct device
*kdev
= &priv
->pdev
->dev
;
411 u32 supported
= WAKE_MAGIC
| WAKE_MAGICSECURE
;
413 if (!device_can_wakeup(kdev
))
416 if (wol
->wolopts
& ~supported
)
419 /* Program the SecureOn password */
420 if (wol
->wolopts
& WAKE_MAGICSECURE
) {
421 umac_writel(priv
, get_unaligned_be16(&wol
->sopass
[0]),
423 umac_writel(priv
, get_unaligned_be32(&wol
->sopass
[2]),
427 /* Flag the device and relevant IRQ as wakeup capable */
429 device_set_wakeup_enable(kdev
, 1);
430 enable_irq_wake(priv
->wol_irq
);
431 priv
->wol_irq_disabled
= 0;
433 device_set_wakeup_enable(kdev
, 0);
434 /* Avoid unbalanced disable_irq_wake calls */
435 if (!priv
->wol_irq_disabled
)
436 disable_irq_wake(priv
->wol_irq
);
437 priv
->wol_irq_disabled
= 1;
440 priv
->wolopts
= wol
->wolopts
;
445 static void bcm_sysport_free_cb(struct bcm_sysport_cb
*cb
)
447 dev_kfree_skb_any(cb
->skb
);
449 dma_unmap_addr_set(cb
, dma_addr
, 0);
452 static int bcm_sysport_rx_refill(struct bcm_sysport_priv
*priv
,
453 struct bcm_sysport_cb
*cb
)
455 struct device
*kdev
= &priv
->pdev
->dev
;
456 struct net_device
*ndev
= priv
->netdev
;
460 cb
->skb
= netdev_alloc_skb(priv
->netdev
, RX_BUF_LENGTH
);
462 netif_err(priv
, rx_err
, ndev
, "SKB alloc failed\n");
466 mapping
= dma_map_single(kdev
, cb
->skb
->data
,
467 RX_BUF_LENGTH
, DMA_FROM_DEVICE
);
468 ret
= dma_mapping_error(kdev
, mapping
);
470 bcm_sysport_free_cb(cb
);
471 netif_err(priv
, rx_err
, ndev
, "DMA mapping failure\n");
475 dma_unmap_addr_set(cb
, dma_addr
, mapping
);
476 dma_desc_set_addr(priv
, priv
->rx_bd_assign_ptr
, mapping
);
478 priv
->rx_bd_assign_index
++;
479 priv
->rx_bd_assign_index
&= (priv
->num_rx_bds
- 1);
480 priv
->rx_bd_assign_ptr
= priv
->rx_bds
+
481 (priv
->rx_bd_assign_index
* DESC_SIZE
);
483 netif_dbg(priv
, rx_status
, ndev
, "RX refill\n");
488 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv
*priv
)
490 struct bcm_sysport_cb
*cb
;
494 for (i
= 0; i
< priv
->num_rx_bds
; i
++) {
495 cb
= &priv
->rx_cbs
[priv
->rx_bd_assign_index
];
499 ret
= bcm_sysport_rx_refill(priv
, cb
);
507 /* Poll the hardware for up to budget packets to process */
508 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv
*priv
,
511 struct device
*kdev
= &priv
->pdev
->dev
;
512 struct net_device
*ndev
= priv
->netdev
;
513 unsigned int processed
= 0, to_process
;
514 struct bcm_sysport_cb
*cb
;
516 unsigned int p_index
;
520 /* Determine how much we should process since last call */
521 p_index
= rdma_readl(priv
, RDMA_PROD_INDEX
);
522 p_index
&= RDMA_PROD_INDEX_MASK
;
524 if (p_index
< priv
->rx_c_index
)
525 to_process
= (RDMA_CONS_INDEX_MASK
+ 1) -
526 priv
->rx_c_index
+ p_index
;
528 to_process
= p_index
- priv
->rx_c_index
;
530 netif_dbg(priv
, rx_status
, ndev
,
531 "p_index=%d rx_c_index=%d to_process=%d\n",
532 p_index
, priv
->rx_c_index
, to_process
);
534 while ((processed
< to_process
) && (processed
< budget
)) {
535 cb
= &priv
->rx_cbs
[priv
->rx_read_ptr
];
537 dma_unmap_single(kdev
, dma_unmap_addr(cb
, dma_addr
),
538 RX_BUF_LENGTH
, DMA_FROM_DEVICE
);
540 /* Extract the Receive Status Block prepended */
541 rsb
= (struct bcm_rsb
*)skb
->data
;
542 len
= (rsb
->rx_status_len
>> DESC_LEN_SHIFT
) & DESC_LEN_MASK
;
543 status
= (rsb
->rx_status_len
>> DESC_STATUS_SHIFT
) &
548 if (priv
->rx_read_ptr
== priv
->num_rx_bds
)
549 priv
->rx_read_ptr
= 0;
551 netif_dbg(priv
, rx_status
, ndev
,
552 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
553 p_index
, priv
->rx_c_index
, priv
->rx_read_ptr
,
556 if (unlikely(!skb
)) {
557 netif_err(priv
, rx_err
, ndev
, "out of memory!\n");
558 ndev
->stats
.rx_dropped
++;
559 ndev
->stats
.rx_errors
++;
563 if (unlikely(!(status
& DESC_EOP
) || !(status
& DESC_SOP
))) {
564 netif_err(priv
, rx_status
, ndev
, "fragmented packet!\n");
565 ndev
->stats
.rx_dropped
++;
566 ndev
->stats
.rx_errors
++;
567 bcm_sysport_free_cb(cb
);
571 if (unlikely(status
& (RX_STATUS_ERR
| RX_STATUS_OVFLOW
))) {
572 netif_err(priv
, rx_err
, ndev
, "error packet\n");
573 if (status
& RX_STATUS_OVFLOW
)
574 ndev
->stats
.rx_over_errors
++;
575 ndev
->stats
.rx_dropped
++;
576 ndev
->stats
.rx_errors
++;
577 bcm_sysport_free_cb(cb
);
583 /* Hardware validated our checksum */
584 if (likely(status
& DESC_L4_CSUM
))
585 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
587 /* Hardware pre-pends packets with 2bytes before Ethernet
588 * header plus we have the Receive Status Block, strip off all
589 * of this from the SKB.
591 skb_pull(skb
, sizeof(*rsb
) + 2);
592 len
-= (sizeof(*rsb
) + 2);
594 /* UniMAC may forward CRC */
596 skb_trim(skb
, len
- ETH_FCS_LEN
);
600 skb
->protocol
= eth_type_trans(skb
, ndev
);
601 ndev
->stats
.rx_packets
++;
602 ndev
->stats
.rx_bytes
+= len
;
604 napi_gro_receive(&priv
->napi
, skb
);
606 bcm_sysport_rx_refill(priv
, cb
);
612 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv
*priv
,
613 struct bcm_sysport_cb
*cb
,
614 unsigned int *bytes_compl
,
615 unsigned int *pkts_compl
)
617 struct device
*kdev
= &priv
->pdev
->dev
;
618 struct net_device
*ndev
= priv
->netdev
;
621 ndev
->stats
.tx_bytes
+= cb
->skb
->len
;
622 *bytes_compl
+= cb
->skb
->len
;
623 dma_unmap_single(kdev
, dma_unmap_addr(cb
, dma_addr
),
624 dma_unmap_len(cb
, dma_len
),
626 ndev
->stats
.tx_packets
++;
628 bcm_sysport_free_cb(cb
);
630 } else if (dma_unmap_addr(cb
, dma_addr
)) {
631 ndev
->stats
.tx_bytes
+= dma_unmap_len(cb
, dma_len
);
632 dma_unmap_page(kdev
, dma_unmap_addr(cb
, dma_addr
),
633 dma_unmap_len(cb
, dma_len
), DMA_TO_DEVICE
);
634 dma_unmap_addr_set(cb
, dma_addr
, 0);
638 /* Reclaim queued SKBs for transmission completion, lockless version */
639 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv
*priv
,
640 struct bcm_sysport_tx_ring
*ring
)
642 struct net_device
*ndev
= priv
->netdev
;
643 unsigned int c_index
, last_c_index
, last_tx_cn
, num_tx_cbs
;
644 unsigned int pkts_compl
= 0, bytes_compl
= 0;
645 struct bcm_sysport_cb
*cb
;
646 struct netdev_queue
*txq
;
649 txq
= netdev_get_tx_queue(ndev
, ring
->index
);
651 /* Compute how many descriptors have been processed since last call */
652 hw_ind
= tdma_readl(priv
, TDMA_DESC_RING_PROD_CONS_INDEX(ring
->index
));
653 c_index
= (hw_ind
>> RING_CONS_INDEX_SHIFT
) & RING_CONS_INDEX_MASK
;
654 ring
->p_index
= (hw_ind
& RING_PROD_INDEX_MASK
);
656 last_c_index
= ring
->c_index
;
657 num_tx_cbs
= ring
->size
;
659 c_index
&= (num_tx_cbs
- 1);
661 if (c_index
>= last_c_index
)
662 last_tx_cn
= c_index
- last_c_index
;
664 last_tx_cn
= num_tx_cbs
- last_c_index
+ c_index
;
666 netif_dbg(priv
, tx_done
, ndev
,
667 "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
668 ring
->index
, c_index
, last_tx_cn
, last_c_index
);
670 while (last_tx_cn
-- > 0) {
671 cb
= ring
->cbs
+ last_c_index
;
672 bcm_sysport_tx_reclaim_one(priv
, cb
, &bytes_compl
, &pkts_compl
);
676 last_c_index
&= (num_tx_cbs
- 1);
679 ring
->c_index
= c_index
;
681 if (netif_tx_queue_stopped(txq
) && pkts_compl
)
682 netif_tx_wake_queue(txq
);
684 netif_dbg(priv
, tx_done
, ndev
,
685 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
686 ring
->index
, ring
->c_index
, pkts_compl
, bytes_compl
);
691 /* Locked version of the per-ring TX reclaim routine */
692 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv
*priv
,
693 struct bcm_sysport_tx_ring
*ring
)
695 unsigned int released
;
698 spin_lock_irqsave(&ring
->lock
, flags
);
699 released
= __bcm_sysport_tx_reclaim(priv
, ring
);
700 spin_unlock_irqrestore(&ring
->lock
, flags
);
705 static int bcm_sysport_tx_poll(struct napi_struct
*napi
, int budget
)
707 struct bcm_sysport_tx_ring
*ring
=
708 container_of(napi
, struct bcm_sysport_tx_ring
, napi
);
709 unsigned int work_done
= 0;
711 work_done
= bcm_sysport_tx_reclaim(ring
->priv
, ring
);
713 if (work_done
< budget
) {
715 /* re-enable TX interrupt */
716 intrl2_1_mask_clear(ring
->priv
, BIT(ring
->index
));
722 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv
*priv
)
726 for (q
= 0; q
< priv
->netdev
->num_tx_queues
; q
++)
727 bcm_sysport_tx_reclaim(priv
, &priv
->tx_rings
[q
]);
730 static int bcm_sysport_poll(struct napi_struct
*napi
, int budget
)
732 struct bcm_sysport_priv
*priv
=
733 container_of(napi
, struct bcm_sysport_priv
, napi
);
734 unsigned int work_done
= 0;
736 work_done
= bcm_sysport_desc_rx(priv
, budget
);
738 priv
->rx_c_index
+= work_done
;
739 priv
->rx_c_index
&= RDMA_CONS_INDEX_MASK
;
740 rdma_writel(priv
, priv
->rx_c_index
, RDMA_CONS_INDEX
);
742 if (work_done
< budget
) {
744 /* re-enable RX interrupts */
745 intrl2_0_mask_clear(priv
, INTRL2_0_RDMA_MBDONE
);
751 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv
*priv
)
755 /* Stop monitoring MPD interrupt */
756 intrl2_0_mask_set(priv
, INTRL2_0_MPD
);
758 /* Clear the MagicPacket detection logic */
759 reg
= umac_readl(priv
, UMAC_MPD_CTRL
);
761 umac_writel(priv
, reg
, UMAC_MPD_CTRL
);
763 netif_dbg(priv
, wol
, priv
->netdev
, "resumed from WOL\n");
766 /* RX and misc interrupt routine */
767 static irqreturn_t
bcm_sysport_rx_isr(int irq
, void *dev_id
)
769 struct net_device
*dev
= dev_id
;
770 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
772 priv
->irq0_stat
= intrl2_0_readl(priv
, INTRL2_CPU_STATUS
) &
773 ~intrl2_0_readl(priv
, INTRL2_CPU_MASK_STATUS
);
774 intrl2_0_writel(priv
, priv
->irq0_stat
, INTRL2_CPU_CLEAR
);
776 if (unlikely(priv
->irq0_stat
== 0)) {
777 netdev_warn(priv
->netdev
, "spurious RX interrupt\n");
781 if (priv
->irq0_stat
& INTRL2_0_RDMA_MBDONE
) {
782 if (likely(napi_schedule_prep(&priv
->napi
))) {
783 /* disable RX interrupts */
784 intrl2_0_mask_set(priv
, INTRL2_0_RDMA_MBDONE
);
785 __napi_schedule(&priv
->napi
);
789 /* TX ring is full, perform a full reclaim since we do not know
790 * which one would trigger this interrupt
792 if (priv
->irq0_stat
& INTRL2_0_TX_RING_FULL
)
793 bcm_sysport_tx_reclaim_all(priv
);
795 if (priv
->irq0_stat
& INTRL2_0_MPD
) {
796 netdev_info(priv
->netdev
, "Wake-on-LAN interrupt!\n");
797 bcm_sysport_resume_from_wol(priv
);
803 /* TX interrupt service routine */
804 static irqreturn_t
bcm_sysport_tx_isr(int irq
, void *dev_id
)
806 struct net_device
*dev
= dev_id
;
807 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
808 struct bcm_sysport_tx_ring
*txr
;
811 priv
->irq1_stat
= intrl2_1_readl(priv
, INTRL2_CPU_STATUS
) &
812 ~intrl2_1_readl(priv
, INTRL2_CPU_MASK_STATUS
);
813 intrl2_1_writel(priv
, 0xffffffff, INTRL2_CPU_CLEAR
);
815 if (unlikely(priv
->irq1_stat
== 0)) {
816 netdev_warn(priv
->netdev
, "spurious TX interrupt\n");
820 for (ring
= 0; ring
< dev
->num_tx_queues
; ring
++) {
821 if (!(priv
->irq1_stat
& BIT(ring
)))
824 txr
= &priv
->tx_rings
[ring
];
826 if (likely(napi_schedule_prep(&txr
->napi
))) {
827 intrl2_1_mask_set(priv
, BIT(ring
));
828 __napi_schedule(&txr
->napi
);
835 static irqreturn_t
bcm_sysport_wol_isr(int irq
, void *dev_id
)
837 struct bcm_sysport_priv
*priv
= dev_id
;
839 pm_wakeup_event(&priv
->pdev
->dev
, 0);
844 static int bcm_sysport_insert_tsb(struct sk_buff
*skb
, struct net_device
*dev
)
846 struct sk_buff
*nskb
;
853 /* Re-allocate SKB if needed */
854 if (unlikely(skb_headroom(skb
) < sizeof(*tsb
))) {
855 nskb
= skb_realloc_headroom(skb
, sizeof(*tsb
));
858 dev
->stats
.tx_errors
++;
859 dev
->stats
.tx_dropped
++;
865 tsb
= (struct bcm_tsb
*)skb_push(skb
, sizeof(*tsb
));
866 /* Zero-out TSB by default */
867 memset(tsb
, 0, sizeof(*tsb
));
869 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
870 ip_ver
= htons(skb
->protocol
);
873 ip_proto
= ip_hdr(skb
)->protocol
;
876 ip_proto
= ipv6_hdr(skb
)->nexthdr
;
882 /* Get the checksum offset and the L4 (transport) offset */
883 csum_start
= skb_checksum_start_offset(skb
) - sizeof(*tsb
);
884 csum_info
= (csum_start
+ skb
->csum_offset
) & L4_CSUM_PTR_MASK
;
885 csum_info
|= (csum_start
<< L4_PTR_SHIFT
);
887 if (ip_proto
== IPPROTO_TCP
|| ip_proto
== IPPROTO_UDP
) {
888 csum_info
|= L4_LENGTH_VALID
;
889 if (ip_proto
== IPPROTO_UDP
&& ip_ver
== ETH_P_IP
)
895 tsb
->l4_ptr_dest_map
= csum_info
;
901 static netdev_tx_t
bcm_sysport_xmit(struct sk_buff
*skb
,
902 struct net_device
*dev
)
904 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
905 struct device
*kdev
= &priv
->pdev
->dev
;
906 struct bcm_sysport_tx_ring
*ring
;
907 struct bcm_sysport_cb
*cb
;
908 struct netdev_queue
*txq
;
909 struct dma_desc
*desc
;
910 unsigned int skb_len
;
917 queue
= skb_get_queue_mapping(skb
);
918 txq
= netdev_get_tx_queue(dev
, queue
);
919 ring
= &priv
->tx_rings
[queue
];
921 /* lock against tx reclaim in BH context and TX ring full interrupt */
922 spin_lock_irqsave(&ring
->lock
, flags
);
923 if (unlikely(ring
->desc_count
== 0)) {
924 netif_tx_stop_queue(txq
);
925 netdev_err(dev
, "queue %d awake and ring full!\n", queue
);
926 ret
= NETDEV_TX_BUSY
;
930 /* Insert TSB and checksum infos */
932 ret
= bcm_sysport_insert_tsb(skb
, dev
);
939 /* The Ethernet switch we are interfaced with needs packets to be at
940 * least 64 bytes (including FCS) otherwise they will be discarded when
941 * they enter the switch port logic. When Broadcom tags are enabled, we
942 * need to make sure that packets are at least 68 bytes
943 * (including FCS and tag) because the length verification is done after
944 * the Broadcom tag is stripped off the ingress packet.
946 if (skb_padto(skb
, ETH_ZLEN
+ ENET_BRCM_TAG_LEN
)) {
951 skb_len
= skb
->len
< ETH_ZLEN
+ ENET_BRCM_TAG_LEN
?
952 ETH_ZLEN
+ ENET_BRCM_TAG_LEN
: skb
->len
;
954 mapping
= dma_map_single(kdev
, skb
->data
, skb_len
, DMA_TO_DEVICE
);
955 if (dma_mapping_error(kdev
, mapping
)) {
956 netif_err(priv
, tx_err
, dev
, "DMA map failed at %p (len=%d)\n",
962 /* Remember the SKB for future freeing */
963 cb
= &ring
->cbs
[ring
->curr_desc
];
965 dma_unmap_addr_set(cb
, dma_addr
, mapping
);
966 dma_unmap_len_set(cb
, dma_len
, skb_len
);
968 /* Fetch a descriptor entry from our pool */
969 desc
= ring
->desc_cpu
;
971 desc
->addr_lo
= lower_32_bits(mapping
);
972 len_status
= upper_32_bits(mapping
) & DESC_ADDR_HI_MASK
;
973 len_status
|= (skb_len
<< DESC_LEN_SHIFT
);
974 len_status
|= (DESC_SOP
| DESC_EOP
| TX_STATUS_APP_CRC
) <<
976 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
977 len_status
|= (DESC_L4_CSUM
<< DESC_STATUS_SHIFT
);
980 if (ring
->curr_desc
== ring
->size
)
984 /* Ensure write completion of the descriptor status/length
985 * in DRAM before the System Port WRITE_PORT register latches
989 desc
->addr_status_len
= len_status
;
992 /* Write this descriptor address to the RING write port */
993 tdma_port_write_desc_addr(priv
, desc
, ring
->index
);
995 /* Check ring space and update SW control flow */
996 if (ring
->desc_count
== 0)
997 netif_tx_stop_queue(txq
);
999 netif_dbg(priv
, tx_queued
, dev
, "ring=%d desc_count=%d, curr_desc=%d\n",
1000 ring
->index
, ring
->desc_count
, ring
->curr_desc
);
1004 spin_unlock_irqrestore(&ring
->lock
, flags
);
1008 static void bcm_sysport_tx_timeout(struct net_device
*dev
)
1010 netdev_warn(dev
, "transmit timeout!\n");
1012 dev
->trans_start
= jiffies
;
1013 dev
->stats
.tx_errors
++;
1015 netif_tx_wake_all_queues(dev
);
1018 /* phylib adjust link callback */
1019 static void bcm_sysport_adj_link(struct net_device
*dev
)
1021 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
1022 struct phy_device
*phydev
= priv
->phydev
;
1023 unsigned int changed
= 0;
1024 u32 cmd_bits
= 0, reg
;
1026 if (priv
->old_link
!= phydev
->link
) {
1028 priv
->old_link
= phydev
->link
;
1031 if (priv
->old_duplex
!= phydev
->duplex
) {
1033 priv
->old_duplex
= phydev
->duplex
;
1036 switch (phydev
->speed
) {
1038 cmd_bits
= CMD_SPEED_2500
;
1041 cmd_bits
= CMD_SPEED_1000
;
1044 cmd_bits
= CMD_SPEED_100
;
1047 cmd_bits
= CMD_SPEED_10
;
1052 cmd_bits
<<= CMD_SPEED_SHIFT
;
1054 if (phydev
->duplex
== DUPLEX_HALF
)
1055 cmd_bits
|= CMD_HD_EN
;
1057 if (priv
->old_pause
!= phydev
->pause
) {
1059 priv
->old_pause
= phydev
->pause
;
1063 cmd_bits
|= CMD_RX_PAUSE_IGNORE
| CMD_TX_PAUSE_IGNORE
;
1066 reg
= umac_readl(priv
, UMAC_CMD
);
1067 reg
&= ~((CMD_SPEED_MASK
<< CMD_SPEED_SHIFT
) |
1068 CMD_HD_EN
| CMD_RX_PAUSE_IGNORE
|
1069 CMD_TX_PAUSE_IGNORE
);
1071 umac_writel(priv
, reg
, UMAC_CMD
);
1073 phy_print_status(priv
->phydev
);
1077 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv
*priv
,
1080 struct bcm_sysport_tx_ring
*ring
= &priv
->tx_rings
[index
];
1081 struct device
*kdev
= &priv
->pdev
->dev
;
1086 /* Simple descriptors partitioning for now */
1089 /* We just need one DMA descriptor which is DMA-able, since writing to
1090 * the port will allocate a new descriptor in its internal linked-list
1092 p
= dma_zalloc_coherent(kdev
, 1, &ring
->desc_dma
, GFP_KERNEL
);
1094 netif_err(priv
, hw
, priv
->netdev
, "DMA alloc failed\n");
1098 ring
->cbs
= kcalloc(size
, sizeof(struct bcm_sysport_cb
), GFP_KERNEL
);
1100 netif_err(priv
, hw
, priv
->netdev
, "CB allocation failed\n");
1104 /* Initialize SW view of the ring */
1105 spin_lock_init(&ring
->lock
);
1107 netif_napi_add(priv
->netdev
, &ring
->napi
, bcm_sysport_tx_poll
, 64);
1108 ring
->index
= index
;
1110 ring
->alloc_size
= ring
->size
;
1112 ring
->desc_count
= ring
->size
;
1113 ring
->curr_desc
= 0;
1115 /* Initialize HW ring */
1116 tdma_writel(priv
, RING_EN
, TDMA_DESC_RING_HEAD_TAIL_PTR(index
));
1117 tdma_writel(priv
, 0, TDMA_DESC_RING_COUNT(index
));
1118 tdma_writel(priv
, 1, TDMA_DESC_RING_INTR_CONTROL(index
));
1119 tdma_writel(priv
, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index
));
1120 tdma_writel(priv
, RING_IGNORE_STATUS
, TDMA_DESC_RING_MAPPING(index
));
1121 tdma_writel(priv
, 0, TDMA_DESC_RING_PCP_DEI_VID(index
));
1123 /* Program the number of descriptors as MAX_THRESHOLD and half of
1124 * its size for the hysteresis trigger
1126 tdma_writel(priv
, ring
->size
|
1127 1 << RING_HYST_THRESH_SHIFT
,
1128 TDMA_DESC_RING_MAX_HYST(index
));
1130 /* Enable the ring queue in the arbiter */
1131 reg
= tdma_readl(priv
, TDMA_TIER1_ARB_0_QUEUE_EN
);
1132 reg
|= (1 << index
);
1133 tdma_writel(priv
, reg
, TDMA_TIER1_ARB_0_QUEUE_EN
);
1135 napi_enable(&ring
->napi
);
1137 netif_dbg(priv
, hw
, priv
->netdev
,
1138 "TDMA cfg, size=%d, desc_cpu=%p\n",
1139 ring
->size
, ring
->desc_cpu
);
1144 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv
*priv
,
1147 struct bcm_sysport_tx_ring
*ring
= &priv
->tx_rings
[index
];
1148 struct device
*kdev
= &priv
->pdev
->dev
;
1151 /* Caller should stop the TDMA engine */
1152 reg
= tdma_readl(priv
, TDMA_STATUS
);
1153 if (!(reg
& TDMA_DISABLED
))
1154 netdev_warn(priv
->netdev
, "TDMA not stopped!\n");
1156 napi_disable(&ring
->napi
);
1157 netif_napi_del(&ring
->napi
);
1159 bcm_sysport_tx_reclaim(priv
, ring
);
1164 if (ring
->desc_dma
) {
1165 dma_free_coherent(kdev
, 1, ring
->desc_cpu
, ring
->desc_dma
);
1169 ring
->alloc_size
= 0;
1171 netif_dbg(priv
, hw
, priv
->netdev
, "TDMA fini done\n");
1175 static inline int rdma_enable_set(struct bcm_sysport_priv
*priv
,
1176 unsigned int enable
)
1178 unsigned int timeout
= 1000;
1181 reg
= rdma_readl(priv
, RDMA_CONTROL
);
1186 rdma_writel(priv
, reg
, RDMA_CONTROL
);
1188 /* Poll for RMDA disabling completion */
1190 reg
= rdma_readl(priv
, RDMA_STATUS
);
1191 if (!!(reg
& RDMA_DISABLED
) == !enable
)
1193 usleep_range(1000, 2000);
1194 } while (timeout
-- > 0);
1196 netdev_err(priv
->netdev
, "timeout waiting for RDMA to finish\n");
1202 static inline int tdma_enable_set(struct bcm_sysport_priv
*priv
,
1203 unsigned int enable
)
1205 unsigned int timeout
= 1000;
1208 reg
= tdma_readl(priv
, TDMA_CONTROL
);
1213 tdma_writel(priv
, reg
, TDMA_CONTROL
);
1215 /* Poll for TMDA disabling completion */
1217 reg
= tdma_readl(priv
, TDMA_STATUS
);
1218 if (!!(reg
& TDMA_DISABLED
) == !enable
)
1221 usleep_range(1000, 2000);
1222 } while (timeout
-- > 0);
1224 netdev_err(priv
->netdev
, "timeout waiting for TDMA to finish\n");
1229 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv
*priv
)
1234 /* Initialize SW view of the RX ring */
1235 priv
->num_rx_bds
= NUM_RX_DESC
;
1236 priv
->rx_bds
= priv
->base
+ SYS_PORT_RDMA_OFFSET
;
1237 priv
->rx_bd_assign_ptr
= priv
->rx_bds
;
1238 priv
->rx_bd_assign_index
= 0;
1239 priv
->rx_c_index
= 0;
1240 priv
->rx_read_ptr
= 0;
1241 priv
->rx_cbs
= kcalloc(priv
->num_rx_bds
, sizeof(struct bcm_sysport_cb
),
1243 if (!priv
->rx_cbs
) {
1244 netif_err(priv
, hw
, priv
->netdev
, "CB allocation failed\n");
1248 ret
= bcm_sysport_alloc_rx_bufs(priv
);
1250 netif_err(priv
, hw
, priv
->netdev
, "SKB allocation failed\n");
1254 /* Initialize HW, ensure RDMA is disabled */
1255 reg
= rdma_readl(priv
, RDMA_STATUS
);
1256 if (!(reg
& RDMA_DISABLED
))
1257 rdma_enable_set(priv
, 0);
1259 rdma_writel(priv
, 0, RDMA_WRITE_PTR_LO
);
1260 rdma_writel(priv
, 0, RDMA_WRITE_PTR_HI
);
1261 rdma_writel(priv
, 0, RDMA_PROD_INDEX
);
1262 rdma_writel(priv
, 0, RDMA_CONS_INDEX
);
1263 rdma_writel(priv
, priv
->num_rx_bds
<< RDMA_RING_SIZE_SHIFT
|
1264 RX_BUF_LENGTH
, RDMA_RING_BUF_SIZE
);
1265 /* Operate the queue in ring mode */
1266 rdma_writel(priv
, 0, RDMA_START_ADDR_HI
);
1267 rdma_writel(priv
, 0, RDMA_START_ADDR_LO
);
1268 rdma_writel(priv
, 0, RDMA_END_ADDR_HI
);
1269 rdma_writel(priv
, NUM_HW_RX_DESC_WORDS
- 1, RDMA_END_ADDR_LO
);
1271 rdma_writel(priv
, 1, RDMA_MBDONE_INTR
);
1273 netif_dbg(priv
, hw
, priv
->netdev
,
1274 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1275 priv
->num_rx_bds
, priv
->rx_bds
);
1280 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv
*priv
)
1282 struct bcm_sysport_cb
*cb
;
1286 /* Caller should ensure RDMA is disabled */
1287 reg
= rdma_readl(priv
, RDMA_STATUS
);
1288 if (!(reg
& RDMA_DISABLED
))
1289 netdev_warn(priv
->netdev
, "RDMA not stopped!\n");
1291 for (i
= 0; i
< priv
->num_rx_bds
; i
++) {
1292 cb
= &priv
->rx_cbs
[i
];
1293 if (dma_unmap_addr(cb
, dma_addr
))
1294 dma_unmap_single(&priv
->pdev
->dev
,
1295 dma_unmap_addr(cb
, dma_addr
),
1296 RX_BUF_LENGTH
, DMA_FROM_DEVICE
);
1297 bcm_sysport_free_cb(cb
);
1300 kfree(priv
->rx_cbs
);
1301 priv
->rx_cbs
= NULL
;
1303 netif_dbg(priv
, hw
, priv
->netdev
, "RDMA fini done\n");
1306 static void bcm_sysport_set_rx_mode(struct net_device
*dev
)
1308 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
1311 reg
= umac_readl(priv
, UMAC_CMD
);
1312 if (dev
->flags
& IFF_PROMISC
)
1315 reg
&= ~CMD_PROMISC
;
1316 umac_writel(priv
, reg
, UMAC_CMD
);
1318 /* No support for ALLMULTI */
1319 if (dev
->flags
& IFF_ALLMULTI
)
1323 static inline void umac_enable_set(struct bcm_sysport_priv
*priv
,
1324 u32 mask
, unsigned int enable
)
1328 reg
= umac_readl(priv
, UMAC_CMD
);
1333 umac_writel(priv
, reg
, UMAC_CMD
);
1335 /* UniMAC stops on a packet boundary, wait for a full-sized packet
1336 * to be processed (1 msec).
1339 usleep_range(1000, 2000);
1342 static inline int umac_reset(struct bcm_sysport_priv
*priv
)
1344 unsigned int timeout
= 0;
1348 umac_writel(priv
, 0, UMAC_CMD
);
1349 while (timeout
++ < 1000) {
1350 reg
= umac_readl(priv
, UMAC_CMD
);
1351 if (!(reg
& CMD_SW_RESET
))
1357 if (timeout
== 1000) {
1358 dev_err(&priv
->pdev
->dev
,
1359 "timeout waiting for MAC to come out of reset\n");
1366 static void umac_set_hw_addr(struct bcm_sysport_priv
*priv
,
1367 unsigned char *addr
)
1369 umac_writel(priv
, (addr
[0] << 24) | (addr
[1] << 16) |
1370 (addr
[2] << 8) | addr
[3], UMAC_MAC0
);
1371 umac_writel(priv
, (addr
[4] << 8) | addr
[5], UMAC_MAC1
);
1374 static void topctrl_flush(struct bcm_sysport_priv
*priv
)
1376 topctrl_writel(priv
, RX_FLUSH
, RX_FLUSH_CNTL
);
1377 topctrl_writel(priv
, TX_FLUSH
, TX_FLUSH_CNTL
);
1379 topctrl_writel(priv
, 0, RX_FLUSH_CNTL
);
1380 topctrl_writel(priv
, 0, TX_FLUSH_CNTL
);
1383 static void bcm_sysport_netif_start(struct net_device
*dev
)
1385 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
1388 napi_enable(&priv
->napi
);
1390 phy_start(priv
->phydev
);
1392 /* Enable TX interrupts for the 32 TXQs */
1393 intrl2_1_mask_clear(priv
, 0xffffffff);
1395 /* Last call before we start the real business */
1396 netif_tx_start_all_queues(dev
);
1399 static void rbuf_init(struct bcm_sysport_priv
*priv
)
1403 reg
= rbuf_readl(priv
, RBUF_CONTROL
);
1404 reg
|= RBUF_4B_ALGN
| RBUF_RSB_EN
;
1405 rbuf_writel(priv
, reg
, RBUF_CONTROL
);
1408 static int bcm_sysport_open(struct net_device
*dev
)
1410 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
1415 ret
= umac_reset(priv
);
1417 netdev_err(dev
, "UniMAC reset failed\n");
1421 /* Flush TX and RX FIFOs at TOPCTRL level */
1422 topctrl_flush(priv
);
1424 /* Disable the UniMAC RX/TX */
1425 umac_enable_set(priv
, CMD_RX_EN
| CMD_TX_EN
, 0);
1427 /* Enable RBUF 2bytes alignment and Receive Status Block */
1430 /* Set maximum frame length */
1431 umac_writel(priv
, UMAC_MAX_MTU_SIZE
, UMAC_MAX_FRAME_LEN
);
1433 /* Set MAC address */
1434 umac_set_hw_addr(priv
, dev
->dev_addr
);
1436 /* Read CRC forward */
1437 priv
->crc_fwd
= !!(umac_readl(priv
, UMAC_CMD
) & CMD_CRC_FWD
);
1439 priv
->phydev
= of_phy_connect(dev
, priv
->phy_dn
, bcm_sysport_adj_link
,
1440 0, priv
->phy_interface
);
1441 if (!priv
->phydev
) {
1442 netdev_err(dev
, "could not attach to PHY\n");
1446 /* Reset house keeping link status */
1447 priv
->old_duplex
= -1;
1448 priv
->old_link
= -1;
1449 priv
->old_pause
= -1;
1451 /* mask all interrupts and request them */
1452 intrl2_0_writel(priv
, 0xffffffff, INTRL2_CPU_MASK_SET
);
1453 intrl2_0_writel(priv
, 0xffffffff, INTRL2_CPU_CLEAR
);
1454 intrl2_0_writel(priv
, 0, INTRL2_CPU_MASK_CLEAR
);
1455 intrl2_1_writel(priv
, 0xffffffff, INTRL2_CPU_MASK_SET
);
1456 intrl2_1_writel(priv
, 0xffffffff, INTRL2_CPU_CLEAR
);
1457 intrl2_1_writel(priv
, 0, INTRL2_CPU_MASK_CLEAR
);
1459 ret
= request_irq(priv
->irq0
, bcm_sysport_rx_isr
, 0, dev
->name
, dev
);
1461 netdev_err(dev
, "failed to request RX interrupt\n");
1462 goto out_phy_disconnect
;
1465 ret
= request_irq(priv
->irq1
, bcm_sysport_tx_isr
, 0, dev
->name
, dev
);
1467 netdev_err(dev
, "failed to request TX interrupt\n");
1471 /* Initialize both hardware and software ring */
1472 for (i
= 0; i
< dev
->num_tx_queues
; i
++) {
1473 ret
= bcm_sysport_init_tx_ring(priv
, i
);
1475 netdev_err(dev
, "failed to initialize TX ring %d\n",
1477 goto out_free_tx_ring
;
1481 /* Initialize linked-list */
1482 tdma_writel(priv
, TDMA_LL_RAM_INIT_BUSY
, TDMA_STATUS
);
1484 /* Initialize RX ring */
1485 ret
= bcm_sysport_init_rx_ring(priv
);
1487 netdev_err(dev
, "failed to initialize RX ring\n");
1488 goto out_free_rx_ring
;
1492 ret
= rdma_enable_set(priv
, 1);
1494 goto out_free_rx_ring
;
1496 /* Enable RX interrupt and TX ring full interrupt */
1497 intrl2_0_mask_clear(priv
, INTRL2_0_RDMA_MBDONE
| INTRL2_0_TX_RING_FULL
);
1500 ret
= tdma_enable_set(priv
, 1);
1502 goto out_clear_rx_int
;
1504 /* Turn on UniMAC TX/RX */
1505 umac_enable_set(priv
, CMD_RX_EN
| CMD_TX_EN
, 1);
1507 bcm_sysport_netif_start(dev
);
1512 intrl2_0_mask_set(priv
, INTRL2_0_RDMA_MBDONE
| INTRL2_0_TX_RING_FULL
);
1514 bcm_sysport_fini_rx_ring(priv
);
1516 for (i
= 0; i
< dev
->num_tx_queues
; i
++)
1517 bcm_sysport_fini_tx_ring(priv
, i
);
1518 free_irq(priv
->irq1
, dev
);
1520 free_irq(priv
->irq0
, dev
);
1522 phy_disconnect(priv
->phydev
);
1526 static void bcm_sysport_netif_stop(struct net_device
*dev
)
1528 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
1530 /* stop all software from updating hardware */
1531 netif_tx_stop_all_queues(dev
);
1532 napi_disable(&priv
->napi
);
1533 phy_stop(priv
->phydev
);
1535 /* mask all interrupts */
1536 intrl2_0_mask_set(priv
, 0xffffffff);
1537 intrl2_0_writel(priv
, 0xffffffff, INTRL2_CPU_CLEAR
);
1538 intrl2_1_mask_set(priv
, 0xffffffff);
1539 intrl2_1_writel(priv
, 0xffffffff, INTRL2_CPU_CLEAR
);
1542 static int bcm_sysport_stop(struct net_device
*dev
)
1544 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
1548 bcm_sysport_netif_stop(dev
);
1550 /* Disable UniMAC RX */
1551 umac_enable_set(priv
, CMD_RX_EN
, 0);
1553 ret
= tdma_enable_set(priv
, 0);
1555 netdev_err(dev
, "timeout disabling RDMA\n");
1559 /* Wait for a maximum packet size to be drained */
1560 usleep_range(2000, 3000);
1562 ret
= rdma_enable_set(priv
, 0);
1564 netdev_err(dev
, "timeout disabling TDMA\n");
1568 /* Disable UniMAC TX */
1569 umac_enable_set(priv
, CMD_TX_EN
, 0);
1571 /* Free RX/TX rings SW structures */
1572 for (i
= 0; i
< dev
->num_tx_queues
; i
++)
1573 bcm_sysport_fini_tx_ring(priv
, i
);
1574 bcm_sysport_fini_rx_ring(priv
);
1576 free_irq(priv
->irq0
, dev
);
1577 free_irq(priv
->irq1
, dev
);
1579 /* Disconnect from PHY */
1580 phy_disconnect(priv
->phydev
);
1585 static struct ethtool_ops bcm_sysport_ethtool_ops
= {
1586 .get_settings
= bcm_sysport_get_settings
,
1587 .set_settings
= bcm_sysport_set_settings
,
1588 .get_drvinfo
= bcm_sysport_get_drvinfo
,
1589 .get_msglevel
= bcm_sysport_get_msglvl
,
1590 .set_msglevel
= bcm_sysport_set_msglvl
,
1591 .get_link
= ethtool_op_get_link
,
1592 .get_strings
= bcm_sysport_get_strings
,
1593 .get_ethtool_stats
= bcm_sysport_get_stats
,
1594 .get_sset_count
= bcm_sysport_get_sset_count
,
1595 .get_wol
= bcm_sysport_get_wol
,
1596 .set_wol
= bcm_sysport_set_wol
,
1599 static const struct net_device_ops bcm_sysport_netdev_ops
= {
1600 .ndo_start_xmit
= bcm_sysport_xmit
,
1601 .ndo_tx_timeout
= bcm_sysport_tx_timeout
,
1602 .ndo_open
= bcm_sysport_open
,
1603 .ndo_stop
= bcm_sysport_stop
,
1604 .ndo_set_features
= bcm_sysport_set_features
,
1605 .ndo_set_rx_mode
= bcm_sysport_set_rx_mode
,
1608 #define REV_FMT "v%2x.%02x"
1610 static int bcm_sysport_probe(struct platform_device
*pdev
)
1612 struct bcm_sysport_priv
*priv
;
1613 struct device_node
*dn
;
1614 struct net_device
*dev
;
1615 const void *macaddr
;
1620 dn
= pdev
->dev
.of_node
;
1621 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1623 /* Read the Transmit/Receive Queue properties */
1624 if (of_property_read_u32(dn
, "systemport,num-txq", &txq
))
1625 txq
= TDMA_NUM_RINGS
;
1626 if (of_property_read_u32(dn
, "systemport,num-rxq", &rxq
))
1629 dev
= alloc_etherdev_mqs(sizeof(*priv
), txq
, rxq
);
1633 /* Initialize private members */
1634 priv
= netdev_priv(dev
);
1636 priv
->irq0
= platform_get_irq(pdev
, 0);
1637 priv
->irq1
= platform_get_irq(pdev
, 1);
1638 priv
->wol_irq
= platform_get_irq(pdev
, 2);
1639 if (priv
->irq0
<= 0 || priv
->irq1
<= 0) {
1640 dev_err(&pdev
->dev
, "invalid interrupts\n");
1645 priv
->base
= devm_ioremap_resource(&pdev
->dev
, r
);
1646 if (IS_ERR(priv
->base
)) {
1647 ret
= PTR_ERR(priv
->base
);
1654 priv
->phy_interface
= of_get_phy_mode(dn
);
1655 /* Default to GMII interface mode */
1656 if (priv
->phy_interface
< 0)
1657 priv
->phy_interface
= PHY_INTERFACE_MODE_GMII
;
1659 /* In the case of a fixed PHY, the DT node associated
1660 * to the PHY is the Ethernet MAC DT node.
1662 if (of_phy_is_fixed_link(dn
)) {
1663 ret
= of_phy_register_fixed_link(dn
);
1665 dev_err(&pdev
->dev
, "failed to register fixed PHY\n");
1672 /* Initialize netdevice members */
1673 macaddr
= of_get_mac_address(dn
);
1674 if (!macaddr
|| !is_valid_ether_addr(macaddr
)) {
1675 dev_warn(&pdev
->dev
, "using random Ethernet MAC\n");
1676 random_ether_addr(dev
->dev_addr
);
1678 ether_addr_copy(dev
->dev_addr
, macaddr
);
1681 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1682 dev_set_drvdata(&pdev
->dev
, dev
);
1683 dev
->ethtool_ops
= &bcm_sysport_ethtool_ops
;
1684 dev
->netdev_ops
= &bcm_sysport_netdev_ops
;
1685 netif_napi_add(dev
, &priv
->napi
, bcm_sysport_poll
, 64);
1687 /* HW supported features, none enabled by default */
1688 dev
->hw_features
|= NETIF_F_RXCSUM
| NETIF_F_HIGHDMA
|
1689 NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
;
1691 /* Request the WOL interrupt and advertise suspend if available */
1692 priv
->wol_irq_disabled
= 1;
1693 ret
= devm_request_irq(&pdev
->dev
, priv
->wol_irq
,
1694 bcm_sysport_wol_isr
, 0, dev
->name
, priv
);
1696 device_set_wakeup_capable(&pdev
->dev
, 1);
1698 /* Set the needed headroom once and for all */
1699 BUILD_BUG_ON(sizeof(struct bcm_tsb
) != 8);
1700 dev
->needed_headroom
+= sizeof(struct bcm_tsb
);
1702 /* We are interfaced to a switch which handles the multicast
1703 * filtering for us, so we do not support programming any
1704 * multicast hash table in this Ethernet MAC.
1706 dev
->flags
&= ~IFF_MULTICAST
;
1708 /* libphy will adjust the link state accordingly */
1709 netif_carrier_off(dev
);
1711 ret
= register_netdev(dev
);
1713 dev_err(&pdev
->dev
, "failed to register net_device\n");
1717 priv
->rev
= topctrl_readl(priv
, REV_CNTL
) & REV_MASK
;
1718 dev_info(&pdev
->dev
,
1719 "Broadcom SYSTEMPORT" REV_FMT
1720 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1721 (priv
->rev
>> 8) & 0xff, priv
->rev
& 0xff,
1722 priv
->base
, priv
->irq0
, priv
->irq1
, txq
, rxq
);
1730 static int bcm_sysport_remove(struct platform_device
*pdev
)
1732 struct net_device
*dev
= dev_get_drvdata(&pdev
->dev
);
1734 /* Not much to do, ndo_close has been called
1735 * and we use managed allocations
1737 unregister_netdev(dev
);
1739 dev_set_drvdata(&pdev
->dev
, NULL
);
1744 #ifdef CONFIG_PM_SLEEP
1745 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv
*priv
)
1747 struct net_device
*ndev
= priv
->netdev
;
1748 unsigned int timeout
= 1000;
1751 /* Password has already been programmed */
1752 reg
= umac_readl(priv
, UMAC_MPD_CTRL
);
1755 if (priv
->wolopts
& WAKE_MAGICSECURE
)
1757 umac_writel(priv
, reg
, UMAC_MPD_CTRL
);
1759 /* Make sure RBUF entered WoL mode as result */
1761 reg
= rbuf_readl(priv
, RBUF_STATUS
);
1762 if (reg
& RBUF_WOL_MODE
)
1766 } while (timeout
-- > 0);
1768 /* Do not leave the UniMAC RBUF matching only MPD packets */
1770 reg
= umac_readl(priv
, UMAC_MPD_CTRL
);
1772 umac_writel(priv
, reg
, UMAC_MPD_CTRL
);
1773 netif_err(priv
, wol
, ndev
, "failed to enter WOL mode\n");
1777 /* UniMAC receive needs to be turned on */
1778 umac_enable_set(priv
, CMD_RX_EN
, 1);
1780 /* Enable the interrupt wake-up source */
1781 intrl2_0_mask_clear(priv
, INTRL2_0_MPD
);
1783 netif_dbg(priv
, wol
, ndev
, "entered WOL mode\n");
1788 static int bcm_sysport_suspend(struct device
*d
)
1790 struct net_device
*dev
= dev_get_drvdata(d
);
1791 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
1796 if (!netif_running(dev
))
1799 bcm_sysport_netif_stop(dev
);
1801 phy_suspend(priv
->phydev
);
1803 netif_device_detach(dev
);
1805 /* Disable UniMAC RX */
1806 umac_enable_set(priv
, CMD_RX_EN
, 0);
1808 ret
= rdma_enable_set(priv
, 0);
1810 netdev_err(dev
, "RDMA timeout!\n");
1814 /* Disable RXCHK if enabled */
1815 if (priv
->rx_chk_en
) {
1816 reg
= rxchk_readl(priv
, RXCHK_CONTROL
);
1818 rxchk_writel(priv
, reg
, RXCHK_CONTROL
);
1823 topctrl_writel(priv
, RX_FLUSH
, RX_FLUSH_CNTL
);
1825 ret
= tdma_enable_set(priv
, 0);
1827 netdev_err(dev
, "TDMA timeout!\n");
1831 /* Wait for a packet boundary */
1832 usleep_range(2000, 3000);
1834 umac_enable_set(priv
, CMD_TX_EN
, 0);
1836 topctrl_writel(priv
, TX_FLUSH
, TX_FLUSH_CNTL
);
1838 /* Free RX/TX rings SW structures */
1839 for (i
= 0; i
< dev
->num_tx_queues
; i
++)
1840 bcm_sysport_fini_tx_ring(priv
, i
);
1841 bcm_sysport_fini_rx_ring(priv
);
1843 /* Get prepared for Wake-on-LAN */
1844 if (device_may_wakeup(d
) && priv
->wolopts
)
1845 ret
= bcm_sysport_suspend_to_wol(priv
);
1850 static int bcm_sysport_resume(struct device
*d
)
1852 struct net_device
*dev
= dev_get_drvdata(d
);
1853 struct bcm_sysport_priv
*priv
= netdev_priv(dev
);
1858 if (!netif_running(dev
))
1861 /* We may have been suspended and never received a WOL event that
1862 * would turn off MPD detection, take care of that now
1864 bcm_sysport_resume_from_wol(priv
);
1866 /* Initialize both hardware and software ring */
1867 for (i
= 0; i
< dev
->num_tx_queues
; i
++) {
1868 ret
= bcm_sysport_init_tx_ring(priv
, i
);
1870 netdev_err(dev
, "failed to initialize TX ring %d\n",
1872 goto out_free_tx_rings
;
1876 /* Initialize linked-list */
1877 tdma_writel(priv
, TDMA_LL_RAM_INIT_BUSY
, TDMA_STATUS
);
1879 /* Initialize RX ring */
1880 ret
= bcm_sysport_init_rx_ring(priv
);
1882 netdev_err(dev
, "failed to initialize RX ring\n");
1883 goto out_free_rx_ring
;
1886 netif_device_attach(dev
);
1888 /* Enable RX interrupt and TX ring full interrupt */
1889 intrl2_0_mask_clear(priv
, INTRL2_0_RDMA_MBDONE
| INTRL2_0_TX_RING_FULL
);
1891 /* RX pipe enable */
1892 topctrl_writel(priv
, 0, RX_FLUSH_CNTL
);
1894 ret
= rdma_enable_set(priv
, 1);
1896 netdev_err(dev
, "failed to enable RDMA\n");
1897 goto out_free_rx_ring
;
1901 if (priv
->rx_chk_en
) {
1902 reg
= rxchk_readl(priv
, RXCHK_CONTROL
);
1904 rxchk_writel(priv
, reg
, RXCHK_CONTROL
);
1909 /* Set maximum frame length */
1910 umac_writel(priv
, UMAC_MAX_MTU_SIZE
, UMAC_MAX_FRAME_LEN
);
1912 /* Set MAC address */
1913 umac_set_hw_addr(priv
, dev
->dev_addr
);
1915 umac_enable_set(priv
, CMD_RX_EN
, 1);
1917 /* TX pipe enable */
1918 topctrl_writel(priv
, 0, TX_FLUSH_CNTL
);
1920 umac_enable_set(priv
, CMD_TX_EN
, 1);
1922 ret
= tdma_enable_set(priv
, 1);
1924 netdev_err(dev
, "TDMA timeout!\n");
1925 goto out_free_rx_ring
;
1928 phy_resume(priv
->phydev
);
1930 bcm_sysport_netif_start(dev
);
1935 bcm_sysport_fini_rx_ring(priv
);
1937 for (i
= 0; i
< dev
->num_tx_queues
; i
++)
1938 bcm_sysport_fini_tx_ring(priv
, i
);
1943 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops
,
1944 bcm_sysport_suspend
, bcm_sysport_resume
);
1946 static const struct of_device_id bcm_sysport_of_match
[] = {
1947 { .compatible
= "brcm,systemport-v1.00" },
1948 { .compatible
= "brcm,systemport" },
1952 static struct platform_driver bcm_sysport_driver
= {
1953 .probe
= bcm_sysport_probe
,
1954 .remove
= bcm_sysport_remove
,
1956 .name
= "brcm-systemport",
1957 .owner
= THIS_MODULE
,
1958 .of_match_table
= bcm_sysport_of_match
,
1959 .pm
= &bcm_sysport_pm_ops
,
1962 module_platform_driver(bcm_sysport_driver
);
1964 MODULE_AUTHOR("Broadcom Corporation");
1965 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
1966 MODULE_ALIAS("platform:brcm-systemport");
1967 MODULE_LICENSE("GPL");