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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[deliverable/linux.git] / drivers / net / ethernet / broadcom / cnic.c
1 /* cnic.c: Broadcom CNIC core network driver.
2 *
3 * Copyright (c) 2006-2012 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
11 */
12
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15 #include <linux/module.h>
16
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/netdevice.h>
24 #include <linux/uio_driver.h>
25 #include <linux/in.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/delay.h>
28 #include <linux/ethtool.h>
29 #include <linux/if_vlan.h>
30 #include <linux/prefetch.h>
31 #include <linux/random.h>
32 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
33 #define BCM_VLAN 1
34 #endif
35 #include <net/ip.h>
36 #include <net/tcp.h>
37 #include <net/route.h>
38 #include <net/ipv6.h>
39 #include <net/ip6_route.h>
40 #include <net/ip6_checksum.h>
41 #include <scsi/iscsi_if.h>
42
43 #include "cnic_if.h"
44 #include "bnx2.h"
45 #include "bnx2x/bnx2x_reg.h"
46 #include "bnx2x/bnx2x_fw_defs.h"
47 #include "bnx2x/bnx2x_hsi.h"
48 #include "../../../scsi/bnx2i/57xx_iscsi_constants.h"
49 #include "../../../scsi/bnx2i/57xx_iscsi_hsi.h"
50 #include "../../../scsi/bnx2fc/bnx2fc_constants.h"
51 #include "cnic.h"
52 #include "cnic_defs.h"
53
54 #define DRV_MODULE_NAME "cnic"
55
56 static char version[] __devinitdata =
57 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
58
59 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
60 "Chen (zongxi@broadcom.com");
61 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
62 MODULE_LICENSE("GPL");
63 MODULE_VERSION(CNIC_MODULE_VERSION);
64
65 /* cnic_dev_list modifications are protected by both rtnl and cnic_dev_lock */
66 static LIST_HEAD(cnic_dev_list);
67 static LIST_HEAD(cnic_udev_list);
68 static DEFINE_RWLOCK(cnic_dev_lock);
69 static DEFINE_MUTEX(cnic_lock);
70
71 static struct cnic_ulp_ops __rcu *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
72
73 /* helper function, assuming cnic_lock is held */
74 static inline struct cnic_ulp_ops *cnic_ulp_tbl_prot(int type)
75 {
76 return rcu_dereference_protected(cnic_ulp_tbl[type],
77 lockdep_is_held(&cnic_lock));
78 }
79
80 static int cnic_service_bnx2(void *, void *);
81 static int cnic_service_bnx2x(void *, void *);
82 static int cnic_ctl(void *, struct cnic_ctl_info *);
83
84 static struct cnic_ops cnic_bnx2_ops = {
85 .cnic_owner = THIS_MODULE,
86 .cnic_handler = cnic_service_bnx2,
87 .cnic_ctl = cnic_ctl,
88 };
89
90 static struct cnic_ops cnic_bnx2x_ops = {
91 .cnic_owner = THIS_MODULE,
92 .cnic_handler = cnic_service_bnx2x,
93 .cnic_ctl = cnic_ctl,
94 };
95
96 static struct workqueue_struct *cnic_wq;
97
98 static void cnic_shutdown_rings(struct cnic_dev *);
99 static void cnic_init_rings(struct cnic_dev *);
100 static int cnic_cm_set_pg(struct cnic_sock *);
101
102 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
103 {
104 struct cnic_uio_dev *udev = uinfo->priv;
105 struct cnic_dev *dev;
106
107 if (!capable(CAP_NET_ADMIN))
108 return -EPERM;
109
110 if (udev->uio_dev != -1)
111 return -EBUSY;
112
113 rtnl_lock();
114 dev = udev->dev;
115
116 if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
117 rtnl_unlock();
118 return -ENODEV;
119 }
120
121 udev->uio_dev = iminor(inode);
122
123 cnic_shutdown_rings(dev);
124 cnic_init_rings(dev);
125 rtnl_unlock();
126
127 return 0;
128 }
129
130 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
131 {
132 struct cnic_uio_dev *udev = uinfo->priv;
133
134 udev->uio_dev = -1;
135 return 0;
136 }
137
138 static inline void cnic_hold(struct cnic_dev *dev)
139 {
140 atomic_inc(&dev->ref_count);
141 }
142
143 static inline void cnic_put(struct cnic_dev *dev)
144 {
145 atomic_dec(&dev->ref_count);
146 }
147
148 static inline void csk_hold(struct cnic_sock *csk)
149 {
150 atomic_inc(&csk->ref_count);
151 }
152
153 static inline void csk_put(struct cnic_sock *csk)
154 {
155 atomic_dec(&csk->ref_count);
156 }
157
158 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
159 {
160 struct cnic_dev *cdev;
161
162 read_lock(&cnic_dev_lock);
163 list_for_each_entry(cdev, &cnic_dev_list, list) {
164 if (netdev == cdev->netdev) {
165 cnic_hold(cdev);
166 read_unlock(&cnic_dev_lock);
167 return cdev;
168 }
169 }
170 read_unlock(&cnic_dev_lock);
171 return NULL;
172 }
173
174 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
175 {
176 atomic_inc(&ulp_ops->ref_count);
177 }
178
179 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
180 {
181 atomic_dec(&ulp_ops->ref_count);
182 }
183
184 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
185 {
186 struct cnic_local *cp = dev->cnic_priv;
187 struct cnic_eth_dev *ethdev = cp->ethdev;
188 struct drv_ctl_info info;
189 struct drv_ctl_io *io = &info.data.io;
190
191 info.cmd = DRV_CTL_CTX_WR_CMD;
192 io->cid_addr = cid_addr;
193 io->offset = off;
194 io->data = val;
195 ethdev->drv_ctl(dev->netdev, &info);
196 }
197
198 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
199 {
200 struct cnic_local *cp = dev->cnic_priv;
201 struct cnic_eth_dev *ethdev = cp->ethdev;
202 struct drv_ctl_info info;
203 struct drv_ctl_io *io = &info.data.io;
204
205 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
206 io->offset = off;
207 io->dma_addr = addr;
208 ethdev->drv_ctl(dev->netdev, &info);
209 }
210
211 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
212 {
213 struct cnic_local *cp = dev->cnic_priv;
214 struct cnic_eth_dev *ethdev = cp->ethdev;
215 struct drv_ctl_info info;
216 struct drv_ctl_l2_ring *ring = &info.data.ring;
217
218 if (start)
219 info.cmd = DRV_CTL_START_L2_CMD;
220 else
221 info.cmd = DRV_CTL_STOP_L2_CMD;
222
223 ring->cid = cid;
224 ring->client_id = cl_id;
225 ethdev->drv_ctl(dev->netdev, &info);
226 }
227
228 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
229 {
230 struct cnic_local *cp = dev->cnic_priv;
231 struct cnic_eth_dev *ethdev = cp->ethdev;
232 struct drv_ctl_info info;
233 struct drv_ctl_io *io = &info.data.io;
234
235 info.cmd = DRV_CTL_IO_WR_CMD;
236 io->offset = off;
237 io->data = val;
238 ethdev->drv_ctl(dev->netdev, &info);
239 }
240
241 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
242 {
243 struct cnic_local *cp = dev->cnic_priv;
244 struct cnic_eth_dev *ethdev = cp->ethdev;
245 struct drv_ctl_info info;
246 struct drv_ctl_io *io = &info.data.io;
247
248 info.cmd = DRV_CTL_IO_RD_CMD;
249 io->offset = off;
250 ethdev->drv_ctl(dev->netdev, &info);
251 return io->data;
252 }
253
254 static void cnic_ulp_ctl(struct cnic_dev *dev, int ulp_type, bool reg)
255 {
256 struct cnic_local *cp = dev->cnic_priv;
257 struct cnic_eth_dev *ethdev = cp->ethdev;
258 struct drv_ctl_info info;
259
260 if (reg)
261 info.cmd = DRV_CTL_ULP_REGISTER_CMD;
262 else
263 info.cmd = DRV_CTL_ULP_UNREGISTER_CMD;
264
265 info.data.ulp_type = ulp_type;
266 ethdev->drv_ctl(dev->netdev, &info);
267 }
268
269 static int cnic_in_use(struct cnic_sock *csk)
270 {
271 return test_bit(SK_F_INUSE, &csk->flags);
272 }
273
274 static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
275 {
276 struct cnic_local *cp = dev->cnic_priv;
277 struct cnic_eth_dev *ethdev = cp->ethdev;
278 struct drv_ctl_info info;
279
280 info.cmd = cmd;
281 info.data.credit.credit_count = count;
282 ethdev->drv_ctl(dev->netdev, &info);
283 }
284
285 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
286 {
287 u32 i;
288
289 for (i = 0; i < cp->max_cid_space; i++) {
290 if (cp->ctx_tbl[i].cid == cid) {
291 *l5_cid = i;
292 return 0;
293 }
294 }
295 return -EINVAL;
296 }
297
298 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
299 struct cnic_sock *csk)
300 {
301 struct iscsi_path path_req;
302 char *buf = NULL;
303 u16 len = 0;
304 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
305 struct cnic_ulp_ops *ulp_ops;
306 struct cnic_uio_dev *udev = cp->udev;
307 int rc = 0, retry = 0;
308
309 if (!udev || udev->uio_dev == -1)
310 return -ENODEV;
311
312 if (csk) {
313 len = sizeof(path_req);
314 buf = (char *) &path_req;
315 memset(&path_req, 0, len);
316
317 msg_type = ISCSI_KEVENT_PATH_REQ;
318 path_req.handle = (u64) csk->l5_cid;
319 if (test_bit(SK_F_IPV6, &csk->flags)) {
320 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
321 sizeof(struct in6_addr));
322 path_req.ip_addr_len = 16;
323 } else {
324 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
325 sizeof(struct in_addr));
326 path_req.ip_addr_len = 4;
327 }
328 path_req.vlan_id = csk->vlan_id;
329 path_req.pmtu = csk->mtu;
330 }
331
332 while (retry < 3) {
333 rc = 0;
334 rcu_read_lock();
335 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
336 if (ulp_ops)
337 rc = ulp_ops->iscsi_nl_send_msg(
338 cp->ulp_handle[CNIC_ULP_ISCSI],
339 msg_type, buf, len);
340 rcu_read_unlock();
341 if (rc == 0 || msg_type != ISCSI_KEVENT_PATH_REQ)
342 break;
343
344 msleep(100);
345 retry++;
346 }
347 return rc;
348 }
349
350 static void cnic_cm_upcall(struct cnic_local *, struct cnic_sock *, u8);
351
352 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
353 char *buf, u16 len)
354 {
355 int rc = -EINVAL;
356
357 switch (msg_type) {
358 case ISCSI_UEVENT_PATH_UPDATE: {
359 struct cnic_local *cp;
360 u32 l5_cid;
361 struct cnic_sock *csk;
362 struct iscsi_path *path_resp;
363
364 if (len < sizeof(*path_resp))
365 break;
366
367 path_resp = (struct iscsi_path *) buf;
368 cp = dev->cnic_priv;
369 l5_cid = (u32) path_resp->handle;
370 if (l5_cid >= MAX_CM_SK_TBL_SZ)
371 break;
372
373 rcu_read_lock();
374 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
375 rc = -ENODEV;
376 rcu_read_unlock();
377 break;
378 }
379 csk = &cp->csk_tbl[l5_cid];
380 csk_hold(csk);
381 if (cnic_in_use(csk) &&
382 test_bit(SK_F_CONNECT_START, &csk->flags)) {
383
384 csk->vlan_id = path_resp->vlan_id;
385
386 memcpy(csk->ha, path_resp->mac_addr, 6);
387 if (test_bit(SK_F_IPV6, &csk->flags))
388 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
389 sizeof(struct in6_addr));
390 else
391 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
392 sizeof(struct in_addr));
393
394 if (is_valid_ether_addr(csk->ha)) {
395 cnic_cm_set_pg(csk);
396 } else if (!test_bit(SK_F_OFFLD_SCHED, &csk->flags) &&
397 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
398
399 cnic_cm_upcall(cp, csk,
400 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
401 clear_bit(SK_F_CONNECT_START, &csk->flags);
402 }
403 }
404 csk_put(csk);
405 rcu_read_unlock();
406 rc = 0;
407 }
408 }
409
410 return rc;
411 }
412
413 static int cnic_offld_prep(struct cnic_sock *csk)
414 {
415 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
416 return 0;
417
418 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
419 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
420 return 0;
421 }
422
423 return 1;
424 }
425
426 static int cnic_close_prep(struct cnic_sock *csk)
427 {
428 clear_bit(SK_F_CONNECT_START, &csk->flags);
429 smp_mb__after_clear_bit();
430
431 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
432 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
433 msleep(1);
434
435 return 1;
436 }
437 return 0;
438 }
439
440 static int cnic_abort_prep(struct cnic_sock *csk)
441 {
442 clear_bit(SK_F_CONNECT_START, &csk->flags);
443 smp_mb__after_clear_bit();
444
445 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
446 msleep(1);
447
448 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
449 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
450 return 1;
451 }
452
453 return 0;
454 }
455
456 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
457 {
458 struct cnic_dev *dev;
459
460 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
461 pr_err("%s: Bad type %d\n", __func__, ulp_type);
462 return -EINVAL;
463 }
464 mutex_lock(&cnic_lock);
465 if (cnic_ulp_tbl_prot(ulp_type)) {
466 pr_err("%s: Type %d has already been registered\n",
467 __func__, ulp_type);
468 mutex_unlock(&cnic_lock);
469 return -EBUSY;
470 }
471
472 read_lock(&cnic_dev_lock);
473 list_for_each_entry(dev, &cnic_dev_list, list) {
474 struct cnic_local *cp = dev->cnic_priv;
475
476 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
477 }
478 read_unlock(&cnic_dev_lock);
479
480 atomic_set(&ulp_ops->ref_count, 0);
481 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
482 mutex_unlock(&cnic_lock);
483
484 /* Prevent race conditions with netdev_event */
485 rtnl_lock();
486 list_for_each_entry(dev, &cnic_dev_list, list) {
487 struct cnic_local *cp = dev->cnic_priv;
488
489 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
490 ulp_ops->cnic_init(dev);
491 }
492 rtnl_unlock();
493
494 return 0;
495 }
496
497 int cnic_unregister_driver(int ulp_type)
498 {
499 struct cnic_dev *dev;
500 struct cnic_ulp_ops *ulp_ops;
501 int i = 0;
502
503 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
504 pr_err("%s: Bad type %d\n", __func__, ulp_type);
505 return -EINVAL;
506 }
507 mutex_lock(&cnic_lock);
508 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
509 if (!ulp_ops) {
510 pr_err("%s: Type %d has not been registered\n",
511 __func__, ulp_type);
512 goto out_unlock;
513 }
514 read_lock(&cnic_dev_lock);
515 list_for_each_entry(dev, &cnic_dev_list, list) {
516 struct cnic_local *cp = dev->cnic_priv;
517
518 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
519 pr_err("%s: Type %d still has devices registered\n",
520 __func__, ulp_type);
521 read_unlock(&cnic_dev_lock);
522 goto out_unlock;
523 }
524 }
525 read_unlock(&cnic_dev_lock);
526
527 RCU_INIT_POINTER(cnic_ulp_tbl[ulp_type], NULL);
528
529 mutex_unlock(&cnic_lock);
530 synchronize_rcu();
531 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
532 msleep(100);
533 i++;
534 }
535
536 if (atomic_read(&ulp_ops->ref_count) != 0)
537 netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n");
538 return 0;
539
540 out_unlock:
541 mutex_unlock(&cnic_lock);
542 return -EINVAL;
543 }
544
545 static int cnic_start_hw(struct cnic_dev *);
546 static void cnic_stop_hw(struct cnic_dev *);
547
548 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
549 void *ulp_ctx)
550 {
551 struct cnic_local *cp = dev->cnic_priv;
552 struct cnic_ulp_ops *ulp_ops;
553
554 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
555 pr_err("%s: Bad type %d\n", __func__, ulp_type);
556 return -EINVAL;
557 }
558 mutex_lock(&cnic_lock);
559 if (cnic_ulp_tbl_prot(ulp_type) == NULL) {
560 pr_err("%s: Driver with type %d has not been registered\n",
561 __func__, ulp_type);
562 mutex_unlock(&cnic_lock);
563 return -EAGAIN;
564 }
565 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
566 pr_err("%s: Type %d has already been registered to this device\n",
567 __func__, ulp_type);
568 mutex_unlock(&cnic_lock);
569 return -EBUSY;
570 }
571
572 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
573 cp->ulp_handle[ulp_type] = ulp_ctx;
574 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
575 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
576 cnic_hold(dev);
577
578 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
579 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
580 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
581
582 mutex_unlock(&cnic_lock);
583
584 cnic_ulp_ctl(dev, ulp_type, true);
585
586 return 0;
587
588 }
589 EXPORT_SYMBOL(cnic_register_driver);
590
591 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
592 {
593 struct cnic_local *cp = dev->cnic_priv;
594 int i = 0;
595
596 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
597 pr_err("%s: Bad type %d\n", __func__, ulp_type);
598 return -EINVAL;
599 }
600 mutex_lock(&cnic_lock);
601 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
602 RCU_INIT_POINTER(cp->ulp_ops[ulp_type], NULL);
603 cnic_put(dev);
604 } else {
605 pr_err("%s: device not registered to this ulp type %d\n",
606 __func__, ulp_type);
607 mutex_unlock(&cnic_lock);
608 return -EINVAL;
609 }
610 mutex_unlock(&cnic_lock);
611
612 if (ulp_type == CNIC_ULP_ISCSI)
613 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
614
615 synchronize_rcu();
616
617 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
618 i < 20) {
619 msleep(100);
620 i++;
621 }
622 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
623 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
624
625 cnic_ulp_ctl(dev, ulp_type, false);
626
627 return 0;
628 }
629 EXPORT_SYMBOL(cnic_unregister_driver);
630
631 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id,
632 u32 next)
633 {
634 id_tbl->start = start_id;
635 id_tbl->max = size;
636 id_tbl->next = next;
637 spin_lock_init(&id_tbl->lock);
638 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
639 if (!id_tbl->table)
640 return -ENOMEM;
641
642 return 0;
643 }
644
645 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
646 {
647 kfree(id_tbl->table);
648 id_tbl->table = NULL;
649 }
650
651 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
652 {
653 int ret = -1;
654
655 id -= id_tbl->start;
656 if (id >= id_tbl->max)
657 return ret;
658
659 spin_lock(&id_tbl->lock);
660 if (!test_bit(id, id_tbl->table)) {
661 set_bit(id, id_tbl->table);
662 ret = 0;
663 }
664 spin_unlock(&id_tbl->lock);
665 return ret;
666 }
667
668 /* Returns -1 if not successful */
669 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
670 {
671 u32 id;
672
673 spin_lock(&id_tbl->lock);
674 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
675 if (id >= id_tbl->max) {
676 id = -1;
677 if (id_tbl->next != 0) {
678 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
679 if (id >= id_tbl->next)
680 id = -1;
681 }
682 }
683
684 if (id < id_tbl->max) {
685 set_bit(id, id_tbl->table);
686 id_tbl->next = (id + 1) & (id_tbl->max - 1);
687 id += id_tbl->start;
688 }
689
690 spin_unlock(&id_tbl->lock);
691
692 return id;
693 }
694
695 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
696 {
697 if (id == -1)
698 return;
699
700 id -= id_tbl->start;
701 if (id >= id_tbl->max)
702 return;
703
704 clear_bit(id, id_tbl->table);
705 }
706
707 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
708 {
709 int i;
710
711 if (!dma->pg_arr)
712 return;
713
714 for (i = 0; i < dma->num_pages; i++) {
715 if (dma->pg_arr[i]) {
716 dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
717 dma->pg_arr[i], dma->pg_map_arr[i]);
718 dma->pg_arr[i] = NULL;
719 }
720 }
721 if (dma->pgtbl) {
722 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
723 dma->pgtbl, dma->pgtbl_map);
724 dma->pgtbl = NULL;
725 }
726 kfree(dma->pg_arr);
727 dma->pg_arr = NULL;
728 dma->num_pages = 0;
729 }
730
731 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
732 {
733 int i;
734 __le32 *page_table = (__le32 *) dma->pgtbl;
735
736 for (i = 0; i < dma->num_pages; i++) {
737 /* Each entry needs to be in big endian format. */
738 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
739 page_table++;
740 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
741 page_table++;
742 }
743 }
744
745 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
746 {
747 int i;
748 __le32 *page_table = (__le32 *) dma->pgtbl;
749
750 for (i = 0; i < dma->num_pages; i++) {
751 /* Each entry needs to be in little endian format. */
752 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
753 page_table++;
754 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
755 page_table++;
756 }
757 }
758
759 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
760 int pages, int use_pg_tbl)
761 {
762 int i, size;
763 struct cnic_local *cp = dev->cnic_priv;
764
765 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
766 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
767 if (dma->pg_arr == NULL)
768 return -ENOMEM;
769
770 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
771 dma->num_pages = pages;
772
773 for (i = 0; i < pages; i++) {
774 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
775 BCM_PAGE_SIZE,
776 &dma->pg_map_arr[i],
777 GFP_ATOMIC);
778 if (dma->pg_arr[i] == NULL)
779 goto error;
780 }
781 if (!use_pg_tbl)
782 return 0;
783
784 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
785 ~(BCM_PAGE_SIZE - 1);
786 dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
787 &dma->pgtbl_map, GFP_ATOMIC);
788 if (dma->pgtbl == NULL)
789 goto error;
790
791 cp->setup_pgtbl(dev, dma);
792
793 return 0;
794
795 error:
796 cnic_free_dma(dev, dma);
797 return -ENOMEM;
798 }
799
800 static void cnic_free_context(struct cnic_dev *dev)
801 {
802 struct cnic_local *cp = dev->cnic_priv;
803 int i;
804
805 for (i = 0; i < cp->ctx_blks; i++) {
806 if (cp->ctx_arr[i].ctx) {
807 dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
808 cp->ctx_arr[i].ctx,
809 cp->ctx_arr[i].mapping);
810 cp->ctx_arr[i].ctx = NULL;
811 }
812 }
813 }
814
815 static void __cnic_free_uio(struct cnic_uio_dev *udev)
816 {
817 uio_unregister_device(&udev->cnic_uinfo);
818
819 if (udev->l2_buf) {
820 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
821 udev->l2_buf, udev->l2_buf_map);
822 udev->l2_buf = NULL;
823 }
824
825 if (udev->l2_ring) {
826 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
827 udev->l2_ring, udev->l2_ring_map);
828 udev->l2_ring = NULL;
829 }
830
831 pci_dev_put(udev->pdev);
832 kfree(udev);
833 }
834
835 static void cnic_free_uio(struct cnic_uio_dev *udev)
836 {
837 if (!udev)
838 return;
839
840 write_lock(&cnic_dev_lock);
841 list_del_init(&udev->list);
842 write_unlock(&cnic_dev_lock);
843 __cnic_free_uio(udev);
844 }
845
846 static void cnic_free_resc(struct cnic_dev *dev)
847 {
848 struct cnic_local *cp = dev->cnic_priv;
849 struct cnic_uio_dev *udev = cp->udev;
850
851 if (udev) {
852 udev->dev = NULL;
853 cp->udev = NULL;
854 }
855
856 cnic_free_context(dev);
857 kfree(cp->ctx_arr);
858 cp->ctx_arr = NULL;
859 cp->ctx_blks = 0;
860
861 cnic_free_dma(dev, &cp->gbl_buf_info);
862 cnic_free_dma(dev, &cp->kwq_info);
863 cnic_free_dma(dev, &cp->kwq_16_data_info);
864 cnic_free_dma(dev, &cp->kcq2.dma);
865 cnic_free_dma(dev, &cp->kcq1.dma);
866 kfree(cp->iscsi_tbl);
867 cp->iscsi_tbl = NULL;
868 kfree(cp->ctx_tbl);
869 cp->ctx_tbl = NULL;
870
871 cnic_free_id_tbl(&cp->fcoe_cid_tbl);
872 cnic_free_id_tbl(&cp->cid_tbl);
873 }
874
875 static int cnic_alloc_context(struct cnic_dev *dev)
876 {
877 struct cnic_local *cp = dev->cnic_priv;
878
879 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
880 int i, k, arr_size;
881
882 cp->ctx_blk_size = BCM_PAGE_SIZE;
883 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
884 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
885 sizeof(struct cnic_ctx);
886 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
887 if (cp->ctx_arr == NULL)
888 return -ENOMEM;
889
890 k = 0;
891 for (i = 0; i < 2; i++) {
892 u32 j, reg, off, lo, hi;
893
894 if (i == 0)
895 off = BNX2_PG_CTX_MAP;
896 else
897 off = BNX2_ISCSI_CTX_MAP;
898
899 reg = cnic_reg_rd_ind(dev, off);
900 lo = reg >> 16;
901 hi = reg & 0xffff;
902 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
903 cp->ctx_arr[k].cid = j;
904 }
905
906 cp->ctx_blks = k;
907 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
908 cp->ctx_blks = 0;
909 return -ENOMEM;
910 }
911
912 for (i = 0; i < cp->ctx_blks; i++) {
913 cp->ctx_arr[i].ctx =
914 dma_alloc_coherent(&dev->pcidev->dev,
915 BCM_PAGE_SIZE,
916 &cp->ctx_arr[i].mapping,
917 GFP_KERNEL);
918 if (cp->ctx_arr[i].ctx == NULL)
919 return -ENOMEM;
920 }
921 }
922 return 0;
923 }
924
925 static u16 cnic_bnx2_next_idx(u16 idx)
926 {
927 return idx + 1;
928 }
929
930 static u16 cnic_bnx2_hw_idx(u16 idx)
931 {
932 return idx;
933 }
934
935 static u16 cnic_bnx2x_next_idx(u16 idx)
936 {
937 idx++;
938 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
939 idx++;
940
941 return idx;
942 }
943
944 static u16 cnic_bnx2x_hw_idx(u16 idx)
945 {
946 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
947 idx++;
948 return idx;
949 }
950
951 static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info,
952 bool use_pg_tbl)
953 {
954 int err, i, use_page_tbl = 0;
955 struct kcqe **kcq;
956
957 if (use_pg_tbl)
958 use_page_tbl = 1;
959
960 err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, use_page_tbl);
961 if (err)
962 return err;
963
964 kcq = (struct kcqe **) info->dma.pg_arr;
965 info->kcq = kcq;
966
967 info->next_idx = cnic_bnx2_next_idx;
968 info->hw_idx = cnic_bnx2_hw_idx;
969 if (use_pg_tbl)
970 return 0;
971
972 info->next_idx = cnic_bnx2x_next_idx;
973 info->hw_idx = cnic_bnx2x_hw_idx;
974
975 for (i = 0; i < KCQ_PAGE_CNT; i++) {
976 struct bnx2x_bd_chain_next *next =
977 (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
978 int j = i + 1;
979
980 if (j >= KCQ_PAGE_CNT)
981 j = 0;
982 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
983 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
984 }
985 return 0;
986 }
987
988 static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
989 {
990 struct cnic_local *cp = dev->cnic_priv;
991 struct cnic_uio_dev *udev;
992
993 read_lock(&cnic_dev_lock);
994 list_for_each_entry(udev, &cnic_udev_list, list) {
995 if (udev->pdev == dev->pcidev) {
996 udev->dev = dev;
997 cp->udev = udev;
998 read_unlock(&cnic_dev_lock);
999 return 0;
1000 }
1001 }
1002 read_unlock(&cnic_dev_lock);
1003
1004 udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
1005 if (!udev)
1006 return -ENOMEM;
1007
1008 udev->uio_dev = -1;
1009
1010 udev->dev = dev;
1011 udev->pdev = dev->pcidev;
1012 udev->l2_ring_size = pages * BCM_PAGE_SIZE;
1013 udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
1014 &udev->l2_ring_map,
1015 GFP_KERNEL | __GFP_COMP);
1016 if (!udev->l2_ring)
1017 goto err_udev;
1018
1019 udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
1020 udev->l2_buf_size = PAGE_ALIGN(udev->l2_buf_size);
1021 udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
1022 &udev->l2_buf_map,
1023 GFP_KERNEL | __GFP_COMP);
1024 if (!udev->l2_buf)
1025 goto err_dma;
1026
1027 write_lock(&cnic_dev_lock);
1028 list_add(&udev->list, &cnic_udev_list);
1029 write_unlock(&cnic_dev_lock);
1030
1031 pci_dev_get(udev->pdev);
1032
1033 cp->udev = udev;
1034
1035 return 0;
1036 err_dma:
1037 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
1038 udev->l2_ring, udev->l2_ring_map);
1039 err_udev:
1040 kfree(udev);
1041 return -ENOMEM;
1042 }
1043
1044 static int cnic_init_uio(struct cnic_dev *dev)
1045 {
1046 struct cnic_local *cp = dev->cnic_priv;
1047 struct cnic_uio_dev *udev = cp->udev;
1048 struct uio_info *uinfo;
1049 int ret = 0;
1050
1051 if (!udev)
1052 return -ENOMEM;
1053
1054 uinfo = &udev->cnic_uinfo;
1055
1056 uinfo->mem[0].addr = pci_resource_start(dev->pcidev, 0);
1057 uinfo->mem[0].internal_addr = dev->regview;
1058 uinfo->mem[0].memtype = UIO_MEM_PHYS;
1059
1060 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
1061 uinfo->mem[0].size = MB_GET_CID_ADDR(TX_TSS_CID +
1062 TX_MAX_TSS_RINGS + 1);
1063 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
1064 PAGE_MASK;
1065 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
1066 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
1067 else
1068 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
1069
1070 uinfo->name = "bnx2_cnic";
1071 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
1072 uinfo->mem[0].size = pci_resource_len(dev->pcidev, 0);
1073
1074 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
1075 PAGE_MASK;
1076 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
1077
1078 uinfo->name = "bnx2x_cnic";
1079 }
1080
1081 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1082
1083 uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1084 uinfo->mem[2].size = udev->l2_ring_size;
1085 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1086
1087 uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1088 uinfo->mem[3].size = udev->l2_buf_size;
1089 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1090
1091 uinfo->version = CNIC_MODULE_VERSION;
1092 uinfo->irq = UIO_IRQ_CUSTOM;
1093
1094 uinfo->open = cnic_uio_open;
1095 uinfo->release = cnic_uio_close;
1096
1097 if (udev->uio_dev == -1) {
1098 if (!uinfo->priv) {
1099 uinfo->priv = udev;
1100
1101 ret = uio_register_device(&udev->pdev->dev, uinfo);
1102 }
1103 } else {
1104 cnic_init_rings(dev);
1105 }
1106
1107 return ret;
1108 }
1109
1110 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1111 {
1112 struct cnic_local *cp = dev->cnic_priv;
1113 int ret;
1114
1115 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1116 if (ret)
1117 goto error;
1118 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1119
1120 ret = cnic_alloc_kcq(dev, &cp->kcq1, true);
1121 if (ret)
1122 goto error;
1123
1124 ret = cnic_alloc_context(dev);
1125 if (ret)
1126 goto error;
1127
1128 ret = cnic_alloc_uio_rings(dev, 2);
1129 if (ret)
1130 goto error;
1131
1132 ret = cnic_init_uio(dev);
1133 if (ret)
1134 goto error;
1135
1136 return 0;
1137
1138 error:
1139 cnic_free_resc(dev);
1140 return ret;
1141 }
1142
1143 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1144 {
1145 struct cnic_local *cp = dev->cnic_priv;
1146 int ctx_blk_size = cp->ethdev->ctx_blk_size;
1147 int total_mem, blks, i;
1148
1149 total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
1150 blks = total_mem / ctx_blk_size;
1151 if (total_mem % ctx_blk_size)
1152 blks++;
1153
1154 if (blks > cp->ethdev->ctx_tbl_len)
1155 return -ENOMEM;
1156
1157 cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
1158 if (cp->ctx_arr == NULL)
1159 return -ENOMEM;
1160
1161 cp->ctx_blks = blks;
1162 cp->ctx_blk_size = ctx_blk_size;
1163 if (!BNX2X_CHIP_IS_57710(cp->chip_id))
1164 cp->ctx_align = 0;
1165 else
1166 cp->ctx_align = ctx_blk_size;
1167
1168 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1169
1170 for (i = 0; i < blks; i++) {
1171 cp->ctx_arr[i].ctx =
1172 dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1173 &cp->ctx_arr[i].mapping,
1174 GFP_KERNEL);
1175 if (cp->ctx_arr[i].ctx == NULL)
1176 return -ENOMEM;
1177
1178 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1179 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1180 cnic_free_context(dev);
1181 cp->ctx_blk_size += cp->ctx_align;
1182 i = -1;
1183 continue;
1184 }
1185 }
1186 }
1187 return 0;
1188 }
1189
1190 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1191 {
1192 struct cnic_local *cp = dev->cnic_priv;
1193 struct cnic_eth_dev *ethdev = cp->ethdev;
1194 u32 start_cid = ethdev->starting_cid;
1195 int i, j, n, ret, pages;
1196 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1197
1198 cp->iro_arr = ethdev->iro_arr;
1199
1200 cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1201 cp->iscsi_start_cid = start_cid;
1202 cp->fcoe_start_cid = start_cid + MAX_ISCSI_TBL_SZ;
1203
1204 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
1205 cp->max_cid_space += dev->max_fcoe_conn;
1206 cp->fcoe_init_cid = ethdev->fcoe_init_cid;
1207 if (!cp->fcoe_init_cid)
1208 cp->fcoe_init_cid = 0x10;
1209 }
1210
1211 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1212 GFP_KERNEL);
1213 if (!cp->iscsi_tbl)
1214 goto error;
1215
1216 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1217 cp->max_cid_space, GFP_KERNEL);
1218 if (!cp->ctx_tbl)
1219 goto error;
1220
1221 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1222 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1223 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1224 }
1225
1226 for (i = MAX_ISCSI_TBL_SZ; i < cp->max_cid_space; i++)
1227 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_FCOE;
1228
1229 pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1230 PAGE_SIZE;
1231
1232 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1233 if (ret)
1234 return -ENOMEM;
1235
1236 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1237 for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1238 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1239
1240 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1241 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1242 off;
1243
1244 if ((i % n) == (n - 1))
1245 j++;
1246 }
1247
1248 ret = cnic_alloc_kcq(dev, &cp->kcq1, false);
1249 if (ret)
1250 goto error;
1251
1252 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
1253 ret = cnic_alloc_kcq(dev, &cp->kcq2, true);
1254 if (ret)
1255 goto error;
1256 }
1257
1258 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1259 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1260 if (ret)
1261 goto error;
1262
1263 ret = cnic_alloc_bnx2x_context(dev);
1264 if (ret)
1265 goto error;
1266
1267 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1268
1269 cp->l2_rx_ring_size = 15;
1270
1271 ret = cnic_alloc_uio_rings(dev, 4);
1272 if (ret)
1273 goto error;
1274
1275 ret = cnic_init_uio(dev);
1276 if (ret)
1277 goto error;
1278
1279 return 0;
1280
1281 error:
1282 cnic_free_resc(dev);
1283 return -ENOMEM;
1284 }
1285
1286 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1287 {
1288 return cp->max_kwq_idx -
1289 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1290 }
1291
1292 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1293 u32 num_wqes)
1294 {
1295 struct cnic_local *cp = dev->cnic_priv;
1296 struct kwqe *prod_qe;
1297 u16 prod, sw_prod, i;
1298
1299 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1300 return -EAGAIN; /* bnx2 is down */
1301
1302 spin_lock_bh(&cp->cnic_ulp_lock);
1303 if (num_wqes > cnic_kwq_avail(cp) &&
1304 !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1305 spin_unlock_bh(&cp->cnic_ulp_lock);
1306 return -EAGAIN;
1307 }
1308
1309 clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1310
1311 prod = cp->kwq_prod_idx;
1312 sw_prod = prod & MAX_KWQ_IDX;
1313 for (i = 0; i < num_wqes; i++) {
1314 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1315 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1316 prod++;
1317 sw_prod = prod & MAX_KWQ_IDX;
1318 }
1319 cp->kwq_prod_idx = prod;
1320
1321 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1322
1323 spin_unlock_bh(&cp->cnic_ulp_lock);
1324 return 0;
1325 }
1326
1327 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1328 union l5cm_specific_data *l5_data)
1329 {
1330 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1331 dma_addr_t map;
1332
1333 map = ctx->kwqe_data_mapping;
1334 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1335 l5_data->phy_address.hi = (u64) map >> 32;
1336 return ctx->kwqe_data;
1337 }
1338
1339 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1340 u32 type, union l5cm_specific_data *l5_data)
1341 {
1342 struct cnic_local *cp = dev->cnic_priv;
1343 struct l5cm_spe kwqe;
1344 struct kwqe_16 *kwq[1];
1345 u16 type_16;
1346 int ret;
1347
1348 kwqe.hdr.conn_and_cmd_data =
1349 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1350 BNX2X_HW_CID(cp, cid)));
1351
1352 type_16 = (type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;
1353 type_16 |= (cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1354 SPE_HDR_FUNCTION_ID;
1355
1356 kwqe.hdr.type = cpu_to_le16(type_16);
1357 kwqe.hdr.reserved1 = 0;
1358 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1359 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1360
1361 kwq[0] = (struct kwqe_16 *) &kwqe;
1362
1363 spin_lock_bh(&cp->cnic_ulp_lock);
1364 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1365 spin_unlock_bh(&cp->cnic_ulp_lock);
1366
1367 if (ret == 1)
1368 return 0;
1369
1370 return ret;
1371 }
1372
1373 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1374 struct kcqe *cqes[], u32 num_cqes)
1375 {
1376 struct cnic_local *cp = dev->cnic_priv;
1377 struct cnic_ulp_ops *ulp_ops;
1378
1379 rcu_read_lock();
1380 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1381 if (likely(ulp_ops)) {
1382 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1383 cqes, num_cqes);
1384 }
1385 rcu_read_unlock();
1386 }
1387
1388 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1389 {
1390 struct cnic_local *cp = dev->cnic_priv;
1391 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1392 int hq_bds, pages;
1393 u32 pfid = cp->pfid;
1394
1395 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1396 cp->num_ccells = req1->num_ccells_per_conn;
1397 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1398 cp->num_iscsi_tasks;
1399 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1400 BNX2X_ISCSI_R2TQE_SIZE;
1401 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1402 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1403 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1404 cp->num_cqs = req1->num_cqs;
1405
1406 if (!dev->max_iscsi_conn)
1407 return 0;
1408
1409 /* init Tstorm RAM */
1410 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1411 req1->rq_num_wqes);
1412 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1413 PAGE_SIZE);
1414 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1415 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1416 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1417 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1418 req1->num_tasks_per_conn);
1419
1420 /* init Ustorm RAM */
1421 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1422 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
1423 req1->rq_buffer_size);
1424 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1425 PAGE_SIZE);
1426 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1427 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1428 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1429 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1430 req1->num_tasks_per_conn);
1431 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1432 req1->rq_num_wqes);
1433 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1434 req1->cq_num_wqes);
1435 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1436 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1437
1438 /* init Xstorm RAM */
1439 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1440 PAGE_SIZE);
1441 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1442 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1443 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1444 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1445 req1->num_tasks_per_conn);
1446 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1447 hq_bds);
1448 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
1449 req1->num_tasks_per_conn);
1450 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1451 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1452
1453 /* init Cstorm RAM */
1454 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1455 PAGE_SIZE);
1456 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1457 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1458 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1459 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1460 req1->num_tasks_per_conn);
1461 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1462 req1->cq_num_wqes);
1463 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1464 hq_bds);
1465
1466 return 0;
1467 }
1468
1469 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1470 {
1471 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1472 struct cnic_local *cp = dev->cnic_priv;
1473 u32 pfid = cp->pfid;
1474 struct iscsi_kcqe kcqe;
1475 struct kcqe *cqes[1];
1476
1477 memset(&kcqe, 0, sizeof(kcqe));
1478 if (!dev->max_iscsi_conn) {
1479 kcqe.completion_status =
1480 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1481 goto done;
1482 }
1483
1484 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1485 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1486 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1487 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1488 req2->error_bit_map[1]);
1489
1490 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1491 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1492 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1493 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1494 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1495 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1496 req2->error_bit_map[1]);
1497
1498 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1499 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1500
1501 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1502
1503 done:
1504 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1505 cqes[0] = (struct kcqe *) &kcqe;
1506 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1507
1508 return 0;
1509 }
1510
1511 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1512 {
1513 struct cnic_local *cp = dev->cnic_priv;
1514 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1515
1516 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1517 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1518
1519 cnic_free_dma(dev, &iscsi->hq_info);
1520 cnic_free_dma(dev, &iscsi->r2tq_info);
1521 cnic_free_dma(dev, &iscsi->task_array_info);
1522 cnic_free_id(&cp->cid_tbl, ctx->cid);
1523 } else {
1524 cnic_free_id(&cp->fcoe_cid_tbl, ctx->cid);
1525 }
1526
1527 ctx->cid = 0;
1528 }
1529
1530 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1531 {
1532 u32 cid;
1533 int ret, pages;
1534 struct cnic_local *cp = dev->cnic_priv;
1535 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1536 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1537
1538 if (ctx->ulp_proto_id == CNIC_ULP_FCOE) {
1539 cid = cnic_alloc_new_id(&cp->fcoe_cid_tbl);
1540 if (cid == -1) {
1541 ret = -ENOMEM;
1542 goto error;
1543 }
1544 ctx->cid = cid;
1545 return 0;
1546 }
1547
1548 cid = cnic_alloc_new_id(&cp->cid_tbl);
1549 if (cid == -1) {
1550 ret = -ENOMEM;
1551 goto error;
1552 }
1553
1554 ctx->cid = cid;
1555 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1556
1557 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1558 if (ret)
1559 goto error;
1560
1561 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1562 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1563 if (ret)
1564 goto error;
1565
1566 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1567 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1568 if (ret)
1569 goto error;
1570
1571 return 0;
1572
1573 error:
1574 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1575 return ret;
1576 }
1577
1578 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1579 struct regpair *ctx_addr)
1580 {
1581 struct cnic_local *cp = dev->cnic_priv;
1582 struct cnic_eth_dev *ethdev = cp->ethdev;
1583 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1584 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1585 unsigned long align_off = 0;
1586 dma_addr_t ctx_map;
1587 void *ctx;
1588
1589 if (cp->ctx_align) {
1590 unsigned long mask = cp->ctx_align - 1;
1591
1592 if (cp->ctx_arr[blk].mapping & mask)
1593 align_off = cp->ctx_align -
1594 (cp->ctx_arr[blk].mapping & mask);
1595 }
1596 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1597 (off * BNX2X_CONTEXT_MEM_SIZE);
1598 ctx = cp->ctx_arr[blk].ctx + align_off +
1599 (off * BNX2X_CONTEXT_MEM_SIZE);
1600 if (init)
1601 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1602
1603 ctx_addr->lo = ctx_map & 0xffffffff;
1604 ctx_addr->hi = (u64) ctx_map >> 32;
1605 return ctx;
1606 }
1607
1608 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1609 u32 num)
1610 {
1611 struct cnic_local *cp = dev->cnic_priv;
1612 struct iscsi_kwqe_conn_offload1 *req1 =
1613 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1614 struct iscsi_kwqe_conn_offload2 *req2 =
1615 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1616 struct iscsi_kwqe_conn_offload3 *req3;
1617 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1618 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1619 u32 cid = ctx->cid;
1620 u32 hw_cid = BNX2X_HW_CID(cp, cid);
1621 struct iscsi_context *ictx;
1622 struct regpair context_addr;
1623 int i, j, n = 2, n_max;
1624 u8 port = CNIC_PORT(cp);
1625
1626 ctx->ctx_flags = 0;
1627 if (!req2->num_additional_wqes)
1628 return -EINVAL;
1629
1630 n_max = req2->num_additional_wqes + 2;
1631
1632 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1633 if (ictx == NULL)
1634 return -ENOMEM;
1635
1636 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1637
1638 ictx->xstorm_ag_context.hq_prod = 1;
1639
1640 ictx->xstorm_st_context.iscsi.first_burst_length =
1641 ISCSI_DEF_FIRST_BURST_LEN;
1642 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1643 ISCSI_DEF_MAX_RECV_SEG_LEN;
1644 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1645 req1->sq_page_table_addr_lo;
1646 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1647 req1->sq_page_table_addr_hi;
1648 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1649 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1650 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1651 iscsi->hq_info.pgtbl_map & 0xffffffff;
1652 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1653 (u64) iscsi->hq_info.pgtbl_map >> 32;
1654 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1655 iscsi->hq_info.pgtbl[0];
1656 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1657 iscsi->hq_info.pgtbl[1];
1658 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1659 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1660 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1661 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1662 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1663 iscsi->r2tq_info.pgtbl[0];
1664 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1665 iscsi->r2tq_info.pgtbl[1];
1666 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1667 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1668 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1669 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1670 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1671 BNX2X_ISCSI_PBL_NOT_CACHED;
1672 ictx->xstorm_st_context.iscsi.flags.flags |=
1673 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1674 ictx->xstorm_st_context.iscsi.flags.flags |=
1675 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1676 ictx->xstorm_st_context.common.ethernet.reserved_vlan_type =
1677 ETH_P_8021Q;
1678 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) &&
1679 cp->port_mode == CHIP_2_PORT_MODE) {
1680
1681 port = 0;
1682 }
1683 ictx->xstorm_st_context.common.flags =
1684 1 << XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT;
1685 ictx->xstorm_st_context.common.flags =
1686 port << XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT;
1687
1688 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1689 /* TSTORM requires the base address of RQ DB & not PTE */
1690 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1691 req2->rq_page_table_addr_lo & PAGE_MASK;
1692 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1693 req2->rq_page_table_addr_hi;
1694 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1695 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1696 ictx->tstorm_st_context.tcp.flags2 |=
1697 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1698 ictx->tstorm_st_context.tcp.ooo_support_mode =
1699 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
1700
1701 ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1702
1703 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1704 req2->rq_page_table_addr_lo;
1705 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1706 req2->rq_page_table_addr_hi;
1707 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1708 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1709 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1710 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1711 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1712 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1713 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1714 iscsi->r2tq_info.pgtbl[0];
1715 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1716 iscsi->r2tq_info.pgtbl[1];
1717 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1718 req1->cq_page_table_addr_lo;
1719 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1720 req1->cq_page_table_addr_hi;
1721 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1722 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1723 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1724 ictx->ustorm_st_context.task_pbe_cache_index =
1725 BNX2X_ISCSI_PBL_NOT_CACHED;
1726 ictx->ustorm_st_context.task_pdu_cache_index =
1727 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1728
1729 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1730 if (j == 3) {
1731 if (n >= n_max)
1732 break;
1733 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1734 j = 0;
1735 }
1736 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1737 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1738 req3->qp_first_pte[j].hi;
1739 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1740 req3->qp_first_pte[j].lo;
1741 }
1742
1743 ictx->ustorm_st_context.task_pbl_base.lo =
1744 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1745 ictx->ustorm_st_context.task_pbl_base.hi =
1746 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1747 ictx->ustorm_st_context.tce_phy_addr.lo =
1748 iscsi->task_array_info.pgtbl[0];
1749 ictx->ustorm_st_context.tce_phy_addr.hi =
1750 iscsi->task_array_info.pgtbl[1];
1751 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1752 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1753 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1754 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1755 ISCSI_DEF_MAX_BURST_LEN;
1756 ictx->ustorm_st_context.negotiated_rx |=
1757 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1758 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1759
1760 ictx->cstorm_st_context.hq_pbl_base.lo =
1761 iscsi->hq_info.pgtbl_map & 0xffffffff;
1762 ictx->cstorm_st_context.hq_pbl_base.hi =
1763 (u64) iscsi->hq_info.pgtbl_map >> 32;
1764 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1765 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1766 ictx->cstorm_st_context.task_pbl_base.lo =
1767 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1768 ictx->cstorm_st_context.task_pbl_base.hi =
1769 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1770 /* CSTORM and USTORM initialization is different, CSTORM requires
1771 * CQ DB base & not PTE addr */
1772 ictx->cstorm_st_context.cq_db_base.lo =
1773 req1->cq_page_table_addr_lo & PAGE_MASK;
1774 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1775 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1776 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1777 for (i = 0; i < cp->num_cqs; i++) {
1778 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1779 ISCSI_INITIAL_SN;
1780 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1781 ISCSI_INITIAL_SN;
1782 }
1783
1784 ictx->xstorm_ag_context.cdu_reserved =
1785 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1786 ISCSI_CONNECTION_TYPE);
1787 ictx->ustorm_ag_context.cdu_usage =
1788 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1789 ISCSI_CONNECTION_TYPE);
1790 return 0;
1791
1792 }
1793
1794 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1795 u32 num, int *work)
1796 {
1797 struct iscsi_kwqe_conn_offload1 *req1;
1798 struct iscsi_kwqe_conn_offload2 *req2;
1799 struct cnic_local *cp = dev->cnic_priv;
1800 struct cnic_context *ctx;
1801 struct iscsi_kcqe kcqe;
1802 struct kcqe *cqes[1];
1803 u32 l5_cid;
1804 int ret = 0;
1805
1806 if (num < 2) {
1807 *work = num;
1808 return -EINVAL;
1809 }
1810
1811 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1812 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1813 if ((num - 2) < req2->num_additional_wqes) {
1814 *work = num;
1815 return -EINVAL;
1816 }
1817 *work = 2 + req2->num_additional_wqes;
1818
1819 l5_cid = req1->iscsi_conn_id;
1820 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1821 return -EINVAL;
1822
1823 memset(&kcqe, 0, sizeof(kcqe));
1824 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1825 kcqe.iscsi_conn_id = l5_cid;
1826 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1827
1828 ctx = &cp->ctx_tbl[l5_cid];
1829 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1830 kcqe.completion_status =
1831 ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1832 goto done;
1833 }
1834
1835 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1836 atomic_dec(&cp->iscsi_conn);
1837 goto done;
1838 }
1839 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1840 if (ret) {
1841 atomic_dec(&cp->iscsi_conn);
1842 ret = 0;
1843 goto done;
1844 }
1845 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1846 if (ret < 0) {
1847 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1848 atomic_dec(&cp->iscsi_conn);
1849 goto done;
1850 }
1851
1852 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1853 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp, cp->ctx_tbl[l5_cid].cid);
1854
1855 done:
1856 cqes[0] = (struct kcqe *) &kcqe;
1857 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1858 return 0;
1859 }
1860
1861
1862 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1863 {
1864 struct cnic_local *cp = dev->cnic_priv;
1865 struct iscsi_kwqe_conn_update *req =
1866 (struct iscsi_kwqe_conn_update *) kwqe;
1867 void *data;
1868 union l5cm_specific_data l5_data;
1869 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1870 int ret;
1871
1872 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1873 return -EINVAL;
1874
1875 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1876 if (!data)
1877 return -ENOMEM;
1878
1879 memcpy(data, kwqe, sizeof(struct kwqe));
1880
1881 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1882 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1883 return ret;
1884 }
1885
1886 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
1887 {
1888 struct cnic_local *cp = dev->cnic_priv;
1889 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1890 union l5cm_specific_data l5_data;
1891 int ret;
1892 u32 hw_cid;
1893
1894 init_waitqueue_head(&ctx->waitq);
1895 ctx->wait_cond = 0;
1896 memset(&l5_data, 0, sizeof(l5_data));
1897 hw_cid = BNX2X_HW_CID(cp, ctx->cid);
1898
1899 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
1900 hw_cid, NONE_CONNECTION_TYPE, &l5_data);
1901
1902 if (ret == 0) {
1903 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
1904 if (unlikely(test_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags)))
1905 return -EBUSY;
1906 }
1907
1908 return 0;
1909 }
1910
1911 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1912 {
1913 struct cnic_local *cp = dev->cnic_priv;
1914 struct iscsi_kwqe_conn_destroy *req =
1915 (struct iscsi_kwqe_conn_destroy *) kwqe;
1916 u32 l5_cid = req->reserved0;
1917 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1918 int ret = 0;
1919 struct iscsi_kcqe kcqe;
1920 struct kcqe *cqes[1];
1921
1922 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1923 goto skip_cfc_delete;
1924
1925 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
1926 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
1927
1928 if (delta > (2 * HZ))
1929 delta = 0;
1930
1931 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
1932 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
1933 goto destroy_reply;
1934 }
1935
1936 ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
1937
1938 skip_cfc_delete:
1939 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1940
1941 if (!ret) {
1942 atomic_dec(&cp->iscsi_conn);
1943 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
1944 }
1945
1946 destroy_reply:
1947 memset(&kcqe, 0, sizeof(kcqe));
1948 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1949 kcqe.iscsi_conn_id = l5_cid;
1950 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1951 kcqe.iscsi_conn_context_id = req->context_id;
1952
1953 cqes[0] = (struct kcqe *) &kcqe;
1954 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1955
1956 return 0;
1957 }
1958
1959 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1960 struct l4_kwq_connect_req1 *kwqe1,
1961 struct l4_kwq_connect_req3 *kwqe3,
1962 struct l5cm_active_conn_buffer *conn_buf)
1963 {
1964 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1965 struct l5cm_xstorm_conn_buffer *xstorm_buf =
1966 &conn_buf->xstorm_conn_buffer;
1967 struct l5cm_tstorm_conn_buffer *tstorm_buf =
1968 &conn_buf->tstorm_conn_buffer;
1969 struct regpair context_addr;
1970 u32 cid = BNX2X_SW_CID(kwqe1->cid);
1971 struct in6_addr src_ip, dst_ip;
1972 int i;
1973 u32 *addrp;
1974
1975 addrp = (u32 *) &conn_addr->local_ip_addr;
1976 for (i = 0; i < 4; i++, addrp++)
1977 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1978
1979 addrp = (u32 *) &conn_addr->remote_ip_addr;
1980 for (i = 0; i < 4; i++, addrp++)
1981 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1982
1983 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1984
1985 xstorm_buf->context_addr.hi = context_addr.hi;
1986 xstorm_buf->context_addr.lo = context_addr.lo;
1987 xstorm_buf->mss = 0xffff;
1988 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1989 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1990 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1991 xstorm_buf->pseudo_header_checksum =
1992 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1993
1994 if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1995 tstorm_buf->params |=
1996 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1997 if (kwqe3->ka_timeout) {
1998 tstorm_buf->ka_enable = 1;
1999 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
2000 tstorm_buf->ka_interval = kwqe3->ka_interval;
2001 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
2002 }
2003 tstorm_buf->max_rt_time = 0xffffffff;
2004 }
2005
2006 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
2007 {
2008 struct cnic_local *cp = dev->cnic_priv;
2009 u32 pfid = cp->pfid;
2010 u8 *mac = dev->mac_addr;
2011
2012 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2013 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
2014 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2015 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
2016 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2017 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
2018 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2019 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
2020 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2021 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
2022 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2023 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
2024
2025 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2026 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
2027 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2028 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2029 mac[4]);
2030 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2031 TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
2032 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2033 TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2034 mac[2]);
2035 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2036 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[1]);
2037 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2038 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2039 mac[0]);
2040 }
2041
2042 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
2043 {
2044 struct cnic_local *cp = dev->cnic_priv;
2045 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
2046 u16 tstorm_flags = 0;
2047
2048 if (tcp_ts) {
2049 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
2050 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
2051 }
2052
2053 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2054 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), xstorm_flags);
2055
2056 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
2057 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), tstorm_flags);
2058 }
2059
2060 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
2061 u32 num, int *work)
2062 {
2063 struct cnic_local *cp = dev->cnic_priv;
2064 struct l4_kwq_connect_req1 *kwqe1 =
2065 (struct l4_kwq_connect_req1 *) wqes[0];
2066 struct l4_kwq_connect_req3 *kwqe3;
2067 struct l5cm_active_conn_buffer *conn_buf;
2068 struct l5cm_conn_addr_params *conn_addr;
2069 union l5cm_specific_data l5_data;
2070 u32 l5_cid = kwqe1->pg_cid;
2071 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
2072 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2073 int ret;
2074
2075 if (num < 2) {
2076 *work = num;
2077 return -EINVAL;
2078 }
2079
2080 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
2081 *work = 3;
2082 else
2083 *work = 2;
2084
2085 if (num < *work) {
2086 *work = num;
2087 return -EINVAL;
2088 }
2089
2090 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
2091 netdev_err(dev->netdev, "conn_buf size too big\n");
2092 return -ENOMEM;
2093 }
2094 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2095 if (!conn_buf)
2096 return -ENOMEM;
2097
2098 memset(conn_buf, 0, sizeof(*conn_buf));
2099
2100 conn_addr = &conn_buf->conn_addr_buf;
2101 conn_addr->remote_addr_0 = csk->ha[0];
2102 conn_addr->remote_addr_1 = csk->ha[1];
2103 conn_addr->remote_addr_2 = csk->ha[2];
2104 conn_addr->remote_addr_3 = csk->ha[3];
2105 conn_addr->remote_addr_4 = csk->ha[4];
2106 conn_addr->remote_addr_5 = csk->ha[5];
2107
2108 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
2109 struct l4_kwq_connect_req2 *kwqe2 =
2110 (struct l4_kwq_connect_req2 *) wqes[1];
2111
2112 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2113 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2114 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2115
2116 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2117 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2118 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2119 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2120 }
2121 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2122
2123 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2124 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2125 conn_addr->local_tcp_port = kwqe1->src_port;
2126 conn_addr->remote_tcp_port = kwqe1->dst_port;
2127
2128 conn_addr->pmtu = kwqe3->pmtu;
2129 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2130
2131 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
2132 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->pfid), csk->vlan_id);
2133
2134 cnic_bnx2x_set_tcp_timestamp(dev,
2135 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
2136
2137 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2138 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2139 if (!ret)
2140 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2141
2142 return ret;
2143 }
2144
2145 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2146 {
2147 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2148 union l5cm_specific_data l5_data;
2149 int ret;
2150
2151 memset(&l5_data, 0, sizeof(l5_data));
2152 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2153 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2154 return ret;
2155 }
2156
2157 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2158 {
2159 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2160 union l5cm_specific_data l5_data;
2161 int ret;
2162
2163 memset(&l5_data, 0, sizeof(l5_data));
2164 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2165 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2166 return ret;
2167 }
2168 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2169 {
2170 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2171 struct l4_kcq kcqe;
2172 struct kcqe *cqes[1];
2173
2174 memset(&kcqe, 0, sizeof(kcqe));
2175 kcqe.pg_host_opaque = req->host_opaque;
2176 kcqe.pg_cid = req->host_opaque;
2177 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2178 cqes[0] = (struct kcqe *) &kcqe;
2179 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2180 return 0;
2181 }
2182
2183 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2184 {
2185 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2186 struct l4_kcq kcqe;
2187 struct kcqe *cqes[1];
2188
2189 memset(&kcqe, 0, sizeof(kcqe));
2190 kcqe.pg_host_opaque = req->pg_host_opaque;
2191 kcqe.pg_cid = req->pg_cid;
2192 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2193 cqes[0] = (struct kcqe *) &kcqe;
2194 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2195 return 0;
2196 }
2197
2198 static int cnic_bnx2x_fcoe_stat(struct cnic_dev *dev, struct kwqe *kwqe)
2199 {
2200 struct fcoe_kwqe_stat *req;
2201 struct fcoe_stat_ramrod_params *fcoe_stat;
2202 union l5cm_specific_data l5_data;
2203 struct cnic_local *cp = dev->cnic_priv;
2204 int ret;
2205 u32 cid;
2206
2207 req = (struct fcoe_kwqe_stat *) kwqe;
2208 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2209
2210 fcoe_stat = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2211 if (!fcoe_stat)
2212 return -ENOMEM;
2213
2214 memset(fcoe_stat, 0, sizeof(*fcoe_stat));
2215 memcpy(&fcoe_stat->stat_kwqe, req, sizeof(*req));
2216
2217 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT_FUNC, cid,
2218 FCOE_CONNECTION_TYPE, &l5_data);
2219 return ret;
2220 }
2221
2222 static int cnic_bnx2x_fcoe_init1(struct cnic_dev *dev, struct kwqe *wqes[],
2223 u32 num, int *work)
2224 {
2225 int ret;
2226 struct cnic_local *cp = dev->cnic_priv;
2227 u32 cid;
2228 struct fcoe_init_ramrod_params *fcoe_init;
2229 struct fcoe_kwqe_init1 *req1;
2230 struct fcoe_kwqe_init2 *req2;
2231 struct fcoe_kwqe_init3 *req3;
2232 union l5cm_specific_data l5_data;
2233
2234 if (num < 3) {
2235 *work = num;
2236 return -EINVAL;
2237 }
2238 req1 = (struct fcoe_kwqe_init1 *) wqes[0];
2239 req2 = (struct fcoe_kwqe_init2 *) wqes[1];
2240 req3 = (struct fcoe_kwqe_init3 *) wqes[2];
2241 if (req2->hdr.op_code != FCOE_KWQE_OPCODE_INIT2) {
2242 *work = 1;
2243 return -EINVAL;
2244 }
2245 if (req3->hdr.op_code != FCOE_KWQE_OPCODE_INIT3) {
2246 *work = 2;
2247 return -EINVAL;
2248 }
2249
2250 if (sizeof(*fcoe_init) > CNIC_KWQ16_DATA_SIZE) {
2251 netdev_err(dev->netdev, "fcoe_init size too big\n");
2252 return -ENOMEM;
2253 }
2254 fcoe_init = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2255 if (!fcoe_init)
2256 return -ENOMEM;
2257
2258 memset(fcoe_init, 0, sizeof(*fcoe_init));
2259 memcpy(&fcoe_init->init_kwqe1, req1, sizeof(*req1));
2260 memcpy(&fcoe_init->init_kwqe2, req2, sizeof(*req2));
2261 memcpy(&fcoe_init->init_kwqe3, req3, sizeof(*req3));
2262 fcoe_init->eq_pbl_base.lo = cp->kcq2.dma.pgtbl_map & 0xffffffff;
2263 fcoe_init->eq_pbl_base.hi = (u64) cp->kcq2.dma.pgtbl_map >> 32;
2264 fcoe_init->eq_pbl_size = cp->kcq2.dma.num_pages;
2265
2266 fcoe_init->sb_num = cp->status_blk_num;
2267 fcoe_init->eq_prod = MAX_KCQ_IDX;
2268 fcoe_init->sb_id = HC_INDEX_FCOE_EQ_CONS;
2269 cp->kcq2.sw_prod_idx = 0;
2270
2271 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2272 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT_FUNC, cid,
2273 FCOE_CONNECTION_TYPE, &l5_data);
2274 *work = 3;
2275 return ret;
2276 }
2277
2278 static int cnic_bnx2x_fcoe_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
2279 u32 num, int *work)
2280 {
2281 int ret = 0;
2282 u32 cid = -1, l5_cid;
2283 struct cnic_local *cp = dev->cnic_priv;
2284 struct fcoe_kwqe_conn_offload1 *req1;
2285 struct fcoe_kwqe_conn_offload2 *req2;
2286 struct fcoe_kwqe_conn_offload3 *req3;
2287 struct fcoe_kwqe_conn_offload4 *req4;
2288 struct fcoe_conn_offload_ramrod_params *fcoe_offload;
2289 struct cnic_context *ctx;
2290 struct fcoe_context *fctx;
2291 struct regpair ctx_addr;
2292 union l5cm_specific_data l5_data;
2293 struct fcoe_kcqe kcqe;
2294 struct kcqe *cqes[1];
2295
2296 if (num < 4) {
2297 *work = num;
2298 return -EINVAL;
2299 }
2300 req1 = (struct fcoe_kwqe_conn_offload1 *) wqes[0];
2301 req2 = (struct fcoe_kwqe_conn_offload2 *) wqes[1];
2302 req3 = (struct fcoe_kwqe_conn_offload3 *) wqes[2];
2303 req4 = (struct fcoe_kwqe_conn_offload4 *) wqes[3];
2304
2305 *work = 4;
2306
2307 l5_cid = req1->fcoe_conn_id;
2308 if (l5_cid >= dev->max_fcoe_conn)
2309 goto err_reply;
2310
2311 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2312
2313 ctx = &cp->ctx_tbl[l5_cid];
2314 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2315 goto err_reply;
2316
2317 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
2318 if (ret) {
2319 ret = 0;
2320 goto err_reply;
2321 }
2322 cid = ctx->cid;
2323
2324 fctx = cnic_get_bnx2x_ctx(dev, cid, 1, &ctx_addr);
2325 if (fctx) {
2326 u32 hw_cid = BNX2X_HW_CID(cp, cid);
2327 u32 val;
2328
2329 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
2330 FCOE_CONNECTION_TYPE);
2331 fctx->xstorm_ag_context.cdu_reserved = val;
2332 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
2333 FCOE_CONNECTION_TYPE);
2334 fctx->ustorm_ag_context.cdu_usage = val;
2335 }
2336 if (sizeof(*fcoe_offload) > CNIC_KWQ16_DATA_SIZE) {
2337 netdev_err(dev->netdev, "fcoe_offload size too big\n");
2338 goto err_reply;
2339 }
2340 fcoe_offload = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2341 if (!fcoe_offload)
2342 goto err_reply;
2343
2344 memset(fcoe_offload, 0, sizeof(*fcoe_offload));
2345 memcpy(&fcoe_offload->offload_kwqe1, req1, sizeof(*req1));
2346 memcpy(&fcoe_offload->offload_kwqe2, req2, sizeof(*req2));
2347 memcpy(&fcoe_offload->offload_kwqe3, req3, sizeof(*req3));
2348 memcpy(&fcoe_offload->offload_kwqe4, req4, sizeof(*req4));
2349
2350 cid = BNX2X_HW_CID(cp, cid);
2351 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_OFFLOAD_CONN, cid,
2352 FCOE_CONNECTION_TYPE, &l5_data);
2353 if (!ret)
2354 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2355
2356 return ret;
2357
2358 err_reply:
2359 if (cid != -1)
2360 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2361
2362 memset(&kcqe, 0, sizeof(kcqe));
2363 kcqe.op_code = FCOE_KCQE_OPCODE_OFFLOAD_CONN;
2364 kcqe.fcoe_conn_id = req1->fcoe_conn_id;
2365 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
2366
2367 cqes[0] = (struct kcqe *) &kcqe;
2368 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2369 return ret;
2370 }
2371
2372 static int cnic_bnx2x_fcoe_enable(struct cnic_dev *dev, struct kwqe *kwqe)
2373 {
2374 struct fcoe_kwqe_conn_enable_disable *req;
2375 struct fcoe_conn_enable_disable_ramrod_params *fcoe_enable;
2376 union l5cm_specific_data l5_data;
2377 int ret;
2378 u32 cid, l5_cid;
2379 struct cnic_local *cp = dev->cnic_priv;
2380
2381 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2382 cid = req->context_id;
2383 l5_cid = req->conn_id + BNX2X_FCOE_L5_CID_BASE;
2384
2385 if (sizeof(*fcoe_enable) > CNIC_KWQ16_DATA_SIZE) {
2386 netdev_err(dev->netdev, "fcoe_enable size too big\n");
2387 return -ENOMEM;
2388 }
2389 fcoe_enable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2390 if (!fcoe_enable)
2391 return -ENOMEM;
2392
2393 memset(fcoe_enable, 0, sizeof(*fcoe_enable));
2394 memcpy(&fcoe_enable->enable_disable_kwqe, req, sizeof(*req));
2395 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_ENABLE_CONN, cid,
2396 FCOE_CONNECTION_TYPE, &l5_data);
2397 return ret;
2398 }
2399
2400 static int cnic_bnx2x_fcoe_disable(struct cnic_dev *dev, struct kwqe *kwqe)
2401 {
2402 struct fcoe_kwqe_conn_enable_disable *req;
2403 struct fcoe_conn_enable_disable_ramrod_params *fcoe_disable;
2404 union l5cm_specific_data l5_data;
2405 int ret;
2406 u32 cid, l5_cid;
2407 struct cnic_local *cp = dev->cnic_priv;
2408
2409 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2410 cid = req->context_id;
2411 l5_cid = req->conn_id;
2412 if (l5_cid >= dev->max_fcoe_conn)
2413 return -EINVAL;
2414
2415 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2416
2417 if (sizeof(*fcoe_disable) > CNIC_KWQ16_DATA_SIZE) {
2418 netdev_err(dev->netdev, "fcoe_disable size too big\n");
2419 return -ENOMEM;
2420 }
2421 fcoe_disable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2422 if (!fcoe_disable)
2423 return -ENOMEM;
2424
2425 memset(fcoe_disable, 0, sizeof(*fcoe_disable));
2426 memcpy(&fcoe_disable->enable_disable_kwqe, req, sizeof(*req));
2427 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DISABLE_CONN, cid,
2428 FCOE_CONNECTION_TYPE, &l5_data);
2429 return ret;
2430 }
2431
2432 static int cnic_bnx2x_fcoe_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2433 {
2434 struct fcoe_kwqe_conn_destroy *req;
2435 union l5cm_specific_data l5_data;
2436 int ret;
2437 u32 cid, l5_cid;
2438 struct cnic_local *cp = dev->cnic_priv;
2439 struct cnic_context *ctx;
2440 struct fcoe_kcqe kcqe;
2441 struct kcqe *cqes[1];
2442
2443 req = (struct fcoe_kwqe_conn_destroy *) kwqe;
2444 cid = req->context_id;
2445 l5_cid = req->conn_id;
2446 if (l5_cid >= dev->max_fcoe_conn)
2447 return -EINVAL;
2448
2449 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2450
2451 ctx = &cp->ctx_tbl[l5_cid];
2452
2453 init_waitqueue_head(&ctx->waitq);
2454 ctx->wait_cond = 0;
2455
2456 memset(&kcqe, 0, sizeof(kcqe));
2457 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_ERROR;
2458 memset(&l5_data, 0, sizeof(l5_data));
2459 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_TERMINATE_CONN, cid,
2460 FCOE_CONNECTION_TYPE, &l5_data);
2461 if (ret == 0) {
2462 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
2463 if (ctx->wait_cond)
2464 kcqe.completion_status = 0;
2465 }
2466
2467 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2468 queue_delayed_work(cnic_wq, &cp->delete_task, msecs_to_jiffies(2000));
2469
2470 kcqe.op_code = FCOE_KCQE_OPCODE_DESTROY_CONN;
2471 kcqe.fcoe_conn_id = req->conn_id;
2472 kcqe.fcoe_conn_context_id = cid;
2473
2474 cqes[0] = (struct kcqe *) &kcqe;
2475 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2476 return ret;
2477 }
2478
2479 static void cnic_bnx2x_delete_wait(struct cnic_dev *dev, u32 start_cid)
2480 {
2481 struct cnic_local *cp = dev->cnic_priv;
2482 u32 i;
2483
2484 for (i = start_cid; i < cp->max_cid_space; i++) {
2485 struct cnic_context *ctx = &cp->ctx_tbl[i];
2486 int j;
2487
2488 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
2489 msleep(10);
2490
2491 for (j = 0; j < 5; j++) {
2492 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2493 break;
2494 msleep(20);
2495 }
2496
2497 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2498 netdev_warn(dev->netdev, "CID %x not deleted\n",
2499 ctx->cid);
2500 }
2501 }
2502
2503 static int cnic_bnx2x_fcoe_fw_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2504 {
2505 struct fcoe_kwqe_destroy *req;
2506 union l5cm_specific_data l5_data;
2507 struct cnic_local *cp = dev->cnic_priv;
2508 int ret;
2509 u32 cid;
2510
2511 cnic_bnx2x_delete_wait(dev, MAX_ISCSI_TBL_SZ);
2512
2513 req = (struct fcoe_kwqe_destroy *) kwqe;
2514 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2515
2516 memset(&l5_data, 0, sizeof(l5_data));
2517 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY_FUNC, cid,
2518 FCOE_CONNECTION_TYPE, &l5_data);
2519 return ret;
2520 }
2521
2522 static void cnic_bnx2x_kwqe_err(struct cnic_dev *dev, struct kwqe *kwqe)
2523 {
2524 struct cnic_local *cp = dev->cnic_priv;
2525 struct kcqe kcqe;
2526 struct kcqe *cqes[1];
2527 u32 cid;
2528 u32 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2529 u32 layer_code = kwqe->kwqe_op_flag & KWQE_LAYER_MASK;
2530 u32 kcqe_op;
2531 int ulp_type;
2532
2533 cid = kwqe->kwqe_info0;
2534 memset(&kcqe, 0, sizeof(kcqe));
2535
2536 if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_FCOE) {
2537 u32 l5_cid = 0;
2538
2539 ulp_type = CNIC_ULP_FCOE;
2540 if (opcode == FCOE_KWQE_OPCODE_DISABLE_CONN) {
2541 struct fcoe_kwqe_conn_enable_disable *req;
2542
2543 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2544 kcqe_op = FCOE_KCQE_OPCODE_DISABLE_CONN;
2545 cid = req->context_id;
2546 l5_cid = req->conn_id;
2547 } else if (opcode == FCOE_KWQE_OPCODE_DESTROY) {
2548 kcqe_op = FCOE_KCQE_OPCODE_DESTROY_FUNC;
2549 } else {
2550 return;
2551 }
2552 kcqe.kcqe_op_flag = kcqe_op << KCQE_FLAGS_OPCODE_SHIFT;
2553 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_FCOE;
2554 kcqe.kcqe_info1 = FCOE_KCQE_COMPLETION_STATUS_PARITY_ERROR;
2555 kcqe.kcqe_info2 = cid;
2556 kcqe.kcqe_info0 = l5_cid;
2557
2558 } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_ISCSI) {
2559 ulp_type = CNIC_ULP_ISCSI;
2560 if (opcode == ISCSI_KWQE_OPCODE_UPDATE_CONN)
2561 cid = kwqe->kwqe_info1;
2562
2563 kcqe.kcqe_op_flag = (opcode + 0x10) << KCQE_FLAGS_OPCODE_SHIFT;
2564 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_ISCSI;
2565 kcqe.kcqe_info1 = ISCSI_KCQE_COMPLETION_STATUS_PARITY_ERR;
2566 kcqe.kcqe_info2 = cid;
2567 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &kcqe.kcqe_info0);
2568
2569 } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L4) {
2570 struct l4_kcq *l4kcqe = (struct l4_kcq *) &kcqe;
2571
2572 ulp_type = CNIC_ULP_L4;
2573 if (opcode == L4_KWQE_OPCODE_VALUE_CONNECT1)
2574 kcqe_op = L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE;
2575 else if (opcode == L4_KWQE_OPCODE_VALUE_RESET)
2576 kcqe_op = L4_KCQE_OPCODE_VALUE_RESET_COMP;
2577 else if (opcode == L4_KWQE_OPCODE_VALUE_CLOSE)
2578 kcqe_op = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
2579 else
2580 return;
2581
2582 kcqe.kcqe_op_flag = (kcqe_op << KCQE_FLAGS_OPCODE_SHIFT) |
2583 KCQE_FLAGS_LAYER_MASK_L4;
2584 l4kcqe->status = L4_KCQE_COMPLETION_STATUS_PARITY_ERROR;
2585 l4kcqe->cid = cid;
2586 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &l4kcqe->conn_id);
2587 } else {
2588 return;
2589 }
2590
2591 cqes[0] = (struct kcqe *) &kcqe;
2592 cnic_reply_bnx2x_kcqes(dev, ulp_type, cqes, 1);
2593 }
2594
2595 static int cnic_submit_bnx2x_iscsi_kwqes(struct cnic_dev *dev,
2596 struct kwqe *wqes[], u32 num_wqes)
2597 {
2598 int i, work, ret;
2599 u32 opcode;
2600 struct kwqe *kwqe;
2601
2602 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2603 return -EAGAIN; /* bnx2 is down */
2604
2605 for (i = 0; i < num_wqes; ) {
2606 kwqe = wqes[i];
2607 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2608 work = 1;
2609
2610 switch (opcode) {
2611 case ISCSI_KWQE_OPCODE_INIT1:
2612 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2613 break;
2614 case ISCSI_KWQE_OPCODE_INIT2:
2615 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2616 break;
2617 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2618 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2619 num_wqes - i, &work);
2620 break;
2621 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2622 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2623 break;
2624 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2625 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2626 break;
2627 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2628 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2629 &work);
2630 break;
2631 case L4_KWQE_OPCODE_VALUE_CLOSE:
2632 ret = cnic_bnx2x_close(dev, kwqe);
2633 break;
2634 case L4_KWQE_OPCODE_VALUE_RESET:
2635 ret = cnic_bnx2x_reset(dev, kwqe);
2636 break;
2637 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2638 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2639 break;
2640 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2641 ret = cnic_bnx2x_update_pg(dev, kwqe);
2642 break;
2643 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2644 ret = 0;
2645 break;
2646 default:
2647 ret = 0;
2648 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2649 opcode);
2650 break;
2651 }
2652 if (ret < 0) {
2653 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2654 opcode);
2655
2656 /* Possibly bnx2x parity error, send completion
2657 * to ulp drivers with error code to speed up
2658 * cleanup and reset recovery.
2659 */
2660 if (ret == -EIO || ret == -EAGAIN)
2661 cnic_bnx2x_kwqe_err(dev, kwqe);
2662 }
2663 i += work;
2664 }
2665 return 0;
2666 }
2667
2668 static int cnic_submit_bnx2x_fcoe_kwqes(struct cnic_dev *dev,
2669 struct kwqe *wqes[], u32 num_wqes)
2670 {
2671 struct cnic_local *cp = dev->cnic_priv;
2672 int i, work, ret;
2673 u32 opcode;
2674 struct kwqe *kwqe;
2675
2676 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2677 return -EAGAIN; /* bnx2 is down */
2678
2679 if (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id))
2680 return -EINVAL;
2681
2682 for (i = 0; i < num_wqes; ) {
2683 kwqe = wqes[i];
2684 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2685 work = 1;
2686
2687 switch (opcode) {
2688 case FCOE_KWQE_OPCODE_INIT1:
2689 ret = cnic_bnx2x_fcoe_init1(dev, &wqes[i],
2690 num_wqes - i, &work);
2691 break;
2692 case FCOE_KWQE_OPCODE_OFFLOAD_CONN1:
2693 ret = cnic_bnx2x_fcoe_ofld1(dev, &wqes[i],
2694 num_wqes - i, &work);
2695 break;
2696 case FCOE_KWQE_OPCODE_ENABLE_CONN:
2697 ret = cnic_bnx2x_fcoe_enable(dev, kwqe);
2698 break;
2699 case FCOE_KWQE_OPCODE_DISABLE_CONN:
2700 ret = cnic_bnx2x_fcoe_disable(dev, kwqe);
2701 break;
2702 case FCOE_KWQE_OPCODE_DESTROY_CONN:
2703 ret = cnic_bnx2x_fcoe_destroy(dev, kwqe);
2704 break;
2705 case FCOE_KWQE_OPCODE_DESTROY:
2706 ret = cnic_bnx2x_fcoe_fw_destroy(dev, kwqe);
2707 break;
2708 case FCOE_KWQE_OPCODE_STAT:
2709 ret = cnic_bnx2x_fcoe_stat(dev, kwqe);
2710 break;
2711 default:
2712 ret = 0;
2713 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2714 opcode);
2715 break;
2716 }
2717 if (ret < 0) {
2718 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2719 opcode);
2720
2721 /* Possibly bnx2x parity error, send completion
2722 * to ulp drivers with error code to speed up
2723 * cleanup and reset recovery.
2724 */
2725 if (ret == -EIO || ret == -EAGAIN)
2726 cnic_bnx2x_kwqe_err(dev, kwqe);
2727 }
2728 i += work;
2729 }
2730 return 0;
2731 }
2732
2733 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2734 u32 num_wqes)
2735 {
2736 int ret = -EINVAL;
2737 u32 layer_code;
2738
2739 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2740 return -EAGAIN; /* bnx2x is down */
2741
2742 if (!num_wqes)
2743 return 0;
2744
2745 layer_code = wqes[0]->kwqe_op_flag & KWQE_LAYER_MASK;
2746 switch (layer_code) {
2747 case KWQE_FLAGS_LAYER_MASK_L5_ISCSI:
2748 case KWQE_FLAGS_LAYER_MASK_L4:
2749 case KWQE_FLAGS_LAYER_MASK_L2:
2750 ret = cnic_submit_bnx2x_iscsi_kwqes(dev, wqes, num_wqes);
2751 break;
2752
2753 case KWQE_FLAGS_LAYER_MASK_L5_FCOE:
2754 ret = cnic_submit_bnx2x_fcoe_kwqes(dev, wqes, num_wqes);
2755 break;
2756 }
2757 return ret;
2758 }
2759
2760 static inline u32 cnic_get_kcqe_layer_mask(u32 opflag)
2761 {
2762 if (unlikely(KCQE_OPCODE(opflag) == FCOE_RAMROD_CMD_ID_TERMINATE_CONN))
2763 return KCQE_FLAGS_LAYER_MASK_L4;
2764
2765 return opflag & KCQE_FLAGS_LAYER_MASK;
2766 }
2767
2768 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2769 {
2770 struct cnic_local *cp = dev->cnic_priv;
2771 int i, j, comp = 0;
2772
2773 i = 0;
2774 j = 1;
2775 while (num_cqes) {
2776 struct cnic_ulp_ops *ulp_ops;
2777 int ulp_type;
2778 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2779 u32 kcqe_layer = cnic_get_kcqe_layer_mask(kcqe_op_flag);
2780
2781 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2782 comp++;
2783
2784 while (j < num_cqes) {
2785 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2786
2787 if (cnic_get_kcqe_layer_mask(next_op) != kcqe_layer)
2788 break;
2789
2790 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2791 comp++;
2792 j++;
2793 }
2794
2795 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2796 ulp_type = CNIC_ULP_RDMA;
2797 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2798 ulp_type = CNIC_ULP_ISCSI;
2799 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_FCOE)
2800 ulp_type = CNIC_ULP_FCOE;
2801 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2802 ulp_type = CNIC_ULP_L4;
2803 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2804 goto end;
2805 else {
2806 netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2807 kcqe_op_flag);
2808 goto end;
2809 }
2810
2811 rcu_read_lock();
2812 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2813 if (likely(ulp_ops)) {
2814 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2815 cp->completed_kcq + i, j);
2816 }
2817 rcu_read_unlock();
2818 end:
2819 num_cqes -= j;
2820 i += j;
2821 j = 1;
2822 }
2823 if (unlikely(comp))
2824 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
2825 }
2826
2827 static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
2828 {
2829 struct cnic_local *cp = dev->cnic_priv;
2830 u16 i, ri, hw_prod, last;
2831 struct kcqe *kcqe;
2832 int kcqe_cnt = 0, last_cnt = 0;
2833
2834 i = ri = last = info->sw_prod_idx;
2835 ri &= MAX_KCQ_IDX;
2836 hw_prod = *info->hw_prod_idx_ptr;
2837 hw_prod = info->hw_idx(hw_prod);
2838
2839 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2840 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2841 cp->completed_kcq[kcqe_cnt++] = kcqe;
2842 i = info->next_idx(i);
2843 ri = i & MAX_KCQ_IDX;
2844 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2845 last_cnt = kcqe_cnt;
2846 last = i;
2847 }
2848 }
2849
2850 info->sw_prod_idx = last;
2851 return last_cnt;
2852 }
2853
2854 static int cnic_l2_completion(struct cnic_local *cp)
2855 {
2856 u16 hw_cons, sw_cons;
2857 struct cnic_uio_dev *udev = cp->udev;
2858 union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2859 (udev->l2_ring + (2 * BCM_PAGE_SIZE));
2860 u32 cmd;
2861 int comp = 0;
2862
2863 if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2864 return 0;
2865
2866 hw_cons = *cp->rx_cons_ptr;
2867 if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2868 hw_cons++;
2869
2870 sw_cons = cp->rx_cons;
2871 while (sw_cons != hw_cons) {
2872 u8 cqe_fp_flags;
2873
2874 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2875 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2876 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2877 cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2878 cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2879 if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2880 cmd == RAMROD_CMD_ID_ETH_HALT)
2881 comp++;
2882 }
2883 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2884 }
2885 return comp;
2886 }
2887
2888 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2889 {
2890 u16 rx_cons, tx_cons;
2891 int comp = 0;
2892
2893 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
2894 return;
2895
2896 rx_cons = *cp->rx_cons_ptr;
2897 tx_cons = *cp->tx_cons_ptr;
2898 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2899 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2900 comp = cnic_l2_completion(cp);
2901
2902 cp->tx_cons = tx_cons;
2903 cp->rx_cons = rx_cons;
2904
2905 if (cp->udev)
2906 uio_event_notify(&cp->udev->cnic_uinfo);
2907 }
2908 if (comp)
2909 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2910 }
2911
2912 static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
2913 {
2914 struct cnic_local *cp = dev->cnic_priv;
2915 u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2916 int kcqe_cnt;
2917
2918 /* status block index must be read before reading other fields */
2919 rmb();
2920 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2921
2922 while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
2923
2924 service_kcqes(dev, kcqe_cnt);
2925
2926 /* Tell compiler that status_blk fields can change. */
2927 barrier();
2928 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2929 /* status block index must be read first */
2930 rmb();
2931 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2932 }
2933
2934 CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
2935
2936 cnic_chk_pkt_rings(cp);
2937
2938 return status_idx;
2939 }
2940
2941 static int cnic_service_bnx2(void *data, void *status_blk)
2942 {
2943 struct cnic_dev *dev = data;
2944
2945 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2946 struct status_block *sblk = status_blk;
2947
2948 return sblk->status_idx;
2949 }
2950
2951 return cnic_service_bnx2_queues(dev);
2952 }
2953
2954 static void cnic_service_bnx2_msix(unsigned long data)
2955 {
2956 struct cnic_dev *dev = (struct cnic_dev *) data;
2957 struct cnic_local *cp = dev->cnic_priv;
2958
2959 cp->last_status_idx = cnic_service_bnx2_queues(dev);
2960
2961 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2962 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2963 }
2964
2965 static void cnic_doirq(struct cnic_dev *dev)
2966 {
2967 struct cnic_local *cp = dev->cnic_priv;
2968
2969 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2970 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
2971
2972 prefetch(cp->status_blk.gen);
2973 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2974
2975 tasklet_schedule(&cp->cnic_irq_task);
2976 }
2977 }
2978
2979 static irqreturn_t cnic_irq(int irq, void *dev_instance)
2980 {
2981 struct cnic_dev *dev = dev_instance;
2982 struct cnic_local *cp = dev->cnic_priv;
2983
2984 if (cp->ack_int)
2985 cp->ack_int(dev);
2986
2987 cnic_doirq(dev);
2988
2989 return IRQ_HANDLED;
2990 }
2991
2992 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2993 u16 index, u8 op, u8 update)
2994 {
2995 struct cnic_local *cp = dev->cnic_priv;
2996 u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2997 COMMAND_REG_INT_ACK);
2998 struct igu_ack_register igu_ack;
2999
3000 igu_ack.status_block_index = index;
3001 igu_ack.sb_id_and_flags =
3002 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
3003 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
3004 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
3005 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
3006
3007 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
3008 }
3009
3010 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
3011 u16 index, u8 op, u8 update)
3012 {
3013 struct igu_regular cmd_data;
3014 u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
3015
3016 cmd_data.sb_id_and_flags =
3017 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
3018 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
3019 (update << IGU_REGULAR_BUPDATE_SHIFT) |
3020 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
3021
3022
3023 CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
3024 }
3025
3026 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
3027 {
3028 struct cnic_local *cp = dev->cnic_priv;
3029
3030 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
3031 IGU_INT_DISABLE, 0);
3032 }
3033
3034 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
3035 {
3036 struct cnic_local *cp = dev->cnic_priv;
3037
3038 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
3039 IGU_INT_DISABLE, 0);
3040 }
3041
3042 static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
3043 {
3044 u32 last_status = *info->status_idx_ptr;
3045 int kcqe_cnt;
3046
3047 /* status block index must be read before reading the KCQ */
3048 rmb();
3049 while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
3050
3051 service_kcqes(dev, kcqe_cnt);
3052
3053 /* Tell compiler that sblk fields can change. */
3054 barrier();
3055
3056 last_status = *info->status_idx_ptr;
3057 /* status block index must be read before reading the KCQ */
3058 rmb();
3059 }
3060 return last_status;
3061 }
3062
3063 static void cnic_service_bnx2x_bh(unsigned long data)
3064 {
3065 struct cnic_dev *dev = (struct cnic_dev *) data;
3066 struct cnic_local *cp = dev->cnic_priv;
3067 u32 status_idx, new_status_idx;
3068
3069 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
3070 return;
3071
3072 while (1) {
3073 status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
3074
3075 CNIC_WR16(dev, cp->kcq1.io_addr,
3076 cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
3077
3078 if (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
3079 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID,
3080 status_idx, IGU_INT_ENABLE, 1);
3081 break;
3082 }
3083
3084 new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
3085
3086 if (new_status_idx != status_idx)
3087 continue;
3088
3089 CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx +
3090 MAX_KCQ_IDX);
3091
3092 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
3093 status_idx, IGU_INT_ENABLE, 1);
3094
3095 break;
3096 }
3097 }
3098
3099 static int cnic_service_bnx2x(void *data, void *status_blk)
3100 {
3101 struct cnic_dev *dev = data;
3102 struct cnic_local *cp = dev->cnic_priv;
3103
3104 if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3105 cnic_doirq(dev);
3106
3107 cnic_chk_pkt_rings(cp);
3108
3109 return 0;
3110 }
3111
3112 static void cnic_ulp_stop_one(struct cnic_local *cp, int if_type)
3113 {
3114 struct cnic_ulp_ops *ulp_ops;
3115
3116 if (if_type == CNIC_ULP_ISCSI)
3117 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
3118
3119 mutex_lock(&cnic_lock);
3120 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3121 lockdep_is_held(&cnic_lock));
3122 if (!ulp_ops) {
3123 mutex_unlock(&cnic_lock);
3124 return;
3125 }
3126 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3127 mutex_unlock(&cnic_lock);
3128
3129 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3130 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
3131
3132 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3133 }
3134
3135 static void cnic_ulp_stop(struct cnic_dev *dev)
3136 {
3137 struct cnic_local *cp = dev->cnic_priv;
3138 int if_type;
3139
3140 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++)
3141 cnic_ulp_stop_one(cp, if_type);
3142 }
3143
3144 static void cnic_ulp_start(struct cnic_dev *dev)
3145 {
3146 struct cnic_local *cp = dev->cnic_priv;
3147 int if_type;
3148
3149 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
3150 struct cnic_ulp_ops *ulp_ops;
3151
3152 mutex_lock(&cnic_lock);
3153 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3154 lockdep_is_held(&cnic_lock));
3155 if (!ulp_ops || !ulp_ops->cnic_start) {
3156 mutex_unlock(&cnic_lock);
3157 continue;
3158 }
3159 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3160 mutex_unlock(&cnic_lock);
3161
3162 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3163 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
3164
3165 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3166 }
3167 }
3168
3169 static int cnic_copy_ulp_stats(struct cnic_dev *dev, int ulp_type)
3170 {
3171 struct cnic_local *cp = dev->cnic_priv;
3172 struct cnic_ulp_ops *ulp_ops;
3173 int rc;
3174
3175 mutex_lock(&cnic_lock);
3176 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
3177 if (ulp_ops && ulp_ops->cnic_get_stats)
3178 rc = ulp_ops->cnic_get_stats(cp->ulp_handle[ulp_type]);
3179 else
3180 rc = -ENODEV;
3181 mutex_unlock(&cnic_lock);
3182 return rc;
3183 }
3184
3185 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
3186 {
3187 struct cnic_dev *dev = data;
3188 int ulp_type = CNIC_ULP_ISCSI;
3189
3190 switch (info->cmd) {
3191 case CNIC_CTL_STOP_CMD:
3192 cnic_hold(dev);
3193
3194 cnic_ulp_stop(dev);
3195 cnic_stop_hw(dev);
3196
3197 cnic_put(dev);
3198 break;
3199 case CNIC_CTL_START_CMD:
3200 cnic_hold(dev);
3201
3202 if (!cnic_start_hw(dev))
3203 cnic_ulp_start(dev);
3204
3205 cnic_put(dev);
3206 break;
3207 case CNIC_CTL_STOP_ISCSI_CMD: {
3208 struct cnic_local *cp = dev->cnic_priv;
3209 set_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags);
3210 queue_delayed_work(cnic_wq, &cp->delete_task, 0);
3211 break;
3212 }
3213 case CNIC_CTL_COMPLETION_CMD: {
3214 struct cnic_ctl_completion *comp = &info->data.comp;
3215 u32 cid = BNX2X_SW_CID(comp->cid);
3216 u32 l5_cid;
3217 struct cnic_local *cp = dev->cnic_priv;
3218
3219 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
3220 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3221
3222 if (unlikely(comp->error)) {
3223 set_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags);
3224 netdev_err(dev->netdev,
3225 "CID %x CFC delete comp error %x\n",
3226 cid, comp->error);
3227 }
3228
3229 ctx->wait_cond = 1;
3230 wake_up(&ctx->waitq);
3231 }
3232 break;
3233 }
3234 case CNIC_CTL_FCOE_STATS_GET_CMD:
3235 ulp_type = CNIC_ULP_FCOE;
3236 /* fall through */
3237 case CNIC_CTL_ISCSI_STATS_GET_CMD:
3238 cnic_hold(dev);
3239 cnic_copy_ulp_stats(dev, ulp_type);
3240 cnic_put(dev);
3241 break;
3242
3243 default:
3244 return -EINVAL;
3245 }
3246 return 0;
3247 }
3248
3249 static void cnic_ulp_init(struct cnic_dev *dev)
3250 {
3251 int i;
3252 struct cnic_local *cp = dev->cnic_priv;
3253
3254 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3255 struct cnic_ulp_ops *ulp_ops;
3256
3257 mutex_lock(&cnic_lock);
3258 ulp_ops = cnic_ulp_tbl_prot(i);
3259 if (!ulp_ops || !ulp_ops->cnic_init) {
3260 mutex_unlock(&cnic_lock);
3261 continue;
3262 }
3263 ulp_get(ulp_ops);
3264 mutex_unlock(&cnic_lock);
3265
3266 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3267 ulp_ops->cnic_init(dev);
3268
3269 ulp_put(ulp_ops);
3270 }
3271 }
3272
3273 static void cnic_ulp_exit(struct cnic_dev *dev)
3274 {
3275 int i;
3276 struct cnic_local *cp = dev->cnic_priv;
3277
3278 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3279 struct cnic_ulp_ops *ulp_ops;
3280
3281 mutex_lock(&cnic_lock);
3282 ulp_ops = cnic_ulp_tbl_prot(i);
3283 if (!ulp_ops || !ulp_ops->cnic_exit) {
3284 mutex_unlock(&cnic_lock);
3285 continue;
3286 }
3287 ulp_get(ulp_ops);
3288 mutex_unlock(&cnic_lock);
3289
3290 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3291 ulp_ops->cnic_exit(dev);
3292
3293 ulp_put(ulp_ops);
3294 }
3295 }
3296
3297 static int cnic_cm_offload_pg(struct cnic_sock *csk)
3298 {
3299 struct cnic_dev *dev = csk->dev;
3300 struct l4_kwq_offload_pg *l4kwqe;
3301 struct kwqe *wqes[1];
3302
3303 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
3304 memset(l4kwqe, 0, sizeof(*l4kwqe));
3305 wqes[0] = (struct kwqe *) l4kwqe;
3306
3307 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
3308 l4kwqe->flags =
3309 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
3310 l4kwqe->l2hdr_nbytes = ETH_HLEN;
3311
3312 l4kwqe->da0 = csk->ha[0];
3313 l4kwqe->da1 = csk->ha[1];
3314 l4kwqe->da2 = csk->ha[2];
3315 l4kwqe->da3 = csk->ha[3];
3316 l4kwqe->da4 = csk->ha[4];
3317 l4kwqe->da5 = csk->ha[5];
3318
3319 l4kwqe->sa0 = dev->mac_addr[0];
3320 l4kwqe->sa1 = dev->mac_addr[1];
3321 l4kwqe->sa2 = dev->mac_addr[2];
3322 l4kwqe->sa3 = dev->mac_addr[3];
3323 l4kwqe->sa4 = dev->mac_addr[4];
3324 l4kwqe->sa5 = dev->mac_addr[5];
3325
3326 l4kwqe->etype = ETH_P_IP;
3327 l4kwqe->ipid_start = DEF_IPID_START;
3328 l4kwqe->host_opaque = csk->l5_cid;
3329
3330 if (csk->vlan_id) {
3331 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
3332 l4kwqe->vlan_tag = csk->vlan_id;
3333 l4kwqe->l2hdr_nbytes += 4;
3334 }
3335
3336 return dev->submit_kwqes(dev, wqes, 1);
3337 }
3338
3339 static int cnic_cm_update_pg(struct cnic_sock *csk)
3340 {
3341 struct cnic_dev *dev = csk->dev;
3342 struct l4_kwq_update_pg *l4kwqe;
3343 struct kwqe *wqes[1];
3344
3345 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
3346 memset(l4kwqe, 0, sizeof(*l4kwqe));
3347 wqes[0] = (struct kwqe *) l4kwqe;
3348
3349 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
3350 l4kwqe->flags =
3351 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
3352 l4kwqe->pg_cid = csk->pg_cid;
3353
3354 l4kwqe->da0 = csk->ha[0];
3355 l4kwqe->da1 = csk->ha[1];
3356 l4kwqe->da2 = csk->ha[2];
3357 l4kwqe->da3 = csk->ha[3];
3358 l4kwqe->da4 = csk->ha[4];
3359 l4kwqe->da5 = csk->ha[5];
3360
3361 l4kwqe->pg_host_opaque = csk->l5_cid;
3362 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
3363
3364 return dev->submit_kwqes(dev, wqes, 1);
3365 }
3366
3367 static int cnic_cm_upload_pg(struct cnic_sock *csk)
3368 {
3369 struct cnic_dev *dev = csk->dev;
3370 struct l4_kwq_upload *l4kwqe;
3371 struct kwqe *wqes[1];
3372
3373 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
3374 memset(l4kwqe, 0, sizeof(*l4kwqe));
3375 wqes[0] = (struct kwqe *) l4kwqe;
3376
3377 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
3378 l4kwqe->flags =
3379 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
3380 l4kwqe->cid = csk->pg_cid;
3381
3382 return dev->submit_kwqes(dev, wqes, 1);
3383 }
3384
3385 static int cnic_cm_conn_req(struct cnic_sock *csk)
3386 {
3387 struct cnic_dev *dev = csk->dev;
3388 struct l4_kwq_connect_req1 *l4kwqe1;
3389 struct l4_kwq_connect_req2 *l4kwqe2;
3390 struct l4_kwq_connect_req3 *l4kwqe3;
3391 struct kwqe *wqes[3];
3392 u8 tcp_flags = 0;
3393 int num_wqes = 2;
3394
3395 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
3396 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
3397 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
3398 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
3399 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
3400 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
3401
3402 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
3403 l4kwqe3->flags =
3404 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
3405 l4kwqe3->ka_timeout = csk->ka_timeout;
3406 l4kwqe3->ka_interval = csk->ka_interval;
3407 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
3408 l4kwqe3->tos = csk->tos;
3409 l4kwqe3->ttl = csk->ttl;
3410 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
3411 l4kwqe3->pmtu = csk->mtu;
3412 l4kwqe3->rcv_buf = csk->rcv_buf;
3413 l4kwqe3->snd_buf = csk->snd_buf;
3414 l4kwqe3->seed = csk->seed;
3415
3416 wqes[0] = (struct kwqe *) l4kwqe1;
3417 if (test_bit(SK_F_IPV6, &csk->flags)) {
3418 wqes[1] = (struct kwqe *) l4kwqe2;
3419 wqes[2] = (struct kwqe *) l4kwqe3;
3420 num_wqes = 3;
3421
3422 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
3423 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
3424 l4kwqe2->flags =
3425 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
3426 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
3427 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
3428 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
3429 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
3430 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
3431 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
3432 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
3433 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
3434 sizeof(struct tcphdr);
3435 } else {
3436 wqes[1] = (struct kwqe *) l4kwqe3;
3437 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
3438 sizeof(struct tcphdr);
3439 }
3440
3441 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
3442 l4kwqe1->flags =
3443 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
3444 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
3445 l4kwqe1->cid = csk->cid;
3446 l4kwqe1->pg_cid = csk->pg_cid;
3447 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
3448 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
3449 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
3450 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
3451 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
3452 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
3453 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
3454 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
3455 if (csk->tcp_flags & SK_TCP_NAGLE)
3456 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
3457 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
3458 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
3459 if (csk->tcp_flags & SK_TCP_SACK)
3460 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
3461 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
3462 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
3463
3464 l4kwqe1->tcp_flags = tcp_flags;
3465
3466 return dev->submit_kwqes(dev, wqes, num_wqes);
3467 }
3468
3469 static int cnic_cm_close_req(struct cnic_sock *csk)
3470 {
3471 struct cnic_dev *dev = csk->dev;
3472 struct l4_kwq_close_req *l4kwqe;
3473 struct kwqe *wqes[1];
3474
3475 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
3476 memset(l4kwqe, 0, sizeof(*l4kwqe));
3477 wqes[0] = (struct kwqe *) l4kwqe;
3478
3479 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
3480 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
3481 l4kwqe->cid = csk->cid;
3482
3483 return dev->submit_kwqes(dev, wqes, 1);
3484 }
3485
3486 static int cnic_cm_abort_req(struct cnic_sock *csk)
3487 {
3488 struct cnic_dev *dev = csk->dev;
3489 struct l4_kwq_reset_req *l4kwqe;
3490 struct kwqe *wqes[1];
3491
3492 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
3493 memset(l4kwqe, 0, sizeof(*l4kwqe));
3494 wqes[0] = (struct kwqe *) l4kwqe;
3495
3496 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
3497 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
3498 l4kwqe->cid = csk->cid;
3499
3500 return dev->submit_kwqes(dev, wqes, 1);
3501 }
3502
3503 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
3504 u32 l5_cid, struct cnic_sock **csk, void *context)
3505 {
3506 struct cnic_local *cp = dev->cnic_priv;
3507 struct cnic_sock *csk1;
3508
3509 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3510 return -EINVAL;
3511
3512 if (cp->ctx_tbl) {
3513 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3514
3515 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3516 return -EAGAIN;
3517 }
3518
3519 csk1 = &cp->csk_tbl[l5_cid];
3520 if (atomic_read(&csk1->ref_count))
3521 return -EAGAIN;
3522
3523 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
3524 return -EBUSY;
3525
3526 csk1->dev = dev;
3527 csk1->cid = cid;
3528 csk1->l5_cid = l5_cid;
3529 csk1->ulp_type = ulp_type;
3530 csk1->context = context;
3531
3532 csk1->ka_timeout = DEF_KA_TIMEOUT;
3533 csk1->ka_interval = DEF_KA_INTERVAL;
3534 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
3535 csk1->tos = DEF_TOS;
3536 csk1->ttl = DEF_TTL;
3537 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
3538 csk1->rcv_buf = DEF_RCV_BUF;
3539 csk1->snd_buf = DEF_SND_BUF;
3540 csk1->seed = DEF_SEED;
3541
3542 *csk = csk1;
3543 return 0;
3544 }
3545
3546 static void cnic_cm_cleanup(struct cnic_sock *csk)
3547 {
3548 if (csk->src_port) {
3549 struct cnic_dev *dev = csk->dev;
3550 struct cnic_local *cp = dev->cnic_priv;
3551
3552 cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port));
3553 csk->src_port = 0;
3554 }
3555 }
3556
3557 static void cnic_close_conn(struct cnic_sock *csk)
3558 {
3559 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
3560 cnic_cm_upload_pg(csk);
3561 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3562 }
3563 cnic_cm_cleanup(csk);
3564 }
3565
3566 static int cnic_cm_destroy(struct cnic_sock *csk)
3567 {
3568 if (!cnic_in_use(csk))
3569 return -EINVAL;
3570
3571 csk_hold(csk);
3572 clear_bit(SK_F_INUSE, &csk->flags);
3573 smp_mb__after_clear_bit();
3574 while (atomic_read(&csk->ref_count) != 1)
3575 msleep(1);
3576 cnic_cm_cleanup(csk);
3577
3578 csk->flags = 0;
3579 csk_put(csk);
3580 return 0;
3581 }
3582
3583 static inline u16 cnic_get_vlan(struct net_device *dev,
3584 struct net_device **vlan_dev)
3585 {
3586 if (dev->priv_flags & IFF_802_1Q_VLAN) {
3587 *vlan_dev = vlan_dev_real_dev(dev);
3588 return vlan_dev_vlan_id(dev);
3589 }
3590 *vlan_dev = dev;
3591 return 0;
3592 }
3593
3594 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
3595 struct dst_entry **dst)
3596 {
3597 #if defined(CONFIG_INET)
3598 struct rtable *rt;
3599
3600 rt = ip_route_output(&init_net, dst_addr->sin_addr.s_addr, 0, 0, 0);
3601 if (!IS_ERR(rt)) {
3602 *dst = &rt->dst;
3603 return 0;
3604 }
3605 return PTR_ERR(rt);
3606 #else
3607 return -ENETUNREACH;
3608 #endif
3609 }
3610
3611 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
3612 struct dst_entry **dst)
3613 {
3614 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
3615 struct flowi6 fl6;
3616
3617 memset(&fl6, 0, sizeof(fl6));
3618 fl6.daddr = dst_addr->sin6_addr;
3619 if (ipv6_addr_type(&fl6.daddr) & IPV6_ADDR_LINKLOCAL)
3620 fl6.flowi6_oif = dst_addr->sin6_scope_id;
3621
3622 *dst = ip6_route_output(&init_net, NULL, &fl6);
3623 if ((*dst)->error) {
3624 dst_release(*dst);
3625 *dst = NULL;
3626 return -ENETUNREACH;
3627 } else
3628 return 0;
3629 #endif
3630
3631 return -ENETUNREACH;
3632 }
3633
3634 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
3635 int ulp_type)
3636 {
3637 struct cnic_dev *dev = NULL;
3638 struct dst_entry *dst;
3639 struct net_device *netdev = NULL;
3640 int err = -ENETUNREACH;
3641
3642 if (dst_addr->sin_family == AF_INET)
3643 err = cnic_get_v4_route(dst_addr, &dst);
3644 else if (dst_addr->sin_family == AF_INET6) {
3645 struct sockaddr_in6 *dst_addr6 =
3646 (struct sockaddr_in6 *) dst_addr;
3647
3648 err = cnic_get_v6_route(dst_addr6, &dst);
3649 } else
3650 return NULL;
3651
3652 if (err)
3653 return NULL;
3654
3655 if (!dst->dev)
3656 goto done;
3657
3658 cnic_get_vlan(dst->dev, &netdev);
3659
3660 dev = cnic_from_netdev(netdev);
3661
3662 done:
3663 dst_release(dst);
3664 if (dev)
3665 cnic_put(dev);
3666 return dev;
3667 }
3668
3669 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3670 {
3671 struct cnic_dev *dev = csk->dev;
3672 struct cnic_local *cp = dev->cnic_priv;
3673
3674 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3675 }
3676
3677 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3678 {
3679 struct cnic_dev *dev = csk->dev;
3680 struct cnic_local *cp = dev->cnic_priv;
3681 int is_v6, rc = 0;
3682 struct dst_entry *dst = NULL;
3683 struct net_device *realdev;
3684 __be16 local_port;
3685 u32 port_id;
3686
3687 if (saddr->local.v6.sin6_family == AF_INET6 &&
3688 saddr->remote.v6.sin6_family == AF_INET6)
3689 is_v6 = 1;
3690 else if (saddr->local.v4.sin_family == AF_INET &&
3691 saddr->remote.v4.sin_family == AF_INET)
3692 is_v6 = 0;
3693 else
3694 return -EINVAL;
3695
3696 clear_bit(SK_F_IPV6, &csk->flags);
3697
3698 if (is_v6) {
3699 set_bit(SK_F_IPV6, &csk->flags);
3700 cnic_get_v6_route(&saddr->remote.v6, &dst);
3701
3702 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3703 sizeof(struct in6_addr));
3704 csk->dst_port = saddr->remote.v6.sin6_port;
3705 local_port = saddr->local.v6.sin6_port;
3706
3707 } else {
3708 cnic_get_v4_route(&saddr->remote.v4, &dst);
3709
3710 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3711 csk->dst_port = saddr->remote.v4.sin_port;
3712 local_port = saddr->local.v4.sin_port;
3713 }
3714
3715 csk->vlan_id = 0;
3716 csk->mtu = dev->netdev->mtu;
3717 if (dst && dst->dev) {
3718 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3719 if (realdev == dev->netdev) {
3720 csk->vlan_id = vlan;
3721 csk->mtu = dst_mtu(dst);
3722 }
3723 }
3724
3725 port_id = be16_to_cpu(local_port);
3726 if (port_id >= CNIC_LOCAL_PORT_MIN &&
3727 port_id < CNIC_LOCAL_PORT_MAX) {
3728 if (cnic_alloc_id(&cp->csk_port_tbl, port_id))
3729 port_id = 0;
3730 } else
3731 port_id = 0;
3732
3733 if (!port_id) {
3734 port_id = cnic_alloc_new_id(&cp->csk_port_tbl);
3735 if (port_id == -1) {
3736 rc = -ENOMEM;
3737 goto err_out;
3738 }
3739 local_port = cpu_to_be16(port_id);
3740 }
3741 csk->src_port = local_port;
3742
3743 err_out:
3744 dst_release(dst);
3745 return rc;
3746 }
3747
3748 static void cnic_init_csk_state(struct cnic_sock *csk)
3749 {
3750 csk->state = 0;
3751 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3752 clear_bit(SK_F_CLOSING, &csk->flags);
3753 }
3754
3755 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3756 {
3757 struct cnic_local *cp = csk->dev->cnic_priv;
3758 int err = 0;
3759
3760 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
3761 return -EOPNOTSUPP;
3762
3763 if (!cnic_in_use(csk))
3764 return -EINVAL;
3765
3766 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3767 return -EINVAL;
3768
3769 cnic_init_csk_state(csk);
3770
3771 err = cnic_get_route(csk, saddr);
3772 if (err)
3773 goto err_out;
3774
3775 err = cnic_resolve_addr(csk, saddr);
3776 if (!err)
3777 return 0;
3778
3779 err_out:
3780 clear_bit(SK_F_CONNECT_START, &csk->flags);
3781 return err;
3782 }
3783
3784 static int cnic_cm_abort(struct cnic_sock *csk)
3785 {
3786 struct cnic_local *cp = csk->dev->cnic_priv;
3787 u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3788
3789 if (!cnic_in_use(csk))
3790 return -EINVAL;
3791
3792 if (cnic_abort_prep(csk))
3793 return cnic_cm_abort_req(csk);
3794
3795 /* Getting here means that we haven't started connect, or
3796 * connect was not successful.
3797 */
3798
3799 cp->close_conn(csk, opcode);
3800 if (csk->state != opcode)
3801 return -EALREADY;
3802
3803 return 0;
3804 }
3805
3806 static int cnic_cm_close(struct cnic_sock *csk)
3807 {
3808 if (!cnic_in_use(csk))
3809 return -EINVAL;
3810
3811 if (cnic_close_prep(csk)) {
3812 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3813 return cnic_cm_close_req(csk);
3814 } else {
3815 return -EALREADY;
3816 }
3817 return 0;
3818 }
3819
3820 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3821 u8 opcode)
3822 {
3823 struct cnic_ulp_ops *ulp_ops;
3824 int ulp_type = csk->ulp_type;
3825
3826 rcu_read_lock();
3827 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3828 if (ulp_ops) {
3829 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3830 ulp_ops->cm_connect_complete(csk);
3831 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3832 ulp_ops->cm_close_complete(csk);
3833 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3834 ulp_ops->cm_remote_abort(csk);
3835 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3836 ulp_ops->cm_abort_complete(csk);
3837 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3838 ulp_ops->cm_remote_close(csk);
3839 }
3840 rcu_read_unlock();
3841 }
3842
3843 static int cnic_cm_set_pg(struct cnic_sock *csk)
3844 {
3845 if (cnic_offld_prep(csk)) {
3846 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3847 cnic_cm_update_pg(csk);
3848 else
3849 cnic_cm_offload_pg(csk);
3850 }
3851 return 0;
3852 }
3853
3854 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3855 {
3856 struct cnic_local *cp = dev->cnic_priv;
3857 u32 l5_cid = kcqe->pg_host_opaque;
3858 u8 opcode = kcqe->op_code;
3859 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3860
3861 csk_hold(csk);
3862 if (!cnic_in_use(csk))
3863 goto done;
3864
3865 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3866 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3867 goto done;
3868 }
3869 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3870 if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3871 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3872 cnic_cm_upcall(cp, csk,
3873 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3874 goto done;
3875 }
3876
3877 csk->pg_cid = kcqe->pg_cid;
3878 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3879 cnic_cm_conn_req(csk);
3880
3881 done:
3882 csk_put(csk);
3883 }
3884
3885 static void cnic_process_fcoe_term_conn(struct cnic_dev *dev, struct kcqe *kcqe)
3886 {
3887 struct cnic_local *cp = dev->cnic_priv;
3888 struct fcoe_kcqe *fc_kcqe = (struct fcoe_kcqe *) kcqe;
3889 u32 l5_cid = fc_kcqe->fcoe_conn_id + BNX2X_FCOE_L5_CID_BASE;
3890 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3891
3892 ctx->timestamp = jiffies;
3893 ctx->wait_cond = 1;
3894 wake_up(&ctx->waitq);
3895 }
3896
3897 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3898 {
3899 struct cnic_local *cp = dev->cnic_priv;
3900 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3901 u8 opcode = l4kcqe->op_code;
3902 u32 l5_cid;
3903 struct cnic_sock *csk;
3904
3905 if (opcode == FCOE_RAMROD_CMD_ID_TERMINATE_CONN) {
3906 cnic_process_fcoe_term_conn(dev, kcqe);
3907 return;
3908 }
3909 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3910 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3911 cnic_cm_process_offld_pg(dev, l4kcqe);
3912 return;
3913 }
3914
3915 l5_cid = l4kcqe->conn_id;
3916 if (opcode & 0x80)
3917 l5_cid = l4kcqe->cid;
3918 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3919 return;
3920
3921 csk = &cp->csk_tbl[l5_cid];
3922 csk_hold(csk);
3923
3924 if (!cnic_in_use(csk)) {
3925 csk_put(csk);
3926 return;
3927 }
3928
3929 switch (opcode) {
3930 case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
3931 if (l4kcqe->status != 0) {
3932 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3933 cnic_cm_upcall(cp, csk,
3934 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3935 }
3936 break;
3937 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3938 if (l4kcqe->status == 0)
3939 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3940 else if (l4kcqe->status ==
3941 L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
3942 set_bit(SK_F_HW_ERR, &csk->flags);
3943
3944 smp_mb__before_clear_bit();
3945 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3946 cnic_cm_upcall(cp, csk, opcode);
3947 break;
3948
3949 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3950 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3951 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3952 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3953 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3954 if (l4kcqe->status == L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
3955 set_bit(SK_F_HW_ERR, &csk->flags);
3956
3957 cp->close_conn(csk, opcode);
3958 break;
3959
3960 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3961 /* after we already sent CLOSE_REQ */
3962 if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags) &&
3963 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags) &&
3964 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3965 cp->close_conn(csk, L4_KCQE_OPCODE_VALUE_RESET_COMP);
3966 else
3967 cnic_cm_upcall(cp, csk, opcode);
3968 break;
3969 }
3970 csk_put(csk);
3971 }
3972
3973 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3974 {
3975 struct cnic_dev *dev = data;
3976 int i;
3977
3978 for (i = 0; i < num; i++)
3979 cnic_cm_process_kcqe(dev, kcqe[i]);
3980 }
3981
3982 static struct cnic_ulp_ops cm_ulp_ops = {
3983 .indicate_kcqes = cnic_cm_indicate_kcqe,
3984 };
3985
3986 static void cnic_cm_free_mem(struct cnic_dev *dev)
3987 {
3988 struct cnic_local *cp = dev->cnic_priv;
3989
3990 kfree(cp->csk_tbl);
3991 cp->csk_tbl = NULL;
3992 cnic_free_id_tbl(&cp->csk_port_tbl);
3993 }
3994
3995 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3996 {
3997 struct cnic_local *cp = dev->cnic_priv;
3998 u32 port_id;
3999
4000 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
4001 GFP_KERNEL);
4002 if (!cp->csk_tbl)
4003 return -ENOMEM;
4004
4005 port_id = random32();
4006 port_id %= CNIC_LOCAL_PORT_RANGE;
4007 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
4008 CNIC_LOCAL_PORT_MIN, port_id)) {
4009 cnic_cm_free_mem(dev);
4010 return -ENOMEM;
4011 }
4012 return 0;
4013 }
4014
4015 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
4016 {
4017 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
4018 /* Unsolicited RESET_COMP or RESET_RECEIVED */
4019 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
4020 csk->state = opcode;
4021 }
4022
4023 /* 1. If event opcode matches the expected event in csk->state
4024 * 2. If the expected event is CLOSE_COMP or RESET_COMP, we accept any
4025 * event
4026 * 3. If the expected event is 0, meaning the connection was never
4027 * never established, we accept the opcode from cm_abort.
4028 */
4029 if (opcode == csk->state || csk->state == 0 ||
4030 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP ||
4031 csk->state == L4_KCQE_OPCODE_VALUE_RESET_COMP) {
4032 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
4033 if (csk->state == 0)
4034 csk->state = opcode;
4035 return 1;
4036 }
4037 }
4038 return 0;
4039 }
4040
4041 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
4042 {
4043 struct cnic_dev *dev = csk->dev;
4044 struct cnic_local *cp = dev->cnic_priv;
4045
4046 if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
4047 cnic_cm_upcall(cp, csk, opcode);
4048 return;
4049 }
4050
4051 clear_bit(SK_F_CONNECT_START, &csk->flags);
4052 cnic_close_conn(csk);
4053 csk->state = opcode;
4054 cnic_cm_upcall(cp, csk, opcode);
4055 }
4056
4057 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
4058 {
4059 }
4060
4061 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
4062 {
4063 u32 seed;
4064
4065 seed = random32();
4066 cnic_ctx_wr(dev, 45, 0, seed);
4067 return 0;
4068 }
4069
4070 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
4071 {
4072 struct cnic_dev *dev = csk->dev;
4073 struct cnic_local *cp = dev->cnic_priv;
4074 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
4075 union l5cm_specific_data l5_data;
4076 u32 cmd = 0;
4077 int close_complete = 0;
4078
4079 switch (opcode) {
4080 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4081 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4082 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
4083 if (cnic_ready_to_close(csk, opcode)) {
4084 if (test_bit(SK_F_HW_ERR, &csk->flags))
4085 close_complete = 1;
4086 else if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
4087 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
4088 else
4089 close_complete = 1;
4090 }
4091 break;
4092 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4093 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
4094 break;
4095 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4096 close_complete = 1;
4097 break;
4098 }
4099 if (cmd) {
4100 memset(&l5_data, 0, sizeof(l5_data));
4101
4102 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
4103 &l5_data);
4104 } else if (close_complete) {
4105 ctx->timestamp = jiffies;
4106 cnic_close_conn(csk);
4107 cnic_cm_upcall(cp, csk, csk->state);
4108 }
4109 }
4110
4111 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
4112 {
4113 struct cnic_local *cp = dev->cnic_priv;
4114
4115 if (!cp->ctx_tbl)
4116 return;
4117
4118 if (!netif_running(dev->netdev))
4119 return;
4120
4121 cnic_bnx2x_delete_wait(dev, 0);
4122
4123 cancel_delayed_work(&cp->delete_task);
4124 flush_workqueue(cnic_wq);
4125
4126 if (atomic_read(&cp->iscsi_conn) != 0)
4127 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
4128 atomic_read(&cp->iscsi_conn));
4129 }
4130
4131 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
4132 {
4133 struct cnic_local *cp = dev->cnic_priv;
4134 u32 pfid = cp->pfid;
4135 u32 port = CNIC_PORT(cp);
4136
4137 cnic_init_bnx2x_mac(dev);
4138 cnic_bnx2x_set_tcp_timestamp(dev, 1);
4139
4140 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
4141 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
4142
4143 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4144 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
4145 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4146 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
4147 DEF_MAX_DA_COUNT);
4148
4149 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4150 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
4151 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4152 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
4153 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4154 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
4155 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4156 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
4157
4158 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
4159 DEF_MAX_CWND);
4160 return 0;
4161 }
4162
4163 static void cnic_delete_task(struct work_struct *work)
4164 {
4165 struct cnic_local *cp;
4166 struct cnic_dev *dev;
4167 u32 i;
4168 int need_resched = 0;
4169
4170 cp = container_of(work, struct cnic_local, delete_task.work);
4171 dev = cp->dev;
4172
4173 if (test_and_clear_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags)) {
4174 struct drv_ctl_info info;
4175
4176 cnic_ulp_stop_one(cp, CNIC_ULP_ISCSI);
4177
4178 info.cmd = DRV_CTL_ISCSI_STOPPED_CMD;
4179 cp->ethdev->drv_ctl(dev->netdev, &info);
4180 }
4181
4182 for (i = 0; i < cp->max_cid_space; i++) {
4183 struct cnic_context *ctx = &cp->ctx_tbl[i];
4184 int err;
4185
4186 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
4187 !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4188 continue;
4189
4190 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
4191 need_resched = 1;
4192 continue;
4193 }
4194
4195 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4196 continue;
4197
4198 err = cnic_bnx2x_destroy_ramrod(dev, i);
4199
4200 cnic_free_bnx2x_conn_resc(dev, i);
4201 if (!err) {
4202 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
4203 atomic_dec(&cp->iscsi_conn);
4204
4205 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
4206 }
4207 }
4208
4209 if (need_resched)
4210 queue_delayed_work(cnic_wq, &cp->delete_task,
4211 msecs_to_jiffies(10));
4212
4213 }
4214
4215 static int cnic_cm_open(struct cnic_dev *dev)
4216 {
4217 struct cnic_local *cp = dev->cnic_priv;
4218 int err;
4219
4220 err = cnic_cm_alloc_mem(dev);
4221 if (err)
4222 return err;
4223
4224 err = cp->start_cm(dev);
4225
4226 if (err)
4227 goto err_out;
4228
4229 INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
4230
4231 dev->cm_create = cnic_cm_create;
4232 dev->cm_destroy = cnic_cm_destroy;
4233 dev->cm_connect = cnic_cm_connect;
4234 dev->cm_abort = cnic_cm_abort;
4235 dev->cm_close = cnic_cm_close;
4236 dev->cm_select_dev = cnic_cm_select_dev;
4237
4238 cp->ulp_handle[CNIC_ULP_L4] = dev;
4239 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
4240 return 0;
4241
4242 err_out:
4243 cnic_cm_free_mem(dev);
4244 return err;
4245 }
4246
4247 static int cnic_cm_shutdown(struct cnic_dev *dev)
4248 {
4249 struct cnic_local *cp = dev->cnic_priv;
4250 int i;
4251
4252 cp->stop_cm(dev);
4253
4254 if (!cp->csk_tbl)
4255 return 0;
4256
4257 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
4258 struct cnic_sock *csk = &cp->csk_tbl[i];
4259
4260 clear_bit(SK_F_INUSE, &csk->flags);
4261 cnic_cm_cleanup(csk);
4262 }
4263 cnic_cm_free_mem(dev);
4264
4265 return 0;
4266 }
4267
4268 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
4269 {
4270 u32 cid_addr;
4271 int i;
4272
4273 cid_addr = GET_CID_ADDR(cid);
4274
4275 for (i = 0; i < CTX_SIZE; i += 4)
4276 cnic_ctx_wr(dev, cid_addr, i, 0);
4277 }
4278
4279 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
4280 {
4281 struct cnic_local *cp = dev->cnic_priv;
4282 int ret = 0, i;
4283 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
4284
4285 if (CHIP_NUM(cp) != CHIP_NUM_5709)
4286 return 0;
4287
4288 for (i = 0; i < cp->ctx_blks; i++) {
4289 int j;
4290 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
4291 u32 val;
4292
4293 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
4294
4295 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
4296 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
4297 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
4298 (u64) cp->ctx_arr[i].mapping >> 32);
4299 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
4300 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
4301 for (j = 0; j < 10; j++) {
4302
4303 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
4304 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
4305 break;
4306 udelay(5);
4307 }
4308 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
4309 ret = -EBUSY;
4310 break;
4311 }
4312 }
4313 return ret;
4314 }
4315
4316 static void cnic_free_irq(struct cnic_dev *dev)
4317 {
4318 struct cnic_local *cp = dev->cnic_priv;
4319 struct cnic_eth_dev *ethdev = cp->ethdev;
4320
4321 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4322 cp->disable_int_sync(dev);
4323 tasklet_kill(&cp->cnic_irq_task);
4324 free_irq(ethdev->irq_arr[0].vector, dev);
4325 }
4326 }
4327
4328 static int cnic_request_irq(struct cnic_dev *dev)
4329 {
4330 struct cnic_local *cp = dev->cnic_priv;
4331 struct cnic_eth_dev *ethdev = cp->ethdev;
4332 int err;
4333
4334 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
4335 if (err)
4336 tasklet_disable(&cp->cnic_irq_task);
4337
4338 return err;
4339 }
4340
4341 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
4342 {
4343 struct cnic_local *cp = dev->cnic_priv;
4344 struct cnic_eth_dev *ethdev = cp->ethdev;
4345
4346 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4347 int err, i = 0;
4348 int sblk_num = cp->status_blk_num;
4349 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
4350 BNX2_HC_SB_CONFIG_1;
4351
4352 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
4353
4354 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
4355 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
4356 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
4357
4358 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
4359 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
4360 (unsigned long) dev);
4361 err = cnic_request_irq(dev);
4362 if (err)
4363 return err;
4364
4365 while (cp->status_blk.bnx2->status_completion_producer_index &&
4366 i < 10) {
4367 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
4368 1 << (11 + sblk_num));
4369 udelay(10);
4370 i++;
4371 barrier();
4372 }
4373 if (cp->status_blk.bnx2->status_completion_producer_index) {
4374 cnic_free_irq(dev);
4375 goto failed;
4376 }
4377
4378 } else {
4379 struct status_block *sblk = cp->status_blk.gen;
4380 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
4381 int i = 0;
4382
4383 while (sblk->status_completion_producer_index && i < 10) {
4384 CNIC_WR(dev, BNX2_HC_COMMAND,
4385 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
4386 udelay(10);
4387 i++;
4388 barrier();
4389 }
4390 if (sblk->status_completion_producer_index)
4391 goto failed;
4392
4393 }
4394 return 0;
4395
4396 failed:
4397 netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
4398 return -EBUSY;
4399 }
4400
4401 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
4402 {
4403 struct cnic_local *cp = dev->cnic_priv;
4404 struct cnic_eth_dev *ethdev = cp->ethdev;
4405
4406 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4407 return;
4408
4409 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4410 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
4411 }
4412
4413 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
4414 {
4415 struct cnic_local *cp = dev->cnic_priv;
4416 struct cnic_eth_dev *ethdev = cp->ethdev;
4417
4418 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4419 return;
4420
4421 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4422 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
4423 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
4424 synchronize_irq(ethdev->irq_arr[0].vector);
4425 }
4426
4427 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
4428 {
4429 struct cnic_local *cp = dev->cnic_priv;
4430 struct cnic_eth_dev *ethdev = cp->ethdev;
4431 struct cnic_uio_dev *udev = cp->udev;
4432 u32 cid_addr, tx_cid, sb_id;
4433 u32 val, offset0, offset1, offset2, offset3;
4434 int i;
4435 struct tx_bd *txbd;
4436 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4437 struct status_block *s_blk = cp->status_blk.gen;
4438
4439 sb_id = cp->status_blk_num;
4440 tx_cid = 20;
4441 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
4442 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4443 struct status_block_msix *sblk = cp->status_blk.bnx2;
4444
4445 tx_cid = TX_TSS_CID + sb_id - 1;
4446 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
4447 (TX_TSS_CID << 7));
4448 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
4449 }
4450 cp->tx_cons = *cp->tx_cons_ptr;
4451
4452 cid_addr = GET_CID_ADDR(tx_cid);
4453 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
4454 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
4455
4456 for (i = 0; i < PHY_CTX_SIZE; i += 4)
4457 cnic_ctx_wr(dev, cid_addr2, i, 0);
4458
4459 offset0 = BNX2_L2CTX_TYPE_XI;
4460 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
4461 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
4462 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
4463 } else {
4464 cnic_init_context(dev, tx_cid);
4465 cnic_init_context(dev, tx_cid + 1);
4466
4467 offset0 = BNX2_L2CTX_TYPE;
4468 offset1 = BNX2_L2CTX_CMD_TYPE;
4469 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
4470 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
4471 }
4472 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
4473 cnic_ctx_wr(dev, cid_addr, offset0, val);
4474
4475 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
4476 cnic_ctx_wr(dev, cid_addr, offset1, val);
4477
4478 txbd = udev->l2_ring;
4479
4480 buf_map = udev->l2_buf_map;
4481 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
4482 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
4483 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4484 }
4485 val = (u64) ring_map >> 32;
4486 cnic_ctx_wr(dev, cid_addr, offset2, val);
4487 txbd->tx_bd_haddr_hi = val;
4488
4489 val = (u64) ring_map & 0xffffffff;
4490 cnic_ctx_wr(dev, cid_addr, offset3, val);
4491 txbd->tx_bd_haddr_lo = val;
4492 }
4493
4494 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
4495 {
4496 struct cnic_local *cp = dev->cnic_priv;
4497 struct cnic_eth_dev *ethdev = cp->ethdev;
4498 struct cnic_uio_dev *udev = cp->udev;
4499 u32 cid_addr, sb_id, val, coal_reg, coal_val;
4500 int i;
4501 struct rx_bd *rxbd;
4502 struct status_block *s_blk = cp->status_blk.gen;
4503 dma_addr_t ring_map = udev->l2_ring_map;
4504
4505 sb_id = cp->status_blk_num;
4506 cnic_init_context(dev, 2);
4507 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
4508 coal_reg = BNX2_HC_COMMAND;
4509 coal_val = CNIC_RD(dev, coal_reg);
4510 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4511 struct status_block_msix *sblk = cp->status_blk.bnx2;
4512
4513 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
4514 coal_reg = BNX2_HC_COALESCE_NOW;
4515 coal_val = 1 << (11 + sb_id);
4516 }
4517 i = 0;
4518 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
4519 CNIC_WR(dev, coal_reg, coal_val);
4520 udelay(10);
4521 i++;
4522 barrier();
4523 }
4524 cp->rx_cons = *cp->rx_cons_ptr;
4525
4526 cid_addr = GET_CID_ADDR(2);
4527 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
4528 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
4529 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
4530
4531 if (sb_id == 0)
4532 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
4533 else
4534 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
4535 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
4536
4537 rxbd = udev->l2_ring + BCM_PAGE_SIZE;
4538 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
4539 dma_addr_t buf_map;
4540 int n = (i % cp->l2_rx_ring_size) + 1;
4541
4542 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4543 rxbd->rx_bd_len = cp->l2_single_buf_size;
4544 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
4545 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
4546 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4547 }
4548 val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4549 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
4550 rxbd->rx_bd_haddr_hi = val;
4551
4552 val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4553 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
4554 rxbd->rx_bd_haddr_lo = val;
4555
4556 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
4557 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
4558 }
4559
4560 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
4561 {
4562 struct kwqe *wqes[1], l2kwqe;
4563
4564 memset(&l2kwqe, 0, sizeof(l2kwqe));
4565 wqes[0] = &l2kwqe;
4566 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_LAYER_SHIFT) |
4567 (L2_KWQE_OPCODE_VALUE_FLUSH <<
4568 KWQE_OPCODE_SHIFT) | 2;
4569 dev->submit_kwqes(dev, wqes, 1);
4570 }
4571
4572 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
4573 {
4574 struct cnic_local *cp = dev->cnic_priv;
4575 u32 val;
4576
4577 val = cp->func << 2;
4578
4579 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
4580
4581 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4582 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
4583 dev->mac_addr[0] = (u8) (val >> 8);
4584 dev->mac_addr[1] = (u8) val;
4585
4586 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
4587
4588 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4589 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
4590 dev->mac_addr[2] = (u8) (val >> 24);
4591 dev->mac_addr[3] = (u8) (val >> 16);
4592 dev->mac_addr[4] = (u8) (val >> 8);
4593 dev->mac_addr[5] = (u8) val;
4594
4595 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
4596
4597 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
4598 if (CHIP_NUM(cp) != CHIP_NUM_5709)
4599 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
4600
4601 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
4602 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
4603 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
4604 }
4605
4606 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
4607 {
4608 struct cnic_local *cp = dev->cnic_priv;
4609 struct cnic_eth_dev *ethdev = cp->ethdev;
4610 struct status_block *sblk = cp->status_blk.gen;
4611 u32 val, kcq_cid_addr, kwq_cid_addr;
4612 int err;
4613
4614 cnic_set_bnx2_mac(dev);
4615
4616 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
4617 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
4618 if (BCM_PAGE_BITS > 12)
4619 val |= (12 - 8) << 4;
4620 else
4621 val |= (BCM_PAGE_BITS - 8) << 4;
4622
4623 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
4624
4625 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
4626 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
4627 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
4628
4629 err = cnic_setup_5709_context(dev, 1);
4630 if (err)
4631 return err;
4632
4633 cnic_init_context(dev, KWQ_CID);
4634 cnic_init_context(dev, KCQ_CID);
4635
4636 kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
4637 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
4638
4639 cp->max_kwq_idx = MAX_KWQ_IDX;
4640 cp->kwq_prod_idx = 0;
4641 cp->kwq_con_idx = 0;
4642 set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
4643
4644 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
4645 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
4646 else
4647 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
4648
4649 /* Initialize the kernel work queue context. */
4650 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4651 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4652 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
4653
4654 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
4655 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4656
4657 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
4658 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4659
4660 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
4661 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4662
4663 val = (u32) cp->kwq_info.pgtbl_map;
4664 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4665
4666 kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
4667 cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
4668
4669 cp->kcq1.sw_prod_idx = 0;
4670 cp->kcq1.hw_prod_idx_ptr =
4671 (u16 *) &sblk->status_completion_producer_index;
4672
4673 cp->kcq1.status_idx_ptr = (u16 *) &sblk->status_idx;
4674
4675 /* Initialize the kernel complete queue context. */
4676 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4677 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4678 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
4679
4680 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
4681 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4682
4683 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
4684 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4685
4686 val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
4687 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4688
4689 val = (u32) cp->kcq1.dma.pgtbl_map;
4690 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4691
4692 cp->int_num = 0;
4693 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4694 struct status_block_msix *msblk = cp->status_blk.bnx2;
4695 u32 sb_id = cp->status_blk_num;
4696 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
4697
4698 cp->kcq1.hw_prod_idx_ptr =
4699 (u16 *) &msblk->status_completion_producer_index;
4700 cp->kcq1.status_idx_ptr = (u16 *) &msblk->status_idx;
4701 cp->kwq_con_idx_ptr = (u16 *) &msblk->status_cmd_consumer_index;
4702 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
4703 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4704 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4705 }
4706
4707 /* Enable Commnad Scheduler notification when we write to the
4708 * host producer index of the kernel contexts. */
4709 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4710
4711 /* Enable Command Scheduler notification when we write to either
4712 * the Send Queue or Receive Queue producer indexes of the kernel
4713 * bypass contexts. */
4714 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4715 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4716
4717 /* Notify COM when the driver post an application buffer. */
4718 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4719
4720 /* Set the CP and COM doorbells. These two processors polls the
4721 * doorbell for a non zero value before running. This must be done
4722 * after setting up the kernel queue contexts. */
4723 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4724 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4725
4726 cnic_init_bnx2_tx_ring(dev);
4727 cnic_init_bnx2_rx_ring(dev);
4728
4729 err = cnic_init_bnx2_irq(dev);
4730 if (err) {
4731 netdev_err(dev->netdev, "cnic_init_irq failed\n");
4732 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4733 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4734 return err;
4735 }
4736
4737 return 0;
4738 }
4739
4740 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4741 {
4742 struct cnic_local *cp = dev->cnic_priv;
4743 struct cnic_eth_dev *ethdev = cp->ethdev;
4744 u32 start_offset = ethdev->ctx_tbl_offset;
4745 int i;
4746
4747 for (i = 0; i < cp->ctx_blks; i++) {
4748 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4749 dma_addr_t map = ctx->mapping;
4750
4751 if (cp->ctx_align) {
4752 unsigned long mask = cp->ctx_align - 1;
4753
4754 map = (map + mask) & ~mask;
4755 }
4756
4757 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4758 }
4759 }
4760
4761 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4762 {
4763 struct cnic_local *cp = dev->cnic_priv;
4764 struct cnic_eth_dev *ethdev = cp->ethdev;
4765 int err = 0;
4766
4767 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
4768 (unsigned long) dev);
4769 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4770 err = cnic_request_irq(dev);
4771
4772 return err;
4773 }
4774
4775 static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4776 u16 sb_id, u8 sb_index,
4777 u8 disable)
4778 {
4779
4780 u32 addr = BAR_CSTRORM_INTMEM +
4781 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4782 offsetof(struct hc_status_block_data_e1x, index_data) +
4783 sizeof(struct hc_index_data)*sb_index +
4784 offsetof(struct hc_index_data, flags);
4785 u16 flags = CNIC_RD16(dev, addr);
4786 /* clear and set */
4787 flags &= ~HC_INDEX_DATA_HC_ENABLED;
4788 flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4789 HC_INDEX_DATA_HC_ENABLED);
4790 CNIC_WR16(dev, addr, flags);
4791 }
4792
4793 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4794 {
4795 struct cnic_local *cp = dev->cnic_priv;
4796 u8 sb_id = cp->status_blk_num;
4797
4798 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4799 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4800 offsetof(struct hc_status_block_data_e1x, index_data) +
4801 sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
4802 offsetof(struct hc_index_data, timeout), 64 / 4);
4803 cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
4804 }
4805
4806 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4807 {
4808 }
4809
4810 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4811 struct client_init_ramrod_data *data)
4812 {
4813 struct cnic_local *cp = dev->cnic_priv;
4814 struct cnic_uio_dev *udev = cp->udev;
4815 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4816 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4817 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4818 int i;
4819 u32 cli = cp->ethdev->iscsi_l2_client_id;
4820 u32 val;
4821
4822 memset(txbd, 0, BCM_PAGE_SIZE);
4823
4824 buf_map = udev->l2_buf_map;
4825 for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
4826 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
4827 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4828
4829 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4830 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4831 reg_bd->addr_hi = start_bd->addr_hi;
4832 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4833 start_bd->nbytes = cpu_to_le16(0x10);
4834 start_bd->nbd = cpu_to_le16(3);
4835 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
4836 start_bd->general_data = (UNICAST_ADDRESS <<
4837 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
4838 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4839
4840 }
4841
4842 val = (u64) ring_map >> 32;
4843 txbd->next_bd.addr_hi = cpu_to_le32(val);
4844
4845 data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
4846
4847 val = (u64) ring_map & 0xffffffff;
4848 txbd->next_bd.addr_lo = cpu_to_le32(val);
4849
4850 data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
4851
4852 /* Other ramrod params */
4853 data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4854 data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
4855
4856 /* reset xstorm per client statistics */
4857 if (cli < MAX_STAT_COUNTER_ID) {
4858 data->general.statistics_zero_flg = 1;
4859 data->general.statistics_en_flg = 1;
4860 data->general.statistics_counter_id = cli;
4861 }
4862
4863 cp->tx_cons_ptr =
4864 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
4865 }
4866
4867 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4868 struct client_init_ramrod_data *data)
4869 {
4870 struct cnic_local *cp = dev->cnic_priv;
4871 struct cnic_uio_dev *udev = cp->udev;
4872 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
4873 BCM_PAGE_SIZE);
4874 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
4875 (udev->l2_ring + (2 * BCM_PAGE_SIZE));
4876 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4877 int i;
4878 u32 cli = cp->ethdev->iscsi_l2_client_id;
4879 int cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4880 u32 val;
4881 dma_addr_t ring_map = udev->l2_ring_map;
4882
4883 /* General data */
4884 data->general.client_id = cli;
4885 data->general.activate_flg = 1;
4886 data->general.sp_client_id = cli;
4887 data->general.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4888 data->general.func_id = cp->pfid;
4889
4890 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4891 dma_addr_t buf_map;
4892 int n = (i % cp->l2_rx_ring_size) + 1;
4893
4894 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4895 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4896 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4897 }
4898
4899 val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4900 rxbd->addr_hi = cpu_to_le32(val);
4901 data->rx.bd_page_base.hi = cpu_to_le32(val);
4902
4903 val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4904 rxbd->addr_lo = cpu_to_le32(val);
4905 data->rx.bd_page_base.lo = cpu_to_le32(val);
4906
4907 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
4908 val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
4909 rxcqe->addr_hi = cpu_to_le32(val);
4910 data->rx.cqe_page_base.hi = cpu_to_le32(val);
4911
4912 val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
4913 rxcqe->addr_lo = cpu_to_le32(val);
4914 data->rx.cqe_page_base.lo = cpu_to_le32(val);
4915
4916 /* Other ramrod params */
4917 data->rx.client_qzone_id = cl_qzone_id;
4918 data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
4919 data->rx.status_block_id = BNX2X_DEF_SB_ID;
4920
4921 data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
4922
4923 data->rx.max_bytes_on_bd = cpu_to_le16(cp->l2_single_buf_size);
4924 data->rx.outer_vlan_removal_enable_flg = 1;
4925 data->rx.silent_vlan_removal_flg = 1;
4926 data->rx.silent_vlan_value = 0;
4927 data->rx.silent_vlan_mask = 0xffff;
4928
4929 cp->rx_cons_ptr =
4930 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
4931 cp->rx_cons = *cp->rx_cons_ptr;
4932 }
4933
4934 static void cnic_init_bnx2x_kcq(struct cnic_dev *dev)
4935 {
4936 struct cnic_local *cp = dev->cnic_priv;
4937 u32 pfid = cp->pfid;
4938
4939 cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
4940 CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
4941 cp->kcq1.sw_prod_idx = 0;
4942
4943 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
4944 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
4945
4946 cp->kcq1.hw_prod_idx_ptr =
4947 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4948 cp->kcq1.status_idx_ptr =
4949 &sb->sb.running_index[SM_RX_ID];
4950 } else {
4951 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
4952
4953 cp->kcq1.hw_prod_idx_ptr =
4954 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4955 cp->kcq1.status_idx_ptr =
4956 &sb->sb.running_index[SM_RX_ID];
4957 }
4958
4959 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
4960 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
4961
4962 cp->kcq2.io_addr = BAR_USTRORM_INTMEM +
4963 USTORM_FCOE_EQ_PROD_OFFSET(pfid);
4964 cp->kcq2.sw_prod_idx = 0;
4965 cp->kcq2.hw_prod_idx_ptr =
4966 &sb->sb.index_values[HC_INDEX_FCOE_EQ_CONS];
4967 cp->kcq2.status_idx_ptr =
4968 &sb->sb.running_index[SM_RX_ID];
4969 }
4970 }
4971
4972 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4973 {
4974 struct cnic_local *cp = dev->cnic_priv;
4975 struct cnic_eth_dev *ethdev = cp->ethdev;
4976 int func = CNIC_FUNC(cp), ret;
4977 u32 pfid;
4978
4979 dev->stats_addr = ethdev->addr_drv_info_to_mcp;
4980 cp->port_mode = CHIP_PORT_MODE_NONE;
4981
4982 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
4983 u32 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN_OVWR);
4984
4985 if (!(val & 1))
4986 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN);
4987 else
4988 val = (val >> 1) & 1;
4989
4990 if (val) {
4991 cp->port_mode = CHIP_4_PORT_MODE;
4992 cp->pfid = func >> 1;
4993 } else {
4994 cp->port_mode = CHIP_2_PORT_MODE;
4995 cp->pfid = func & 0x6;
4996 }
4997 } else {
4998 cp->pfid = func;
4999 }
5000 pfid = cp->pfid;
5001
5002 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
5003 cp->iscsi_start_cid, 0);
5004
5005 if (ret)
5006 return -ENOMEM;
5007
5008 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5009 ret = cnic_init_id_tbl(&cp->fcoe_cid_tbl, dev->max_fcoe_conn,
5010 cp->fcoe_start_cid, 0);
5011
5012 if (ret)
5013 return -ENOMEM;
5014 }
5015
5016 cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
5017
5018 cnic_init_bnx2x_kcq(dev);
5019
5020 /* Only 1 EQ */
5021 CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
5022 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5023 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
5024 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5025 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
5026 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
5027 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5028 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
5029 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
5030 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5031 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
5032 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
5033 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5034 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
5035 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
5036 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5037 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
5038 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
5039 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
5040 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5041 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
5042 HC_INDEX_ISCSI_EQ_CONS);
5043
5044 CNIC_WR(dev, BAR_USTRORM_INTMEM +
5045 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
5046 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
5047 CNIC_WR(dev, BAR_USTRORM_INTMEM +
5048 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
5049 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
5050
5051 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
5052 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
5053
5054 cnic_setup_bnx2x_context(dev);
5055
5056 ret = cnic_init_bnx2x_irq(dev);
5057 if (ret)
5058 return ret;
5059
5060 return 0;
5061 }
5062
5063 static void cnic_init_rings(struct cnic_dev *dev)
5064 {
5065 struct cnic_local *cp = dev->cnic_priv;
5066 struct cnic_uio_dev *udev = cp->udev;
5067
5068 if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5069 return;
5070
5071 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5072 cnic_init_bnx2_tx_ring(dev);
5073 cnic_init_bnx2_rx_ring(dev);
5074 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5075 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5076 u32 cli = cp->ethdev->iscsi_l2_client_id;
5077 u32 cid = cp->ethdev->iscsi_l2_cid;
5078 u32 cl_qzone_id;
5079 struct client_init_ramrod_data *data;
5080 union l5cm_specific_data l5_data;
5081 struct ustorm_eth_rx_producers rx_prods = {0};
5082 u32 off, i, *cid_ptr;
5083
5084 rx_prods.bd_prod = 0;
5085 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
5086 barrier();
5087
5088 cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
5089
5090 off = BAR_USTRORM_INTMEM +
5091 (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) ?
5092 USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
5093 USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli));
5094
5095 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
5096 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
5097
5098 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5099
5100 data = udev->l2_buf;
5101 cid_ptr = udev->l2_buf + 12;
5102
5103 memset(data, 0, sizeof(*data));
5104
5105 cnic_init_bnx2x_tx_ring(dev, data);
5106 cnic_init_bnx2x_rx_ring(dev, data);
5107
5108 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
5109 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
5110
5111 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5112
5113 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
5114 cid, ETH_CONNECTION_TYPE, &l5_data);
5115
5116 i = 0;
5117 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5118 ++i < 10)
5119 msleep(1);
5120
5121 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5122 netdev_err(dev->netdev,
5123 "iSCSI CLIENT_SETUP did not complete\n");
5124 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5125 cnic_ring_ctl(dev, cid, cli, 1);
5126 *cid_ptr = cid;
5127 }
5128 }
5129
5130 static void cnic_shutdown_rings(struct cnic_dev *dev)
5131 {
5132 struct cnic_local *cp = dev->cnic_priv;
5133 struct cnic_uio_dev *udev = cp->udev;
5134 void *rx_ring;
5135
5136 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5137 return;
5138
5139 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5140 cnic_shutdown_bnx2_rx_ring(dev);
5141 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5142 u32 cli = cp->ethdev->iscsi_l2_client_id;
5143 u32 cid = cp->ethdev->iscsi_l2_cid;
5144 union l5cm_specific_data l5_data;
5145 int i;
5146
5147 cnic_ring_ctl(dev, cid, cli, 0);
5148
5149 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5150
5151 l5_data.phy_address.lo = cli;
5152 l5_data.phy_address.hi = 0;
5153 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
5154 cid, ETH_CONNECTION_TYPE, &l5_data);
5155 i = 0;
5156 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5157 ++i < 10)
5158 msleep(1);
5159
5160 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5161 netdev_err(dev->netdev,
5162 "iSCSI CLIENT_HALT did not complete\n");
5163 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5164
5165 memset(&l5_data, 0, sizeof(l5_data));
5166 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
5167 cid, NONE_CONNECTION_TYPE, &l5_data);
5168 msleep(10);
5169 }
5170 clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5171 rx_ring = udev->l2_ring + BCM_PAGE_SIZE;
5172 memset(rx_ring, 0, BCM_PAGE_SIZE);
5173 }
5174
5175 static int cnic_register_netdev(struct cnic_dev *dev)
5176 {
5177 struct cnic_local *cp = dev->cnic_priv;
5178 struct cnic_eth_dev *ethdev = cp->ethdev;
5179 int err;
5180
5181 if (!ethdev)
5182 return -ENODEV;
5183
5184 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
5185 return 0;
5186
5187 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
5188 if (err)
5189 netdev_err(dev->netdev, "register_cnic failed\n");
5190
5191 return err;
5192 }
5193
5194 static void cnic_unregister_netdev(struct cnic_dev *dev)
5195 {
5196 struct cnic_local *cp = dev->cnic_priv;
5197 struct cnic_eth_dev *ethdev = cp->ethdev;
5198
5199 if (!ethdev)
5200 return;
5201
5202 ethdev->drv_unregister_cnic(dev->netdev);
5203 }
5204
5205 static int cnic_start_hw(struct cnic_dev *dev)
5206 {
5207 struct cnic_local *cp = dev->cnic_priv;
5208 struct cnic_eth_dev *ethdev = cp->ethdev;
5209 int err;
5210
5211 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
5212 return -EALREADY;
5213
5214 dev->regview = ethdev->io_base;
5215 pci_dev_get(dev->pcidev);
5216 cp->func = PCI_FUNC(dev->pcidev->devfn);
5217 cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
5218 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
5219
5220 err = cp->alloc_resc(dev);
5221 if (err) {
5222 netdev_err(dev->netdev, "allocate resource failure\n");
5223 goto err1;
5224 }
5225
5226 err = cp->start_hw(dev);
5227 if (err)
5228 goto err1;
5229
5230 err = cnic_cm_open(dev);
5231 if (err)
5232 goto err1;
5233
5234 set_bit(CNIC_F_CNIC_UP, &dev->flags);
5235
5236 cp->enable_int(dev);
5237
5238 return 0;
5239
5240 err1:
5241 cp->free_resc(dev);
5242 pci_dev_put(dev->pcidev);
5243 return err;
5244 }
5245
5246 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
5247 {
5248 cnic_disable_bnx2_int_sync(dev);
5249
5250 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
5251 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
5252
5253 cnic_init_context(dev, KWQ_CID);
5254 cnic_init_context(dev, KCQ_CID);
5255
5256 cnic_setup_5709_context(dev, 0);
5257 cnic_free_irq(dev);
5258
5259 cnic_free_resc(dev);
5260 }
5261
5262
5263 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
5264 {
5265 struct cnic_local *cp = dev->cnic_priv;
5266
5267 cnic_free_irq(dev);
5268 *cp->kcq1.hw_prod_idx_ptr = 0;
5269 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5270 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0);
5271 CNIC_WR16(dev, cp->kcq1.io_addr, 0);
5272 cnic_free_resc(dev);
5273 }
5274
5275 static void cnic_stop_hw(struct cnic_dev *dev)
5276 {
5277 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5278 struct cnic_local *cp = dev->cnic_priv;
5279 int i = 0;
5280
5281 /* Need to wait for the ring shutdown event to complete
5282 * before clearing the CNIC_UP flag.
5283 */
5284 while (cp->udev->uio_dev != -1 && i < 15) {
5285 msleep(100);
5286 i++;
5287 }
5288 cnic_shutdown_rings(dev);
5289 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
5290 RCU_INIT_POINTER(cp->ulp_ops[CNIC_ULP_L4], NULL);
5291 synchronize_rcu();
5292 cnic_cm_shutdown(dev);
5293 cp->stop_hw(dev);
5294 pci_dev_put(dev->pcidev);
5295 }
5296 }
5297
5298 static void cnic_free_dev(struct cnic_dev *dev)
5299 {
5300 int i = 0;
5301
5302 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
5303 msleep(100);
5304 i++;
5305 }
5306 if (atomic_read(&dev->ref_count) != 0)
5307 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
5308
5309 netdev_info(dev->netdev, "Removed CNIC device\n");
5310 dev_put(dev->netdev);
5311 kfree(dev);
5312 }
5313
5314 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
5315 struct pci_dev *pdev)
5316 {
5317 struct cnic_dev *cdev;
5318 struct cnic_local *cp;
5319 int alloc_size;
5320
5321 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
5322
5323 cdev = kzalloc(alloc_size , GFP_KERNEL);
5324 if (cdev == NULL) {
5325 netdev_err(dev, "allocate dev struct failure\n");
5326 return NULL;
5327 }
5328
5329 cdev->netdev = dev;
5330 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
5331 cdev->register_device = cnic_register_device;
5332 cdev->unregister_device = cnic_unregister_device;
5333 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
5334
5335 cp = cdev->cnic_priv;
5336 cp->dev = cdev;
5337 cp->l2_single_buf_size = 0x400;
5338 cp->l2_rx_ring_size = 3;
5339
5340 spin_lock_init(&cp->cnic_ulp_lock);
5341
5342 netdev_info(dev, "Added CNIC device\n");
5343
5344 return cdev;
5345 }
5346
5347 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
5348 {
5349 struct pci_dev *pdev;
5350 struct cnic_dev *cdev;
5351 struct cnic_local *cp;
5352 struct cnic_eth_dev *ethdev = NULL;
5353 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
5354
5355 probe = symbol_get(bnx2_cnic_probe);
5356 if (probe) {
5357 ethdev = (*probe)(dev);
5358 symbol_put(bnx2_cnic_probe);
5359 }
5360 if (!ethdev)
5361 return NULL;
5362
5363 pdev = ethdev->pdev;
5364 if (!pdev)
5365 return NULL;
5366
5367 dev_hold(dev);
5368 pci_dev_get(pdev);
5369 if ((pdev->device == PCI_DEVICE_ID_NX2_5709 ||
5370 pdev->device == PCI_DEVICE_ID_NX2_5709S) &&
5371 (pdev->revision < 0x10)) {
5372 pci_dev_put(pdev);
5373 goto cnic_err;
5374 }
5375 pci_dev_put(pdev);
5376
5377 cdev = cnic_alloc_dev(dev, pdev);
5378 if (cdev == NULL)
5379 goto cnic_err;
5380
5381 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
5382 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
5383
5384 cp = cdev->cnic_priv;
5385 cp->ethdev = ethdev;
5386 cdev->pcidev = pdev;
5387 cp->chip_id = ethdev->chip_id;
5388
5389 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5390
5391 cp->cnic_ops = &cnic_bnx2_ops;
5392 cp->start_hw = cnic_start_bnx2_hw;
5393 cp->stop_hw = cnic_stop_bnx2_hw;
5394 cp->setup_pgtbl = cnic_setup_page_tbl;
5395 cp->alloc_resc = cnic_alloc_bnx2_resc;
5396 cp->free_resc = cnic_free_resc;
5397 cp->start_cm = cnic_cm_init_bnx2_hw;
5398 cp->stop_cm = cnic_cm_stop_bnx2_hw;
5399 cp->enable_int = cnic_enable_bnx2_int;
5400 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
5401 cp->close_conn = cnic_close_bnx2_conn;
5402 return cdev;
5403
5404 cnic_err:
5405 dev_put(dev);
5406 return NULL;
5407 }
5408
5409 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
5410 {
5411 struct pci_dev *pdev;
5412 struct cnic_dev *cdev;
5413 struct cnic_local *cp;
5414 struct cnic_eth_dev *ethdev = NULL;
5415 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
5416
5417 probe = symbol_get(bnx2x_cnic_probe);
5418 if (probe) {
5419 ethdev = (*probe)(dev);
5420 symbol_put(bnx2x_cnic_probe);
5421 }
5422 if (!ethdev)
5423 return NULL;
5424
5425 pdev = ethdev->pdev;
5426 if (!pdev)
5427 return NULL;
5428
5429 dev_hold(dev);
5430 cdev = cnic_alloc_dev(dev, pdev);
5431 if (cdev == NULL) {
5432 dev_put(dev);
5433 return NULL;
5434 }
5435
5436 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
5437 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
5438
5439 cp = cdev->cnic_priv;
5440 cp->ethdev = ethdev;
5441 cdev->pcidev = pdev;
5442 cp->chip_id = ethdev->chip_id;
5443
5444 cdev->stats_addr = ethdev->addr_drv_info_to_mcp;
5445
5446 if (!(ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI))
5447 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5448 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) &&
5449 !(ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE))
5450 cdev->max_fcoe_conn = ethdev->max_fcoe_conn;
5451
5452 if (cdev->max_fcoe_conn > BNX2X_FCOE_NUM_CONNECTIONS)
5453 cdev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS;
5454
5455 memcpy(cdev->mac_addr, ethdev->iscsi_mac, 6);
5456
5457 cp->cnic_ops = &cnic_bnx2x_ops;
5458 cp->start_hw = cnic_start_bnx2x_hw;
5459 cp->stop_hw = cnic_stop_bnx2x_hw;
5460 cp->setup_pgtbl = cnic_setup_page_tbl_le;
5461 cp->alloc_resc = cnic_alloc_bnx2x_resc;
5462 cp->free_resc = cnic_free_resc;
5463 cp->start_cm = cnic_cm_init_bnx2x_hw;
5464 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
5465 cp->enable_int = cnic_enable_bnx2x_int;
5466 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
5467 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id))
5468 cp->ack_int = cnic_ack_bnx2x_e2_msix;
5469 else
5470 cp->ack_int = cnic_ack_bnx2x_msix;
5471 cp->close_conn = cnic_close_bnx2x_conn;
5472 return cdev;
5473 }
5474
5475 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
5476 {
5477 struct ethtool_drvinfo drvinfo;
5478 struct cnic_dev *cdev = NULL;
5479
5480 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
5481 memset(&drvinfo, 0, sizeof(drvinfo));
5482 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
5483
5484 if (!strcmp(drvinfo.driver, "bnx2"))
5485 cdev = init_bnx2_cnic(dev);
5486 if (!strcmp(drvinfo.driver, "bnx2x"))
5487 cdev = init_bnx2x_cnic(dev);
5488 if (cdev) {
5489 write_lock(&cnic_dev_lock);
5490 list_add(&cdev->list, &cnic_dev_list);
5491 write_unlock(&cnic_dev_lock);
5492 }
5493 }
5494 return cdev;
5495 }
5496
5497 static void cnic_rcv_netevent(struct cnic_local *cp, unsigned long event,
5498 u16 vlan_id)
5499 {
5500 int if_type;
5501
5502 rcu_read_lock();
5503 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
5504 struct cnic_ulp_ops *ulp_ops;
5505 void *ctx;
5506
5507 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
5508 if (!ulp_ops || !ulp_ops->indicate_netevent)
5509 continue;
5510
5511 ctx = cp->ulp_handle[if_type];
5512
5513 ulp_ops->indicate_netevent(ctx, event, vlan_id);
5514 }
5515 rcu_read_unlock();
5516 }
5517
5518 /**
5519 * netdev event handler
5520 */
5521 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
5522 void *ptr)
5523 {
5524 struct net_device *netdev = ptr;
5525 struct cnic_dev *dev;
5526 int new_dev = 0;
5527
5528 dev = cnic_from_netdev(netdev);
5529
5530 if (!dev && (event == NETDEV_REGISTER || netif_running(netdev))) {
5531 /* Check for the hot-plug device */
5532 dev = is_cnic_dev(netdev);
5533 if (dev) {
5534 new_dev = 1;
5535 cnic_hold(dev);
5536 }
5537 }
5538 if (dev) {
5539 struct cnic_local *cp = dev->cnic_priv;
5540
5541 if (new_dev)
5542 cnic_ulp_init(dev);
5543 else if (event == NETDEV_UNREGISTER)
5544 cnic_ulp_exit(dev);
5545
5546 if (event == NETDEV_UP || (new_dev && netif_running(netdev))) {
5547 if (cnic_register_netdev(dev) != 0) {
5548 cnic_put(dev);
5549 goto done;
5550 }
5551 if (!cnic_start_hw(dev))
5552 cnic_ulp_start(dev);
5553 }
5554
5555 cnic_rcv_netevent(cp, event, 0);
5556
5557 if (event == NETDEV_GOING_DOWN) {
5558 cnic_ulp_stop(dev);
5559 cnic_stop_hw(dev);
5560 cnic_unregister_netdev(dev);
5561 } else if (event == NETDEV_UNREGISTER) {
5562 write_lock(&cnic_dev_lock);
5563 list_del_init(&dev->list);
5564 write_unlock(&cnic_dev_lock);
5565
5566 cnic_put(dev);
5567 cnic_free_dev(dev);
5568 goto done;
5569 }
5570 cnic_put(dev);
5571 } else {
5572 struct net_device *realdev;
5573 u16 vid;
5574
5575 vid = cnic_get_vlan(netdev, &realdev);
5576 if (realdev) {
5577 dev = cnic_from_netdev(realdev);
5578 if (dev) {
5579 vid |= VLAN_TAG_PRESENT;
5580 cnic_rcv_netevent(dev->cnic_priv, event, vid);
5581 cnic_put(dev);
5582 }
5583 }
5584 }
5585 done:
5586 return NOTIFY_DONE;
5587 }
5588
5589 static struct notifier_block cnic_netdev_notifier = {
5590 .notifier_call = cnic_netdev_event
5591 };
5592
5593 static void cnic_release(void)
5594 {
5595 struct cnic_dev *dev;
5596 struct cnic_uio_dev *udev;
5597
5598 while (!list_empty(&cnic_dev_list)) {
5599 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
5600 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5601 cnic_ulp_stop(dev);
5602 cnic_stop_hw(dev);
5603 }
5604
5605 cnic_ulp_exit(dev);
5606 cnic_unregister_netdev(dev);
5607 list_del_init(&dev->list);
5608 cnic_free_dev(dev);
5609 }
5610 while (!list_empty(&cnic_udev_list)) {
5611 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
5612 list);
5613 cnic_free_uio(udev);
5614 }
5615 }
5616
5617 static int __init cnic_init(void)
5618 {
5619 int rc = 0;
5620
5621 pr_info("%s", version);
5622
5623 rc = register_netdevice_notifier(&cnic_netdev_notifier);
5624 if (rc) {
5625 cnic_release();
5626 return rc;
5627 }
5628
5629 cnic_wq = create_singlethread_workqueue("cnic_wq");
5630 if (!cnic_wq) {
5631 cnic_release();
5632 unregister_netdevice_notifier(&cnic_netdev_notifier);
5633 return -ENOMEM;
5634 }
5635
5636 return 0;
5637 }
5638
5639 static void __exit cnic_exit(void)
5640 {
5641 unregister_netdevice_notifier(&cnic_netdev_notifier);
5642 cnic_release();
5643 destroy_workqueue(cnic_wq);
5644 }
5645
5646 module_init(cnic_init);
5647 module_exit(cnic_exit);
Linux kernel - Deliverables
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