4e04c140c84c97503b0e74ca7cab71ed5da65514
[deliverable/linux.git] / drivers / net / ethernet / brocade / bna / bfi.h
1 /*
2 * Linux network driver for Brocade Converged Network Adapter.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13 /*
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
15 * All rights reserved
16 * www.brocade.com
17 */
18 #ifndef __BFI_H__
19 #define __BFI_H__
20
21 #include "bfa_defs.h"
22
23 #pragma pack(1)
24
25 /**
26 * BFI FW image type
27 */
28 #define BFI_FLASH_CHUNK_SZ 256 /*!< Flash chunk size */
29 #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
30
31 /**
32 * Msg header common to all msgs
33 */
34 struct bfi_mhdr {
35 u8 msg_class; /*!< @ref enum bfi_mclass */
36 u8 msg_id; /*!< msg opcode with in the class */
37 union {
38 struct {
39 u8 qid;
40 u8 fn_lpu; /*!< msg destination */
41 } h2i;
42 u16 i2htok; /*!< token in msgs to host */
43 } mtag;
44 };
45
46 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
47 #define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1)
48 #define bfi_mhdr_2_qid(_mh) ((_mh)->mtag.h2i.qid)
49
50 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \
51 (_mh).msg_class = (_mc); \
52 (_mh).msg_id = (_op); \
53 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \
54 } while (0)
55
56 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
57 (_mh).msg_class = (_mc); \
58 (_mh).msg_id = (_op); \
59 (_mh).mtag.i2htok = (_i2htok); \
60 } while (0)
61
62 /*
63 * Message opcodes: 0-127 to firmware, 128-255 to host
64 */
65 #define BFI_I2H_OPCODE_BASE 128
66 #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
67
68 /**
69 ****************************************************************************
70 *
71 * Scatter Gather Element and Page definition
72 *
73 ****************************************************************************
74 */
75
76 /**
77 * DMA addresses
78 */
79 union bfi_addr_u {
80 struct {
81 u32 addr_lo;
82 u32 addr_hi;
83 } a32;
84 };
85
86 /*
87 * Large Message structure - 128 Bytes size Msgs
88 */
89 #define BFI_LMSG_SZ 128
90 #define BFI_LMSG_PL_WSZ \
91 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4)
92
93 /**
94 * Mailbox message structure
95 */
96 #define BFI_MBMSG_SZ 7
97 struct bfi_mbmsg {
98 struct bfi_mhdr mh;
99 u32 pl[BFI_MBMSG_SZ];
100 };
101
102 /**
103 * Supported PCI function class codes (personality)
104 */
105 enum bfi_pcifn_class {
106 BFI_PCIFN_CLASS_FC = 0x0c04,
107 BFI_PCIFN_CLASS_ETH = 0x0200,
108 };
109
110 /**
111 * Message Classes
112 */
113 enum bfi_mclass {
114 BFI_MC_IOC = 1, /*!< IO Controller (IOC) */
115 BFI_MC_DIAG = 2, /*!< Diagnostic Msgs */
116 BFI_MC_FLASH = 3, /*!< Flash message class */
117 BFI_MC_CEE = 4, /*!< CEE */
118 BFI_MC_FCPORT = 5, /*!< FC port */
119 BFI_MC_IOCFC = 6, /*!< FC - IO Controller (IOC) */
120 BFI_MC_LL = 7, /*!< Link Layer */
121 BFI_MC_UF = 8, /*!< Unsolicited frame receive */
122 BFI_MC_FCXP = 9, /*!< FC Transport */
123 BFI_MC_LPS = 10, /*!< lport fc login services */
124 BFI_MC_RPORT = 11, /*!< Remote port */
125 BFI_MC_ITNIM = 12, /*!< I-T nexus (Initiator mode) */
126 BFI_MC_IOIM_READ = 13, /*!< read IO (Initiator mode) */
127 BFI_MC_IOIM_WRITE = 14, /*!< write IO (Initiator mode) */
128 BFI_MC_IOIM_IO = 15, /*!< IO (Initiator mode) */
129 BFI_MC_IOIM = 16, /*!< IO (Initiator mode) */
130 BFI_MC_IOIM_IOCOM = 17, /*!< good IO completion */
131 BFI_MC_TSKIM = 18, /*!< Initiator Task management */
132 BFI_MC_SBOOT = 19, /*!< SAN boot services */
133 BFI_MC_IPFC = 20, /*!< IP over FC Msgs */
134 BFI_MC_PORT = 21, /*!< Physical port */
135 BFI_MC_SFP = 22, /*!< SFP module */
136 BFI_MC_MSGQ = 23, /*!< MSGQ */
137 BFI_MC_ENET = 24, /*!< ENET commands/responses */
138 BFI_MC_MAX = 32
139 };
140
141 #define BFI_IOC_MAX_CQS 4
142 #define BFI_IOC_MAX_CQS_ASIC 8
143 #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
144
145 #define BFI_FWBOOT_ENV_OS 0
146
147 #define BFI_BOOT_MEMTEST_RES_ADDR 0x900
148 #define BFI_BOOT_MEMTEST_RES_SIG 0xA0A1A2A3
149
150 /**
151 *----------------------------------------------------------------------
152 * IOC
153 *----------------------------------------------------------------------
154 */
155
156 /**
157 * Different asic generations
158 */
159 enum bfi_asic_gen {
160 BFI_ASIC_GEN_CB = 1,
161 BFI_ASIC_GEN_CT = 2,
162 };
163
164 enum bfi_asic_mode {
165 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
166 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
167 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
168 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
169 };
170
171 enum bfi_ioc_h2i_msgs {
172 BFI_IOC_H2I_ENABLE_REQ = 1,
173 BFI_IOC_H2I_DISABLE_REQ = 2,
174 BFI_IOC_H2I_GETATTR_REQ = 3,
175 BFI_IOC_H2I_DBG_SYNC = 4,
176 BFI_IOC_H2I_DBG_DUMP = 5,
177 };
178
179 enum bfi_ioc_i2h_msgs {
180 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
181 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
182 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
183 BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
184 };
185
186 /**
187 * BFI_IOC_H2I_GETATTR_REQ message
188 */
189 struct bfi_ioc_getattr_req {
190 struct bfi_mhdr mh;
191 union bfi_addr_u attr_addr;
192 };
193
194 struct bfi_ioc_attr {
195 u64 mfg_pwwn; /*!< Mfg port wwn */
196 u64 mfg_nwwn; /*!< Mfg node wwn */
197 mac_t mfg_mac; /*!< Mfg mac */
198 u8 port_mode; /* enum bfi_port_mode */
199 u8 rsvd_a;
200 u64 pwwn;
201 u64 nwwn;
202 mac_t mac; /*!< PBC or Mfg mac */
203 u16 rsvd_b;
204 mac_t fcoe_mac;
205 u16 rsvd_c;
206 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
207 u8 pcie_gen;
208 u8 pcie_lanes_orig;
209 u8 pcie_lanes;
210 u8 rx_bbcredit; /*!< receive buffer credits */
211 u32 adapter_prop; /*!< adapter properties */
212 u16 maxfrsize; /*!< max receive frame size */
213 char asic_rev;
214 u8 rsvd_d;
215 char fw_version[BFA_VERSION_LEN];
216 char optrom_version[BFA_VERSION_LEN];
217 struct bfa_mfg_vpd vpd;
218 u32 card_type; /*!< card type */
219 };
220
221 /**
222 * BFI_IOC_I2H_GETATTR_REPLY message
223 */
224 struct bfi_ioc_getattr_reply {
225 struct bfi_mhdr mh; /*!< Common msg header */
226 u8 status; /*!< cfg reply status */
227 u8 rsvd[3];
228 };
229
230 /**
231 * Firmware memory page offsets
232 */
233 #define BFI_IOC_SMEM_PG0_CB (0x40)
234 #define BFI_IOC_SMEM_PG0_CT (0x180)
235
236 /**
237 * Firmware statistic offset
238 */
239 #define BFI_IOC_FWSTATS_OFF (0x6B40)
240 #define BFI_IOC_FWSTATS_SZ (4096)
241
242 /**
243 * Firmware trace offset
244 */
245 #define BFI_IOC_TRC_OFF (0x4b00)
246 #define BFI_IOC_TRC_ENTS 256
247
248 #define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
249 #define BFI_IOC_MD5SUM_SZ 4
250 struct bfi_ioc_image_hdr {
251 u32 signature; /*!< constant signature */
252 u8 asic_gen; /*!< asic generation */
253 u8 asic_mode;
254 u8 port0_mode; /*!< device mode for port 0 */
255 u8 port1_mode; /*!< device mode for port 1 */
256 u32 exec; /*!< exec vector */
257 u32 bootenv; /*!< firmware boot env */
258 u32 rsvd_b[4];
259 u32 md5sum[BFI_IOC_MD5SUM_SZ];
260 };
261
262 #define BFI_FWBOOT_DEVMODE_OFF 4
263 #define BFI_FWBOOT_TYPE_OFF 8
264 #define BFI_FWBOOT_ENV_OFF 12
265 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
266 (((u32)(__asic_gen)) << 24 | \
267 ((u32)(__asic_mode)) << 16 | \
268 ((u32)(__p0_mode)) << 8 | \
269 ((u32)(__p1_mode)))
270
271 enum bfi_fwboot_type {
272 BFI_FWBOOT_TYPE_NORMAL = 0,
273 BFI_FWBOOT_TYPE_FLASH = 1,
274 BFI_FWBOOT_TYPE_MEMTEST = 2,
275 };
276
277 enum bfi_port_mode {
278 BFI_PORT_MODE_FC = 1,
279 BFI_PORT_MODE_ETH = 2,
280 };
281
282 /**
283 * BFI_IOC_I2H_READY_EVENT message
284 */
285 struct bfi_ioc_hbeat {
286 struct bfi_mhdr mh; /*!< common msg header */
287 u32 hb_count; /*!< current heart beat count */
288 };
289
290 /**
291 * IOC hardware/firmware state
292 */
293 enum bfi_ioc_state {
294 BFI_IOC_UNINIT = 0, /*!< not initialized */
295 BFI_IOC_INITING = 1, /*!< h/w is being initialized */
296 BFI_IOC_HWINIT = 2, /*!< h/w is initialized */
297 BFI_IOC_CFG = 3, /*!< IOC configuration in progress */
298 BFI_IOC_OP = 4, /*!< IOC is operational */
299 BFI_IOC_DISABLING = 5, /*!< IOC is being disabled */
300 BFI_IOC_DISABLED = 6, /*!< IOC is disabled */
301 BFI_IOC_CFG_DISABLED = 7, /*!< IOC is being disabled;transient */
302 BFI_IOC_FAIL = 8, /*!< IOC heart-beat failure */
303 BFI_IOC_MEMTEST = 9, /*!< IOC is doing memtest */
304 };
305
306 #define BFI_IOC_ENDIAN_SIG 0x12345678
307
308 enum {
309 BFI_ADAPTER_TYPE_FC = 0x01, /*!< FC adapters */
310 BFI_ADAPTER_TYPE_MK = 0x0f0000, /*!< adapter type mask */
311 BFI_ADAPTER_TYPE_SH = 16, /*!< adapter type shift */
312 BFI_ADAPTER_NPORTS_MK = 0xff00, /*!< number of ports mask */
313 BFI_ADAPTER_NPORTS_SH = 8, /*!< number of ports shift */
314 BFI_ADAPTER_SPEED_MK = 0xff, /*!< adapter speed mask */
315 BFI_ADAPTER_SPEED_SH = 0, /*!< adapter speed shift */
316 BFI_ADAPTER_PROTO = 0x100000, /*!< prototype adapaters */
317 BFI_ADAPTER_TTV = 0x200000, /*!< TTV debug capable */
318 BFI_ADAPTER_UNSUPP = 0x400000, /*!< unknown adapter type */
319 };
320
321 #define BFI_ADAPTER_GETP(__prop, __adap_prop) \
322 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
323 BFI_ADAPTER_ ## __prop ## _SH)
324 #define BFI_ADAPTER_SETP(__prop, __val) \
325 ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
326 #define BFI_ADAPTER_IS_PROTO(__adap_type) \
327 ((__adap_type) & BFI_ADAPTER_PROTO)
328 #define BFI_ADAPTER_IS_TTV(__adap_type) \
329 ((__adap_type) & BFI_ADAPTER_TTV)
330 #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
331 ((__adap_type) & BFI_ADAPTER_UNSUPP)
332 #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
333 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
334 BFI_ADAPTER_UNSUPP))
335
336 /**
337 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
338 */
339 struct bfi_ioc_ctrl_req {
340 struct bfi_mhdr mh;
341 u16 clscode;
342 u16 rsvd;
343 u32 tv_sec;
344 };
345
346 /**
347 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
348 */
349 struct bfi_ioc_ctrl_reply {
350 struct bfi_mhdr mh; /*!< Common msg header */
351 u8 status; /*!< enable/disable status */
352 u8 port_mode; /*!< enum bfa_mode */
353 u8 cap_bm; /*!< capability bit mask */
354 u8 rsvd;
355 };
356
357 #define BFI_IOC_MSGSZ 8
358 /**
359 * H2I Messages
360 */
361 union bfi_ioc_h2i_msg_u {
362 struct bfi_mhdr mh;
363 struct bfi_ioc_ctrl_req enable_req;
364 struct bfi_ioc_ctrl_req disable_req;
365 struct bfi_ioc_getattr_req getattr_req;
366 u32 mboxmsg[BFI_IOC_MSGSZ];
367 };
368
369 /**
370 * I2H Messages
371 */
372 union bfi_ioc_i2h_msg_u {
373 struct bfi_mhdr mh;
374 struct bfi_ioc_ctrl_reply fw_event;
375 u32 mboxmsg[BFI_IOC_MSGSZ];
376 };
377
378 /**
379 *----------------------------------------------------------------------
380 * MSGQ
381 *----------------------------------------------------------------------
382 */
383
384 enum bfi_msgq_h2i_msgs {
385 BFI_MSGQ_H2I_INIT_REQ = 1,
386 BFI_MSGQ_H2I_DOORBELL_PI = 2,
387 BFI_MSGQ_H2I_DOORBELL_CI = 3,
388 BFI_MSGQ_H2I_CMDQ_COPY_RSP = 4,
389 };
390
391 enum bfi_msgq_i2h_msgs {
392 BFI_MSGQ_I2H_INIT_RSP = BFA_I2HM(BFI_MSGQ_H2I_INIT_REQ),
393 BFI_MSGQ_I2H_DOORBELL_PI = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_PI),
394 BFI_MSGQ_I2H_DOORBELL_CI = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_CI),
395 BFI_MSGQ_I2H_CMDQ_COPY_REQ = BFA_I2HM(BFI_MSGQ_H2I_CMDQ_COPY_RSP),
396 };
397
398 /* Messages(commands/responsed/AENS will have the following header */
399 struct bfi_msgq_mhdr {
400 u8 msg_class;
401 u8 msg_id;
402 u16 msg_token;
403 u16 num_entries;
404 u8 enet_id;
405 u8 rsvd[1];
406 };
407
408 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
409 (_mh).msg_class = (_mc); \
410 (_mh).msg_id = (_mid); \
411 (_mh).msg_token = (_tok); \
412 (_mh).enet_id = (_enet_id); \
413 } while (0)
414
415 /*
416 * Mailbox for messaging interface
417 */
418 #define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
419 #define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
420
421 #define bfi_msgq_num_cmd_entries(_size) \
422 (((_size) + BFI_MSGQ_CMD_ENTRY_SIZE - 1) / BFI_MSGQ_CMD_ENTRY_SIZE)
423
424 struct bfi_msgq {
425 union bfi_addr_u addr;
426 u16 q_depth; /* Total num of entries in the queue */
427 u8 rsvd[2];
428 };
429
430 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
431 struct bfi_msgq_cfg_req {
432 struct bfi_mhdr mh;
433 struct bfi_msgq cmdq;
434 struct bfi_msgq rspq;
435 };
436
437 /* BFI_ENET_MSGQ_CFG_RSP */
438 struct bfi_msgq_cfg_rsp {
439 struct bfi_mhdr mh;
440 u8 cmd_status;
441 u8 rsvd[3];
442 };
443
444 /* BFI_MSGQ_H2I_DOORBELL */
445 struct bfi_msgq_h2i_db {
446 struct bfi_mhdr mh;
447 union {
448 u16 cmdq_pi;
449 u16 rspq_ci;
450 } idx;
451 };
452
453 /* BFI_MSGQ_I2H_DOORBELL */
454 struct bfi_msgq_i2h_db {
455 struct bfi_mhdr mh;
456 union {
457 u16 rspq_pi;
458 u16 cmdq_ci;
459 } idx;
460 };
461
462 #define BFI_CMD_COPY_SZ 28
463
464 /* BFI_MSGQ_H2I_CMD_COPY_RSP */
465 struct bfi_msgq_h2i_cmdq_copy_rsp {
466 struct bfi_mhdr mh;
467 u8 data[BFI_CMD_COPY_SZ];
468 };
469
470 /* BFI_MSGQ_I2H_CMD_COPY_REQ */
471 struct bfi_msgq_i2h_cmdq_copy_req {
472 struct bfi_mhdr mh;
473 u16 offset;
474 u16 len;
475 };
476
477 #pragma pack()
478
479 #endif /* __BFI_H__ */
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