drivers/net/ethernet/brocade/bna/bnad.h

   1 /*
   2  * Linux network driver for QLogic BR-series Converged Network Adapter.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License (GPL) Version 2 as
   6  * published by the Free Software Foundation
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 /*
  14  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
  15  * Copyright (c) 2014-2015 QLogic Corporation
  16  * All rights reserved
  17  * www.qlogic.com
  18  */
  19 #ifndef __BNAD_H__
  20 #define __BNAD_H__
  21
  22 #include <linux/rtnetlink.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/ipv6.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/mutex.h>
  27 #include <linux/firmware.h>
  28 #include <linux/if_vlan.h>
  29
  30 /* Fix for IA64 */
  31 #include <asm/checksum.h>
  32 #include <net/ip6_checksum.h>
  33
  34 #include <net/ip.h>
  35 #include <net/tcp.h>
  36
  37 #include "bna.h"
  38
  39 #define BNAD_TXQ_DEPTH          2048
  40 #define BNAD_RXQ_DEPTH          2048
  41
  42 #define BNAD_MAX_TX             1
  43 #define BNAD_MAX_TXQ_PER_TX     8       /* 8 priority queues */
  44 #define BNAD_TXQ_NUM            1
  45
  46 #define BNAD_MAX_RX             1
  47 #define BNAD_MAX_RXP_PER_RX     16
  48 #define BNAD_MAX_RXQ_PER_RXP    2
  49
  50 /*
  51  * Control structure pointed to ccb->ctrl, which
  52  * determines the NAPI / LRO behavior CCB
  53  * There is 1:1 corres. between ccb & ctrl
  54  */
  55 struct bnad_rx_ctrl {
  56         struct bna_ccb *ccb;
  57         struct bnad *bnad;
  58         unsigned long  flags;
  59         struct napi_struct      napi;
  60         u64             rx_intr_ctr;
  61         u64             rx_poll_ctr;
  62         u64             rx_schedule;
  63         u64             rx_keep_poll;
  64         u64             rx_complete;
  65 };
  66
  67 #define BNAD_RXMODE_PROMISC_DEFAULT     BNA_RXMODE_PROMISC
  68
  69 /*
  70  * GLOBAL #defines (CONSTANTS)
  71  */
  72 #define BNAD_NAME                       "bna"
  73 #define BNAD_NAME_LEN                   64
  74
  75 #define BNAD_VERSION                    "3.2.25.1"
  76
  77 #define BNAD_MAILBOX_MSIX_INDEX         0
  78 #define BNAD_MAILBOX_MSIX_VECTORS       1
  79 #define BNAD_INTX_TX_IB_BITMASK         0x1
  80 #define BNAD_INTX_RX_IB_BITMASK         0x2
  81
  82 #define BNAD_STATS_TIMER_FREQ           1000    /* in msecs */
  83 #define BNAD_DIM_TIMER_FREQ             1000    /* in msecs */
  84
  85 #define BNAD_IOCETH_TIMEOUT          10000
  86
  87 #define BNAD_MIN_Q_DEPTH                512
  88 #define BNAD_MAX_RXQ_DEPTH              16384
  89 #define BNAD_MAX_TXQ_DEPTH              2048
  90
  91 #define BNAD_JUMBO_MTU                  9000
  92
  93 #define BNAD_NETIF_WAKE_THRESHOLD       8
  94
  95 #define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3
  96
  97 /* Bit positions for tcb->flags */
  98 #define BNAD_TXQ_FREE_SENT              0
  99 #define BNAD_TXQ_TX_STARTED             1
 100
 101 /* Bit positions for rcb->flags */
 102 #define BNAD_RXQ_STARTED                0
 103 #define BNAD_RXQ_POST_OK                1
 104
 105 /* Resource limits */
 106 #define BNAD_NUM_TXQ                    (bnad->num_tx * bnad->num_txq_per_tx)
 107 #define BNAD_NUM_RXP                    (bnad->num_rx * bnad->num_rxp_per_rx)
 108
 109 #define BNAD_FRAME_SIZE(_mtu) \
 110         (ETH_HLEN + VLAN_HLEN + (_mtu) + ETH_FCS_LEN)
 111
 112 /*
 113  * DATA STRUCTURES
 114  */
 115
 116 /* enums */
 117 enum bnad_intr_source {
 118         BNAD_INTR_TX            = 1,
 119         BNAD_INTR_RX            = 2
 120 };
 121
 122 enum bnad_link_state {
 123         BNAD_LS_DOWN            = 0,
 124         BNAD_LS_UP              = 1
 125 };
 126
 127 struct bnad_iocmd_comp {
 128         struct bnad             *bnad;
 129         struct completion       comp;
 130         int                     comp_status;
 131 };
 132
 133 struct bnad_completion {
 134         struct completion       ioc_comp;
 135         struct completion       ucast_comp;
 136         struct completion       mcast_comp;
 137         struct completion       tx_comp;
 138         struct completion       rx_comp;
 139         struct completion       stats_comp;
 140         struct completion       enet_comp;
 141         struct completion       mtu_comp;
 142
 143         u8                      ioc_comp_status;
 144         u8                      ucast_comp_status;
 145         u8                      mcast_comp_status;
 146         u8                      tx_comp_status;
 147         u8                      rx_comp_status;
 148         u8                      stats_comp_status;
 149         u8                      port_comp_status;
 150         u8                      mtu_comp_status;
 151 };
 152
 153 /* Tx Rx Control Stats */
 154 struct bnad_drv_stats {
 155         u64             netif_queue_stop;
 156         u64             netif_queue_wakeup;
 157         u64             netif_queue_stopped;
 158         u64             tso4;
 159         u64             tso6;
 160         u64             tso_err;
 161         u64             tcpcsum_offload;
 162         u64             udpcsum_offload;
 163         u64             csum_help;
 164         u64             tx_skb_too_short;
 165         u64             tx_skb_stopping;
 166         u64             tx_skb_max_vectors;
 167         u64             tx_skb_mss_too_long;
 168         u64             tx_skb_tso_too_short;
 169         u64             tx_skb_tso_prepare;
 170         u64             tx_skb_non_tso_too_long;
 171         u64             tx_skb_tcp_hdr;
 172         u64             tx_skb_udp_hdr;
 173         u64             tx_skb_csum_err;
 174         u64             tx_skb_headlen_too_long;
 175         u64             tx_skb_headlen_zero;
 176         u64             tx_skb_frag_zero;
 177         u64             tx_skb_len_mismatch;
 178
 179         u64             hw_stats_updates;
 180         u64             netif_rx_dropped;
 181
 182         u64             link_toggle;
 183         u64             cee_toggle;
 184
 185         u64             rxp_info_alloc_failed;
 186         u64             mbox_intr_disabled;
 187         u64             mbox_intr_enabled;
 188         u64             tx_unmap_q_alloc_failed;
 189         u64             rx_unmap_q_alloc_failed;
 190
 191         u64             rxbuf_alloc_failed;
 192 };
 193
 194 /* Complete driver stats */
 195 struct bnad_stats {
 196         struct bnad_drv_stats drv_stats;
 197         struct bna_stats *bna_stats;
 198 };
 199
 200 /* Tx / Rx Resources */
 201 struct bnad_tx_res_info {
 202         struct bna_res_info res_info[BNA_TX_RES_T_MAX];
 203 };
 204
 205 struct bnad_rx_res_info {
 206         struct bna_res_info res_info[BNA_RX_RES_T_MAX];
 207 };
 208
 209 struct bnad_tx_info {
 210         struct bna_tx *tx; /* 1:1 between tx_info & tx */
 211         struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
 212         u32 tx_id;
 213         struct delayed_work tx_cleanup_work;
 214 } ____cacheline_aligned;
 215
 216 struct bnad_rx_info {
 217         struct bna_rx *rx; /* 1:1 between rx_info & rx */
 218
 219         struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX];
 220         u32 rx_id;
 221         struct work_struct rx_cleanup_work;
 222 } ____cacheline_aligned;
 223
 224 struct bnad_tx_vector {
 225         DEFINE_DMA_UNMAP_ADDR(dma_addr);
 226         DEFINE_DMA_UNMAP_LEN(dma_len);
 227 };
 228
 229 struct bnad_tx_unmap {
 230         struct sk_buff          *skb;
 231         u32                     nvecs;
 232         struct bnad_tx_vector   vectors[BFI_TX_MAX_VECTORS_PER_WI];
 233 };
 234
 235 struct bnad_rx_vector {
 236         DEFINE_DMA_UNMAP_ADDR(dma_addr);
 237         u32                     len;
 238 };
 239
 240 struct bnad_rx_unmap {
 241         struct page             *page;
 242         struct sk_buff          *skb;
 243         struct bnad_rx_vector   vector;
 244         u32                     page_offset;
 245 };
 246
 247 enum bnad_rxbuf_type {
 248         BNAD_RXBUF_NONE         = 0,
 249         BNAD_RXBUF_SK_BUFF      = 1,
 250         BNAD_RXBUF_PAGE         = 2,
 251         BNAD_RXBUF_MULTI_BUFF   = 3
 252 };
 253
 254 #define BNAD_RXBUF_IS_SK_BUFF(_type)    ((_type) == BNAD_RXBUF_SK_BUFF)
 255 #define BNAD_RXBUF_IS_MULTI_BUFF(_type) ((_type) == BNAD_RXBUF_MULTI_BUFF)
 256
 257 struct bnad_rx_unmap_q {
 258         int                     reuse_pi;
 259         int                     alloc_order;
 260         u32                     map_size;
 261         enum bnad_rxbuf_type    type;
 262         struct bnad_rx_unmap    unmap[0] ____cacheline_aligned;
 263 };
 264
 265 #define BNAD_PCI_DEV_IS_CAT2(_bnad) \
 266         ((_bnad)->pcidev->device == BFA_PCI_DEVICE_ID_CT2)
 267
 268 /* Bit mask values for bnad->cfg_flags */
 269 #define BNAD_CF_DIM_ENABLED             0x01    /* DIM */
 270 #define BNAD_CF_PROMISC                 0x02
 271 #define BNAD_CF_ALLMULTI                0x04
 272 #define BNAD_CF_DEFAULT                 0x08
 273 #define BNAD_CF_MSIX                    0x10    /* If in MSIx mode */
 274
 275 /* Defines for run_flags bit-mask */
 276 /* Set, tested & cleared using xxx_bit() functions */
 277 /* Values indicated bit positions */
 278 #define BNAD_RF_CEE_RUNNING             0
 279 #define BNAD_RF_MTU_SET         1
 280 #define BNAD_RF_MBOX_IRQ_DISABLED       2
 281 #define BNAD_RF_NETDEV_REGISTERED       3
 282 #define BNAD_RF_DIM_TIMER_RUNNING       4
 283 #define BNAD_RF_STATS_TIMER_RUNNING     5
 284 #define BNAD_RF_TX_PRIO_SET             6
 285
 286 struct bnad {
 287         struct net_device       *netdev;
 288         u32                     id;
 289         struct list_head        list_entry;
 290
 291         /* Data path */
 292         struct bnad_tx_info tx_info[BNAD_MAX_TX];
 293         struct bnad_rx_info rx_info[BNAD_MAX_RX];
 294
 295         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 296         /*
 297          * These q numbers are global only because
 298          * they are used to calculate MSIx vectors.
 299          * Actually the exact # of queues are per Tx/Rx
 300          * object.
 301          */
 302         u32             num_tx;
 303         u32             num_rx;
 304         u32             num_txq_per_tx;
 305         u32             num_rxp_per_rx;
 306
 307         u32             txq_depth;
 308         u32             rxq_depth;
 309
 310         u8                      tx_coalescing_timeo;
 311         u8                      rx_coalescing_timeo;
 312
 313         struct bna_rx_config rx_config[BNAD_MAX_RX] ____cacheline_aligned;
 314         struct bna_tx_config tx_config[BNAD_MAX_TX] ____cacheline_aligned;
 315
 316         void __iomem            *bar0;  /* BAR0 address */
 317
 318         struct bna bna;
 319
 320         u32             cfg_flags;
 321         unsigned long           run_flags;
 322
 323         struct pci_dev          *pcidev;
 324         u64             mmio_start;
 325         u64             mmio_len;
 326
 327         u32             msix_num;
 328         struct msix_entry       *msix_table;
 329
 330         struct mutex            conf_mutex;
 331         spinlock_t              bna_lock ____cacheline_aligned;
 332
 333         /* Timers */
 334         struct timer_list       ioc_timer;
 335         struct timer_list       dim_timer;
 336         struct timer_list       stats_timer;
 337
 338         /* Control path resources, memory & irq */
 339         struct bna_res_info res_info[BNA_RES_T_MAX];
 340         struct bna_res_info mod_res_info[BNA_MOD_RES_T_MAX];
 341         struct bnad_tx_res_info tx_res_info[BNAD_MAX_TX];
 342         struct bnad_rx_res_info rx_res_info[BNAD_MAX_RX];
 343
 344         struct bnad_completion bnad_completions;
 345
 346         /* Burnt in MAC address */
 347         u8                      perm_addr[ETH_ALEN];
 348
 349         struct workqueue_struct *work_q;
 350
 351         /* Statistics */
 352         struct bnad_stats stats;
 353
 354         struct bnad_diag *diag;
 355
 356         char                    adapter_name[BNAD_NAME_LEN];
 357         char                    port_name[BNAD_NAME_LEN];
 358         char                    mbox_irq_name[BNAD_NAME_LEN];
 359         char                    wq_name[BNAD_NAME_LEN];
 360
 361         /* debugfs specific data */
 362         char    *regdata;
 363         u32     reglen;
 364         struct dentry *bnad_dentry_files[5];
 365         struct dentry *port_debugfs_root;
 366 };
 367
 368 struct bnad_drvinfo {
 369         struct bfa_ioc_attr  ioc_attr;
 370         struct bfa_cee_attr  cee_attr;
 371         struct bfa_flash_attr flash_attr;
 372         u32     cee_status;
 373         u32     flash_status;
 374 };
 375
 376 /*
 377  * EXTERN VARIABLES
 378  */
 379 extern const struct firmware *bfi_fw;
 380
 381 /*
 382  * EXTERN PROTOTYPES
 383  */
 384 u32 *cna_get_firmware_buf(struct pci_dev *pdev);
 385 /* Netdev entry point prototypes */
 386 void bnad_set_rx_mode(struct net_device *netdev);
 387 struct net_device_stats *bnad_get_netdev_stats(struct net_device *netdev);
 388 int bnad_mac_addr_set_locked(struct bnad *bnad, const u8 *mac_addr);
 389 int bnad_enable_default_bcast(struct bnad *bnad);
 390 void bnad_restore_vlans(struct bnad *bnad, u32 rx_id);
 391 void bnad_set_ethtool_ops(struct net_device *netdev);
 392 void bnad_cb_completion(void *arg, enum bfa_status status);
 393
 394 /* Configuration & setup */
 395 void bnad_tx_coalescing_timeo_set(struct bnad *bnad);
 396 void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
 397
 398 int bnad_setup_rx(struct bnad *bnad, u32 rx_id);
 399 int bnad_setup_tx(struct bnad *bnad, u32 tx_id);
 400 void bnad_destroy_tx(struct bnad *bnad, u32 tx_id);
 401 void bnad_destroy_rx(struct bnad *bnad, u32 rx_id);
 402
 403 /* Timer start/stop protos */
 404 void bnad_dim_timer_start(struct bnad *bnad);
 405
 406 /* Statistics */
 407 void bnad_netdev_qstats_fill(struct bnad *bnad,
 408                              struct rtnl_link_stats64 *stats);
 409 void bnad_netdev_hwstats_fill(struct bnad *bnad,
 410                               struct rtnl_link_stats64 *stats);
 411
 412 /* Debugfs */
 413 void bnad_debugfs_init(struct bnad *bnad);
 414 void bnad_debugfs_uninit(struct bnad *bnad);
 415
 416 /* MACROS */
 417 /* To set & get the stats counters */
 418 #define BNAD_UPDATE_CTR(_bnad, _ctr)                            \
 419                                 (((_bnad)->stats.drv_stats._ctr)++)
 420
 421 #define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr)
 422
 423 #define bnad_enable_rx_irq_unsafe(_ccb)                 \
 424 {                                                       \
 425         if (likely(test_bit(BNAD_RXQ_STARTED, &(_ccb)->rcb[0]->flags))) {\
 426                 bna_ib_coalescing_timer_set((_ccb)->i_dbell,    \
 427                         (_ccb)->rx_coalescing_timeo);           \
 428                 bna_ib_ack((_ccb)->i_dbell, 0);                 \
 429         }                                                       \
 430 }
 431
 432 #endif /* __BNAD_H__ */