2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/seq_file.h>
36 #include <linux/debugfs.h>
37 #include <linux/string_helpers.h>
38 #include <linux/sort.h>
39 #include <linux/ctype.h>
44 #include "cxgb4_debugfs.h"
48 /* generic seq_file support for showing a table of size rows x width. */
49 static void *seq_tab_get_idx(struct seq_tab
*tb
, loff_t pos
)
51 pos
-= tb
->skip_first
;
52 return pos
>= tb
->rows
? NULL
: &tb
->data
[pos
* tb
->width
];
55 static void *seq_tab_start(struct seq_file
*seq
, loff_t
*pos
)
57 struct seq_tab
*tb
= seq
->private;
59 if (tb
->skip_first
&& *pos
== 0)
60 return SEQ_START_TOKEN
;
62 return seq_tab_get_idx(tb
, *pos
);
65 static void *seq_tab_next(struct seq_file
*seq
, void *v
, loff_t
*pos
)
67 v
= seq_tab_get_idx(seq
->private, *pos
+ 1);
73 static void seq_tab_stop(struct seq_file
*seq
, void *v
)
77 static int seq_tab_show(struct seq_file
*seq
, void *v
)
79 const struct seq_tab
*tb
= seq
->private;
81 return tb
->show(seq
, v
, ((char *)v
- tb
->data
) / tb
->width
);
84 static const struct seq_operations seq_tab_ops
= {
85 .start
= seq_tab_start
,
91 struct seq_tab
*seq_open_tab(struct file
*f
, unsigned int rows
,
92 unsigned int width
, unsigned int have_header
,
93 int (*show
)(struct seq_file
*seq
, void *v
, int i
))
97 p
= __seq_open_private(f
, &seq_tab_ops
, sizeof(*p
) + rows
* width
);
102 p
->skip_first
= have_header
!= 0;
107 /* Trim the size of a seq_tab to the supplied number of rows. The operation is
110 static int seq_tab_trim(struct seq_tab
*p
, unsigned int new_rows
)
112 if (new_rows
> p
->rows
)
118 static int cim_la_show(struct seq_file
*seq
, void *v
, int idx
)
120 if (v
== SEQ_START_TOKEN
)
121 seq_puts(seq
, "Status Data PC LS0Stat LS0Addr "
127 " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
128 (p
[0] >> 4) & 0xff, p
[0] & 0xf, p
[1] >> 4,
129 p
[1] & 0xf, p
[2] >> 4, p
[2] & 0xf, p
[3], p
[4], p
[5],
135 static int cim_la_show_3in1(struct seq_file
*seq
, void *v
, int idx
)
137 if (v
== SEQ_START_TOKEN
) {
138 seq_puts(seq
, "Status Data PC\n");
142 seq_printf(seq
, " %02x %08x %08x\n", p
[5] & 0xff, p
[6],
144 seq_printf(seq
, " %02x %02x%06x %02x%06x\n",
145 (p
[3] >> 8) & 0xff, p
[3] & 0xff, p
[4] >> 8,
146 p
[4] & 0xff, p
[5] >> 8);
147 seq_printf(seq
, " %02x %x%07x %x%07x\n", (p
[0] >> 4) & 0xff,
148 p
[0] & 0xf, p
[1] >> 4, p
[1] & 0xf, p
[2] >> 4);
153 static int cim_la_open(struct inode
*inode
, struct file
*file
)
158 struct adapter
*adap
= inode
->i_private
;
160 ret
= t4_cim_read(adap
, UP_UP_DBG_LA_CFG_A
, 1, &cfg
);
164 p
= seq_open_tab(file
, adap
->params
.cim_la_size
/ 8, 8 * sizeof(u32
), 1,
165 cfg
& UPDBGLACAPTPCONLY_F
?
166 cim_la_show_3in1
: cim_la_show
);
170 ret
= t4_cim_read_la(adap
, (u32
*)p
->data
, NULL
);
172 seq_release_private(inode
, file
);
176 static const struct file_operations cim_la_fops
= {
177 .owner
= THIS_MODULE
,
181 .release
= seq_release_private
184 static int cim_qcfg_show(struct seq_file
*seq
, void *v
)
186 static const char * const qname
[] = {
187 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
188 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
193 struct adapter
*adap
= seq
->private;
194 u16 base
[CIM_NUM_IBQ
+ CIM_NUM_OBQ_T5
];
195 u16 size
[CIM_NUM_IBQ
+ CIM_NUM_OBQ_T5
];
196 u32 stat
[(4 * (CIM_NUM_IBQ
+ CIM_NUM_OBQ_T5
))];
197 u16 thres
[CIM_NUM_IBQ
];
198 u32 obq_wr_t4
[2 * CIM_NUM_OBQ
], *wr
;
199 u32 obq_wr_t5
[2 * CIM_NUM_OBQ_T5
];
201 int cim_num_obq
= is_t4(adap
->params
.chip
) ?
202 CIM_NUM_OBQ
: CIM_NUM_OBQ_T5
;
204 i
= t4_cim_read(adap
, is_t4(adap
->params
.chip
) ? UP_IBQ_0_RDADDR_A
:
205 UP_IBQ_0_SHADOW_RDADDR_A
,
206 ARRAY_SIZE(stat
), stat
);
208 if (is_t4(adap
->params
.chip
)) {
209 i
= t4_cim_read(adap
, UP_OBQ_0_REALADDR_A
,
210 ARRAY_SIZE(obq_wr_t4
), obq_wr_t4
);
213 i
= t4_cim_read(adap
, UP_OBQ_0_SHADOW_REALADDR_A
,
214 ARRAY_SIZE(obq_wr_t5
), obq_wr_t5
);
221 t4_read_cimq_cfg(adap
, base
, size
, thres
);
224 " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
225 for (i
= 0; i
< CIM_NUM_IBQ
; i
++, p
+= 4)
226 seq_printf(seq
, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
227 qname
[i
], base
[i
], size
[i
], thres
[i
],
228 IBQRDADDR_G(p
[0]), IBQWRADDR_G(p
[1]),
229 QUESOPCNT_G(p
[3]), QUEEOPCNT_G(p
[3]),
230 QUEREMFLITS_G(p
[2]) * 16);
231 for ( ; i
< CIM_NUM_IBQ
+ cim_num_obq
; i
++, p
+= 4, wr
+= 2)
232 seq_printf(seq
, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
233 qname
[i
], base
[i
], size
[i
],
234 QUERDADDR_G(p
[0]) & 0x3fff, wr
[0] - base
[i
],
235 QUESOPCNT_G(p
[3]), QUEEOPCNT_G(p
[3]),
236 QUEREMFLITS_G(p
[2]) * 16);
240 static int cim_qcfg_open(struct inode
*inode
, struct file
*file
)
242 return single_open(file
, cim_qcfg_show
, inode
->i_private
);
245 static const struct file_operations cim_qcfg_fops
= {
246 .owner
= THIS_MODULE
,
247 .open
= cim_qcfg_open
,
250 .release
= single_release
,
253 static int cimq_show(struct seq_file
*seq
, void *v
, int idx
)
257 seq_printf(seq
, "%#06x: %08x %08x %08x %08x\n", idx
* 16, p
[0], p
[1],
262 static int cim_ibq_open(struct inode
*inode
, struct file
*file
)
266 unsigned int qid
= (uintptr_t)inode
->i_private
& 7;
267 struct adapter
*adap
= inode
->i_private
- qid
;
269 p
= seq_open_tab(file
, CIM_IBQ_SIZE
, 4 * sizeof(u32
), 0, cimq_show
);
273 ret
= t4_read_cim_ibq(adap
, qid
, (u32
*)p
->data
, CIM_IBQ_SIZE
* 4);
275 seq_release_private(inode
, file
);
281 static const struct file_operations cim_ibq_fops
= {
282 .owner
= THIS_MODULE
,
283 .open
= cim_ibq_open
,
286 .release
= seq_release_private
289 static int cim_obq_open(struct inode
*inode
, struct file
*file
)
293 unsigned int qid
= (uintptr_t)inode
->i_private
& 7;
294 struct adapter
*adap
= inode
->i_private
- qid
;
296 p
= seq_open_tab(file
, 6 * CIM_OBQ_SIZE
, 4 * sizeof(u32
), 0, cimq_show
);
300 ret
= t4_read_cim_obq(adap
, qid
, (u32
*)p
->data
, 6 * CIM_OBQ_SIZE
* 4);
302 seq_release_private(inode
, file
);
304 seq_tab_trim(p
, ret
/ 4);
310 static const struct file_operations cim_obq_fops
= {
311 .owner
= THIS_MODULE
,
312 .open
= cim_obq_open
,
315 .release
= seq_release_private
318 /* Show the PM memory stats. These stats include:
321 * Read: memory read operation
322 * Write Bypass: cut-through
323 * Bypass + mem: cut-through and save copy
327 * Write Bypass: cut-through
328 * Flush: payload trim or drop
330 static int pm_stats_show(struct seq_file
*seq
, void *v
)
332 static const char * const tx_pm_stats
[] = {
333 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
335 static const char * const rx_pm_stats
[] = {
336 "Read:", "Write bypass:", "Write mem:", "Flush:"
340 u32 tx_cnt
[PM_NSTATS
], rx_cnt
[PM_NSTATS
];
341 u64 tx_cyc
[PM_NSTATS
], rx_cyc
[PM_NSTATS
];
342 struct adapter
*adap
= seq
->private;
344 t4_pmtx_get_stats(adap
, tx_cnt
, tx_cyc
);
345 t4_pmrx_get_stats(adap
, rx_cnt
, rx_cyc
);
347 seq_printf(seq
, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
348 for (i
= 0; i
< PM_NSTATS
- 1; i
++)
349 seq_printf(seq
, "%-13s %10u %20llu\n",
350 tx_pm_stats
[i
], tx_cnt
[i
], tx_cyc
[i
]);
352 seq_printf(seq
, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
353 for (i
= 0; i
< PM_NSTATS
- 1; i
++)
354 seq_printf(seq
, "%-13s %10u %20llu\n",
355 rx_pm_stats
[i
], rx_cnt
[i
], rx_cyc
[i
]);
359 static int pm_stats_open(struct inode
*inode
, struct file
*file
)
361 return single_open(file
, pm_stats_show
, inode
->i_private
);
364 static ssize_t
pm_stats_clear(struct file
*file
, const char __user
*buf
,
365 size_t count
, loff_t
*pos
)
367 struct adapter
*adap
= FILE_DATA(file
)->i_private
;
369 t4_write_reg(adap
, PM_RX_STAT_CONFIG_A
, 0);
370 t4_write_reg(adap
, PM_TX_STAT_CONFIG_A
, 0);
374 static const struct file_operations pm_stats_debugfs_fops
= {
375 .owner
= THIS_MODULE
,
376 .open
= pm_stats_open
,
379 .release
= single_release
,
380 .write
= pm_stats_clear
383 /* Firmware Device Log dump. */
384 static const char * const devlog_level_strings
[] = {
385 [FW_DEVLOG_LEVEL_EMERG
] = "EMERG",
386 [FW_DEVLOG_LEVEL_CRIT
] = "CRIT",
387 [FW_DEVLOG_LEVEL_ERR
] = "ERR",
388 [FW_DEVLOG_LEVEL_NOTICE
] = "NOTICE",
389 [FW_DEVLOG_LEVEL_INFO
] = "INFO",
390 [FW_DEVLOG_LEVEL_DEBUG
] = "DEBUG"
393 static const char * const devlog_facility_strings
[] = {
394 [FW_DEVLOG_FACILITY_CORE
] = "CORE",
395 [FW_DEVLOG_FACILITY_SCHED
] = "SCHED",
396 [FW_DEVLOG_FACILITY_TIMER
] = "TIMER",
397 [FW_DEVLOG_FACILITY_RES
] = "RES",
398 [FW_DEVLOG_FACILITY_HW
] = "HW",
399 [FW_DEVLOG_FACILITY_FLR
] = "FLR",
400 [FW_DEVLOG_FACILITY_DMAQ
] = "DMAQ",
401 [FW_DEVLOG_FACILITY_PHY
] = "PHY",
402 [FW_DEVLOG_FACILITY_MAC
] = "MAC",
403 [FW_DEVLOG_FACILITY_PORT
] = "PORT",
404 [FW_DEVLOG_FACILITY_VI
] = "VI",
405 [FW_DEVLOG_FACILITY_FILTER
] = "FILTER",
406 [FW_DEVLOG_FACILITY_ACL
] = "ACL",
407 [FW_DEVLOG_FACILITY_TM
] = "TM",
408 [FW_DEVLOG_FACILITY_QFC
] = "QFC",
409 [FW_DEVLOG_FACILITY_DCB
] = "DCB",
410 [FW_DEVLOG_FACILITY_ETH
] = "ETH",
411 [FW_DEVLOG_FACILITY_OFLD
] = "OFLD",
412 [FW_DEVLOG_FACILITY_RI
] = "RI",
413 [FW_DEVLOG_FACILITY_ISCSI
] = "ISCSI",
414 [FW_DEVLOG_FACILITY_FCOE
] = "FCOE",
415 [FW_DEVLOG_FACILITY_FOISCSI
] = "FOISCSI",
416 [FW_DEVLOG_FACILITY_FOFCOE
] = "FOFCOE"
419 /* Information gathered by Device Log Open routine for the display routine.
422 unsigned int nentries
; /* number of entries in log[] */
423 unsigned int first
; /* first [temporal] entry in log[] */
424 struct fw_devlog_e log
[0]; /* Firmware Device Log */
427 /* Dump a Firmaware Device Log entry.
429 static int devlog_show(struct seq_file
*seq
, void *v
)
431 if (v
== SEQ_START_TOKEN
)
432 seq_printf(seq
, "%10s %15s %8s %8s %s\n",
433 "Seq#", "Tstamp", "Level", "Facility", "Message");
435 struct devlog_info
*dinfo
= seq
->private;
436 int fidx
= (uintptr_t)v
- 2;
438 struct fw_devlog_e
*e
;
440 /* Get a pointer to the log entry to display. Skip unused log
443 index
= dinfo
->first
+ fidx
;
444 if (index
>= dinfo
->nentries
)
445 index
-= dinfo
->nentries
;
446 e
= &dinfo
->log
[index
];
447 if (e
->timestamp
== 0)
450 /* Print the message. This depends on the firmware using
451 * exactly the same formating strings as the kernel so we may
452 * eventually have to put a format interpreter in here ...
454 seq_printf(seq
, "%10d %15llu %8s %8s ",
455 e
->seqno
, e
->timestamp
,
456 (e
->level
< ARRAY_SIZE(devlog_level_strings
)
457 ? devlog_level_strings
[e
->level
]
459 (e
->facility
< ARRAY_SIZE(devlog_facility_strings
)
460 ? devlog_facility_strings
[e
->facility
]
462 seq_printf(seq
, e
->fmt
, e
->params
[0], e
->params
[1],
463 e
->params
[2], e
->params
[3], e
->params
[4],
464 e
->params
[5], e
->params
[6], e
->params
[7]);
469 /* Sequential File Operations for Device Log.
471 static inline void *devlog_get_idx(struct devlog_info
*dinfo
, loff_t pos
)
473 if (pos
> dinfo
->nentries
)
476 return (void *)(uintptr_t)(pos
+ 1);
479 static void *devlog_start(struct seq_file
*seq
, loff_t
*pos
)
481 struct devlog_info
*dinfo
= seq
->private;
484 ? devlog_get_idx(dinfo
, *pos
)
488 static void *devlog_next(struct seq_file
*seq
, void *v
, loff_t
*pos
)
490 struct devlog_info
*dinfo
= seq
->private;
493 return devlog_get_idx(dinfo
, *pos
);
496 static void devlog_stop(struct seq_file
*seq
, void *v
)
500 static const struct seq_operations devlog_seq_ops
= {
501 .start
= devlog_start
,
507 /* Set up for reading the firmware's device log. We read the entire log here
508 * and then display it incrementally in devlog_show().
510 static int devlog_open(struct inode
*inode
, struct file
*file
)
512 struct adapter
*adap
= inode
->i_private
;
513 struct devlog_params
*dparams
= &adap
->params
.devlog
;
514 struct devlog_info
*dinfo
;
519 /* If we don't know where the log is we can't do anything.
521 if (dparams
->start
== 0)
524 /* Allocate the space to read in the firmware's device log and set up
525 * for the iterated call to our display function.
527 dinfo
= __seq_open_private(file
, &devlog_seq_ops
,
528 sizeof(*dinfo
) + dparams
->size
);
532 /* Record the basic log buffer information and read in the raw log.
534 dinfo
->nentries
= (dparams
->size
/ sizeof(struct fw_devlog_e
));
536 spin_lock(&adap
->win0_lock
);
537 ret
= t4_memory_rw(adap
, adap
->params
.drv_memwin
, dparams
->memtype
,
538 dparams
->start
, dparams
->size
, (__be32
*)dinfo
->log
,
540 spin_unlock(&adap
->win0_lock
);
542 seq_release_private(inode
, file
);
546 /* Translate log multi-byte integral elements into host native format
547 * and determine where the first entry in the log is.
549 for (fseqno
= ~((u32
)0), index
= 0; index
< dinfo
->nentries
; index
++) {
550 struct fw_devlog_e
*e
= &dinfo
->log
[index
];
554 if (e
->timestamp
== 0)
557 e
->timestamp
= (__force __be64
)be64_to_cpu(e
->timestamp
);
558 seqno
= be32_to_cpu(e
->seqno
);
559 for (i
= 0; i
< 8; i
++)
561 (__force __be32
)be32_to_cpu(e
->params
[i
]);
563 if (seqno
< fseqno
) {
565 dinfo
->first
= index
;
571 static const struct file_operations devlog_fops
= {
572 .owner
= THIS_MODULE
,
576 .release
= seq_release_private
579 static ssize_t
flash_read(struct file
*file
, char __user
*buf
, size_t count
,
583 loff_t avail
= FILE_DATA(file
)->i_size
;
584 struct adapter
*adap
= file
->private_data
;
590 if (count
> avail
- pos
)
599 len
= min(count
+ ofst
, sizeof(data
));
600 ret
= t4_read_flash(adap
, pos
- ofst
, (len
+ 3) / 4,
606 if (copy_to_user(buf
, data
+ ofst
, len
))
618 static const struct file_operations flash_debugfs_fops
= {
619 .owner
= THIS_MODULE
,
624 static inline void tcamxy2valmask(u64 x
, u64 y
, u8
*addr
, u64
*mask
)
627 y
= (__force u64
)cpu_to_be64(y
);
628 memcpy(addr
, (char *)&y
+ 2, ETH_ALEN
);
631 static int mps_tcam_show(struct seq_file
*seq
, void *v
)
633 if (v
== SEQ_START_TOKEN
)
634 seq_puts(seq
, "Idx Ethernet address Mask Vld Ports PF"
640 struct adapter
*adap
= seq
->private;
641 unsigned int idx
= (uintptr_t)v
- 2;
642 u64 tcamy
= t4_read_reg64(adap
, MPS_CLS_TCAM_Y_L(idx
));
643 u64 tcamx
= t4_read_reg64(adap
, MPS_CLS_TCAM_X_L(idx
));
644 u32 cls_lo
= t4_read_reg(adap
, MPS_CLS_SRAM_L(idx
));
645 u32 cls_hi
= t4_read_reg(adap
, MPS_CLS_SRAM_H(idx
));
646 u32 rplc
[4] = {0, 0, 0, 0};
649 seq_printf(seq
, "%3u -\n", idx
);
653 if (cls_lo
& REPLICATE_F
) {
654 struct fw_ldst_cmd ldst_cmd
;
657 memset(&ldst_cmd
, 0, sizeof(ldst_cmd
));
658 ldst_cmd
.op_to_addrspace
=
659 htonl(FW_CMD_OP_V(FW_LDST_CMD
) |
662 FW_LDST_CMD_ADDRSPACE_V(
663 FW_LDST_ADDRSPC_MPS
));
664 ldst_cmd
.cycles_to_len16
= htonl(FW_LEN16(ldst_cmd
));
665 ldst_cmd
.u
.mps
.fid_ctl
=
666 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC
) |
667 FW_LDST_CMD_CTL_V(idx
));
668 ret
= t4_wr_mbox(adap
, adap
->mbox
, &ldst_cmd
,
669 sizeof(ldst_cmd
), &ldst_cmd
);
671 dev_warn(adap
->pdev_dev
, "Can't read MPS "
672 "replication map for idx %d: %d\n",
675 rplc
[0] = ntohl(ldst_cmd
.u
.mps
.rplc31_0
);
676 rplc
[1] = ntohl(ldst_cmd
.u
.mps
.rplc63_32
);
677 rplc
[2] = ntohl(ldst_cmd
.u
.mps
.rplc95_64
);
678 rplc
[3] = ntohl(ldst_cmd
.u
.mps
.rplc127_96
);
682 tcamxy2valmask(tcamx
, tcamy
, addr
, &mask
);
683 seq_printf(seq
, "%3u %02x:%02x:%02x:%02x:%02x:%02x %012llx"
685 idx
, addr
[0], addr
[1], addr
[2], addr
[3], addr
[4],
686 addr
[5], (unsigned long long)mask
,
687 (cls_lo
& SRAM_VLD_F
) ? 'Y' : 'N', PORTMAP_G(cls_hi
),
689 (cls_lo
& VF_VALID_F
) ? VF_G(cls_lo
) : -1);
690 if (cls_lo
& REPLICATE_F
)
691 seq_printf(seq
, " %08x %08x %08x %08x",
692 rplc
[3], rplc
[2], rplc
[1], rplc
[0]);
694 seq_printf(seq
, "%36c", ' ');
695 seq_printf(seq
, "%4u%3u%3u%3u %#x\n",
696 SRAM_PRIO0_G(cls_lo
), SRAM_PRIO1_G(cls_lo
),
697 SRAM_PRIO2_G(cls_lo
), SRAM_PRIO3_G(cls_lo
),
698 (cls_lo
>> MULTILISTEN0_S
) & 0xf);
703 static inline void *mps_tcam_get_idx(struct seq_file
*seq
, loff_t pos
)
705 struct adapter
*adap
= seq
->private;
706 int max_mac_addr
= is_t4(adap
->params
.chip
) ?
707 NUM_MPS_CLS_SRAM_L_INSTANCES
:
708 NUM_MPS_T5_CLS_SRAM_L_INSTANCES
;
709 return ((pos
<= max_mac_addr
) ? (void *)(uintptr_t)(pos
+ 1) : NULL
);
712 static void *mps_tcam_start(struct seq_file
*seq
, loff_t
*pos
)
714 return *pos
? mps_tcam_get_idx(seq
, *pos
) : SEQ_START_TOKEN
;
717 static void *mps_tcam_next(struct seq_file
*seq
, void *v
, loff_t
*pos
)
720 return mps_tcam_get_idx(seq
, *pos
);
723 static void mps_tcam_stop(struct seq_file
*seq
, void *v
)
727 static const struct seq_operations mps_tcam_seq_ops
= {
728 .start
= mps_tcam_start
,
729 .next
= mps_tcam_next
,
730 .stop
= mps_tcam_stop
,
731 .show
= mps_tcam_show
734 static int mps_tcam_open(struct inode
*inode
, struct file
*file
)
736 int res
= seq_open(file
, &mps_tcam_seq_ops
);
739 struct seq_file
*seq
= file
->private_data
;
741 seq
->private = inode
->i_private
;
746 static const struct file_operations mps_tcam_debugfs_fops
= {
747 .owner
= THIS_MODULE
,
748 .open
= mps_tcam_open
,
751 .release
= seq_release
,
754 #if IS_ENABLED(CONFIG_IPV6)
755 static int clip_tbl_open(struct inode
*inode
, struct file
*file
)
757 return single_open(file
, clip_tbl_show
, PDE_DATA(inode
));
760 static const struct file_operations clip_tbl_debugfs_fops
= {
761 .owner
= THIS_MODULE
,
762 .open
= clip_tbl_open
,
765 .release
= single_release
772 static int rss_show(struct seq_file
*seq
, void *v
, int idx
)
776 seq_printf(seq
, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
777 idx
* 8, entry
[0], entry
[1], entry
[2], entry
[3], entry
[4],
778 entry
[5], entry
[6], entry
[7]);
782 static int rss_open(struct inode
*inode
, struct file
*file
)
786 struct adapter
*adap
= inode
->i_private
;
788 p
= seq_open_tab(file
, RSS_NENTRIES
/ 8, 8 * sizeof(u16
), 0, rss_show
);
792 ret
= t4_read_rss(adap
, (u16
*)p
->data
);
794 seq_release_private(inode
, file
);
799 static const struct file_operations rss_debugfs_fops
= {
800 .owner
= THIS_MODULE
,
804 .release
= seq_release_private
807 /* RSS Configuration.
810 /* Small utility function to return the strings "yes" or "no" if the supplied
811 * argument is non-zero.
813 static const char *yesno(int x
)
815 static const char *yes
= "yes";
816 static const char *no
= "no";
821 static int rss_config_show(struct seq_file
*seq
, void *v
)
823 struct adapter
*adapter
= seq
->private;
824 static const char * const keymode
[] = {
826 "global and per-VF scramble",
827 "per-PF and per-VF scramble",
828 "per-VF and per-VF scramble",
832 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_A
);
833 seq_printf(seq
, "TP_RSS_CONFIG: %#x\n", rssconf
);
834 seq_printf(seq
, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf
&
836 seq_printf(seq
, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf
&
838 seq_printf(seq
, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf
&
840 seq_printf(seq
, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf
&
842 seq_printf(seq
, " TnlTcpSel: %3s\n", yesno(rssconf
& TNLTCPSEL_F
));
843 seq_printf(seq
, " TnlIp6Sel: %3s\n", yesno(rssconf
& TNLIP6SEL_F
));
844 seq_printf(seq
, " TnlVrtSel: %3s\n", yesno(rssconf
& TNLVRTSEL_F
));
845 seq_printf(seq
, " TnlMapEn: %3s\n", yesno(rssconf
& TNLMAPEN_F
));
846 seq_printf(seq
, " OfdHashSave: %3s\n", yesno(rssconf
&
848 seq_printf(seq
, " OfdVrtSel: %3s\n", yesno(rssconf
& OFDVRTSEL_F
));
849 seq_printf(seq
, " OfdMapEn: %3s\n", yesno(rssconf
& OFDMAPEN_F
));
850 seq_printf(seq
, " OfdLkpEn: %3s\n", yesno(rssconf
& OFDLKPEN_F
));
851 seq_printf(seq
, " Syn4TupEnIpv6: %3s\n", yesno(rssconf
&
853 seq_printf(seq
, " Syn2TupEnIpv6: %3s\n", yesno(rssconf
&
855 seq_printf(seq
, " Syn4TupEnIpv4: %3s\n", yesno(rssconf
&
857 seq_printf(seq
, " Syn2TupEnIpv4: %3s\n", yesno(rssconf
&
859 seq_printf(seq
, " Syn4TupEnIpv6: %3s\n", yesno(rssconf
&
861 seq_printf(seq
, " SynIp6Sel: %3s\n", yesno(rssconf
& SYNIP6SEL_F
));
862 seq_printf(seq
, " SynVrt6Sel: %3s\n", yesno(rssconf
& SYNVRTSEL_F
));
863 seq_printf(seq
, " SynMapEn: %3s\n", yesno(rssconf
& SYNMAPEN_F
));
864 seq_printf(seq
, " SynLkpEn: %3s\n", yesno(rssconf
& SYNLKPEN_F
));
865 seq_printf(seq
, " ChnEn: %3s\n", yesno(rssconf
&
867 seq_printf(seq
, " PrtEn: %3s\n", yesno(rssconf
&
869 seq_printf(seq
, " TnlAllLkp: %3s\n", yesno(rssconf
&
871 seq_printf(seq
, " VrtEn: %3s\n", yesno(rssconf
&
873 seq_printf(seq
, " CngEn: %3s\n", yesno(rssconf
&
874 CONGESTIONENABLE_F
));
875 seq_printf(seq
, " HashToeplitz: %3s\n", yesno(rssconf
&
877 seq_printf(seq
, " Udp4En: %3s\n", yesno(rssconf
& UDPENABLE_F
));
878 seq_printf(seq
, " Disable: %3s\n", yesno(rssconf
& DISABLE_F
));
882 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_TNL_A
);
883 seq_printf(seq
, "TP_RSS_CONFIG_TNL: %#x\n", rssconf
);
884 seq_printf(seq
, " MaskSize: %3d\n", MASKSIZE_G(rssconf
));
885 seq_printf(seq
, " MaskFilter: %3d\n", MASKFILTER_G(rssconf
));
886 if (CHELSIO_CHIP_VERSION(adapter
->params
.chip
) > CHELSIO_T5
) {
887 seq_printf(seq
, " HashAll: %3s\n",
888 yesno(rssconf
& HASHALL_F
));
889 seq_printf(seq
, " HashEth: %3s\n",
890 yesno(rssconf
& HASHETH_F
));
892 seq_printf(seq
, " UseWireCh: %3s\n", yesno(rssconf
& USEWIRECH_F
));
896 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_OFD_A
);
897 seq_printf(seq
, "TP_RSS_CONFIG_OFD: %#x\n", rssconf
);
898 seq_printf(seq
, " MaskSize: %3d\n", MASKSIZE_G(rssconf
));
899 seq_printf(seq
, " RRCplMapEn: %3s\n", yesno(rssconf
&
901 seq_printf(seq
, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf
));
905 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_SYN_A
);
906 seq_printf(seq
, "TP_RSS_CONFIG_SYN: %#x\n", rssconf
);
907 seq_printf(seq
, " MaskSize: %3d\n", MASKSIZE_G(rssconf
));
908 seq_printf(seq
, " UseWireCh: %3s\n", yesno(rssconf
& USEWIRECH_F
));
912 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_VRT_A
);
913 seq_printf(seq
, "TP_RSS_CONFIG_VRT: %#x\n", rssconf
);
914 if (CHELSIO_CHIP_VERSION(adapter
->params
.chip
) > CHELSIO_T5
) {
915 seq_printf(seq
, " KeyWrAddrX: %3d\n",
916 KEYWRADDRX_G(rssconf
));
917 seq_printf(seq
, " KeyExtend: %3s\n",
918 yesno(rssconf
& KEYEXTEND_F
));
920 seq_printf(seq
, " VfRdRg: %3s\n", yesno(rssconf
& VFRDRG_F
));
921 seq_printf(seq
, " VfRdEn: %3s\n", yesno(rssconf
& VFRDEN_F
));
922 seq_printf(seq
, " VfPerrEn: %3s\n", yesno(rssconf
& VFPERREN_F
));
923 seq_printf(seq
, " KeyPerrEn: %3s\n", yesno(rssconf
& KEYPERREN_F
));
924 seq_printf(seq
, " DisVfVlan: %3s\n", yesno(rssconf
&
926 seq_printf(seq
, " EnUpSwt: %3s\n", yesno(rssconf
& ENABLEUP0_F
));
927 seq_printf(seq
, " HashDelay: %3d\n", HASHDELAY_G(rssconf
));
928 if (CHELSIO_CHIP_VERSION(adapter
->params
.chip
) <= CHELSIO_T5
)
929 seq_printf(seq
, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf
));
930 seq_printf(seq
, " KeyMode: %s\n", keymode
[KEYMODE_G(rssconf
)]);
931 seq_printf(seq
, " VfWrEn: %3s\n", yesno(rssconf
& VFWREN_F
));
932 seq_printf(seq
, " KeyWrEn: %3s\n", yesno(rssconf
& KEYWREN_F
));
933 seq_printf(seq
, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf
));
937 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_CNG_A
);
938 seq_printf(seq
, "TP_RSS_CONFIG_CNG: %#x\n", rssconf
);
939 seq_printf(seq
, " ChnCount3: %3s\n", yesno(rssconf
& CHNCOUNT3_F
));
940 seq_printf(seq
, " ChnCount2: %3s\n", yesno(rssconf
& CHNCOUNT2_F
));
941 seq_printf(seq
, " ChnCount1: %3s\n", yesno(rssconf
& CHNCOUNT1_F
));
942 seq_printf(seq
, " ChnCount0: %3s\n", yesno(rssconf
& CHNCOUNT0_F
));
943 seq_printf(seq
, " ChnUndFlow3: %3s\n", yesno(rssconf
&
945 seq_printf(seq
, " ChnUndFlow2: %3s\n", yesno(rssconf
&
947 seq_printf(seq
, " ChnUndFlow1: %3s\n", yesno(rssconf
&
949 seq_printf(seq
, " ChnUndFlow0: %3s\n", yesno(rssconf
&
951 seq_printf(seq
, " RstChn3: %3s\n", yesno(rssconf
& RSTCHN3_F
));
952 seq_printf(seq
, " RstChn2: %3s\n", yesno(rssconf
& RSTCHN2_F
));
953 seq_printf(seq
, " RstChn1: %3s\n", yesno(rssconf
& RSTCHN1_F
));
954 seq_printf(seq
, " RstChn0: %3s\n", yesno(rssconf
& RSTCHN0_F
));
955 seq_printf(seq
, " UpdVld: %3s\n", yesno(rssconf
& UPDVLD_F
));
956 seq_printf(seq
, " Xoff: %3s\n", yesno(rssconf
& XOFF_F
));
957 seq_printf(seq
, " UpdChn3: %3s\n", yesno(rssconf
& UPDCHN3_F
));
958 seq_printf(seq
, " UpdChn2: %3s\n", yesno(rssconf
& UPDCHN2_F
));
959 seq_printf(seq
, " UpdChn1: %3s\n", yesno(rssconf
& UPDCHN1_F
));
960 seq_printf(seq
, " UpdChn0: %3s\n", yesno(rssconf
& UPDCHN0_F
));
961 seq_printf(seq
, " Queue: %3d\n", QUEUE_G(rssconf
));
966 DEFINE_SIMPLE_DEBUGFS_FILE(rss_config
);
971 static int rss_key_show(struct seq_file
*seq
, void *v
)
975 t4_read_rss_key(seq
->private, key
);
976 seq_printf(seq
, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
977 key
[9], key
[8], key
[7], key
[6], key
[5], key
[4], key
[3],
978 key
[2], key
[1], key
[0]);
982 static int rss_key_open(struct inode
*inode
, struct file
*file
)
984 return single_open(file
, rss_key_show
, inode
->i_private
);
987 static ssize_t
rss_key_write(struct file
*file
, const char __user
*buf
,
988 size_t count
, loff_t
*pos
)
993 struct adapter
*adap
= FILE_DATA(file
)->i_private
;
995 if (count
> sizeof(s
) - 1)
997 if (copy_from_user(s
, buf
, count
))
999 for (i
= count
; i
> 0 && isspace(s
[i
- 1]); i
--)
1003 for (p
= s
, i
= 9; i
>= 0; i
--) {
1005 for (j
= 0; j
< 8; j
++, p
++) {
1008 key
[i
] = (key
[i
] << 4) | hex2val(*p
);
1012 t4_write_rss_key(adap
, key
, -1);
1016 static const struct file_operations rss_key_debugfs_fops
= {
1017 .owner
= THIS_MODULE
,
1018 .open
= rss_key_open
,
1020 .llseek
= seq_lseek
,
1021 .release
= single_release
,
1022 .write
= rss_key_write
1025 /* PF RSS Configuration.
1028 struct rss_pf_conf
{
1034 static int rss_pf_config_show(struct seq_file
*seq
, void *v
, int idx
)
1036 struct rss_pf_conf
*pfconf
;
1038 if (v
== SEQ_START_TOKEN
) {
1039 /* use the 0th entry to dump the PF Map Index Size */
1040 pfconf
= seq
->private + offsetof(struct seq_tab
, data
);
1041 seq_printf(seq
, "PF Map Index Size = %d\n\n",
1042 LKPIDXSIZE_G(pfconf
->rss_pf_map
));
1044 seq_puts(seq
, " RSS PF VF Hash Tuple Enable Default\n");
1045 seq_puts(seq
, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
1046 seq_puts(seq
, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
1048 #define G_PFnLKPIDX(map, n) \
1049 (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
1050 #define G_PFnMSKSIZE(mask, n) \
1051 (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
1054 seq_printf(seq
, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
1056 yesno(pfconf
->rss_pf_config
& MAPENABLE_F
),
1057 yesno(pfconf
->rss_pf_config
& CHNENABLE_F
),
1058 yesno(pfconf
->rss_pf_config
& PRTENABLE_F
),
1059 G_PFnLKPIDX(pfconf
->rss_pf_map
, idx
),
1060 G_PFnMSKSIZE(pfconf
->rss_pf_mask
, idx
),
1061 IVFWIDTH_G(pfconf
->rss_pf_config
),
1062 yesno(pfconf
->rss_pf_config
& IP6FOURTUPEN_F
),
1063 yesno(pfconf
->rss_pf_config
& IP6TWOTUPEN_F
),
1064 yesno(pfconf
->rss_pf_config
& IP4FOURTUPEN_F
),
1065 yesno(pfconf
->rss_pf_config
& IP4TWOTUPEN_F
),
1066 yesno(pfconf
->rss_pf_config
& UDPFOURTUPEN_F
),
1067 CH1DEFAULTQUEUE_G(pfconf
->rss_pf_config
),
1068 CH0DEFAULTQUEUE_G(pfconf
->rss_pf_config
));
1076 static int rss_pf_config_open(struct inode
*inode
, struct file
*file
)
1078 struct adapter
*adapter
= inode
->i_private
;
1080 u32 rss_pf_map
, rss_pf_mask
;
1081 struct rss_pf_conf
*pfconf
;
1084 p
= seq_open_tab(file
, 8, sizeof(*pfconf
), 1, rss_pf_config_show
);
1088 pfconf
= (struct rss_pf_conf
*)p
->data
;
1089 rss_pf_map
= t4_read_rss_pf_map(adapter
);
1090 rss_pf_mask
= t4_read_rss_pf_mask(adapter
);
1091 for (pf
= 0; pf
< 8; pf
++) {
1092 pfconf
[pf
].rss_pf_map
= rss_pf_map
;
1093 pfconf
[pf
].rss_pf_mask
= rss_pf_mask
;
1094 t4_read_rss_pf_config(adapter
, pf
, &pfconf
[pf
].rss_pf_config
);
1099 static const struct file_operations rss_pf_config_debugfs_fops
= {
1100 .owner
= THIS_MODULE
,
1101 .open
= rss_pf_config_open
,
1103 .llseek
= seq_lseek
,
1104 .release
= seq_release_private
1107 /* VF RSS Configuration.
1110 struct rss_vf_conf
{
1115 static int rss_vf_config_show(struct seq_file
*seq
, void *v
, int idx
)
1117 if (v
== SEQ_START_TOKEN
) {
1118 seq_puts(seq
, " RSS Hash Tuple Enable\n");
1119 seq_puts(seq
, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
1120 seq_puts(seq
, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
1122 struct rss_vf_conf
*vfconf
= v
;
1124 seq_printf(seq
, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
1126 yesno(vfconf
->rss_vf_vfh
& VFCHNEN_F
),
1127 yesno(vfconf
->rss_vf_vfh
& VFPRTEN_F
),
1128 VFLKPIDX_G(vfconf
->rss_vf_vfh
),
1129 yesno(vfconf
->rss_vf_vfh
& VFVLNEX_F
),
1130 yesno(vfconf
->rss_vf_vfh
& VFUPEN_F
),
1131 yesno(vfconf
->rss_vf_vfh
& VFIP4FOURTUPEN_F
),
1132 yesno(vfconf
->rss_vf_vfh
& VFIP6TWOTUPEN_F
),
1133 yesno(vfconf
->rss_vf_vfh
& VFIP4FOURTUPEN_F
),
1134 yesno(vfconf
->rss_vf_vfh
& VFIP4TWOTUPEN_F
),
1135 yesno(vfconf
->rss_vf_vfh
& ENABLEUDPHASH_F
),
1136 DEFAULTQUEUE_G(vfconf
->rss_vf_vfh
),
1137 KEYINDEX_G(vfconf
->rss_vf_vfh
),
1138 vfconf
->rss_vf_vfl
);
1143 static int rss_vf_config_open(struct inode
*inode
, struct file
*file
)
1145 struct adapter
*adapter
= inode
->i_private
;
1147 struct rss_vf_conf
*vfconf
;
1150 p
= seq_open_tab(file
, 128, sizeof(*vfconf
), 1, rss_vf_config_show
);
1154 vfconf
= (struct rss_vf_conf
*)p
->data
;
1155 for (vf
= 0; vf
< 128; vf
++) {
1156 t4_read_rss_vf_config(adapter
, vf
, &vfconf
[vf
].rss_vf_vfl
,
1157 &vfconf
[vf
].rss_vf_vfh
);
1162 static const struct file_operations rss_vf_config_debugfs_fops
= {
1163 .owner
= THIS_MODULE
,
1164 .open
= rss_vf_config_open
,
1166 .llseek
= seq_lseek
,
1167 .release
= seq_release_private
1170 static int sge_qinfo_show(struct seq_file
*seq
, void *v
)
1172 struct adapter
*adap
= seq
->private;
1173 int eth_entries
= DIV_ROUND_UP(adap
->sge
.ethqsets
, 4);
1174 int toe_entries
= DIV_ROUND_UP(adap
->sge
.ofldqsets
, 4);
1175 int rdma_entries
= DIV_ROUND_UP(adap
->sge
.rdmaqs
, 4);
1176 int ciq_entries
= DIV_ROUND_UP(adap
->sge
.rdmaciqs
, 4);
1177 int ctrl_entries
= DIV_ROUND_UP(MAX_CTRL_QUEUES
, 4);
1178 int i
, r
= (uintptr_t)v
- 1;
1179 int toe_idx
= r
- eth_entries
;
1180 int rdma_idx
= toe_idx
- toe_entries
;
1181 int ciq_idx
= rdma_idx
- rdma_entries
;
1182 int ctrl_idx
= ciq_idx
- ciq_entries
;
1183 int fq_idx
= ctrl_idx
- ctrl_entries
;
1186 seq_putc(seq
, '\n');
1188 #define S3(fmt_spec, s, v) \
1190 seq_printf(seq, "%-12s", s); \
1191 for (i = 0; i < n; ++i) \
1192 seq_printf(seq, " %16" fmt_spec, v); \
1193 seq_putc(seq, '\n'); \
1195 #define S(s, v) S3("s", s, v)
1196 #define T(s, v) S3("u", s, tx[i].v)
1197 #define R(s, v) S3("u", s, rx[i].v)
1199 if (r
< eth_entries
) {
1200 int base_qset
= r
* 4;
1201 const struct sge_eth_rxq
*rx
= &adap
->sge
.ethrxq
[base_qset
];
1202 const struct sge_eth_txq
*tx
= &adap
->sge
.ethtxq
[base_qset
];
1203 int n
= min(4, adap
->sge
.ethqsets
- 4 * r
);
1205 S("QType:", "Ethernet");
1207 rx
[i
].rspq
.netdev
? rx
[i
].rspq
.netdev
->name
: "N/A");
1208 T("TxQ ID:", q
.cntxt_id
);
1209 T("TxQ size:", q
.size
);
1210 T("TxQ inuse:", q
.in_use
);
1211 T("TxQ CIDX:", q
.cidx
);
1212 T("TxQ PIDX:", q
.pidx
);
1213 #ifdef CONFIG_CXGB4_DCB
1214 T("DCB Prio:", dcb_prio
);
1215 S3("u", "DCB PGID:",
1216 (ethqset2pinfo(adap
, base_qset
+ i
)->dcb
.pgid
>>
1217 4*(7-tx
[i
].dcb_prio
)) & 0xf);
1219 (ethqset2pinfo(adap
, base_qset
+ i
)->dcb
.pfcen
>>
1220 1*(7-tx
[i
].dcb_prio
)) & 0x1);
1222 R("RspQ ID:", rspq
.abs_id
);
1223 R("RspQ size:", rspq
.size
);
1224 R("RspQE size:", rspq
.iqe_len
);
1225 R("RspQ CIDX:", rspq
.cidx
);
1226 R("RspQ Gen:", rspq
.gen
);
1227 S3("u", "Intr delay:", qtimer_val(adap
, &rx
[i
].rspq
));
1228 S3("u", "Intr pktcnt:",
1229 adap
->sge
.counter_val
[rx
[i
].rspq
.pktcnt_idx
]);
1230 R("FL ID:", fl
.cntxt_id
);
1231 R("FL size:", fl
.size
- 8);
1232 R("FL pend:", fl
.pend_cred
);
1233 R("FL avail:", fl
.avail
);
1234 R("FL PIDX:", fl
.pidx
);
1235 R("FL CIDX:", fl
.cidx
);
1236 } else if (toe_idx
< toe_entries
) {
1237 const struct sge_ofld_rxq
*rx
= &adap
->sge
.ofldrxq
[toe_idx
* 4];
1238 const struct sge_ofld_txq
*tx
= &adap
->sge
.ofldtxq
[toe_idx
* 4];
1239 int n
= min(4, adap
->sge
.ofldqsets
- 4 * toe_idx
);
1242 T("TxQ ID:", q
.cntxt_id
);
1243 T("TxQ size:", q
.size
);
1244 T("TxQ inuse:", q
.in_use
);
1245 T("TxQ CIDX:", q
.cidx
);
1246 T("TxQ PIDX:", q
.pidx
);
1247 R("RspQ ID:", rspq
.abs_id
);
1248 R("RspQ size:", rspq
.size
);
1249 R("RspQE size:", rspq
.iqe_len
);
1250 R("RspQ CIDX:", rspq
.cidx
);
1251 R("RspQ Gen:", rspq
.gen
);
1252 S3("u", "Intr delay:", qtimer_val(adap
, &rx
[i
].rspq
));
1253 S3("u", "Intr pktcnt:",
1254 adap
->sge
.counter_val
[rx
[i
].rspq
.pktcnt_idx
]);
1255 R("FL ID:", fl
.cntxt_id
);
1256 R("FL size:", fl
.size
- 8);
1257 R("FL pend:", fl
.pend_cred
);
1258 R("FL avail:", fl
.avail
);
1259 R("FL PIDX:", fl
.pidx
);
1260 R("FL CIDX:", fl
.cidx
);
1261 } else if (rdma_idx
< rdma_entries
) {
1262 const struct sge_ofld_rxq
*rx
=
1263 &adap
->sge
.rdmarxq
[rdma_idx
* 4];
1264 int n
= min(4, adap
->sge
.rdmaqs
- 4 * rdma_idx
);
1266 S("QType:", "RDMA-CPL");
1267 R("RspQ ID:", rspq
.abs_id
);
1268 R("RspQ size:", rspq
.size
);
1269 R("RspQE size:", rspq
.iqe_len
);
1270 R("RspQ CIDX:", rspq
.cidx
);
1271 R("RspQ Gen:", rspq
.gen
);
1272 S3("u", "Intr delay:", qtimer_val(adap
, &rx
[i
].rspq
));
1273 S3("u", "Intr pktcnt:",
1274 adap
->sge
.counter_val
[rx
[i
].rspq
.pktcnt_idx
]);
1275 R("FL ID:", fl
.cntxt_id
);
1276 R("FL size:", fl
.size
- 8);
1277 R("FL pend:", fl
.pend_cred
);
1278 R("FL avail:", fl
.avail
);
1279 R("FL PIDX:", fl
.pidx
);
1280 R("FL CIDX:", fl
.cidx
);
1281 } else if (ciq_idx
< ciq_entries
) {
1282 const struct sge_ofld_rxq
*rx
= &adap
->sge
.rdmaciq
[ciq_idx
* 4];
1283 int n
= min(4, adap
->sge
.rdmaciqs
- 4 * ciq_idx
);
1285 S("QType:", "RDMA-CIQ");
1286 R("RspQ ID:", rspq
.abs_id
);
1287 R("RspQ size:", rspq
.size
);
1288 R("RspQE size:", rspq
.iqe_len
);
1289 R("RspQ CIDX:", rspq
.cidx
);
1290 R("RspQ Gen:", rspq
.gen
);
1291 S3("u", "Intr delay:", qtimer_val(adap
, &rx
[i
].rspq
));
1292 S3("u", "Intr pktcnt:",
1293 adap
->sge
.counter_val
[rx
[i
].rspq
.pktcnt_idx
]);
1294 } else if (ctrl_idx
< ctrl_entries
) {
1295 const struct sge_ctrl_txq
*tx
= &adap
->sge
.ctrlq
[ctrl_idx
* 4];
1296 int n
= min(4, adap
->params
.nports
- 4 * ctrl_idx
);
1298 S("QType:", "Control");
1299 T("TxQ ID:", q
.cntxt_id
);
1300 T("TxQ size:", q
.size
);
1301 T("TxQ inuse:", q
.in_use
);
1302 T("TxQ CIDX:", q
.cidx
);
1303 T("TxQ PIDX:", q
.pidx
);
1304 } else if (fq_idx
== 0) {
1305 const struct sge_rspq
*evtq
= &adap
->sge
.fw_evtq
;
1307 seq_printf(seq
, "%-12s %16s\n", "QType:", "FW event queue");
1308 seq_printf(seq
, "%-12s %16u\n", "RspQ ID:", evtq
->abs_id
);
1309 seq_printf(seq
, "%-12s %16u\n", "RspQ size:", evtq
->size
);
1310 seq_printf(seq
, "%-12s %16u\n", "RspQE size:", evtq
->iqe_len
);
1311 seq_printf(seq
, "%-12s %16u\n", "RspQ CIDX:", evtq
->cidx
);
1312 seq_printf(seq
, "%-12s %16u\n", "RspQ Gen:", evtq
->gen
);
1313 seq_printf(seq
, "%-12s %16u\n", "Intr delay:",
1314 qtimer_val(adap
, evtq
));
1315 seq_printf(seq
, "%-12s %16u\n", "Intr pktcnt:",
1316 adap
->sge
.counter_val
[evtq
->pktcnt_idx
]);
1325 static int sge_queue_entries(const struct adapter
*adap
)
1327 return DIV_ROUND_UP(adap
->sge
.ethqsets
, 4) +
1328 DIV_ROUND_UP(adap
->sge
.ofldqsets
, 4) +
1329 DIV_ROUND_UP(adap
->sge
.rdmaqs
, 4) +
1330 DIV_ROUND_UP(adap
->sge
.rdmaciqs
, 4) +
1331 DIV_ROUND_UP(MAX_CTRL_QUEUES
, 4) + 1;
1334 static void *sge_queue_start(struct seq_file
*seq
, loff_t
*pos
)
1336 int entries
= sge_queue_entries(seq
->private);
1338 return *pos
< entries
? (void *)((uintptr_t)*pos
+ 1) : NULL
;
1341 static void sge_queue_stop(struct seq_file
*seq
, void *v
)
1345 static void *sge_queue_next(struct seq_file
*seq
, void *v
, loff_t
*pos
)
1347 int entries
= sge_queue_entries(seq
->private);
1350 return *pos
< entries
? (void *)((uintptr_t)*pos
+ 1) : NULL
;
1353 static const struct seq_operations sge_qinfo_seq_ops
= {
1354 .start
= sge_queue_start
,
1355 .next
= sge_queue_next
,
1356 .stop
= sge_queue_stop
,
1357 .show
= sge_qinfo_show
1360 static int sge_qinfo_open(struct inode
*inode
, struct file
*file
)
1362 int res
= seq_open(file
, &sge_qinfo_seq_ops
);
1365 struct seq_file
*seq
= file
->private_data
;
1367 seq
->private = inode
->i_private
;
1372 static const struct file_operations sge_qinfo_debugfs_fops
= {
1373 .owner
= THIS_MODULE
,
1374 .open
= sge_qinfo_open
,
1376 .llseek
= seq_lseek
,
1377 .release
= seq_release
,
1380 int mem_open(struct inode
*inode
, struct file
*file
)
1383 struct adapter
*adap
;
1385 file
->private_data
= inode
->i_private
;
1387 mem
= (uintptr_t)file
->private_data
& 0x3;
1388 adap
= file
->private_data
- mem
;
1390 (void)t4_fwcache(adap
, FW_PARAM_DEV_FWCACHE_FLUSH
);
1395 static ssize_t
mem_read(struct file
*file
, char __user
*buf
, size_t count
,
1399 loff_t avail
= file_inode(file
)->i_size
;
1400 unsigned int mem
= (uintptr_t)file
->private_data
& 3;
1401 struct adapter
*adap
= file
->private_data
- mem
;
1409 if (count
> avail
- pos
)
1410 count
= avail
- pos
;
1412 data
= t4_alloc_mem(count
);
1416 spin_lock(&adap
->win0_lock
);
1417 ret
= t4_memory_rw(adap
, 0, mem
, pos
, count
, data
, T4_MEMORY_READ
);
1418 spin_unlock(&adap
->win0_lock
);
1423 ret
= copy_to_user(buf
, data
, count
);
1429 *ppos
= pos
+ count
;
1432 static const struct file_operations mem_debugfs_fops
= {
1433 .owner
= THIS_MODULE
,
1434 .open
= simple_open
,
1436 .llseek
= default_llseek
,
1439 static void set_debugfs_file_size(struct dentry
*de
, loff_t size
)
1441 if (!IS_ERR(de
) && de
->d_inode
)
1442 de
->d_inode
->i_size
= size
;
1445 static void add_debugfs_mem(struct adapter
*adap
, const char *name
,
1446 unsigned int idx
, unsigned int size_mb
)
1450 de
= debugfs_create_file(name
, S_IRUSR
, adap
->debugfs_root
,
1451 (void *)adap
+ idx
, &mem_debugfs_fops
);
1452 if (de
&& de
->d_inode
)
1453 de
->d_inode
->i_size
= size_mb
<< 20;
1456 /* Add an array of Debug FS files.
1458 void add_debugfs_files(struct adapter
*adap
,
1459 struct t4_debugfs_entry
*files
,
1460 unsigned int nfiles
)
1464 /* debugfs support is best effort */
1465 for (i
= 0; i
< nfiles
; i
++)
1466 debugfs_create_file(files
[i
].name
, files
[i
].mode
,
1468 (void *)adap
+ files
[i
].data
,
1472 int t4_setup_debugfs(struct adapter
*adap
)
1478 static struct t4_debugfs_entry t4_debugfs_files
[] = {
1479 { "cim_la", &cim_la_fops
, S_IRUSR
, 0 },
1480 { "cim_qcfg", &cim_qcfg_fops
, S_IRUSR
, 0 },
1481 { "devlog", &devlog_fops
, S_IRUSR
, 0 },
1482 { "l2t", &t4_l2t_fops
, S_IRUSR
, 0},
1483 { "mps_tcam", &mps_tcam_debugfs_fops
, S_IRUSR
, 0 },
1484 { "rss", &rss_debugfs_fops
, S_IRUSR
, 0 },
1485 { "rss_config", &rss_config_debugfs_fops
, S_IRUSR
, 0 },
1486 { "rss_key", &rss_key_debugfs_fops
, S_IRUSR
, 0 },
1487 { "rss_pf_config", &rss_pf_config_debugfs_fops
, S_IRUSR
, 0 },
1488 { "rss_vf_config", &rss_vf_config_debugfs_fops
, S_IRUSR
, 0 },
1489 { "sge_qinfo", &sge_qinfo_debugfs_fops
, S_IRUSR
, 0 },
1490 { "ibq_tp0", &cim_ibq_fops
, S_IRUSR
, 0 },
1491 { "ibq_tp1", &cim_ibq_fops
, S_IRUSR
, 1 },
1492 { "ibq_ulp", &cim_ibq_fops
, S_IRUSR
, 2 },
1493 { "ibq_sge0", &cim_ibq_fops
, S_IRUSR
, 3 },
1494 { "ibq_sge1", &cim_ibq_fops
, S_IRUSR
, 4 },
1495 { "ibq_ncsi", &cim_ibq_fops
, S_IRUSR
, 5 },
1496 { "obq_ulp0", &cim_obq_fops
, S_IRUSR
, 0 },
1497 { "obq_ulp1", &cim_obq_fops
, S_IRUSR
, 1 },
1498 { "obq_ulp2", &cim_obq_fops
, S_IRUSR
, 2 },
1499 { "obq_ulp3", &cim_obq_fops
, S_IRUSR
, 3 },
1500 { "obq_sge", &cim_obq_fops
, S_IRUSR
, 4 },
1501 { "obq_ncsi", &cim_obq_fops
, S_IRUSR
, 5 },
1502 { "pm_stats", &pm_stats_debugfs_fops
, S_IRUSR
, 0 },
1503 #if IS_ENABLED(CONFIG_IPV6)
1504 { "clip_tbl", &clip_tbl_debugfs_fops
, S_IRUSR
, 0 },
1508 /* Debug FS nodes common to all T5 and later adapters.
1510 static struct t4_debugfs_entry t5_debugfs_files
[] = {
1511 { "obq_sge_rx_q0", &cim_obq_fops
, S_IRUSR
, 6 },
1512 { "obq_sge_rx_q1", &cim_obq_fops
, S_IRUSR
, 7 },
1515 add_debugfs_files(adap
,
1517 ARRAY_SIZE(t4_debugfs_files
));
1518 if (!is_t4(adap
->params
.chip
))
1519 add_debugfs_files(adap
,
1521 ARRAY_SIZE(t5_debugfs_files
));
1523 i
= t4_read_reg(adap
, MA_TARGET_MEM_ENABLE_A
);
1524 if (i
& EDRAM0_ENABLE_F
) {
1525 size
= t4_read_reg(adap
, MA_EDRAM0_BAR_A
);
1526 add_debugfs_mem(adap
, "edc0", MEM_EDC0
, EDRAM0_SIZE_G(size
));
1528 if (i
& EDRAM1_ENABLE_F
) {
1529 size
= t4_read_reg(adap
, MA_EDRAM1_BAR_A
);
1530 add_debugfs_mem(adap
, "edc1", MEM_EDC1
, EDRAM1_SIZE_G(size
));
1532 if (is_t4(adap
->params
.chip
)) {
1533 size
= t4_read_reg(adap
, MA_EXT_MEMORY_BAR_A
);
1534 if (i
& EXT_MEM_ENABLE_F
)
1535 add_debugfs_mem(adap
, "mc", MEM_MC
,
1536 EXT_MEM_SIZE_G(size
));
1538 if (i
& EXT_MEM0_ENABLE_F
) {
1539 size
= t4_read_reg(adap
, MA_EXT_MEMORY0_BAR_A
);
1540 add_debugfs_mem(adap
, "mc0", MEM_MC0
,
1541 EXT_MEM0_SIZE_G(size
));
1543 if (i
& EXT_MEM1_ENABLE_F
) {
1544 size
= t4_read_reg(adap
, MA_EXT_MEMORY1_BAR_A
);
1545 add_debugfs_mem(adap
, "mc1", MEM_MC1
,
1546 EXT_MEM1_SIZE_G(size
));
1550 de
= debugfs_create_file("flash", S_IRUSR
, adap
->debugfs_root
, adap
,
1551 &flash_debugfs_fops
);
1552 set_debugfs_file_size(de
, adap
->params
.sf_size
);