drivers/net/ethernet/chelsio/cxgb4/t4_msg.h

   1 /*
   2  * This file is part of the Chelsio T4 Ethernet driver for Linux.
   3  *
   4  * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved.
   5  *
   6  * This software is available to you under a choice of one of two
   7  * licenses.  You may choose to be licensed under the terms of the GNU
   8  * General Public License (GPL) Version 2, available from the file
   9  * COPYING in the main directory of this source tree, or the
  10  * OpenIB.org BSD license below:
  11  *
  12  *     Redistribution and use in source and binary forms, with or
  13  *     without modification, are permitted provided that the following
  14  *     conditions are met:
  15  *
  16  *      - Redistributions of source code must retain the above
  17  *        copyright notice, this list of conditions and the following
  18  *        disclaimer.
  19  *
  20  *      - Redistributions in binary form must reproduce the above
  21  *        copyright notice, this list of conditions and the following
  22  *        disclaimer in the documentation and/or other materials
  23  *        provided with the distribution.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32  * SOFTWARE.
  33  */
  34
  35 #ifndef __T4_MSG_H
  36 #define __T4_MSG_H
  37
  38 #include <linux/types.h>
  39
  40 enum {
  41         CPL_PASS_OPEN_REQ     = 0x1,
  42         CPL_PASS_ACCEPT_RPL   = 0x2,
  43         CPL_ACT_OPEN_REQ      = 0x3,
  44         CPL_SET_TCB_FIELD     = 0x5,
  45         CPL_GET_TCB           = 0x6,
  46         CPL_CLOSE_CON_REQ     = 0x8,
  47         CPL_CLOSE_LISTSRV_REQ = 0x9,
  48         CPL_ABORT_REQ         = 0xA,
  49         CPL_ABORT_RPL         = 0xB,
  50         CPL_RX_DATA_ACK       = 0xD,
  51         CPL_TX_PKT            = 0xE,
  52         CPL_L2T_WRITE_REQ     = 0x12,
  53         CPL_TID_RELEASE       = 0x1A,
  54
  55         CPL_CLOSE_LISTSRV_RPL = 0x20,
  56         CPL_L2T_WRITE_RPL     = 0x23,
  57         CPL_PASS_OPEN_RPL     = 0x24,
  58         CPL_ACT_OPEN_RPL      = 0x25,
  59         CPL_PEER_CLOSE        = 0x26,
  60         CPL_ABORT_REQ_RSS     = 0x2B,
  61         CPL_ABORT_RPL_RSS     = 0x2D,
  62
  63         CPL_CLOSE_CON_RPL     = 0x32,
  64         CPL_ISCSI_HDR         = 0x33,
  65         CPL_RDMA_CQE          = 0x35,
  66         CPL_RDMA_CQE_READ_RSP = 0x36,
  67         CPL_RDMA_CQE_ERR      = 0x37,
  68         CPL_RX_DATA           = 0x39,
  69         CPL_SET_TCB_RPL       = 0x3A,
  70         CPL_RX_PKT            = 0x3B,
  71         CPL_RX_DDP_COMPLETE   = 0x3F,
  72
  73         CPL_ACT_ESTABLISH     = 0x40,
  74         CPL_PASS_ESTABLISH    = 0x41,
  75         CPL_RX_DATA_DDP       = 0x42,
  76         CPL_PASS_ACCEPT_REQ   = 0x44,
  77         CPL_TRACE_PKT_T5      = 0x48,
  78
  79         CPL_RDMA_READ_REQ     = 0x60,
  80
  81         CPL_PASS_OPEN_REQ6    = 0x81,
  82         CPL_ACT_OPEN_REQ6     = 0x83,
  83
  84         CPL_RDMA_TERMINATE    = 0xA2,
  85         CPL_RDMA_WRITE        = 0xA4,
  86         CPL_SGE_EGR_UPDATE    = 0xA5,
  87
  88         CPL_TRACE_PKT         = 0xB0,
  89
  90         CPL_FW4_MSG           = 0xC0,
  91         CPL_FW4_PLD           = 0xC1,
  92         CPL_FW4_ACK           = 0xC3,
  93
  94         CPL_FW6_MSG           = 0xE0,
  95         CPL_FW6_PLD           = 0xE1,
  96         CPL_TX_PKT_LSO        = 0xED,
  97         CPL_TX_PKT_XT         = 0xEE,
  98
  99         NUM_CPL_CMDS
 100 };
 101
 102 enum CPL_error {
 103         CPL_ERR_NONE               = 0,
 104         CPL_ERR_TCAM_FULL          = 3,
 105         CPL_ERR_BAD_LENGTH         = 15,
 106         CPL_ERR_BAD_ROUTE          = 18,
 107         CPL_ERR_CONN_RESET         = 20,
 108         CPL_ERR_CONN_EXIST_SYNRECV = 21,
 109         CPL_ERR_CONN_EXIST         = 22,
 110         CPL_ERR_ARP_MISS           = 23,
 111         CPL_ERR_BAD_SYN            = 24,
 112         CPL_ERR_CONN_TIMEDOUT      = 30,
 113         CPL_ERR_XMIT_TIMEDOUT      = 31,
 114         CPL_ERR_PERSIST_TIMEDOUT   = 32,
 115         CPL_ERR_FINWAIT2_TIMEDOUT  = 33,
 116         CPL_ERR_KEEPALIVE_TIMEDOUT = 34,
 117         CPL_ERR_RTX_NEG_ADVICE     = 35,
 118         CPL_ERR_PERSIST_NEG_ADVICE = 36,
 119         CPL_ERR_ABORT_FAILED       = 42,
 120         CPL_ERR_IWARP_FLM          = 50,
 121 };
 122
 123 enum {
 124         ULP_MODE_NONE          = 0,
 125         ULP_MODE_ISCSI         = 2,
 126         ULP_MODE_RDMA          = 4,
 127         ULP_MODE_TCPDDP        = 5,
 128         ULP_MODE_FCOE          = 6,
 129 };
 130
 131 enum {
 132         ULP_CRC_HEADER = 1 << 0,
 133         ULP_CRC_DATA   = 1 << 1
 134 };
 135
 136 enum {
 137         CPL_ABORT_SEND_RST = 0,
 138         CPL_ABORT_NO_RST,
 139 };
 140
 141 enum {                     /* TX_PKT_XT checksum types */
 142         TX_CSUM_TCP    = 0,
 143         TX_CSUM_UDP    = 1,
 144         TX_CSUM_CRC16  = 4,
 145         TX_CSUM_CRC32  = 5,
 146         TX_CSUM_CRC32C = 6,
 147         TX_CSUM_FCOE   = 7,
 148         TX_CSUM_TCPIP  = 8,
 149         TX_CSUM_UDPIP  = 9,
 150         TX_CSUM_TCPIP6 = 10,
 151         TX_CSUM_UDPIP6 = 11,
 152         TX_CSUM_IP     = 12,
 153 };
 154
 155 union opcode_tid {
 156         __be32 opcode_tid;
 157         u8 opcode;
 158 };
 159
 160 #define CPL_OPCODE(x) ((x) << 24)
 161 #define G_CPL_OPCODE(x) (((x) >> 24) & 0xFF)
 162 #define MK_OPCODE_TID(opcode, tid) (CPL_OPCODE(opcode) | (tid))
 163 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
 164 #define GET_TID(cmd) (ntohl(OPCODE_TID(cmd)) & 0xFFFFFF)
 165
 166 /* partitioning of TID fields that also carry a queue id */
 167 #define GET_TID_TID(x) ((x) & 0x3fff)
 168 #define GET_TID_QID(x) (((x) >> 14) & 0x3ff)
 169 #define TID_QID(x)     ((x) << 14)
 170
 171 struct rss_header {
 172         u8 opcode;
 173 #if defined(__LITTLE_ENDIAN_BITFIELD)
 174         u8 channel:2;
 175         u8 filter_hit:1;
 176         u8 filter_tid:1;
 177         u8 hash_type:2;
 178         u8 ipv6:1;
 179         u8 send2fw:1;
 180 #else
 181         u8 send2fw:1;
 182         u8 ipv6:1;
 183         u8 hash_type:2;
 184         u8 filter_tid:1;
 185         u8 filter_hit:1;
 186         u8 channel:2;
 187 #endif
 188         __be16 qid;
 189         __be32 hash_val;
 190 };
 191
 192 struct work_request_hdr {
 193         __be32 wr_hi;
 194         __be32 wr_mid;
 195         __be64 wr_lo;
 196 };
 197
 198 /* wr_hi fields */
 199 #define S_WR_OP    24
 200 #define V_WR_OP(x) ((__u64)(x) << S_WR_OP)
 201
 202 #define WR_HDR struct work_request_hdr wr
 203
 204 /* option 0 fields */
 205 #define S_MSS_IDX    60
 206 #define M_MSS_IDX    0xF
 207 #define V_MSS_IDX(x) ((__u64)(x) << S_MSS_IDX)
 208 #define G_MSS_IDX(x) (((x) >> S_MSS_IDX) & M_MSS_IDX)
 209
 210 /* option 2 fields */
 211 #define S_RSS_QUEUE    0
 212 #define M_RSS_QUEUE    0x3FF
 213 #define V_RSS_QUEUE(x) ((x) << S_RSS_QUEUE)
 214 #define G_RSS_QUEUE(x) (((x) >> S_RSS_QUEUE) & M_RSS_QUEUE)
 215
 216 struct cpl_pass_open_req {
 217         WR_HDR;
 218         union opcode_tid ot;
 219         __be16 local_port;
 220         __be16 peer_port;
 221         __be32 local_ip;
 222         __be32 peer_ip;
 223         __be64 opt0;
 224 #define TX_CHAN(x)    ((x) << 2)
 225 #define NO_CONG(x)    ((x) << 4)
 226 #define DELACK(x)     ((x) << 5)
 227 #define ULP_MODE(x)   ((x) << 8)
 228 #define RCV_BUFSIZ(x) ((x) << 12)
 229 #define DSCP(x)       ((x) << 22)
 230 #define SMAC_SEL(x)   ((u64)(x) << 28)
 231 #define L2T_IDX(x)    ((u64)(x) << 36)
 232 #define TCAM_BYPASS(x) ((u64)(x) << 48)
 233 #define NAGLE(x)      ((u64)(x) << 49)
 234 #define WND_SCALE(x)  ((u64)(x) << 50)
 235 #define KEEP_ALIVE(x) ((u64)(x) << 54)
 236 #define MSS_IDX(x)    ((u64)(x) << 60)
 237         __be64 opt1;
 238 #define SYN_RSS_ENABLE   (1 << 0)
 239 #define SYN_RSS_QUEUE(x) ((x) << 2)
 240 #define CONN_POLICY_ASK  (1 << 22)
 241 };
 242
 243 struct cpl_pass_open_req6 {
 244         WR_HDR;
 245         union opcode_tid ot;
 246         __be16 local_port;
 247         __be16 peer_port;
 248         __be64 local_ip_hi;
 249         __be64 local_ip_lo;
 250         __be64 peer_ip_hi;
 251         __be64 peer_ip_lo;
 252         __be64 opt0;
 253         __be64 opt1;
 254 };
 255
 256 struct cpl_pass_open_rpl {
 257         union opcode_tid ot;
 258         u8 rsvd[3];
 259         u8 status;
 260 };
 261
 262 struct cpl_pass_accept_rpl {
 263         WR_HDR;
 264         union opcode_tid ot;
 265         __be32 opt2;
 266 #define RSS_QUEUE(x)         ((x) << 0)
 267 #define RSS_QUEUE_VALID      (1 << 10)
 268 #define RX_COALESCE_VALID(x) ((x) << 11)
 269 #define RX_COALESCE(x)       ((x) << 12)
 270 #define PACE(x)       ((x) << 16)
 271 #define TX_QUEUE(x)          ((x) << 23)
 272 #define RX_CHANNEL(x)        ((x) << 26)
 273 #define CCTRL_ECN(x)         ((x) << 27)
 274 #define WND_SCALE_EN(x)      ((x) << 28)
 275 #define TSTAMPS_EN(x)        ((x) << 29)
 276 #define SACK_EN(x)           ((x) << 30)
 277         __be64 opt0;
 278 };
 279
 280 struct cpl_act_open_req {
 281         WR_HDR;
 282         union opcode_tid ot;
 283         __be16 local_port;
 284         __be16 peer_port;
 285         __be32 local_ip;
 286         __be32 peer_ip;
 287         __be64 opt0;
 288         __be32 params;
 289         __be32 opt2;
 290 };
 291
 292 #define S_FILTER_TUPLE  24
 293 #define M_FILTER_TUPLE  0xFFFFFFFFFF
 294 #define V_FILTER_TUPLE(x) ((x) << S_FILTER_TUPLE)
 295 #define G_FILTER_TUPLE(x) (((x) >> S_FILTER_TUPLE) & M_FILTER_TUPLE)
 296 struct cpl_t5_act_open_req {
 297         WR_HDR;
 298         union opcode_tid ot;
 299         __be16 local_port;
 300         __be16 peer_port;
 301         __be32 local_ip;
 302         __be32 peer_ip;
 303         __be64 opt0;
 304         __be32 rsvd;
 305         __be32 opt2;
 306         __be64 params;
 307 };
 308
 309 struct cpl_act_open_req6 {
 310         WR_HDR;
 311         union opcode_tid ot;
 312         __be16 local_port;
 313         __be16 peer_port;
 314         __be64 local_ip_hi;
 315         __be64 local_ip_lo;
 316         __be64 peer_ip_hi;
 317         __be64 peer_ip_lo;
 318         __be64 opt0;
 319         __be32 params;
 320         __be32 opt2;
 321 };
 322
 323 struct cpl_t5_act_open_req6 {
 324         WR_HDR;
 325         union opcode_tid ot;
 326         __be16 local_port;
 327         __be16 peer_port;
 328         __be64 local_ip_hi;
 329         __be64 local_ip_lo;
 330         __be64 peer_ip_hi;
 331         __be64 peer_ip_lo;
 332         __be64 opt0;
 333         __be32 rsvd;
 334         __be32 opt2;
 335         __be64 params;
 336 };
 337
 338 struct cpl_act_open_rpl {
 339         union opcode_tid ot;
 340         __be32 atid_status;
 341 #define GET_AOPEN_STATUS(x) ((x) & 0xff)
 342 #define GET_AOPEN_ATID(x)   (((x) >> 8) & 0xffffff)
 343 };
 344
 345 struct cpl_pass_establish {
 346         union opcode_tid ot;
 347         __be32 rsvd;
 348         __be32 tos_stid;
 349 #define PASS_OPEN_TID(x) ((x) << 0)
 350 #define PASS_OPEN_TOS(x) ((x) << 24)
 351 #define GET_PASS_OPEN_TID(x)    (((x) >> 0) & 0xFFFFFF)
 352 #define GET_POPEN_TID(x) ((x) & 0xffffff)
 353 #define GET_POPEN_TOS(x) (((x) >> 24) & 0xff)
 354         __be16 mac_idx;
 355         __be16 tcp_opt;
 356 #define GET_TCPOPT_WSCALE_OK(x)  (((x) >> 5) & 1)
 357 #define GET_TCPOPT_SACK(x)       (((x) >> 6) & 1)
 358 #define GET_TCPOPT_TSTAMP(x)     (((x) >> 7) & 1)
 359 #define GET_TCPOPT_SND_WSCALE(x) (((x) >> 8) & 0xf)
 360 #define GET_TCPOPT_MSS(x)        (((x) >> 12) & 0xf)
 361         __be32 snd_isn;
 362         __be32 rcv_isn;
 363 };
 364
 365 struct cpl_act_establish {
 366         union opcode_tid ot;
 367         __be32 rsvd;
 368         __be32 tos_atid;
 369         __be16 mac_idx;
 370         __be16 tcp_opt;
 371         __be32 snd_isn;
 372         __be32 rcv_isn;
 373 };
 374
 375 struct cpl_get_tcb {
 376         WR_HDR;
 377         union opcode_tid ot;
 378         __be16 reply_ctrl;
 379 #define QUEUENO(x)    ((x) << 0)
 380 #define REPLY_CHAN(x) ((x) << 14)
 381 #define NO_REPLY(x)   ((x) << 15)
 382         __be16 cookie;
 383 };
 384
 385 struct cpl_set_tcb_field {
 386         WR_HDR;
 387         union opcode_tid ot;
 388         __be16 reply_ctrl;
 389         __be16 word_cookie;
 390 #define TCB_WORD(x)   ((x) << 0)
 391 #define TCB_COOKIE(x) ((x) << 5)
 392 #define GET_TCB_COOKIE(x) (((x) >> 5) & 7)
 393         __be64 mask;
 394         __be64 val;
 395 };
 396
 397 struct cpl_set_tcb_rpl {
 398         union opcode_tid ot;
 399         __be16 rsvd;
 400         u8 cookie;
 401         u8 status;
 402         __be64 oldval;
 403 };
 404
 405 struct cpl_close_con_req {
 406         WR_HDR;
 407         union opcode_tid ot;
 408         __be32 rsvd;
 409 };
 410
 411 struct cpl_close_con_rpl {
 412         union opcode_tid ot;
 413         u8 rsvd[3];
 414         u8 status;
 415         __be32 snd_nxt;
 416         __be32 rcv_nxt;
 417 };
 418
 419 struct cpl_close_listsvr_req {
 420         WR_HDR;
 421         union opcode_tid ot;
 422         __be16 reply_ctrl;
 423 #define LISTSVR_IPV6(x) ((x) << 14)
 424         __be16 rsvd;
 425 };
 426
 427 struct cpl_close_listsvr_rpl {
 428         union opcode_tid ot;
 429         u8 rsvd[3];
 430         u8 status;
 431 };
 432
 433 struct cpl_abort_req_rss {
 434         union opcode_tid ot;
 435         u8 rsvd[3];
 436         u8 status;
 437 };
 438
 439 struct cpl_abort_req {
 440         WR_HDR;
 441         union opcode_tid ot;
 442         __be32 rsvd0;
 443         u8 rsvd1;
 444         u8 cmd;
 445         u8 rsvd2[6];
 446 };
 447
 448 struct cpl_abort_rpl_rss {
 449         union opcode_tid ot;
 450         u8 rsvd[3];
 451         u8 status;
 452 };
 453
 454 struct cpl_abort_rpl {
 455         WR_HDR;
 456         union opcode_tid ot;
 457         __be32 rsvd0;
 458         u8 rsvd1;
 459         u8 cmd;
 460         u8 rsvd2[6];
 461 };
 462
 463 struct cpl_peer_close {
 464         union opcode_tid ot;
 465         __be32 rcv_nxt;
 466 };
 467
 468 struct cpl_tid_release {
 469         WR_HDR;
 470         union opcode_tid ot;
 471         __be32 rsvd;
 472 };
 473
 474 struct cpl_tx_pkt_core {
 475         __be32 ctrl0;
 476 #define TXPKT_VF(x)        ((x) << 0)
 477 #define TXPKT_PF(x)        ((x) << 8)
 478 #define TXPKT_VF_VLD       (1 << 11)
 479 #define TXPKT_OVLAN_IDX(x) ((x) << 12)
 480 #define TXPKT_INTF(x)      ((x) << 16)
 481 #define TXPKT_INS_OVLAN    (1 << 21)
 482 #define TXPKT_OPCODE(x)    ((x) << 24)
 483         __be16 pack;
 484         __be16 len;
 485         __be64 ctrl1;
 486 #define TXPKT_CSUM_END(x)   ((x) << 12)
 487 #define TXPKT_CSUM_START(x) ((x) << 20)
 488 #define TXPKT_IPHDR_LEN(x)  ((u64)(x) << 20)
 489 #define TXPKT_CSUM_LOC(x)   ((u64)(x) << 30)
 490 #define TXPKT_ETHHDR_LEN(x) ((u64)(x) << 34)
 491 #define TXPKT_CSUM_TYPE(x)  ((u64)(x) << 40)
 492 #define TXPKT_VLAN(x)       ((u64)(x) << 44)
 493 #define TXPKT_VLAN_VLD      (1ULL << 60)
 494 #define TXPKT_IPCSUM_DIS    (1ULL << 62)
 495 #define TXPKT_L4CSUM_DIS    (1ULL << 63)
 496 };
 497
 498 struct cpl_tx_pkt {
 499         WR_HDR;
 500         struct cpl_tx_pkt_core c;
 501 };
 502
 503 #define cpl_tx_pkt_xt cpl_tx_pkt
 504
 505 struct cpl_tx_pkt_lso_core {
 506         __be32 lso_ctrl;
 507 #define LSO_TCPHDR_LEN(x) ((x) << 0)
 508 #define LSO_IPHDR_LEN(x)  ((x) << 4)
 509 #define LSO_ETHHDR_LEN(x) ((x) << 16)
 510 #define LSO_IPV6(x)       ((x) << 20)
 511 #define LSO_LAST_SLICE    (1 << 22)
 512 #define LSO_FIRST_SLICE   (1 << 23)
 513 #define LSO_OPCODE(x)     ((x) << 24)
 514         __be16 ipid_ofst;
 515         __be16 mss;
 516         __be32 seqno_offset;
 517         __be32 len;
 518         /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
 519 };
 520
 521 struct cpl_tx_pkt_lso {
 522         WR_HDR;
 523         struct cpl_tx_pkt_lso_core c;
 524         /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
 525 };
 526
 527 struct cpl_iscsi_hdr {
 528         union opcode_tid ot;
 529         __be16 pdu_len_ddp;
 530 #define ISCSI_PDU_LEN(x) ((x) & 0x7FFF)
 531 #define ISCSI_DDP        (1 << 15)
 532         __be16 len;
 533         __be32 seq;
 534         __be16 urg;
 535         u8 rsvd;
 536         u8 status;
 537 };
 538
 539 struct cpl_rx_data {
 540         union opcode_tid ot;
 541         __be16 rsvd;
 542         __be16 len;
 543         __be32 seq;
 544         __be16 urg;
 545 #if defined(__LITTLE_ENDIAN_BITFIELD)
 546         u8 dack_mode:2;
 547         u8 psh:1;
 548         u8 heartbeat:1;
 549         u8 ddp_off:1;
 550         u8 :3;
 551 #else
 552         u8 :3;
 553         u8 ddp_off:1;
 554         u8 heartbeat:1;
 555         u8 psh:1;
 556         u8 dack_mode:2;
 557 #endif
 558         u8 status;
 559 };
 560
 561 struct cpl_rx_data_ack {
 562         WR_HDR;
 563         union opcode_tid ot;
 564         __be32 credit_dack;
 565 #define RX_CREDITS(x)   ((x) << 0)
 566 #define RX_FORCE_ACK(x) ((x) << 28)
 567 };
 568
 569 struct cpl_rx_pkt {
 570         struct rss_header rsshdr;
 571         u8 opcode;
 572 #if defined(__LITTLE_ENDIAN_BITFIELD)
 573         u8 iff:4;
 574         u8 csum_calc:1;
 575         u8 ipmi_pkt:1;
 576         u8 vlan_ex:1;
 577         u8 ip_frag:1;
 578 #else
 579         u8 ip_frag:1;
 580         u8 vlan_ex:1;
 581         u8 ipmi_pkt:1;
 582         u8 csum_calc:1;
 583         u8 iff:4;
 584 #endif
 585         __be16 csum;
 586         __be16 vlan;
 587         __be16 len;
 588         __be32 l2info;
 589 #define RXF_UDP (1 << 22)
 590 #define RXF_TCP (1 << 23)
 591 #define RXF_IP  (1 << 24)
 592 #define RXF_IP6 (1 << 25)
 593         __be16 hdr_len;
 594         __be16 err_vec;
 595 };
 596
 597 /* rx_pkt.l2info fields */
 598 #define S_RX_ETHHDR_LEN    0
 599 #define M_RX_ETHHDR_LEN    0x1F
 600 #define V_RX_ETHHDR_LEN(x) ((x) << S_RX_ETHHDR_LEN)
 601 #define G_RX_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_ETHHDR_LEN)
 602
 603 #define S_RX_T5_ETHHDR_LEN    0
 604 #define M_RX_T5_ETHHDR_LEN    0x3F
 605 #define V_RX_T5_ETHHDR_LEN(x) ((x) << S_RX_T5_ETHHDR_LEN)
 606 #define G_RX_T5_ETHHDR_LEN(x) (((x) >> S_RX_T5_ETHHDR_LEN) & M_RX_T5_ETHHDR_LEN)
 607
 608 #define S_RX_MACIDX    8
 609 #define M_RX_MACIDX    0x1FF
 610 #define V_RX_MACIDX(x) ((x) << S_RX_MACIDX)
 611 #define G_RX_MACIDX(x) (((x) >> S_RX_MACIDX) & M_RX_MACIDX)
 612
 613 #define S_RXF_SYN    21
 614 #define V_RXF_SYN(x) ((x) << S_RXF_SYN)
 615 #define F_RXF_SYN    V_RXF_SYN(1U)
 616
 617 #define S_RX_CHAN    28
 618 #define M_RX_CHAN    0xF
 619 #define V_RX_CHAN(x) ((x) << S_RX_CHAN)
 620 #define G_RX_CHAN(x) (((x) >> S_RX_CHAN) & M_RX_CHAN)
 621
 622 /* rx_pkt.hdr_len fields */
 623 #define S_RX_TCPHDR_LEN    0
 624 #define M_RX_TCPHDR_LEN    0x3F
 625 #define V_RX_TCPHDR_LEN(x) ((x) << S_RX_TCPHDR_LEN)
 626 #define G_RX_TCPHDR_LEN(x) (((x) >> S_RX_TCPHDR_LEN) & M_RX_TCPHDR_LEN)
 627
 628 #define S_RX_IPHDR_LEN    6
 629 #define M_RX_IPHDR_LEN    0x3FF
 630 #define V_RX_IPHDR_LEN(x) ((x) << S_RX_IPHDR_LEN)
 631 #define G_RX_IPHDR_LEN(x) (((x) >> S_RX_IPHDR_LEN) & M_RX_IPHDR_LEN)
 632
 633 struct cpl_trace_pkt {
 634         u8 opcode;
 635         u8 intf;
 636 #if defined(__LITTLE_ENDIAN_BITFIELD)
 637         u8 runt:4;
 638         u8 filter_hit:4;
 639         u8 :6;
 640         u8 err:1;
 641         u8 trunc:1;
 642 #else
 643         u8 filter_hit:4;
 644         u8 runt:4;
 645         u8 trunc:1;
 646         u8 err:1;
 647         u8 :6;
 648 #endif
 649         __be16 rsvd;
 650         __be16 len;
 651         __be64 tstamp;
 652 };
 653
 654 struct cpl_t5_trace_pkt {
 655         __u8 opcode;
 656         __u8 intf;
 657 #if defined(__LITTLE_ENDIAN_BITFIELD)
 658         __u8 runt:4;
 659         __u8 filter_hit:4;
 660         __u8:6;
 661         __u8 err:1;
 662         __u8 trunc:1;
 663 #else
 664         __u8 filter_hit:4;
 665         __u8 runt:4;
 666         __u8 trunc:1;
 667         __u8 err:1;
 668         __u8:6;
 669 #endif
 670         __be16 rsvd;
 671         __be16 len;
 672         __be64 tstamp;
 673         __be64 rsvd1;
 674 };
 675
 676 struct cpl_l2t_write_req {
 677         WR_HDR;
 678         union opcode_tid ot;
 679         __be16 params;
 680 #define L2T_W_INFO(x)    ((x) << 2)
 681 #define L2T_W_PORT(x)    ((x) << 8)
 682 #define L2T_W_NOREPLY(x) ((x) << 15)
 683         __be16 l2t_idx;
 684         __be16 vlan;
 685         u8 dst_mac[6];
 686 };
 687
 688 struct cpl_l2t_write_rpl {
 689         union opcode_tid ot;
 690         u8 status;
 691         u8 rsvd[3];
 692 };
 693
 694 struct cpl_rdma_terminate {
 695         union opcode_tid ot;
 696         __be16 rsvd;
 697         __be16 len;
 698 };
 699
 700 struct cpl_sge_egr_update {
 701         __be32 opcode_qid;
 702 #define EGR_QID(x) ((x) & 0x1FFFF)
 703         __be16 cidx;
 704         __be16 pidx;
 705 };
 706
 707 /* cpl_fw*.type values */
 708 enum {
 709         FW_TYPE_CMD_RPL = 0,
 710         FW_TYPE_WR_RPL = 1,
 711         FW_TYPE_CQE = 2,
 712         FW_TYPE_OFLD_CONNECTION_WR_RPL = 3,
 713         FW_TYPE_RSSCPL = 4,
 714 };
 715
 716 struct cpl_fw4_pld {
 717         u8 opcode;
 718         u8 rsvd0[3];
 719         u8 type;
 720         u8 rsvd1;
 721         __be16 len;
 722         __be64 data;
 723         __be64 rsvd2;
 724 };
 725
 726 struct cpl_fw6_pld {
 727         u8 opcode;
 728         u8 rsvd[5];
 729         __be16 len;
 730         __be64 data[4];
 731 };
 732
 733 struct cpl_fw4_msg {
 734         u8 opcode;
 735         u8 type;
 736         __be16 rsvd0;
 737         __be32 rsvd1;
 738         __be64 data[2];
 739 };
 740
 741 struct cpl_fw4_ack {
 742         union opcode_tid ot;
 743         u8 credits;
 744         u8 rsvd0[2];
 745         u8 seq_vld;
 746         __be32 snd_nxt;
 747         __be32 snd_una;
 748         __be64 rsvd1;
 749 };
 750
 751 struct cpl_fw6_msg {
 752         u8 opcode;
 753         u8 type;
 754         __be16 rsvd0;
 755         __be32 rsvd1;
 756         __be64 data[4];
 757 };
 758
 759 /* cpl_fw6_msg.type values */
 760 enum {
 761         FW6_TYPE_CMD_RPL = 0,
 762         FW6_TYPE_WR_RPL = 1,
 763         FW6_TYPE_CQE = 2,
 764         FW6_TYPE_OFLD_CONNECTION_WR_RPL = 3,
 765         FW6_TYPE_RSSCPL = FW_TYPE_RSSCPL,
 766 };
 767
 768 struct cpl_fw6_msg_ofld_connection_wr_rpl {
 769         __u64   cookie;
 770         __be32  tid;    /* or atid in case of active failure */
 771         __u8    t_state;
 772         __u8    retval;
 773         __u8    rsvd[2];
 774 };
 775
 776 enum {
 777         ULP_TX_MEM_READ = 2,
 778         ULP_TX_MEM_WRITE = 3,
 779         ULP_TX_PKT = 4
 780 };
 781
 782 enum {
 783         ULP_TX_SC_NOOP = 0x80,
 784         ULP_TX_SC_IMM  = 0x81,
 785         ULP_TX_SC_DSGL = 0x82,
 786         ULP_TX_SC_ISGL = 0x83
 787 };
 788
 789 struct ulptx_sge_pair {
 790         __be32 len[2];
 791         __be64 addr[2];
 792 };
 793
 794 struct ulptx_sgl {
 795         __be32 cmd_nsge;
 796 #define ULPTX_CMD(x) ((x) << 24)
 797 #define ULPTX_NSGE(x) ((x) << 0)
 798 #define ULPTX_MORE (1U << 23)
 799         __be32 len0;
 800         __be64 addr0;
 801         struct ulptx_sge_pair sge[0];
 802 };
 803
 804 struct ulp_mem_io {
 805         WR_HDR;
 806         __be32 cmd;
 807 #define ULP_MEMIO_ORDER(x) ((x) << 23)
 808         __be32 len16;             /* command length */
 809         __be32 dlen;              /* data length in 32-byte units */
 810 #define ULP_MEMIO_DATA_LEN(x) ((x) << 0)
 811         __be32 lock_addr;
 812 #define ULP_MEMIO_ADDR(x) ((x) << 0)
 813 #define ULP_MEMIO_LOCK(x) ((x) << 31)
 814 };
 815
 816 #define S_T5_ULP_MEMIO_IMM    23
 817 #define V_T5_ULP_MEMIO_IMM(x) ((x) << S_T5_ULP_MEMIO_IMM)
 818 #define F_T5_ULP_MEMIO_IMM    V_T5_ULP_MEMIO_IMM(1U)
 819
 820 #define S_T5_ULP_MEMIO_ORDER    22
 821 #define V_T5_ULP_MEMIO_ORDER(x) ((x) << S_T5_ULP_MEMIO_ORDER)
 822 #define F_T5_ULP_MEMIO_ORDER    V_T5_ULP_MEMIO_ORDER(1U)
 823
 824 #endif  /* __T4_MSG_H */