Merge tag 'pci-v3.15-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaa...
[deliverable/linux.git] / drivers / net / ethernet / emulex / benet / be.h
1 /*
2 * Copyright (C) 2005 - 2013 Emulex
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@emulex.com
12 *
13 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
16 */
17
18 #ifndef BE_H
19 #define BE_H
20
21 #include <linux/pci.h>
22 #include <linux/etherdevice.h>
23 #include <linux/delay.h>
24 #include <net/tcp.h>
25 #include <net/ip.h>
26 #include <net/ipv6.h>
27 #include <linux/if_vlan.h>
28 #include <linux/workqueue.h>
29 #include <linux/interrupt.h>
30 #include <linux/firmware.h>
31 #include <linux/slab.h>
32 #include <linux/u64_stats_sync.h>
33
34 #include "be_hw.h"
35 #include "be_roce.h"
36
37 #define DRV_VER "10.0.600.0u"
38 #define DRV_NAME "be2net"
39 #define BE_NAME "Emulex BladeEngine2"
40 #define BE3_NAME "Emulex BladeEngine3"
41 #define OC_NAME "Emulex OneConnect"
42 #define OC_NAME_BE OC_NAME "(be3)"
43 #define OC_NAME_LANCER OC_NAME "(Lancer)"
44 #define OC_NAME_SH OC_NAME "(Skyhawk)"
45 #define DRV_DESC "Emulex OneConnect NIC Driver"
46
47 #define BE_VENDOR_ID 0x19a2
48 #define EMULEX_VENDOR_ID 0x10df
49 #define BE_DEVICE_ID1 0x211
50 #define BE_DEVICE_ID2 0x221
51 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */
52 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */
53 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */
54 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */
55 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */
56 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */
57 #define OC_SUBSYS_DEVICE_ID1 0xE602
58 #define OC_SUBSYS_DEVICE_ID2 0xE642
59 #define OC_SUBSYS_DEVICE_ID3 0xE612
60 #define OC_SUBSYS_DEVICE_ID4 0xE652
61
62 static inline char *nic_name(struct pci_dev *pdev)
63 {
64 switch (pdev->device) {
65 case OC_DEVICE_ID1:
66 return OC_NAME;
67 case OC_DEVICE_ID2:
68 return OC_NAME_BE;
69 case OC_DEVICE_ID3:
70 case OC_DEVICE_ID4:
71 return OC_NAME_LANCER;
72 case BE_DEVICE_ID2:
73 return BE3_NAME;
74 case OC_DEVICE_ID5:
75 case OC_DEVICE_ID6:
76 return OC_NAME_SH;
77 default:
78 return BE_NAME;
79 }
80 }
81
82 /* Number of bytes of an RX frame that are copied to skb->data */
83 #define BE_HDR_LEN ((u16) 64)
84 /* allocate extra space to allow tunneling decapsulation without head reallocation */
85 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64)
86
87 #define BE_MAX_JUMBO_FRAME_SIZE 9018
88 #define BE_MIN_MTU 256
89
90 #define BE_NUM_VLANS_SUPPORTED 64
91 #define BE_UMC_NUM_VLANS_SUPPORTED 15
92 #define BE_MAX_EQD 128u
93 #define BE_MAX_TX_FRAG_COUNT 30
94
95 #define EVNT_Q_LEN 1024
96 #define TX_Q_LEN 2048
97 #define TX_CQ_LEN 1024
98 #define RX_Q_LEN 1024 /* Does not support any other value */
99 #define RX_CQ_LEN 1024
100 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
101 #define MCC_CQ_LEN 256
102
103 #define BE2_MAX_RSS_QS 4
104 #define BE3_MAX_RSS_QS 16
105 #define BE3_MAX_TX_QS 16
106 #define BE3_MAX_EVT_QS 16
107 #define BE3_SRIOV_MAX_EVT_QS 8
108
109 #define MAX_RX_QS 32
110 #define MAX_EVT_QS 32
111 #define MAX_TX_QS 32
112
113 #define MAX_ROCE_EQS 5
114 #define MAX_MSIX_VECTORS 32
115 #define MIN_MSIX_VECTORS 1
116 #define BE_TX_BUDGET 256
117 #define BE_NAPI_WEIGHT 64
118 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
119 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
120
121 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */
122 #define FW_VER_LEN 32
123
124 struct be_dma_mem {
125 void *va;
126 dma_addr_t dma;
127 u32 size;
128 };
129
130 struct be_queue_info {
131 struct be_dma_mem dma_mem;
132 u16 len;
133 u16 entry_size; /* Size of an element in the queue */
134 u16 id;
135 u16 tail, head;
136 bool created;
137 atomic_t used; /* Number of valid elements in the queue */
138 };
139
140 static inline u32 MODULO(u16 val, u16 limit)
141 {
142 BUG_ON(limit & (limit - 1));
143 return val & (limit - 1);
144 }
145
146 static inline void index_adv(u16 *index, u16 val, u16 limit)
147 {
148 *index = MODULO((*index + val), limit);
149 }
150
151 static inline void index_inc(u16 *index, u16 limit)
152 {
153 *index = MODULO((*index + 1), limit);
154 }
155
156 static inline void *queue_head_node(struct be_queue_info *q)
157 {
158 return q->dma_mem.va + q->head * q->entry_size;
159 }
160
161 static inline void *queue_tail_node(struct be_queue_info *q)
162 {
163 return q->dma_mem.va + q->tail * q->entry_size;
164 }
165
166 static inline void *queue_index_node(struct be_queue_info *q, u16 index)
167 {
168 return q->dma_mem.va + index * q->entry_size;
169 }
170
171 static inline void queue_head_inc(struct be_queue_info *q)
172 {
173 index_inc(&q->head, q->len);
174 }
175
176 static inline void index_dec(u16 *index, u16 limit)
177 {
178 *index = MODULO((*index - 1), limit);
179 }
180
181 static inline void queue_tail_inc(struct be_queue_info *q)
182 {
183 index_inc(&q->tail, q->len);
184 }
185
186 struct be_eq_obj {
187 struct be_queue_info q;
188 char desc[32];
189
190 /* Adaptive interrupt coalescing (AIC) info */
191 bool enable_aic;
192 u32 min_eqd; /* in usecs */
193 u32 max_eqd; /* in usecs */
194 u32 eqd; /* configured val when aic is off */
195 u32 cur_eqd; /* in usecs */
196
197 u8 idx; /* array index */
198 u8 msix_idx;
199 u16 tx_budget;
200 u16 spurious_intr;
201 struct napi_struct napi;
202 struct be_adapter *adapter;
203
204 #ifdef CONFIG_NET_RX_BUSY_POLL
205 #define BE_EQ_IDLE 0
206 #define BE_EQ_NAPI 1 /* napi owns this EQ */
207 #define BE_EQ_POLL 2 /* poll owns this EQ */
208 #define BE_EQ_LOCKED (BE_EQ_NAPI | BE_EQ_POLL)
209 #define BE_EQ_NAPI_YIELD 4 /* napi yielded this EQ */
210 #define BE_EQ_POLL_YIELD 8 /* poll yielded this EQ */
211 #define BE_EQ_YIELD (BE_EQ_NAPI_YIELD | BE_EQ_POLL_YIELD)
212 #define BE_EQ_USER_PEND (BE_EQ_POLL | BE_EQ_POLL_YIELD)
213 unsigned int state;
214 spinlock_t lock; /* lock to serialize napi and busy-poll */
215 #endif /* CONFIG_NET_RX_BUSY_POLL */
216 } ____cacheline_aligned_in_smp;
217
218 struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */
219 bool enable;
220 u32 min_eqd; /* in usecs */
221 u32 max_eqd; /* in usecs */
222 u32 prev_eqd; /* in usecs */
223 u32 et_eqd; /* configured val when aic is off */
224 ulong jiffies;
225 u64 rx_pkts_prev; /* Used to calculate RX pps */
226 u64 tx_reqs_prev; /* Used to calculate TX pps */
227 };
228
229 enum {
230 NAPI_POLLING,
231 BUSY_POLLING
232 };
233
234 struct be_mcc_obj {
235 struct be_queue_info q;
236 struct be_queue_info cq;
237 bool rearm_cq;
238 };
239
240 struct be_tx_stats {
241 u64 tx_bytes;
242 u64 tx_pkts;
243 u64 tx_reqs;
244 u64 tx_wrbs;
245 u64 tx_compl;
246 ulong tx_jiffies;
247 u32 tx_stops;
248 u32 tx_drv_drops; /* pkts dropped by driver */
249 struct u64_stats_sync sync;
250 struct u64_stats_sync sync_compl;
251 };
252
253 struct be_tx_obj {
254 u32 db_offset;
255 struct be_queue_info q;
256 struct be_queue_info cq;
257 /* Remember the skbs that were transmitted */
258 struct sk_buff *sent_skb_list[TX_Q_LEN];
259 struct be_tx_stats stats;
260 } ____cacheline_aligned_in_smp;
261
262 /* Struct to remember the pages posted for rx frags */
263 struct be_rx_page_info {
264 struct page *page;
265 DEFINE_DMA_UNMAP_ADDR(bus);
266 u16 page_offset;
267 bool last_page_user;
268 };
269
270 struct be_rx_stats {
271 u64 rx_bytes;
272 u64 rx_pkts;
273 u32 rx_drops_no_skbs; /* skb allocation errors */
274 u32 rx_drops_no_frags; /* HW has no fetched frags */
275 u32 rx_post_fail; /* page post alloc failures */
276 u32 rx_compl;
277 u32 rx_mcast_pkts;
278 u32 rx_compl_err; /* completions with err set */
279 struct u64_stats_sync sync;
280 };
281
282 struct be_rx_compl_info {
283 u32 rss_hash;
284 u16 vlan_tag;
285 u16 pkt_size;
286 u16 port;
287 u8 vlanf;
288 u8 num_rcvd;
289 u8 err;
290 u8 ipf;
291 u8 tcpf;
292 u8 udpf;
293 u8 ip_csum;
294 u8 l4_csum;
295 u8 ipv6;
296 u8 vtm;
297 u8 pkt_type;
298 u8 ip_frag;
299 };
300
301 struct be_rx_obj {
302 struct be_adapter *adapter;
303 struct be_queue_info q;
304 struct be_queue_info cq;
305 struct be_rx_compl_info rxcp;
306 struct be_rx_page_info page_info_tbl[RX_Q_LEN];
307 struct be_rx_stats stats;
308 u8 rss_id;
309 bool rx_post_starved; /* Zero rx frags have been posted to BE */
310 } ____cacheline_aligned_in_smp;
311
312 struct be_drv_stats {
313 u32 be_on_die_temperature;
314 u32 eth_red_drops;
315 u32 rx_drops_no_pbuf;
316 u32 rx_drops_no_txpb;
317 u32 rx_drops_no_erx_descr;
318 u32 rx_drops_no_tpre_descr;
319 u32 rx_drops_too_many_frags;
320 u32 forwarded_packets;
321 u32 rx_drops_mtu;
322 u32 rx_crc_errors;
323 u32 rx_alignment_symbol_errors;
324 u32 rx_pause_frames;
325 u32 rx_priority_pause_frames;
326 u32 rx_control_frames;
327 u32 rx_in_range_errors;
328 u32 rx_out_range_errors;
329 u32 rx_frame_too_long;
330 u32 rx_address_filtered;
331 u32 rx_dropped_too_small;
332 u32 rx_dropped_too_short;
333 u32 rx_dropped_header_too_small;
334 u32 rx_dropped_tcp_length;
335 u32 rx_dropped_runt;
336 u32 rx_ip_checksum_errs;
337 u32 rx_tcp_checksum_errs;
338 u32 rx_udp_checksum_errs;
339 u32 tx_pauseframes;
340 u32 tx_priority_pauseframes;
341 u32 tx_controlframes;
342 u32 rxpp_fifo_overflow_drop;
343 u32 rx_input_fifo_overflow_drop;
344 u32 pmem_fifo_overflow_drop;
345 u32 jabber_events;
346 u32 rx_roce_bytes_lsd;
347 u32 rx_roce_bytes_msd;
348 u32 rx_roce_frames;
349 u32 roce_drops_payload_len;
350 u32 roce_drops_crc;
351 };
352
353 /* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */
354 #define BE_RESET_VLAN_TAG_ID 0xFFFF
355
356 struct be_vf_cfg {
357 unsigned char mac_addr[ETH_ALEN];
358 int if_handle;
359 int pmac_id;
360 u16 vlan_tag;
361 u32 tx_rate;
362 };
363
364 enum vf_state {
365 ENABLED = 0,
366 ASSIGNED = 1
367 };
368
369 #define BE_FLAGS_LINK_STATUS_INIT 1
370 #define BE_FLAGS_WORKER_SCHEDULED (1 << 3)
371 #define BE_FLAGS_VLAN_PROMISC (1 << 4)
372 #define BE_FLAGS_NAPI_ENABLED (1 << 9)
373 #define BE_UC_PMAC_COUNT 30
374 #define BE_VF_UC_PMAC_COUNT 2
375 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11)
376
377 /* Ethtool set_dump flags */
378 #define LANCER_INITIATE_FW_DUMP 0x1
379
380 struct phy_info {
381 u8 transceiver;
382 u8 autoneg;
383 u8 fc_autoneg;
384 u8 port_type;
385 u16 phy_type;
386 u16 interface_type;
387 u32 misc_params;
388 u16 auto_speeds_supported;
389 u16 fixed_speeds_supported;
390 int link_speed;
391 u32 dac_cable_len;
392 u32 advertising;
393 u32 supported;
394 };
395
396 struct be_resources {
397 u16 max_vfs; /* Total VFs "really" supported by FW/HW */
398 u16 max_mcast_mac;
399 u16 max_tx_qs;
400 u16 max_rss_qs;
401 u16 max_rx_qs;
402 u16 max_uc_mac; /* Max UC MACs programmable */
403 u16 max_vlans; /* Number of vlans supported */
404 u16 max_evt_qs;
405 u32 if_cap_flags;
406 };
407
408 struct be_adapter {
409 struct pci_dev *pdev;
410 struct net_device *netdev;
411
412 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */
413 u8 __iomem *db; /* Door Bell */
414
415 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
416 struct be_dma_mem mbox_mem;
417 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
418 * is stored for freeing purpose */
419 struct be_dma_mem mbox_mem_alloced;
420
421 struct be_mcc_obj mcc_obj;
422 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
423 spinlock_t mcc_cq_lock;
424
425 u16 cfg_num_qs; /* configured via set-channels */
426 u16 num_evt_qs;
427 u16 num_msix_vec;
428 struct be_eq_obj eq_obj[MAX_EVT_QS];
429 struct msix_entry msix_entries[MAX_MSIX_VECTORS];
430 bool isr_registered;
431
432 /* TX Rings */
433 u16 num_tx_qs;
434 struct be_tx_obj tx_obj[MAX_TX_QS];
435
436 /* Rx rings */
437 u16 num_rx_qs;
438 struct be_rx_obj rx_obj[MAX_RX_QS];
439 u32 big_page_size; /* Compounded page size shared by rx wrbs */
440
441 struct be_drv_stats drv_stats;
442 struct be_aic_obj aic_obj[MAX_EVT_QS];
443 u16 vlans_added;
444 u8 vlan_tag[VLAN_N_VID];
445 u8 vlan_prio_bmap; /* Available Priority BitMap */
446 u16 recommended_prio; /* Recommended Priority */
447 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
448
449 struct be_dma_mem stats_cmd;
450 /* Work queue used to perform periodic tasks like getting statistics */
451 struct delayed_work work;
452 u16 work_counter;
453
454 struct delayed_work func_recovery_work;
455 u32 flags;
456 u32 cmd_privileges;
457 /* Ethtool knobs and info */
458 char fw_ver[FW_VER_LEN];
459 char fw_on_flash[FW_VER_LEN];
460 int if_handle; /* Used to configure filtering */
461 u32 *pmac_id; /* MAC addr handle used by BE card */
462 u32 beacon_state; /* for set_phys_id */
463
464 bool eeh_error;
465 bool fw_timeout;
466 bool hw_error;
467
468 u32 port_num;
469 bool promiscuous;
470 u32 function_mode;
471 u32 function_caps;
472 u32 rx_fc; /* Rx flow control */
473 u32 tx_fc; /* Tx flow control */
474 bool stats_cmd_sent;
475 struct {
476 u32 size;
477 u32 total_size;
478 u64 io_addr;
479 } roce_db;
480 u32 num_msix_roce_vec;
481 struct ocrdma_dev *ocrdma_dev;
482 struct list_head entry;
483
484 u32 flash_status;
485 struct completion et_cmd_compl;
486
487 struct be_resources res; /* resources available for the func */
488 u16 num_vfs; /* Number of VFs provisioned by PF */
489 u8 virtfn;
490 struct be_vf_cfg *vf_cfg;
491 bool be3_native;
492 u32 sli_family;
493 u8 hba_port_num;
494 u16 pvid;
495 struct phy_info phy;
496 u8 wol_cap;
497 bool wol_en;
498 u32 uc_macs; /* Count of secondary UC MAC programmed */
499 u16 asic_rev;
500 u16 qnq_vid;
501 u32 msg_enable;
502 int be_get_temp_freq;
503 u8 pf_number;
504 u64 rss_flags;
505 };
506
507 #define be_physfn(adapter) (!adapter->virtfn)
508 #define be_virtfn(adapter) (adapter->virtfn)
509 #define sriov_enabled(adapter) (adapter->num_vfs > 0)
510 #define sriov_want(adapter) (be_physfn(adapter) && \
511 (num_vfs || pci_num_vf(adapter->pdev)))
512 #define for_all_vfs(adapter, vf_cfg, i) \
513 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \
514 i++, vf_cfg++)
515
516 #define ON 1
517 #define OFF 0
518
519 #define be_max_vlans(adapter) (adapter->res.max_vlans)
520 #define be_max_uc(adapter) (adapter->res.max_uc_mac)
521 #define be_max_mc(adapter) (adapter->res.max_mcast_mac)
522 #define be_max_vfs(adapter) (adapter->res.max_vfs)
523 #define be_max_rss(adapter) (adapter->res.max_rss_qs)
524 #define be_max_txqs(adapter) (adapter->res.max_tx_qs)
525 #define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs)
526 #define be_max_rxqs(adapter) (adapter->res.max_rx_qs)
527 #define be_max_eqs(adapter) (adapter->res.max_evt_qs)
528 #define be_if_cap_flags(adapter) (adapter->res.if_cap_flags)
529
530 static inline u16 be_max_qs(struct be_adapter *adapter)
531 {
532 /* If no RSS, need atleast the one def RXQ */
533 u16 num = max_t(u16, be_max_rss(adapter), 1);
534
535 num = min(num, be_max_eqs(adapter));
536 return min_t(u16, num, num_online_cpus());
537 }
538
539 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \
540 adapter->pdev->device == OC_DEVICE_ID4)
541
542 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \
543 adapter->pdev->device == OC_DEVICE_ID6)
544
545 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \
546 adapter->pdev->device == OC_DEVICE_ID2)
547
548 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \
549 adapter->pdev->device == OC_DEVICE_ID1)
550
551 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter))
552
553 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \
554 (adapter->function_mode & RDMA_ENABLED))
555
556 extern const struct ethtool_ops be_ethtool_ops;
557
558 #define msix_enabled(adapter) (adapter->num_msix_vec > 0)
559 #define num_irqs(adapter) (msix_enabled(adapter) ? \
560 adapter->num_msix_vec : 1)
561 #define tx_stats(txo) (&(txo)->stats)
562 #define rx_stats(rxo) (&(rxo)->stats)
563
564 /* The default RXQ is the last RXQ */
565 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1])
566
567 #define for_all_rx_queues(adapter, rxo, i) \
568 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \
569 i++, rxo++)
570
571 /* Skip the default non-rss queue (last one)*/
572 #define for_all_rss_queues(adapter, rxo, i) \
573 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\
574 i++, rxo++)
575
576 #define for_all_tx_queues(adapter, txo, i) \
577 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \
578 i++, txo++)
579
580 #define for_all_evt_queues(adapter, eqo, i) \
581 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \
582 i++, eqo++)
583
584 #define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \
585 for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\
586 i += adapter->num_evt_qs, rxo += adapter->num_evt_qs)
587
588 #define is_mcc_eqo(eqo) (eqo->idx == 0)
589 #define mcc_eqo(adapter) (&adapter->eq_obj[0])
590
591 #define PAGE_SHIFT_4K 12
592 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
593
594 /* Returns number of pages spanned by the data starting at the given addr */
595 #define PAGES_4K_SPANNED(_address, size) \
596 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
597 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
598
599 /* Returns bit offset within a DWORD of a bitfield */
600 #define AMAP_BIT_OFFSET(_struct, field) \
601 (((size_t)&(((_struct *)0)->field))%32)
602
603 /* Returns the bit mask of the field that is NOT shifted into location. */
604 static inline u32 amap_mask(u32 bitsize)
605 {
606 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
607 }
608
609 static inline void
610 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
611 {
612 u32 *dw = (u32 *) ptr + dw_offset;
613 *dw &= ~(mask << offset);
614 *dw |= (mask & value) << offset;
615 }
616
617 #define AMAP_SET_BITS(_struct, field, ptr, val) \
618 amap_set(ptr, \
619 offsetof(_struct, field)/32, \
620 amap_mask(sizeof(((_struct *)0)->field)), \
621 AMAP_BIT_OFFSET(_struct, field), \
622 val)
623
624 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
625 {
626 u32 *dw = (u32 *) ptr;
627 return mask & (*(dw + dw_offset) >> offset);
628 }
629
630 #define AMAP_GET_BITS(_struct, field, ptr) \
631 amap_get(ptr, \
632 offsetof(_struct, field)/32, \
633 amap_mask(sizeof(((_struct *)0)->field)), \
634 AMAP_BIT_OFFSET(_struct, field))
635
636 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
637 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
638 static inline void swap_dws(void *wrb, int len)
639 {
640 #ifdef __BIG_ENDIAN
641 u32 *dw = wrb;
642 BUG_ON(len % 4);
643 do {
644 *dw = cpu_to_le32(*dw);
645 dw++;
646 len -= 4;
647 } while (len);
648 #endif /* __BIG_ENDIAN */
649 }
650
651 static inline u8 is_tcp_pkt(struct sk_buff *skb)
652 {
653 u8 val = 0;
654
655 if (ip_hdr(skb)->version == 4)
656 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
657 else if (ip_hdr(skb)->version == 6)
658 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
659
660 return val;
661 }
662
663 static inline u8 is_udp_pkt(struct sk_buff *skb)
664 {
665 u8 val = 0;
666
667 if (ip_hdr(skb)->version == 4)
668 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
669 else if (ip_hdr(skb)->version == 6)
670 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
671
672 return val;
673 }
674
675 static inline bool is_ipv4_pkt(struct sk_buff *skb)
676 {
677 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
678 }
679
680 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
681 {
682 u32 addr;
683
684 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
685
686 mac[5] = (u8)(addr & 0xFF);
687 mac[4] = (u8)((addr >> 8) & 0xFF);
688 mac[3] = (u8)((addr >> 16) & 0xFF);
689 /* Use the OUI from the current MAC address */
690 memcpy(mac, adapter->netdev->dev_addr, 3);
691 }
692
693 static inline bool be_multi_rxq(const struct be_adapter *adapter)
694 {
695 return adapter->num_rx_qs > 1;
696 }
697
698 static inline bool be_error(struct be_adapter *adapter)
699 {
700 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout;
701 }
702
703 static inline bool be_hw_error(struct be_adapter *adapter)
704 {
705 return adapter->eeh_error || adapter->hw_error;
706 }
707
708 static inline void be_clear_all_error(struct be_adapter *adapter)
709 {
710 adapter->eeh_error = false;
711 adapter->hw_error = false;
712 adapter->fw_timeout = false;
713 }
714
715 static inline bool be_is_wol_excluded(struct be_adapter *adapter)
716 {
717 struct pci_dev *pdev = adapter->pdev;
718
719 if (!be_physfn(adapter))
720 return true;
721
722 switch (pdev->subsystem_device) {
723 case OC_SUBSYS_DEVICE_ID1:
724 case OC_SUBSYS_DEVICE_ID2:
725 case OC_SUBSYS_DEVICE_ID3:
726 case OC_SUBSYS_DEVICE_ID4:
727 return true;
728 default:
729 return false;
730 }
731 }
732
733 static inline int qnq_async_evt_rcvd(struct be_adapter *adapter)
734 {
735 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD;
736 }
737
738 #ifdef CONFIG_NET_RX_BUSY_POLL
739 static inline bool be_lock_napi(struct be_eq_obj *eqo)
740 {
741 bool status = true;
742
743 spin_lock(&eqo->lock); /* BH is already disabled */
744 if (eqo->state & BE_EQ_LOCKED) {
745 WARN_ON(eqo->state & BE_EQ_NAPI);
746 eqo->state |= BE_EQ_NAPI_YIELD;
747 status = false;
748 } else {
749 eqo->state = BE_EQ_NAPI;
750 }
751 spin_unlock(&eqo->lock);
752 return status;
753 }
754
755 static inline void be_unlock_napi(struct be_eq_obj *eqo)
756 {
757 spin_lock(&eqo->lock); /* BH is already disabled */
758
759 WARN_ON(eqo->state & (BE_EQ_POLL | BE_EQ_NAPI_YIELD));
760 eqo->state = BE_EQ_IDLE;
761
762 spin_unlock(&eqo->lock);
763 }
764
765 static inline bool be_lock_busy_poll(struct be_eq_obj *eqo)
766 {
767 bool status = true;
768
769 spin_lock_bh(&eqo->lock);
770 if (eqo->state & BE_EQ_LOCKED) {
771 eqo->state |= BE_EQ_POLL_YIELD;
772 status = false;
773 } else {
774 eqo->state |= BE_EQ_POLL;
775 }
776 spin_unlock_bh(&eqo->lock);
777 return status;
778 }
779
780 static inline void be_unlock_busy_poll(struct be_eq_obj *eqo)
781 {
782 spin_lock_bh(&eqo->lock);
783
784 WARN_ON(eqo->state & (BE_EQ_NAPI));
785 eqo->state = BE_EQ_IDLE;
786
787 spin_unlock_bh(&eqo->lock);
788 }
789
790 static inline void be_enable_busy_poll(struct be_eq_obj *eqo)
791 {
792 spin_lock_init(&eqo->lock);
793 eqo->state = BE_EQ_IDLE;
794 }
795
796 static inline void be_disable_busy_poll(struct be_eq_obj *eqo)
797 {
798 local_bh_disable();
799
800 /* It's enough to just acquire napi lock on the eqo to stop
801 * be_busy_poll() from processing any queueus.
802 */
803 while (!be_lock_napi(eqo))
804 mdelay(1);
805
806 local_bh_enable();
807 }
808
809 #else /* CONFIG_NET_RX_BUSY_POLL */
810
811 static inline bool be_lock_napi(struct be_eq_obj *eqo)
812 {
813 return true;
814 }
815
816 static inline void be_unlock_napi(struct be_eq_obj *eqo)
817 {
818 }
819
820 static inline bool be_lock_busy_poll(struct be_eq_obj *eqo)
821 {
822 return false;
823 }
824
825 static inline void be_unlock_busy_poll(struct be_eq_obj *eqo)
826 {
827 }
828
829 static inline void be_enable_busy_poll(struct be_eq_obj *eqo)
830 {
831 }
832
833 static inline void be_disable_busy_poll(struct be_eq_obj *eqo)
834 {
835 }
836 #endif /* CONFIG_NET_RX_BUSY_POLL */
837
838 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
839 u16 num_popped);
840 void be_link_status_update(struct be_adapter *adapter, u8 link_status);
841 void be_parse_stats(struct be_adapter *adapter);
842 int be_load_fw(struct be_adapter *adapter, u8 *func);
843 bool be_is_wol_supported(struct be_adapter *adapter);
844 bool be_pause_supported(struct be_adapter *adapter);
845 u32 be_get_fw_log_level(struct be_adapter *adapter);
846
847 static inline int fw_major_num(const char *fw_ver)
848 {
849 int fw_major = 0;
850
851 sscanf(fw_ver, "%d.", &fw_major);
852
853 return fw_major;
854 }
855
856 int be_update_queues(struct be_adapter *adapter);
857 int be_poll(struct napi_struct *napi, int budget);
858
859 /*
860 * internal function to initialize-cleanup roce device.
861 */
862 void be_roce_dev_add(struct be_adapter *);
863 void be_roce_dev_remove(struct be_adapter *);
864
865 /*
866 * internal function to open-close roce device during ifup-ifdown.
867 */
868 void be_roce_dev_open(struct be_adapter *);
869 void be_roce_dev_close(struct be_adapter *);
870
871 #endif /* BE_H */
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