drivers/net/ethernet/emulex/benet/be.h

   1 /*
   2  * Copyright (C) 2005 - 2011 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 #ifndef BE_H
  19 #define BE_H
  20
  21 #include <linux/pci.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/delay.h>
  24 #include <net/tcp.h>
  25 #include <net/ip.h>
  26 #include <net/ipv6.h>
  27 #include <linux/if_vlan.h>
  28 #include <linux/workqueue.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/firmware.h>
  31 #include <linux/slab.h>
  32 #include <linux/u64_stats_sync.h>
  33
  34 #include "be_hw.h"
  35 #include "be_roce.h"
  36
  37 #define DRV_VER                 "4.4.161.0u"
  38 #define DRV_NAME                "be2net"
  39 #define BE_NAME                 "ServerEngines BladeEngine2 10Gbps NIC"
  40 #define BE3_NAME                "ServerEngines BladeEngine3 10Gbps NIC"
  41 #define OC_NAME                 "Emulex OneConnect 10Gbps NIC"
  42 #define OC_NAME_BE              OC_NAME "(be3)"
  43 #define OC_NAME_LANCER          OC_NAME "(Lancer)"
  44 #define OC_NAME_SH              OC_NAME "(Skyhawk)"
  45 #define DRV_DESC                "ServerEngines BladeEngine 10Gbps NIC Driver"
  46
  47 #define BE_VENDOR_ID            0x19a2
  48 #define EMULEX_VENDOR_ID        0x10df
  49 #define BE_DEVICE_ID1           0x211
  50 #define BE_DEVICE_ID2           0x221
  51 #define OC_DEVICE_ID1           0x700   /* Device Id for BE2 cards */
  52 #define OC_DEVICE_ID2           0x710   /* Device Id for BE3 cards */
  53 #define OC_DEVICE_ID3           0xe220  /* Device id for Lancer cards */
  54 #define OC_DEVICE_ID4           0xe228   /* Device id for VF in Lancer */
  55 #define OC_DEVICE_ID5           0x720   /* Device Id for Skyhawk cards */
  56 #define OC_DEVICE_ID6           0x728   /* Device id for VF in SkyHawk */
  57 #define OC_SUBSYS_DEVICE_ID1    0xE602
  58 #define OC_SUBSYS_DEVICE_ID2    0xE642
  59 #define OC_SUBSYS_DEVICE_ID3    0xE612
  60 #define OC_SUBSYS_DEVICE_ID4    0xE652
  61
  62 static inline char *nic_name(struct pci_dev *pdev)
  63 {
  64         switch (pdev->device) {
  65         case OC_DEVICE_ID1:
  66                 return OC_NAME;
  67         case OC_DEVICE_ID2:
  68                 return OC_NAME_BE;
  69         case OC_DEVICE_ID3:
  70         case OC_DEVICE_ID4:
  71                 return OC_NAME_LANCER;
  72         case BE_DEVICE_ID2:
  73                 return BE3_NAME;
  74         case OC_DEVICE_ID5:
  75         case OC_DEVICE_ID6:
  76                 return OC_NAME_SH;
  77         default:
  78                 return BE_NAME;
  79         }
  80 }
  81
  82 /* Number of bytes of an RX frame that are copied to skb->data */
  83 #define BE_HDR_LEN              ((u16) 64)
  84 /* allocate extra space to allow tunneling decapsulation without head reallocation */
  85 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64)
  86
  87 #define BE_MAX_JUMBO_FRAME_SIZE 9018
  88 #define BE_MIN_MTU              256
  89
  90 #define BE_NUM_VLANS_SUPPORTED  64
  91 #define BE_MAX_EQD              96u
  92 #define BE_MAX_TX_FRAG_COUNT    30
  93
  94 #define EVNT_Q_LEN              1024
  95 #define TX_Q_LEN                2048
  96 #define TX_CQ_LEN               1024
  97 #define RX_Q_LEN                1024    /* Does not support any other value */
  98 #define RX_CQ_LEN               1024
  99 #define MCC_Q_LEN               128     /* total size not to exceed 8 pages */
 100 #define MCC_CQ_LEN              256
 101
 102 #define BE3_MAX_RSS_QS          8
 103 #define BE2_MAX_RSS_QS          4
 104 #define MAX_RSS_QS              BE3_MAX_RSS_QS
 105 #define MAX_RX_QS               (MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
 106
 107 #define MAX_TX_QS               8
 108 #define MAX_ROCE_EQS            5
 109 #define MAX_MSIX_VECTORS        (MAX_RSS_QS + MAX_ROCE_EQS) /* RSS qs + RoCE */
 110 #define BE_TX_BUDGET            256
 111 #define BE_NAPI_WEIGHT          64
 112 #define MAX_RX_POST             BE_NAPI_WEIGHT /* Frags posted at a time */
 113 #define RX_FRAGS_REFILL_WM      (RX_Q_LEN - MAX_RX_POST)
 114
 115 #define MAX_VFS                 30 /* Max VFs supported by BE3 FW */
 116 #define FW_VER_LEN              32
 117
 118 struct be_dma_mem {
 119         void *va;
 120         dma_addr_t dma;
 121         u32 size;
 122 };
 123
 124 struct be_queue_info {
 125         struct be_dma_mem dma_mem;
 126         u16 len;
 127         u16 entry_size; /* Size of an element in the queue */
 128         u16 id;
 129         u16 tail, head;
 130         bool created;
 131         atomic_t used;  /* Number of valid elements in the queue */
 132 };
 133
 134 static inline u32 MODULO(u16 val, u16 limit)
 135 {
 136         BUG_ON(limit & (limit - 1));
 137         return val & (limit - 1);
 138 }
 139
 140 static inline void index_adv(u16 *index, u16 val, u16 limit)
 141 {
 142         *index = MODULO((*index + val), limit);
 143 }
 144
 145 static inline void index_inc(u16 *index, u16 limit)
 146 {
 147         *index = MODULO((*index + 1), limit);
 148 }
 149
 150 static inline void *queue_head_node(struct be_queue_info *q)
 151 {
 152         return q->dma_mem.va + q->head * q->entry_size;
 153 }
 154
 155 static inline void *queue_tail_node(struct be_queue_info *q)
 156 {
 157         return q->dma_mem.va + q->tail * q->entry_size;
 158 }
 159
 160 static inline void *queue_index_node(struct be_queue_info *q, u16 index)
 161 {
 162         return q->dma_mem.va + index * q->entry_size;
 163 }
 164
 165 static inline void queue_head_inc(struct be_queue_info *q)
 166 {
 167         index_inc(&q->head, q->len);
 168 }
 169
 170 static inline void index_dec(u16 *index, u16 limit)
 171 {
 172         *index = MODULO((*index - 1), limit);
 173 }
 174
 175 static inline void queue_tail_inc(struct be_queue_info *q)
 176 {
 177         index_inc(&q->tail, q->len);
 178 }
 179
 180 struct be_eq_obj {
 181         struct be_queue_info q;
 182         char desc[32];
 183
 184         /* Adaptive interrupt coalescing (AIC) info */
 185         bool enable_aic;
 186         u32 min_eqd;            /* in usecs */
 187         u32 max_eqd;            /* in usecs */
 188         u32 eqd;                /* configured val when aic is off */
 189         u32 cur_eqd;            /* in usecs */
 190
 191         u8 idx;                 /* array index */
 192         u16 tx_budget;
 193         struct napi_struct napi;
 194         struct be_adapter *adapter;
 195 } ____cacheline_aligned_in_smp;
 196
 197 struct be_mcc_obj {
 198         struct be_queue_info q;
 199         struct be_queue_info cq;
 200         bool rearm_cq;
 201 };
 202
 203 struct be_tx_stats {
 204         u64 tx_bytes;
 205         u64 tx_pkts;
 206         u64 tx_reqs;
 207         u64 tx_wrbs;
 208         u64 tx_compl;
 209         ulong tx_jiffies;
 210         u32 tx_stops;
 211         struct u64_stats_sync sync;
 212         struct u64_stats_sync sync_compl;
 213 };
 214
 215 struct be_tx_obj {
 216         struct be_queue_info q;
 217         struct be_queue_info cq;
 218         /* Remember the skbs that were transmitted */
 219         struct sk_buff *sent_skb_list[TX_Q_LEN];
 220         struct be_tx_stats stats;
 221 } ____cacheline_aligned_in_smp;
 222
 223 /* Struct to remember the pages posted for rx frags */
 224 struct be_rx_page_info {
 225         struct page *page;
 226         DEFINE_DMA_UNMAP_ADDR(bus);
 227         u16 page_offset;
 228         bool last_page_user;
 229 };
 230
 231 struct be_rx_stats {
 232         u64 rx_bytes;
 233         u64 rx_pkts;
 234         u64 rx_pkts_prev;
 235         ulong rx_jiffies;
 236         u32 rx_drops_no_skbs;   /* skb allocation errors */
 237         u32 rx_drops_no_frags;  /* HW has no fetched frags */
 238         u32 rx_post_fail;       /* page post alloc failures */
 239         u32 rx_compl;
 240         u32 rx_mcast_pkts;
 241         u32 rx_compl_err;       /* completions with err set */
 242         u32 rx_pps;             /* pkts per second */
 243         struct u64_stats_sync sync;
 244 };
 245
 246 struct be_rx_compl_info {
 247         u32 rss_hash;
 248         u16 vlan_tag;
 249         u16 pkt_size;
 250         u16 rxq_idx;
 251         u16 port;
 252         u8 vlanf;
 253         u8 num_rcvd;
 254         u8 err;
 255         u8 ipf;
 256         u8 tcpf;
 257         u8 udpf;
 258         u8 ip_csum;
 259         u8 l4_csum;
 260         u8 ipv6;
 261         u8 vtm;
 262         u8 pkt_type;
 263 };
 264
 265 struct be_rx_obj {
 266         struct be_adapter *adapter;
 267         struct be_queue_info q;
 268         struct be_queue_info cq;
 269         struct be_rx_compl_info rxcp;
 270         struct be_rx_page_info page_info_tbl[RX_Q_LEN];
 271         struct be_rx_stats stats;
 272         u8 rss_id;
 273         bool rx_post_starved;   /* Zero rx frags have been posted to BE */
 274 } ____cacheline_aligned_in_smp;
 275
 276 struct be_drv_stats {
 277         u32 be_on_die_temperature;
 278         u32 eth_red_drops;
 279         u32 rx_drops_no_pbuf;
 280         u32 rx_drops_no_txpb;
 281         u32 rx_drops_no_erx_descr;
 282         u32 rx_drops_no_tpre_descr;
 283         u32 rx_drops_too_many_frags;
 284         u32 forwarded_packets;
 285         u32 rx_drops_mtu;
 286         u32 rx_crc_errors;
 287         u32 rx_alignment_symbol_errors;
 288         u32 rx_pause_frames;
 289         u32 rx_priority_pause_frames;
 290         u32 rx_control_frames;
 291         u32 rx_in_range_errors;
 292         u32 rx_out_range_errors;
 293         u32 rx_frame_too_long;
 294         u32 rx_address_mismatch_drops;
 295         u32 rx_dropped_too_small;
 296         u32 rx_dropped_too_short;
 297         u32 rx_dropped_header_too_small;
 298         u32 rx_dropped_tcp_length;
 299         u32 rx_dropped_runt;
 300         u32 rx_ip_checksum_errs;
 301         u32 rx_tcp_checksum_errs;
 302         u32 rx_udp_checksum_errs;
 303         u32 tx_pauseframes;
 304         u32 tx_priority_pauseframes;
 305         u32 tx_controlframes;
 306         u32 rxpp_fifo_overflow_drop;
 307         u32 rx_input_fifo_overflow_drop;
 308         u32 pmem_fifo_overflow_drop;
 309         u32 jabber_events;
 310 };
 311
 312 struct be_vf_cfg {
 313         unsigned char mac_addr[ETH_ALEN];
 314         int if_handle;
 315         int pmac_id;
 316         u16 def_vid;
 317         u16 vlan_tag;
 318         u32 tx_rate;
 319 };
 320
 321 enum vf_state {
 322         ENABLED = 0,
 323         ASSIGNED = 1
 324 };
 325
 326 #define BE_FLAGS_LINK_STATUS_INIT               1
 327 #define BE_FLAGS_WORKER_SCHEDULED               (1 << 3)
 328 #define BE_UC_PMAC_COUNT                30
 329 #define BE_VF_UC_PMAC_COUNT             2
 330
 331 struct phy_info {
 332         u8 transceiver;
 333         u8 autoneg;
 334         u8 fc_autoneg;
 335         u8 port_type;
 336         u16 phy_type;
 337         u16 interface_type;
 338         u32 misc_params;
 339         u16 auto_speeds_supported;
 340         u16 fixed_speeds_supported;
 341         int link_speed;
 342         u32 dac_cable_len;
 343         u32 advertising;
 344         u32 supported;
 345 };
 346
 347 struct be_adapter {
 348         struct pci_dev *pdev;
 349         struct net_device *netdev;
 350
 351         u8 __iomem *db;         /* Door Bell */
 352
 353         struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
 354         struct be_dma_mem mbox_mem;
 355         /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
 356          * is stored for freeing purpose */
 357         struct be_dma_mem mbox_mem_alloced;
 358
 359         struct be_mcc_obj mcc_obj;
 360         spinlock_t mcc_lock;    /* For serializing mcc cmds to BE card */
 361         spinlock_t mcc_cq_lock;
 362
 363         u32 num_msix_vec;
 364         u32 num_evt_qs;
 365         struct be_eq_obj eq_obj[MAX_MSIX_VECTORS];
 366         struct msix_entry msix_entries[MAX_MSIX_VECTORS];
 367         bool isr_registered;
 368
 369         /* TX Rings */
 370         u32 num_tx_qs;
 371         struct be_tx_obj tx_obj[MAX_TX_QS];
 372
 373         /* Rx rings */
 374         u32 num_rx_qs;
 375         struct be_rx_obj rx_obj[MAX_RX_QS];
 376         u32 big_page_size;      /* Compounded page size shared by rx wrbs */
 377
 378         u8 eq_next_idx;
 379         struct be_drv_stats drv_stats;
 380
 381         u16 vlans_added;
 382         u8 vlan_tag[VLAN_N_VID];
 383         u8 vlan_prio_bmap;      /* Available Priority BitMap */
 384         u16 recommended_prio;   /* Recommended Priority */
 385         struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
 386
 387         struct be_dma_mem stats_cmd;
 388         /* Work queue used to perform periodic tasks like getting statistics */
 389         struct delayed_work work;
 390         u16 work_counter;
 391
 392         struct delayed_work func_recovery_work;
 393         u32 flags;
 394         u32 cmd_privileges;
 395         /* Ethtool knobs and info */
 396         char fw_ver[FW_VER_LEN];
 397         int if_handle;          /* Used to configure filtering */
 398         u32 *pmac_id;           /* MAC addr handle used by BE card */
 399         u32 beacon_state;       /* for set_phys_id */
 400
 401         bool eeh_error;
 402         bool fw_timeout;
 403         bool hw_error;
 404
 405         u32 port_num;
 406         bool promiscuous;
 407         u32 function_mode;
 408         u32 function_caps;
 409         u32 rx_fc;              /* Rx flow control */
 410         u32 tx_fc;              /* Tx flow control */
 411         bool stats_cmd_sent;
 412         u32 if_type;
 413         struct {
 414                 u8 __iomem *base;       /* Door Bell */
 415                 u32 size;
 416                 u32 total_size;
 417                 u64 io_addr;
 418         } roce_db;
 419         u32 num_msix_roce_vec;
 420         struct ocrdma_dev *ocrdma_dev;
 421         struct list_head entry;
 422
 423         u32 flash_status;
 424         struct completion flash_compl;
 425
 426         u32 num_vfs;            /* Number of VFs provisioned by PF driver */
 427         u32 dev_num_vfs;        /* Number of VFs supported by HW */
 428         u8 virtfn;
 429         struct be_vf_cfg *vf_cfg;
 430         bool be3_native;
 431         u32 sli_family;
 432         u8 hba_port_num;
 433         u16 pvid;
 434         struct phy_info phy;
 435         u8 wol_cap;
 436         bool wol;
 437         u32 uc_macs;            /* Count of secondary UC MAC programmed */
 438         u32 msg_enable;
 439         int be_get_temp_freq;
 440         u16 max_mcast_mac;
 441         u16 max_tx_queues;
 442         u16 max_rss_queues;
 443         u16 max_rx_queues;
 444         u16 max_pmac_cnt;
 445         u16 max_vlans;
 446         u16 max_event_queues;
 447         u32 if_cap_flags;
 448         u8 pf_number;
 449 };
 450
 451 #define be_physfn(adapter)              (!adapter->virtfn)
 452 #define sriov_enabled(adapter)          (adapter->num_vfs > 0)
 453 #define sriov_want(adapter)             (adapter->dev_num_vfs && num_vfs && \
 454                                          be_physfn(adapter))
 455 #define for_all_vfs(adapter, vf_cfg, i)                                 \
 456         for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \
 457                 i++, vf_cfg++)
 458
 459 #define ON                              1
 460 #define OFF                             0
 461
 462 #define lancer_chip(adapter)    (adapter->pdev->device == OC_DEVICE_ID3 || \
 463                                  adapter->pdev->device == OC_DEVICE_ID4)
 464
 465 #define skyhawk_chip(adapter)   (adapter->pdev->device == OC_DEVICE_ID5 || \
 466                                  adapter->pdev->device == OC_DEVICE_ID6)
 467
 468 #define BE3_chip(adapter)       (adapter->pdev->device == BE_DEVICE_ID2 || \
 469                                  adapter->pdev->device == OC_DEVICE_ID2)
 470
 471 #define BE2_chip(adapter)       (adapter->pdev->device == BE_DEVICE_ID1 || \
 472                                  adapter->pdev->device == OC_DEVICE_ID1)
 473
 474 #define BEx_chip(adapter)       (BE3_chip(adapter) || BE2_chip(adapter))
 475
 476 #define be_roce_supported(adapter) ((adapter->if_type == SLI_INTF_TYPE_3 || \
 477                                      skyhawk_chip(adapter)) && \
 478                                      (adapter->function_mode & RDMA_ENABLED))
 479
 480 extern const struct ethtool_ops be_ethtool_ops;
 481
 482 #define msix_enabled(adapter)           (adapter->num_msix_vec > 0)
 483 #define num_irqs(adapter)               (msix_enabled(adapter) ?        \
 484                                                 adapter->num_msix_vec : 1)
 485 #define tx_stats(txo)                   (&(txo)->stats)
 486 #define rx_stats(rxo)                   (&(rxo)->stats)
 487
 488 /* The default RXQ is the last RXQ */
 489 #define default_rxo(adpt)               (&adpt->rx_obj[adpt->num_rx_qs - 1])
 490
 491 #define for_all_rx_queues(adapter, rxo, i)                              \
 492         for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;  \
 493                 i++, rxo++)
 494
 495 /* Skip the default non-rss queue (last one)*/
 496 #define for_all_rss_queues(adapter, rxo, i)                             \
 497         for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\
 498                 i++, rxo++)
 499
 500 #define for_all_tx_queues(adapter, txo, i)                              \
 501         for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;  \
 502                 i++, txo++)
 503
 504 #define for_all_evt_queues(adapter, eqo, i)                             \
 505         for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \
 506                 i++, eqo++)
 507
 508 #define is_mcc_eqo(eqo)                 (eqo->idx == 0)
 509 #define mcc_eqo(adapter)                (&adapter->eq_obj[0])
 510
 511 #define PAGE_SHIFT_4K           12
 512 #define PAGE_SIZE_4K            (1 << PAGE_SHIFT_4K)
 513
 514 /* Returns number of pages spanned by the data starting at the given addr */
 515 #define PAGES_4K_SPANNED(_address, size)                                \
 516                 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) +     \
 517                         (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
 518
 519 /* Returns bit offset within a DWORD of a bitfield */
 520 #define AMAP_BIT_OFFSET(_struct, field)                                 \
 521                 (((size_t)&(((_struct *)0)->field))%32)
 522
 523 /* Returns the bit mask of the field that is NOT shifted into location. */
 524 static inline u32 amap_mask(u32 bitsize)
 525 {
 526         return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
 527 }
 528
 529 static inline void
 530 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
 531 {
 532         u32 *dw = (u32 *) ptr + dw_offset;
 533         *dw &= ~(mask << offset);
 534         *dw |= (mask & value) << offset;
 535 }
 536
 537 #define AMAP_SET_BITS(_struct, field, ptr, val)                         \
 538                 amap_set(ptr,                                           \
 539                         offsetof(_struct, field)/32,                    \
 540                         amap_mask(sizeof(((_struct *)0)->field)),       \
 541                         AMAP_BIT_OFFSET(_struct, field),                \
 542                         val)
 543
 544 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
 545 {
 546         u32 *dw = (u32 *) ptr;
 547         return mask & (*(dw + dw_offset) >> offset);
 548 }
 549
 550 #define AMAP_GET_BITS(_struct, field, ptr)                              \
 551                 amap_get(ptr,                                           \
 552                         offsetof(_struct, field)/32,                    \
 553                         amap_mask(sizeof(((_struct *)0)->field)),       \
 554                         AMAP_BIT_OFFSET(_struct, field))
 555
 556 #define be_dws_cpu_to_le(wrb, len)      swap_dws(wrb, len)
 557 #define be_dws_le_to_cpu(wrb, len)      swap_dws(wrb, len)
 558 static inline void swap_dws(void *wrb, int len)
 559 {
 560 #ifdef __BIG_ENDIAN
 561         u32 *dw = wrb;
 562         BUG_ON(len % 4);
 563         do {
 564                 *dw = cpu_to_le32(*dw);
 565                 dw++;
 566                 len -= 4;
 567         } while (len);
 568 #endif                          /* __BIG_ENDIAN */
 569 }
 570
 571 static inline u8 is_tcp_pkt(struct sk_buff *skb)
 572 {
 573         u8 val = 0;
 574
 575         if (ip_hdr(skb)->version == 4)
 576                 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
 577         else if (ip_hdr(skb)->version == 6)
 578                 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
 579
 580         return val;
 581 }
 582
 583 static inline u8 is_udp_pkt(struct sk_buff *skb)
 584 {
 585         u8 val = 0;
 586
 587         if (ip_hdr(skb)->version == 4)
 588                 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
 589         else if (ip_hdr(skb)->version == 6)
 590                 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
 591
 592         return val;
 593 }
 594
 595 static inline bool is_ipv4_pkt(struct sk_buff *skb)
 596 {
 597         return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
 598 }
 599
 600 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
 601 {
 602         u32 addr;
 603
 604         addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
 605
 606         mac[5] = (u8)(addr & 0xFF);
 607         mac[4] = (u8)((addr >> 8) & 0xFF);
 608         mac[3] = (u8)((addr >> 16) & 0xFF);
 609         /* Use the OUI from the current MAC address */
 610         memcpy(mac, adapter->netdev->dev_addr, 3);
 611 }
 612
 613 static inline bool be_multi_rxq(const struct be_adapter *adapter)
 614 {
 615         return adapter->num_rx_qs > 1;
 616 }
 617
 618 static inline bool be_error(struct be_adapter *adapter)
 619 {
 620         return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout;
 621 }
 622
 623 static inline bool be_crit_error(struct be_adapter *adapter)
 624 {
 625         return adapter->eeh_error || adapter->hw_error;
 626 }
 627
 628 static inline void  be_clear_all_error(struct be_adapter *adapter)
 629 {
 630         adapter->eeh_error = false;
 631         adapter->hw_error = false;
 632         adapter->fw_timeout = false;
 633 }
 634
 635 static inline bool be_is_wol_excluded(struct be_adapter *adapter)
 636 {
 637         struct pci_dev *pdev = adapter->pdev;
 638
 639         if (!be_physfn(adapter))
 640                 return true;
 641
 642         switch (pdev->subsystem_device) {
 643         case OC_SUBSYS_DEVICE_ID1:
 644         case OC_SUBSYS_DEVICE_ID2:
 645         case OC_SUBSYS_DEVICE_ID3:
 646         case OC_SUBSYS_DEVICE_ID4:
 647                 return true;
 648         default:
 649                 return false;
 650         }
 651 }
 652
 653 static inline bool be_type_2_3(struct be_adapter *adapter)
 654 {
 655         return (adapter->if_type == SLI_INTF_TYPE_2 ||
 656                 adapter->if_type == SLI_INTF_TYPE_3) ? true : false;
 657 }
 658
 659 extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
 660                 u16 num_popped);
 661 extern void be_link_status_update(struct be_adapter *adapter, u8 link_status);
 662 extern void be_parse_stats(struct be_adapter *adapter);
 663 extern int be_load_fw(struct be_adapter *adapter, u8 *func);
 664 extern bool be_is_wol_supported(struct be_adapter *adapter);
 665 extern bool be_pause_supported(struct be_adapter *adapter);
 666 extern u32 be_get_fw_log_level(struct be_adapter *adapter);
 667
 668 /*
 669  * internal function to initialize-cleanup roce device.
 670  */
 671 extern void be_roce_dev_add(struct be_adapter *);
 672 extern void be_roce_dev_remove(struct be_adapter *);
 673
 674 /*
 675  * internal function to open-close roce device during ifup-ifdown.
 676  */
 677 extern void be_roce_dev_open(struct be_adapter *);
 678 extern void be_roce_dev_close(struct be_adapter *);
 679
 680 #endif                          /* BE_H */