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5e48674f72456cc7595a92e1bb77365ddd661a0e
[deliverable/linux.git] / drivers / net / ethernet / emulex / benet / be_main.c
1 /*
2 * Copyright (C) 2005 - 2011 Emulex
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@emulex.com
12 *
13 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
16 */
17
18 #include <linux/prefetch.h>
19 #include <linux/module.h>
20 #include "be.h"
21 #include "be_cmds.h"
22 #include <asm/div64.h>
23 #include <linux/aer.h>
24
25 MODULE_VERSION(DRV_VER);
26 MODULE_DEVICE_TABLE(pci, be_dev_ids);
27 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
28 MODULE_AUTHOR("ServerEngines Corporation");
29 MODULE_LICENSE("GPL");
30
31 static unsigned int num_vfs;
32 module_param(num_vfs, uint, S_IRUGO);
33 MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
34
35 static ushort rx_frag_size = 2048;
36 module_param(rx_frag_size, ushort, S_IRUGO);
37 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
38
39 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
40 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
41 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
42 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
43 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
44 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID3)},
45 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID4)},
46 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID5)},
47 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID6)},
48 { 0 }
49 };
50 MODULE_DEVICE_TABLE(pci, be_dev_ids);
51 /* UE Status Low CSR */
52 static const char * const ue_status_low_desc[] = {
53 "CEV",
54 "CTX",
55 "DBUF",
56 "ERX",
57 "Host",
58 "MPU",
59 "NDMA",
60 "PTC ",
61 "RDMA ",
62 "RXF ",
63 "RXIPS ",
64 "RXULP0 ",
65 "RXULP1 ",
66 "RXULP2 ",
67 "TIM ",
68 "TPOST ",
69 "TPRE ",
70 "TXIPS ",
71 "TXULP0 ",
72 "TXULP1 ",
73 "UC ",
74 "WDMA ",
75 "TXULP2 ",
76 "HOST1 ",
77 "P0_OB_LINK ",
78 "P1_OB_LINK ",
79 "HOST_GPIO ",
80 "MBOX ",
81 "AXGMAC0",
82 "AXGMAC1",
83 "JTAG",
84 "MPU_INTPEND"
85 };
86 /* UE Status High CSR */
87 static const char * const ue_status_hi_desc[] = {
88 "LPCMEMHOST",
89 "MGMT_MAC",
90 "PCS0ONLINE",
91 "MPU_IRAM",
92 "PCS1ONLINE",
93 "PCTL0",
94 "PCTL1",
95 "PMEM",
96 "RR",
97 "TXPB",
98 "RXPP",
99 "XAUI",
100 "TXP",
101 "ARM",
102 "IPC",
103 "HOST2",
104 "HOST3",
105 "HOST4",
106 "HOST5",
107 "HOST6",
108 "HOST7",
109 "HOST8",
110 "HOST9",
111 "NETC",
112 "Unknown",
113 "Unknown",
114 "Unknown",
115 "Unknown",
116 "Unknown",
117 "Unknown",
118 "Unknown",
119 "Unknown"
120 };
121
122 /* Is BE in a multi-channel mode */
123 static inline bool be_is_mc(struct be_adapter *adapter) {
124 return (adapter->function_mode & FLEX10_MODE ||
125 adapter->function_mode & VNIC_MODE ||
126 adapter->function_mode & UMC_ENABLED);
127 }
128
129 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
130 {
131 struct be_dma_mem *mem = &q->dma_mem;
132 if (mem->va) {
133 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
134 mem->dma);
135 mem->va = NULL;
136 }
137 }
138
139 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
140 u16 len, u16 entry_size)
141 {
142 struct be_dma_mem *mem = &q->dma_mem;
143
144 memset(q, 0, sizeof(*q));
145 q->len = len;
146 q->entry_size = entry_size;
147 mem->size = len * entry_size;
148 mem->va = dma_alloc_coherent(&adapter->pdev->dev, mem->size, &mem->dma,
149 GFP_KERNEL);
150 if (!mem->va)
151 return -ENOMEM;
152 memset(mem->va, 0, mem->size);
153 return 0;
154 }
155
156 static void be_intr_set(struct be_adapter *adapter, bool enable)
157 {
158 u32 reg, enabled;
159
160 if (adapter->eeh_error)
161 return;
162
163 pci_read_config_dword(adapter->pdev, PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET,
164 &reg);
165 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
166
167 if (!enabled && enable)
168 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
169 else if (enabled && !enable)
170 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
171 else
172 return;
173
174 pci_write_config_dword(adapter->pdev,
175 PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET, reg);
176 }
177
178 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
179 {
180 u32 val = 0;
181 val |= qid & DB_RQ_RING_ID_MASK;
182 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
183
184 wmb();
185 iowrite32(val, adapter->db + DB_RQ_OFFSET);
186 }
187
188 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
189 {
190 u32 val = 0;
191 val |= qid & DB_TXULP_RING_ID_MASK;
192 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
193
194 wmb();
195 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
196 }
197
198 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
199 bool arm, bool clear_int, u16 num_popped)
200 {
201 u32 val = 0;
202 val |= qid & DB_EQ_RING_ID_MASK;
203 val |= ((qid & DB_EQ_RING_ID_EXT_MASK) <<
204 DB_EQ_RING_ID_EXT_MASK_SHIFT);
205
206 if (adapter->eeh_error)
207 return;
208
209 if (arm)
210 val |= 1 << DB_EQ_REARM_SHIFT;
211 if (clear_int)
212 val |= 1 << DB_EQ_CLR_SHIFT;
213 val |= 1 << DB_EQ_EVNT_SHIFT;
214 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
215 iowrite32(val, adapter->db + DB_EQ_OFFSET);
216 }
217
218 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
219 {
220 u32 val = 0;
221 val |= qid & DB_CQ_RING_ID_MASK;
222 val |= ((qid & DB_CQ_RING_ID_EXT_MASK) <<
223 DB_CQ_RING_ID_EXT_MASK_SHIFT);
224
225 if (adapter->eeh_error)
226 return;
227
228 if (arm)
229 val |= 1 << DB_CQ_REARM_SHIFT;
230 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
231 iowrite32(val, adapter->db + DB_CQ_OFFSET);
232 }
233
234 static int be_mac_addr_set(struct net_device *netdev, void *p)
235 {
236 struct be_adapter *adapter = netdev_priv(netdev);
237 struct sockaddr *addr = p;
238 int status = 0;
239 u8 current_mac[ETH_ALEN];
240 u32 pmac_id = adapter->pmac_id[0];
241 bool active_mac = true;
242
243 if (!is_valid_ether_addr(addr->sa_data))
244 return -EADDRNOTAVAIL;
245
246 /* For BE VF, MAC address is already activated by PF.
247 * Hence only operation left is updating netdev->devaddr.
248 * Update it if user is passing the same MAC which was used
249 * during configuring VF MAC from PF(Hypervisor).
250 */
251 if (!lancer_chip(adapter) && !be_physfn(adapter)) {
252 status = be_cmd_mac_addr_query(adapter, current_mac,
253 false, adapter->if_handle, 0);
254 if (!status && !memcmp(current_mac, addr->sa_data, ETH_ALEN))
255 goto done;
256 else
257 goto err;
258 }
259
260 if (!memcmp(addr->sa_data, netdev->dev_addr, ETH_ALEN))
261 goto done;
262
263 /* For Lancer check if any MAC is active.
264 * If active, get its mac id.
265 */
266 if (lancer_chip(adapter) && !be_physfn(adapter))
267 be_cmd_get_mac_from_list(adapter, current_mac, &active_mac,
268 &pmac_id, 0);
269
270 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
271 adapter->if_handle,
272 &adapter->pmac_id[0], 0);
273
274 if (status)
275 goto err;
276
277 if (active_mac)
278 be_cmd_pmac_del(adapter, adapter->if_handle,
279 pmac_id, 0);
280 done:
281 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
282 return 0;
283 err:
284 dev_err(&adapter->pdev->dev, "MAC %pM set Failed\n", addr->sa_data);
285 return status;
286 }
287
288 static void populate_be2_stats(struct be_adapter *adapter)
289 {
290 struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter);
291 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
292 struct be_rxf_stats_v0 *rxf_stats = &hw_stats->rxf;
293 struct be_port_rxf_stats_v0 *port_stats =
294 &rxf_stats->port[adapter->port_num];
295 struct be_drv_stats *drvs = &adapter->drv_stats;
296
297 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
298 drvs->rx_pause_frames = port_stats->rx_pause_frames;
299 drvs->rx_crc_errors = port_stats->rx_crc_errors;
300 drvs->rx_control_frames = port_stats->rx_control_frames;
301 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
302 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
303 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
304 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
305 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
306 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
307 drvs->rxpp_fifo_overflow_drop = port_stats->rx_fifo_overflow;
308 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
309 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
310 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
311 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
312 drvs->rx_input_fifo_overflow_drop = port_stats->rx_input_fifo_overflow;
313 drvs->rx_dropped_header_too_small =
314 port_stats->rx_dropped_header_too_small;
315 drvs->rx_address_mismatch_drops =
316 port_stats->rx_address_mismatch_drops +
317 port_stats->rx_vlan_mismatch_drops;
318 drvs->rx_alignment_symbol_errors =
319 port_stats->rx_alignment_symbol_errors;
320
321 drvs->tx_pauseframes = port_stats->tx_pauseframes;
322 drvs->tx_controlframes = port_stats->tx_controlframes;
323
324 if (adapter->port_num)
325 drvs->jabber_events = rxf_stats->port1_jabber_events;
326 else
327 drvs->jabber_events = rxf_stats->port0_jabber_events;
328 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
329 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
330 drvs->forwarded_packets = rxf_stats->forwarded_packets;
331 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
332 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
333 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
334 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
335 }
336
337 static void populate_be3_stats(struct be_adapter *adapter)
338 {
339 struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter);
340 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
341 struct be_rxf_stats_v1 *rxf_stats = &hw_stats->rxf;
342 struct be_port_rxf_stats_v1 *port_stats =
343 &rxf_stats->port[adapter->port_num];
344 struct be_drv_stats *drvs = &adapter->drv_stats;
345
346 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
347 drvs->pmem_fifo_overflow_drop = port_stats->pmem_fifo_overflow_drop;
348 drvs->rx_priority_pause_frames = port_stats->rx_priority_pause_frames;
349 drvs->rx_pause_frames = port_stats->rx_pause_frames;
350 drvs->rx_crc_errors = port_stats->rx_crc_errors;
351 drvs->rx_control_frames = port_stats->rx_control_frames;
352 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
353 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
354 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
355 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
356 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
357 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
358 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
359 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
360 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
361 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
362 drvs->rx_dropped_header_too_small =
363 port_stats->rx_dropped_header_too_small;
364 drvs->rx_input_fifo_overflow_drop =
365 port_stats->rx_input_fifo_overflow_drop;
366 drvs->rx_address_mismatch_drops = port_stats->rx_address_mismatch_drops;
367 drvs->rx_alignment_symbol_errors =
368 port_stats->rx_alignment_symbol_errors;
369 drvs->rxpp_fifo_overflow_drop = port_stats->rxpp_fifo_overflow_drop;
370 drvs->tx_pauseframes = port_stats->tx_pauseframes;
371 drvs->tx_controlframes = port_stats->tx_controlframes;
372 drvs->jabber_events = port_stats->jabber_events;
373 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
374 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
375 drvs->forwarded_packets = rxf_stats->forwarded_packets;
376 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
377 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
378 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
379 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
380 }
381
382 static void populate_lancer_stats(struct be_adapter *adapter)
383 {
384
385 struct be_drv_stats *drvs = &adapter->drv_stats;
386 struct lancer_pport_stats *pport_stats =
387 pport_stats_from_cmd(adapter);
388
389 be_dws_le_to_cpu(pport_stats, sizeof(*pport_stats));
390 drvs->rx_pause_frames = pport_stats->rx_pause_frames_lo;
391 drvs->rx_crc_errors = pport_stats->rx_crc_errors_lo;
392 drvs->rx_control_frames = pport_stats->rx_control_frames_lo;
393 drvs->rx_in_range_errors = pport_stats->rx_in_range_errors;
394 drvs->rx_frame_too_long = pport_stats->rx_frames_too_long_lo;
395 drvs->rx_dropped_runt = pport_stats->rx_dropped_runt;
396 drvs->rx_ip_checksum_errs = pport_stats->rx_ip_checksum_errors;
397 drvs->rx_tcp_checksum_errs = pport_stats->rx_tcp_checksum_errors;
398 drvs->rx_udp_checksum_errs = pport_stats->rx_udp_checksum_errors;
399 drvs->rx_dropped_tcp_length =
400 pport_stats->rx_dropped_invalid_tcp_length;
401 drvs->rx_dropped_too_small = pport_stats->rx_dropped_too_small;
402 drvs->rx_dropped_too_short = pport_stats->rx_dropped_too_short;
403 drvs->rx_out_range_errors = pport_stats->rx_out_of_range_errors;
404 drvs->rx_dropped_header_too_small =
405 pport_stats->rx_dropped_header_too_small;
406 drvs->rx_input_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
407 drvs->rx_address_mismatch_drops =
408 pport_stats->rx_address_mismatch_drops +
409 pport_stats->rx_vlan_mismatch_drops;
410 drvs->rx_alignment_symbol_errors = pport_stats->rx_symbol_errors_lo;
411 drvs->rxpp_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
412 drvs->tx_pauseframes = pport_stats->tx_pause_frames_lo;
413 drvs->tx_controlframes = pport_stats->tx_control_frames_lo;
414 drvs->jabber_events = pport_stats->rx_jabbers;
415 drvs->forwarded_packets = pport_stats->num_forwards_lo;
416 drvs->rx_drops_mtu = pport_stats->rx_drops_mtu_lo;
417 drvs->rx_drops_too_many_frags =
418 pport_stats->rx_drops_too_many_frags_lo;
419 }
420
421 static void accumulate_16bit_val(u32 *acc, u16 val)
422 {
423 #define lo(x) (x & 0xFFFF)
424 #define hi(x) (x & 0xFFFF0000)
425 bool wrapped = val < lo(*acc);
426 u32 newacc = hi(*acc) + val;
427
428 if (wrapped)
429 newacc += 65536;
430 ACCESS_ONCE(*acc) = newacc;
431 }
432
433 void be_parse_stats(struct be_adapter *adapter)
434 {
435 struct be_erx_stats_v1 *erx = be_erx_stats_from_cmd(adapter);
436 struct be_rx_obj *rxo;
437 int i;
438
439 if (adapter->generation == BE_GEN3) {
440 if (lancer_chip(adapter))
441 populate_lancer_stats(adapter);
442 else
443 populate_be3_stats(adapter);
444 } else {
445 populate_be2_stats(adapter);
446 }
447
448 if (lancer_chip(adapter))
449 goto done;
450
451 /* as erx_v1 is longer than v0, ok to use v1 defn for v0 access */
452 for_all_rx_queues(adapter, rxo, i) {
453 /* below erx HW counter can actually wrap around after
454 * 65535. Driver accumulates a 32-bit value
455 */
456 accumulate_16bit_val(&rx_stats(rxo)->rx_drops_no_frags,
457 (u16)erx->rx_drops_no_fragments[rxo->q.id]);
458 }
459 done:
460 return;
461 }
462
463 static struct rtnl_link_stats64 *be_get_stats64(struct net_device *netdev,
464 struct rtnl_link_stats64 *stats)
465 {
466 struct be_adapter *adapter = netdev_priv(netdev);
467 struct be_drv_stats *drvs = &adapter->drv_stats;
468 struct be_rx_obj *rxo;
469 struct be_tx_obj *txo;
470 u64 pkts, bytes;
471 unsigned int start;
472 int i;
473
474 for_all_rx_queues(adapter, rxo, i) {
475 const struct be_rx_stats *rx_stats = rx_stats(rxo);
476 do {
477 start = u64_stats_fetch_begin_bh(&rx_stats->sync);
478 pkts = rx_stats(rxo)->rx_pkts;
479 bytes = rx_stats(rxo)->rx_bytes;
480 } while (u64_stats_fetch_retry_bh(&rx_stats->sync, start));
481 stats->rx_packets += pkts;
482 stats->rx_bytes += bytes;
483 stats->multicast += rx_stats(rxo)->rx_mcast_pkts;
484 stats->rx_dropped += rx_stats(rxo)->rx_drops_no_skbs +
485 rx_stats(rxo)->rx_drops_no_frags;
486 }
487
488 for_all_tx_queues(adapter, txo, i) {
489 const struct be_tx_stats *tx_stats = tx_stats(txo);
490 do {
491 start = u64_stats_fetch_begin_bh(&tx_stats->sync);
492 pkts = tx_stats(txo)->tx_pkts;
493 bytes = tx_stats(txo)->tx_bytes;
494 } while (u64_stats_fetch_retry_bh(&tx_stats->sync, start));
495 stats->tx_packets += pkts;
496 stats->tx_bytes += bytes;
497 }
498
499 /* bad pkts received */
500 stats->rx_errors = drvs->rx_crc_errors +
501 drvs->rx_alignment_symbol_errors +
502 drvs->rx_in_range_errors +
503 drvs->rx_out_range_errors +
504 drvs->rx_frame_too_long +
505 drvs->rx_dropped_too_small +
506 drvs->rx_dropped_too_short +
507 drvs->rx_dropped_header_too_small +
508 drvs->rx_dropped_tcp_length +
509 drvs->rx_dropped_runt;
510
511 /* detailed rx errors */
512 stats->rx_length_errors = drvs->rx_in_range_errors +
513 drvs->rx_out_range_errors +
514 drvs->rx_frame_too_long;
515
516 stats->rx_crc_errors = drvs->rx_crc_errors;
517
518 /* frame alignment errors */
519 stats->rx_frame_errors = drvs->rx_alignment_symbol_errors;
520
521 /* receiver fifo overrun */
522 /* drops_no_pbuf is no per i/f, it's per BE card */
523 stats->rx_fifo_errors = drvs->rxpp_fifo_overflow_drop +
524 drvs->rx_input_fifo_overflow_drop +
525 drvs->rx_drops_no_pbuf;
526 return stats;
527 }
528
529 void be_link_status_update(struct be_adapter *adapter, u8 link_status)
530 {
531 struct net_device *netdev = adapter->netdev;
532
533 if (!(adapter->flags & BE_FLAGS_LINK_STATUS_INIT)) {
534 netif_carrier_off(netdev);
535 adapter->flags |= BE_FLAGS_LINK_STATUS_INIT;
536 }
537
538 if ((link_status & LINK_STATUS_MASK) == LINK_UP)
539 netif_carrier_on(netdev);
540 else
541 netif_carrier_off(netdev);
542 }
543
544 static void be_tx_stats_update(struct be_tx_obj *txo,
545 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
546 {
547 struct be_tx_stats *stats = tx_stats(txo);
548
549 u64_stats_update_begin(&stats->sync);
550 stats->tx_reqs++;
551 stats->tx_wrbs += wrb_cnt;
552 stats->tx_bytes += copied;
553 stats->tx_pkts += (gso_segs ? gso_segs : 1);
554 if (stopped)
555 stats->tx_stops++;
556 u64_stats_update_end(&stats->sync);
557 }
558
559 /* Determine number of WRB entries needed to xmit data in an skb */
560 static u32 wrb_cnt_for_skb(struct be_adapter *adapter, struct sk_buff *skb,
561 bool *dummy)
562 {
563 int cnt = (skb->len > skb->data_len);
564
565 cnt += skb_shinfo(skb)->nr_frags;
566
567 /* to account for hdr wrb */
568 cnt++;
569 if (lancer_chip(adapter) || !(cnt & 1)) {
570 *dummy = false;
571 } else {
572 /* add a dummy to make it an even num */
573 cnt++;
574 *dummy = true;
575 }
576 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
577 return cnt;
578 }
579
580 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
581 {
582 wrb->frag_pa_hi = upper_32_bits(addr);
583 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
584 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
585 wrb->rsvd0 = 0;
586 }
587
588 static inline u16 be_get_tx_vlan_tag(struct be_adapter *adapter,
589 struct sk_buff *skb)
590 {
591 u8 vlan_prio;
592 u16 vlan_tag;
593
594 vlan_tag = vlan_tx_tag_get(skb);
595 vlan_prio = (vlan_tag & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
596 /* If vlan priority provided by OS is NOT in available bmap */
597 if (!(adapter->vlan_prio_bmap & (1 << vlan_prio)))
598 vlan_tag = (vlan_tag & ~VLAN_PRIO_MASK) |
599 adapter->recommended_prio;
600
601 return vlan_tag;
602 }
603
604 static int be_vlan_tag_chk(struct be_adapter *adapter, struct sk_buff *skb)
605 {
606 return vlan_tx_tag_present(skb) || adapter->pvid;
607 }
608
609 static void wrb_fill_hdr(struct be_adapter *adapter, struct be_eth_hdr_wrb *hdr,
610 struct sk_buff *skb, u32 wrb_cnt, u32 len)
611 {
612 u16 vlan_tag;
613
614 memset(hdr, 0, sizeof(*hdr));
615
616 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
617
618 if (skb_is_gso(skb)) {
619 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
620 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
621 hdr, skb_shinfo(skb)->gso_size);
622 if (skb_is_gso_v6(skb) && !lancer_chip(adapter))
623 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
624 if (lancer_chip(adapter) && adapter->sli_family ==
625 LANCER_A0_SLI_FAMILY) {
626 AMAP_SET_BITS(struct amap_eth_hdr_wrb, ipcs, hdr, 1);
627 if (is_tcp_pkt(skb))
628 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
629 tcpcs, hdr, 1);
630 else if (is_udp_pkt(skb))
631 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
632 udpcs, hdr, 1);
633 }
634 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
635 if (is_tcp_pkt(skb))
636 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
637 else if (is_udp_pkt(skb))
638 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
639 }
640
641 if (vlan_tx_tag_present(skb)) {
642 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
643 vlan_tag = be_get_tx_vlan_tag(adapter, skb);
644 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag, hdr, vlan_tag);
645 }
646
647 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
648 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
649 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
650 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
651 }
652
653 static void unmap_tx_frag(struct device *dev, struct be_eth_wrb *wrb,
654 bool unmap_single)
655 {
656 dma_addr_t dma;
657
658 be_dws_le_to_cpu(wrb, sizeof(*wrb));
659
660 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
661 if (wrb->frag_len) {
662 if (unmap_single)
663 dma_unmap_single(dev, dma, wrb->frag_len,
664 DMA_TO_DEVICE);
665 else
666 dma_unmap_page(dev, dma, wrb->frag_len, DMA_TO_DEVICE);
667 }
668 }
669
670 static int make_tx_wrbs(struct be_adapter *adapter, struct be_queue_info *txq,
671 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
672 {
673 dma_addr_t busaddr;
674 int i, copied = 0;
675 struct device *dev = &adapter->pdev->dev;
676 struct sk_buff *first_skb = skb;
677 struct be_eth_wrb *wrb;
678 struct be_eth_hdr_wrb *hdr;
679 bool map_single = false;
680 u16 map_head;
681
682 hdr = queue_head_node(txq);
683 queue_head_inc(txq);
684 map_head = txq->head;
685
686 if (skb->len > skb->data_len) {
687 int len = skb_headlen(skb);
688 busaddr = dma_map_single(dev, skb->data, len, DMA_TO_DEVICE);
689 if (dma_mapping_error(dev, busaddr))
690 goto dma_err;
691 map_single = true;
692 wrb = queue_head_node(txq);
693 wrb_fill(wrb, busaddr, len);
694 be_dws_cpu_to_le(wrb, sizeof(*wrb));
695 queue_head_inc(txq);
696 copied += len;
697 }
698
699 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
700 const struct skb_frag_struct *frag =
701 &skb_shinfo(skb)->frags[i];
702 busaddr = skb_frag_dma_map(dev, frag, 0,
703 skb_frag_size(frag), DMA_TO_DEVICE);
704 if (dma_mapping_error(dev, busaddr))
705 goto dma_err;
706 wrb = queue_head_node(txq);
707 wrb_fill(wrb, busaddr, skb_frag_size(frag));
708 be_dws_cpu_to_le(wrb, sizeof(*wrb));
709 queue_head_inc(txq);
710 copied += skb_frag_size(frag);
711 }
712
713 if (dummy_wrb) {
714 wrb = queue_head_node(txq);
715 wrb_fill(wrb, 0, 0);
716 be_dws_cpu_to_le(wrb, sizeof(*wrb));
717 queue_head_inc(txq);
718 }
719
720 wrb_fill_hdr(adapter, hdr, first_skb, wrb_cnt, copied);
721 be_dws_cpu_to_le(hdr, sizeof(*hdr));
722
723 return copied;
724 dma_err:
725 txq->head = map_head;
726 while (copied) {
727 wrb = queue_head_node(txq);
728 unmap_tx_frag(dev, wrb, map_single);
729 map_single = false;
730 copied -= wrb->frag_len;
731 queue_head_inc(txq);
732 }
733 return 0;
734 }
735
736 static struct sk_buff *be_insert_vlan_in_pkt(struct be_adapter *adapter,
737 struct sk_buff *skb)
738 {
739 u16 vlan_tag = 0;
740
741 skb = skb_share_check(skb, GFP_ATOMIC);
742 if (unlikely(!skb))
743 return skb;
744
745 if (vlan_tx_tag_present(skb)) {
746 vlan_tag = be_get_tx_vlan_tag(adapter, skb);
747 __vlan_put_tag(skb, vlan_tag);
748 skb->vlan_tci = 0;
749 }
750
751 return skb;
752 }
753
754 static netdev_tx_t be_xmit(struct sk_buff *skb,
755 struct net_device *netdev)
756 {
757 struct be_adapter *adapter = netdev_priv(netdev);
758 struct be_tx_obj *txo = &adapter->tx_obj[skb_get_queue_mapping(skb)];
759 struct be_queue_info *txq = &txo->q;
760 struct iphdr *ip = NULL;
761 u32 wrb_cnt = 0, copied = 0;
762 u32 start = txq->head, eth_hdr_len;
763 bool dummy_wrb, stopped = false;
764
765 eth_hdr_len = ntohs(skb->protocol) == ETH_P_8021Q ?
766 VLAN_ETH_HLEN : ETH_HLEN;
767
768 /* HW has a bug which considers padding bytes as legal
769 * and modifies the IPv4 hdr's 'tot_len' field
770 */
771 if (skb->len <= 60 && be_vlan_tag_chk(adapter, skb) &&
772 is_ipv4_pkt(skb)) {
773 ip = (struct iphdr *)ip_hdr(skb);
774 pskb_trim(skb, eth_hdr_len + ntohs(ip->tot_len));
775 }
776
777 /* HW has a bug wherein it will calculate CSUM for VLAN
778 * pkts even though it is disabled.
779 * Manually insert VLAN in pkt.
780 */
781 if (skb->ip_summed != CHECKSUM_PARTIAL &&
782 be_vlan_tag_chk(adapter, skb)) {
783 skb = be_insert_vlan_in_pkt(adapter, skb);
784 if (unlikely(!skb))
785 goto tx_drop;
786 }
787
788 wrb_cnt = wrb_cnt_for_skb(adapter, skb, &dummy_wrb);
789
790 copied = make_tx_wrbs(adapter, txq, skb, wrb_cnt, dummy_wrb);
791 if (copied) {
792 int gso_segs = skb_shinfo(skb)->gso_segs;
793
794 /* record the sent skb in the sent_skb table */
795 BUG_ON(txo->sent_skb_list[start]);
796 txo->sent_skb_list[start] = skb;
797
798 /* Ensure txq has space for the next skb; Else stop the queue
799 * *BEFORE* ringing the tx doorbell, so that we serialze the
800 * tx compls of the current transmit which'll wake up the queue
801 */
802 atomic_add(wrb_cnt, &txq->used);
803 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
804 txq->len) {
805 netif_stop_subqueue(netdev, skb_get_queue_mapping(skb));
806 stopped = true;
807 }
808
809 be_txq_notify(adapter, txq->id, wrb_cnt);
810
811 be_tx_stats_update(txo, wrb_cnt, copied, gso_segs, stopped);
812 } else {
813 txq->head = start;
814 dev_kfree_skb_any(skb);
815 }
816 tx_drop:
817 return NETDEV_TX_OK;
818 }
819
820 static int be_change_mtu(struct net_device *netdev, int new_mtu)
821 {
822 struct be_adapter *adapter = netdev_priv(netdev);
823 if (new_mtu < BE_MIN_MTU ||
824 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
825 (ETH_HLEN + ETH_FCS_LEN))) {
826 dev_info(&adapter->pdev->dev,
827 "MTU must be between %d and %d bytes\n",
828 BE_MIN_MTU,
829 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
830 return -EINVAL;
831 }
832 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
833 netdev->mtu, new_mtu);
834 netdev->mtu = new_mtu;
835 return 0;
836 }
837
838 /*
839 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
840 * If the user configures more, place BE in vlan promiscuous mode.
841 */
842 static int be_vid_config(struct be_adapter *adapter)
843 {
844 u16 vids[BE_NUM_VLANS_SUPPORTED];
845 u16 num = 0, i;
846 int status = 0;
847
848 /* No need to further configure vids if in promiscuous mode */
849 if (adapter->promiscuous)
850 return 0;
851
852 if (adapter->vlans_added > adapter->max_vlans)
853 goto set_vlan_promisc;
854
855 /* Construct VLAN Table to give to HW */
856 for (i = 0; i < VLAN_N_VID; i++)
857 if (adapter->vlan_tag[i])
858 vids[num++] = cpu_to_le16(i);
859
860 status = be_cmd_vlan_config(adapter, adapter->if_handle,
861 vids, num, 1, 0);
862
863 /* Set to VLAN promisc mode as setting VLAN filter failed */
864 if (status) {
865 dev_info(&adapter->pdev->dev, "Exhausted VLAN HW filters.\n");
866 dev_info(&adapter->pdev->dev, "Disabling HW VLAN filtering.\n");
867 goto set_vlan_promisc;
868 }
869
870 return status;
871
872 set_vlan_promisc:
873 status = be_cmd_vlan_config(adapter, adapter->if_handle,
874 NULL, 0, 1, 1);
875 return status;
876 }
877
878 static int be_vlan_add_vid(struct net_device *netdev, u16 vid)
879 {
880 struct be_adapter *adapter = netdev_priv(netdev);
881 int status = 0;
882
883 if (!lancer_chip(adapter) && !be_physfn(adapter)) {
884 status = -EINVAL;
885 goto ret;
886 }
887
888 /* Packets with VID 0 are always received by Lancer by default */
889 if (lancer_chip(adapter) && vid == 0)
890 goto ret;
891
892 adapter->vlan_tag[vid] = 1;
893 if (adapter->vlans_added <= (adapter->max_vlans + 1))
894 status = be_vid_config(adapter);
895
896 if (!status)
897 adapter->vlans_added++;
898 else
899 adapter->vlan_tag[vid] = 0;
900 ret:
901 return status;
902 }
903
904 static int be_vlan_rem_vid(struct net_device *netdev, u16 vid)
905 {
906 struct be_adapter *adapter = netdev_priv(netdev);
907 int status = 0;
908
909 if (!lancer_chip(adapter) && !be_physfn(adapter)) {
910 status = -EINVAL;
911 goto ret;
912 }
913
914 /* Packets with VID 0 are always received by Lancer by default */
915 if (lancer_chip(adapter) && vid == 0)
916 goto ret;
917
918 adapter->vlan_tag[vid] = 0;
919 if (adapter->vlans_added <= adapter->max_vlans)
920 status = be_vid_config(adapter);
921
922 if (!status)
923 adapter->vlans_added--;
924 else
925 adapter->vlan_tag[vid] = 1;
926 ret:
927 return status;
928 }
929
930 static void be_set_rx_mode(struct net_device *netdev)
931 {
932 struct be_adapter *adapter = netdev_priv(netdev);
933 int status;
934
935 if (netdev->flags & IFF_PROMISC) {
936 be_cmd_rx_filter(adapter, IFF_PROMISC, ON);
937 adapter->promiscuous = true;
938 goto done;
939 }
940
941 /* BE was previously in promiscuous mode; disable it */
942 if (adapter->promiscuous) {
943 adapter->promiscuous = false;
944 be_cmd_rx_filter(adapter, IFF_PROMISC, OFF);
945
946 if (adapter->vlans_added)
947 be_vid_config(adapter);
948 }
949
950 /* Enable multicast promisc if num configured exceeds what we support */
951 if (netdev->flags & IFF_ALLMULTI ||
952 netdev_mc_count(netdev) > adapter->max_mcast_mac) {
953 be_cmd_rx_filter(adapter, IFF_ALLMULTI, ON);
954 goto done;
955 }
956
957 if (netdev_uc_count(netdev) != adapter->uc_macs) {
958 struct netdev_hw_addr *ha;
959 int i = 1; /* First slot is claimed by the Primary MAC */
960
961 for (; adapter->uc_macs > 0; adapter->uc_macs--, i++) {
962 be_cmd_pmac_del(adapter, adapter->if_handle,
963 adapter->pmac_id[i], 0);
964 }
965
966 if (netdev_uc_count(netdev) > adapter->max_pmac_cnt) {
967 be_cmd_rx_filter(adapter, IFF_PROMISC, ON);
968 adapter->promiscuous = true;
969 goto done;
970 }
971
972 netdev_for_each_uc_addr(ha, adapter->netdev) {
973 adapter->uc_macs++; /* First slot is for Primary MAC */
974 be_cmd_pmac_add(adapter, (u8 *)ha->addr,
975 adapter->if_handle,
976 &adapter->pmac_id[adapter->uc_macs], 0);
977 }
978 }
979
980 status = be_cmd_rx_filter(adapter, IFF_MULTICAST, ON);
981
982 /* Set to MCAST promisc mode if setting MULTICAST address fails */
983 if (status) {
984 dev_info(&adapter->pdev->dev, "Exhausted multicast HW filters.\n");
985 dev_info(&adapter->pdev->dev, "Disabling HW multicast filtering.\n");
986 be_cmd_rx_filter(adapter, IFF_ALLMULTI, ON);
987 }
988 done:
989 return;
990 }
991
992 static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
993 {
994 struct be_adapter *adapter = netdev_priv(netdev);
995 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
996 int status;
997 bool active_mac = false;
998 u32 pmac_id;
999 u8 old_mac[ETH_ALEN];
1000
1001 if (!sriov_enabled(adapter))
1002 return -EPERM;
1003
1004 if (!is_valid_ether_addr(mac) || vf >= adapter->num_vfs)
1005 return -EINVAL;
1006
1007 if (lancer_chip(adapter)) {
1008 status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac,
1009 &pmac_id, vf + 1);
1010 if (!status && active_mac)
1011 be_cmd_pmac_del(adapter, vf_cfg->if_handle,
1012 pmac_id, vf + 1);
1013
1014 status = be_cmd_set_mac_list(adapter, mac, 1, vf + 1);
1015 } else {
1016 status = be_cmd_pmac_del(adapter, vf_cfg->if_handle,
1017 vf_cfg->pmac_id, vf + 1);
1018
1019 status = be_cmd_pmac_add(adapter, mac, vf_cfg->if_handle,
1020 &vf_cfg->pmac_id, vf + 1);
1021 }
1022
1023 if (status)
1024 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
1025 mac, vf);
1026 else
1027 memcpy(vf_cfg->mac_addr, mac, ETH_ALEN);
1028
1029 return status;
1030 }
1031
1032 static int be_get_vf_config(struct net_device *netdev, int vf,
1033 struct ifla_vf_info *vi)
1034 {
1035 struct be_adapter *adapter = netdev_priv(netdev);
1036 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
1037
1038 if (!sriov_enabled(adapter))
1039 return -EPERM;
1040
1041 if (vf >= adapter->num_vfs)
1042 return -EINVAL;
1043
1044 vi->vf = vf;
1045 vi->tx_rate = vf_cfg->tx_rate;
1046 vi->vlan = vf_cfg->vlan_tag;
1047 vi->qos = 0;
1048 memcpy(&vi->mac, vf_cfg->mac_addr, ETH_ALEN);
1049
1050 return 0;
1051 }
1052
1053 static int be_set_vf_vlan(struct net_device *netdev,
1054 int vf, u16 vlan, u8 qos)
1055 {
1056 struct be_adapter *adapter = netdev_priv(netdev);
1057 int status = 0;
1058
1059 if (!sriov_enabled(adapter))
1060 return -EPERM;
1061
1062 if (vf >= adapter->num_vfs || vlan > 4095)
1063 return -EINVAL;
1064
1065 if (vlan) {
1066 if (adapter->vf_cfg[vf].vlan_tag != vlan) {
1067 /* If this is new value, program it. Else skip. */
1068 adapter->vf_cfg[vf].vlan_tag = vlan;
1069
1070 status = be_cmd_set_hsw_config(adapter, vlan,
1071 vf + 1, adapter->vf_cfg[vf].if_handle);
1072 }
1073 } else {
1074 /* Reset Transparent Vlan Tagging. */
1075 adapter->vf_cfg[vf].vlan_tag = 0;
1076 vlan = adapter->vf_cfg[vf].def_vid;
1077 status = be_cmd_set_hsw_config(adapter, vlan, vf + 1,
1078 adapter->vf_cfg[vf].if_handle);
1079 }
1080
1081
1082 if (status)
1083 dev_info(&adapter->pdev->dev,
1084 "VLAN %d config on VF %d failed\n", vlan, vf);
1085 return status;
1086 }
1087
1088 static int be_set_vf_tx_rate(struct net_device *netdev,
1089 int vf, int rate)
1090 {
1091 struct be_adapter *adapter = netdev_priv(netdev);
1092 int status = 0;
1093
1094 if (!sriov_enabled(adapter))
1095 return -EPERM;
1096
1097 if (vf >= adapter->num_vfs)
1098 return -EINVAL;
1099
1100 if (rate < 100 || rate > 10000) {
1101 dev_err(&adapter->pdev->dev,
1102 "tx rate must be between 100 and 10000 Mbps\n");
1103 return -EINVAL;
1104 }
1105
1106 if (lancer_chip(adapter))
1107 status = be_cmd_set_profile_config(adapter, rate / 10, vf + 1);
1108 else
1109 status = be_cmd_set_qos(adapter, rate / 10, vf + 1);
1110
1111 if (status)
1112 dev_err(&adapter->pdev->dev,
1113 "tx rate %d on VF %d failed\n", rate, vf);
1114 else
1115 adapter->vf_cfg[vf].tx_rate = rate;
1116 return status;
1117 }
1118
1119 static int be_find_vfs(struct be_adapter *adapter, int vf_state)
1120 {
1121 struct pci_dev *dev, *pdev = adapter->pdev;
1122 int vfs = 0, assigned_vfs = 0, pos;
1123 u16 offset, stride;
1124
1125 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
1126 if (!pos)
1127 return 0;
1128 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_OFFSET, &offset);
1129 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_STRIDE, &stride);
1130
1131 dev = pci_get_device(pdev->vendor, PCI_ANY_ID, NULL);
1132 while (dev) {
1133 if (dev->is_virtfn && pci_physfn(dev) == pdev) {
1134 vfs++;
1135 if (dev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
1136 assigned_vfs++;
1137 }
1138 dev = pci_get_device(pdev->vendor, PCI_ANY_ID, dev);
1139 }
1140 return (vf_state == ASSIGNED) ? assigned_vfs : vfs;
1141 }
1142
1143 static void be_eqd_update(struct be_adapter *adapter, struct be_eq_obj *eqo)
1144 {
1145 struct be_rx_stats *stats = rx_stats(&adapter->rx_obj[eqo->idx]);
1146 ulong now = jiffies;
1147 ulong delta = now - stats->rx_jiffies;
1148 u64 pkts;
1149 unsigned int start, eqd;
1150
1151 if (!eqo->enable_aic) {
1152 eqd = eqo->eqd;
1153 goto modify_eqd;
1154 }
1155
1156 if (eqo->idx >= adapter->num_rx_qs)
1157 return;
1158
1159 stats = rx_stats(&adapter->rx_obj[eqo->idx]);
1160
1161 /* Wrapped around */
1162 if (time_before(now, stats->rx_jiffies)) {
1163 stats->rx_jiffies = now;
1164 return;
1165 }
1166
1167 /* Update once a second */
1168 if (delta < HZ)
1169 return;
1170
1171 do {
1172 start = u64_stats_fetch_begin_bh(&stats->sync);
1173 pkts = stats->rx_pkts;
1174 } while (u64_stats_fetch_retry_bh(&stats->sync, start));
1175
1176 stats->rx_pps = (unsigned long)(pkts - stats->rx_pkts_prev) / (delta / HZ);
1177 stats->rx_pkts_prev = pkts;
1178 stats->rx_jiffies = now;
1179 eqd = (stats->rx_pps / 110000) << 3;
1180 eqd = min(eqd, eqo->max_eqd);
1181 eqd = max(eqd, eqo->min_eqd);
1182 if (eqd < 10)
1183 eqd = 0;
1184
1185 modify_eqd:
1186 if (eqd != eqo->cur_eqd) {
1187 be_cmd_modify_eqd(adapter, eqo->q.id, eqd);
1188 eqo->cur_eqd = eqd;
1189 }
1190 }
1191
1192 static void be_rx_stats_update(struct be_rx_obj *rxo,
1193 struct be_rx_compl_info *rxcp)
1194 {
1195 struct be_rx_stats *stats = rx_stats(rxo);
1196
1197 u64_stats_update_begin(&stats->sync);
1198 stats->rx_compl++;
1199 stats->rx_bytes += rxcp->pkt_size;
1200 stats->rx_pkts++;
1201 if (rxcp->pkt_type == BE_MULTICAST_PACKET)
1202 stats->rx_mcast_pkts++;
1203 if (rxcp->err)
1204 stats->rx_compl_err++;
1205 u64_stats_update_end(&stats->sync);
1206 }
1207
1208 static inline bool csum_passed(struct be_rx_compl_info *rxcp)
1209 {
1210 /* L4 checksum is not reliable for non TCP/UDP packets.
1211 * Also ignore ipcksm for ipv6 pkts */
1212 return (rxcp->tcpf || rxcp->udpf) && rxcp->l4_csum &&
1213 (rxcp->ip_csum || rxcp->ipv6);
1214 }
1215
1216 static struct be_rx_page_info *get_rx_page_info(struct be_rx_obj *rxo,
1217 u16 frag_idx)
1218 {
1219 struct be_adapter *adapter = rxo->adapter;
1220 struct be_rx_page_info *rx_page_info;
1221 struct be_queue_info *rxq = &rxo->q;
1222
1223 rx_page_info = &rxo->page_info_tbl[frag_idx];
1224 BUG_ON(!rx_page_info->page);
1225
1226 if (rx_page_info->last_page_user) {
1227 dma_unmap_page(&adapter->pdev->dev,
1228 dma_unmap_addr(rx_page_info, bus),
1229 adapter->big_page_size, DMA_FROM_DEVICE);
1230 rx_page_info->last_page_user = false;
1231 }
1232
1233 atomic_dec(&rxq->used);
1234 return rx_page_info;
1235 }
1236
1237 /* Throwaway the data in the Rx completion */
1238 static void be_rx_compl_discard(struct be_rx_obj *rxo,
1239 struct be_rx_compl_info *rxcp)
1240 {
1241 struct be_queue_info *rxq = &rxo->q;
1242 struct be_rx_page_info *page_info;
1243 u16 i, num_rcvd = rxcp->num_rcvd;
1244
1245 for (i = 0; i < num_rcvd; i++) {
1246 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
1247 put_page(page_info->page);
1248 memset(page_info, 0, sizeof(*page_info));
1249 index_inc(&rxcp->rxq_idx, rxq->len);
1250 }
1251 }
1252
1253 /*
1254 * skb_fill_rx_data forms a complete skb for an ether frame
1255 * indicated by rxcp.
1256 */
1257 static void skb_fill_rx_data(struct be_rx_obj *rxo, struct sk_buff *skb,
1258 struct be_rx_compl_info *rxcp)
1259 {
1260 struct be_queue_info *rxq = &rxo->q;
1261 struct be_rx_page_info *page_info;
1262 u16 i, j;
1263 u16 hdr_len, curr_frag_len, remaining;
1264 u8 *start;
1265
1266 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
1267 start = page_address(page_info->page) + page_info->page_offset;
1268 prefetch(start);
1269
1270 /* Copy data in the first descriptor of this completion */
1271 curr_frag_len = min(rxcp->pkt_size, rx_frag_size);
1272
1273 skb->len = curr_frag_len;
1274 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
1275 memcpy(skb->data, start, curr_frag_len);
1276 /* Complete packet has now been moved to data */
1277 put_page(page_info->page);
1278 skb->data_len = 0;
1279 skb->tail += curr_frag_len;
1280 } else {
1281 hdr_len = ETH_HLEN;
1282 memcpy(skb->data, start, hdr_len);
1283 skb_shinfo(skb)->nr_frags = 1;
1284 skb_frag_set_page(skb, 0, page_info->page);
1285 skb_shinfo(skb)->frags[0].page_offset =
1286 page_info->page_offset + hdr_len;
1287 skb_frag_size_set(&skb_shinfo(skb)->frags[0], curr_frag_len - hdr_len);
1288 skb->data_len = curr_frag_len - hdr_len;
1289 skb->truesize += rx_frag_size;
1290 skb->tail += hdr_len;
1291 }
1292 page_info->page = NULL;
1293
1294 if (rxcp->pkt_size <= rx_frag_size) {
1295 BUG_ON(rxcp->num_rcvd != 1);
1296 return;
1297 }
1298
1299 /* More frags present for this completion */
1300 index_inc(&rxcp->rxq_idx, rxq->len);
1301 remaining = rxcp->pkt_size - curr_frag_len;
1302 for (i = 1, j = 0; i < rxcp->num_rcvd; i++) {
1303 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
1304 curr_frag_len = min(remaining, rx_frag_size);
1305
1306 /* Coalesce all frags from the same physical page in one slot */
1307 if (page_info->page_offset == 0) {
1308 /* Fresh page */
1309 j++;
1310 skb_frag_set_page(skb, j, page_info->page);
1311 skb_shinfo(skb)->frags[j].page_offset =
1312 page_info->page_offset;
1313 skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0);
1314 skb_shinfo(skb)->nr_frags++;
1315 } else {
1316 put_page(page_info->page);
1317 }
1318
1319 skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len);
1320 skb->len += curr_frag_len;
1321 skb->data_len += curr_frag_len;
1322 skb->truesize += rx_frag_size;
1323 remaining -= curr_frag_len;
1324 index_inc(&rxcp->rxq_idx, rxq->len);
1325 page_info->page = NULL;
1326 }
1327 BUG_ON(j > MAX_SKB_FRAGS);
1328 }
1329
1330 /* Process the RX completion indicated by rxcp when GRO is disabled */
1331 static void be_rx_compl_process(struct be_rx_obj *rxo,
1332 struct be_rx_compl_info *rxcp)
1333 {
1334 struct be_adapter *adapter = rxo->adapter;
1335 struct net_device *netdev = adapter->netdev;
1336 struct sk_buff *skb;
1337
1338 skb = netdev_alloc_skb_ip_align(netdev, BE_RX_SKB_ALLOC_SIZE);
1339 if (unlikely(!skb)) {
1340 rx_stats(rxo)->rx_drops_no_skbs++;
1341 be_rx_compl_discard(rxo, rxcp);
1342 return;
1343 }
1344
1345 skb_fill_rx_data(rxo, skb, rxcp);
1346
1347 if (likely((netdev->features & NETIF_F_RXCSUM) && csum_passed(rxcp)))
1348 skb->ip_summed = CHECKSUM_UNNECESSARY;
1349 else
1350 skb_checksum_none_assert(skb);
1351
1352 skb->protocol = eth_type_trans(skb, netdev);
1353 skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]);
1354 if (netdev->features & NETIF_F_RXHASH)
1355 skb->rxhash = rxcp->rss_hash;
1356
1357
1358 if (rxcp->vlanf)
1359 __vlan_hwaccel_put_tag(skb, rxcp->vlan_tag);
1360
1361 netif_receive_skb(skb);
1362 }
1363
1364 /* Process the RX completion indicated by rxcp when GRO is enabled */
1365 void be_rx_compl_process_gro(struct be_rx_obj *rxo, struct napi_struct *napi,
1366 struct be_rx_compl_info *rxcp)
1367 {
1368 struct be_adapter *adapter = rxo->adapter;
1369 struct be_rx_page_info *page_info;
1370 struct sk_buff *skb = NULL;
1371 struct be_queue_info *rxq = &rxo->q;
1372 u16 remaining, curr_frag_len;
1373 u16 i, j;
1374
1375 skb = napi_get_frags(napi);
1376 if (!skb) {
1377 be_rx_compl_discard(rxo, rxcp);
1378 return;
1379 }
1380
1381 remaining = rxcp->pkt_size;
1382 for (i = 0, j = -1; i < rxcp->num_rcvd; i++) {
1383 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
1384
1385 curr_frag_len = min(remaining, rx_frag_size);
1386
1387 /* Coalesce all frags from the same physical page in one slot */
1388 if (i == 0 || page_info->page_offset == 0) {
1389 /* First frag or Fresh page */
1390 j++;
1391 skb_frag_set_page(skb, j, page_info->page);
1392 skb_shinfo(skb)->frags[j].page_offset =
1393 page_info->page_offset;
1394 skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0);
1395 } else {
1396 put_page(page_info->page);
1397 }
1398 skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len);
1399 skb->truesize += rx_frag_size;
1400 remaining -= curr_frag_len;
1401 index_inc(&rxcp->rxq_idx, rxq->len);
1402 memset(page_info, 0, sizeof(*page_info));
1403 }
1404 BUG_ON(j > MAX_SKB_FRAGS);
1405
1406 skb_shinfo(skb)->nr_frags = j + 1;
1407 skb->len = rxcp->pkt_size;
1408 skb->data_len = rxcp->pkt_size;
1409 skb->ip_summed = CHECKSUM_UNNECESSARY;
1410 skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]);
1411 if (adapter->netdev->features & NETIF_F_RXHASH)
1412 skb->rxhash = rxcp->rss_hash;
1413
1414 if (rxcp->vlanf)
1415 __vlan_hwaccel_put_tag(skb, rxcp->vlan_tag);
1416
1417 napi_gro_frags(napi);
1418 }
1419
1420 static void be_parse_rx_compl_v1(struct be_eth_rx_compl *compl,
1421 struct be_rx_compl_info *rxcp)
1422 {
1423 rxcp->pkt_size =
1424 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, pktsize, compl);
1425 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtp, compl);
1426 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, err, compl);
1427 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, tcpf, compl);
1428 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, udpf, compl);
1429 rxcp->ip_csum =
1430 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ipcksm, compl);
1431 rxcp->l4_csum =
1432 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, l4_cksm, compl);
1433 rxcp->ipv6 =
1434 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ip_version, compl);
1435 rxcp->rxq_idx =
1436 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, fragndx, compl);
1437 rxcp->num_rcvd =
1438 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, numfrags, compl);
1439 rxcp->pkt_type =
1440 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, cast_enc, compl);
1441 rxcp->rss_hash =
1442 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, rsshash, compl);
1443 if (rxcp->vlanf) {
1444 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtm,
1445 compl);
1446 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vlan_tag,
1447 compl);
1448 }
1449 rxcp->port = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, port, compl);
1450 }
1451
1452 static void be_parse_rx_compl_v0(struct be_eth_rx_compl *compl,
1453 struct be_rx_compl_info *rxcp)
1454 {
1455 rxcp->pkt_size =
1456 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, pktsize, compl);
1457 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtp, compl);
1458 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, err, compl);
1459 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, tcpf, compl);
1460 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, udpf, compl);
1461 rxcp->ip_csum =
1462 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ipcksm, compl);
1463 rxcp->l4_csum =
1464 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, l4_cksm, compl);
1465 rxcp->ipv6 =
1466 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ip_version, compl);
1467 rxcp->rxq_idx =
1468 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, fragndx, compl);
1469 rxcp->num_rcvd =
1470 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, numfrags, compl);
1471 rxcp->pkt_type =
1472 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, cast_enc, compl);
1473 rxcp->rss_hash =
1474 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, rsshash, compl);
1475 if (rxcp->vlanf) {
1476 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtm,
1477 compl);
1478 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vlan_tag,
1479 compl);
1480 }
1481 rxcp->port = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, port, compl);
1482 }
1483
1484 static struct be_rx_compl_info *be_rx_compl_get(struct be_rx_obj *rxo)
1485 {
1486 struct be_eth_rx_compl *compl = queue_tail_node(&rxo->cq);
1487 struct be_rx_compl_info *rxcp = &rxo->rxcp;
1488 struct be_adapter *adapter = rxo->adapter;
1489
1490 /* For checking the valid bit it is Ok to use either definition as the
1491 * valid bit is at the same position in both v0 and v1 Rx compl */
1492 if (compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] == 0)
1493 return NULL;
1494
1495 rmb();
1496 be_dws_le_to_cpu(compl, sizeof(*compl));
1497
1498 if (adapter->be3_native)
1499 be_parse_rx_compl_v1(compl, rxcp);
1500 else
1501 be_parse_rx_compl_v0(compl, rxcp);
1502
1503 if (rxcp->vlanf) {
1504 /* vlanf could be wrongly set in some cards.
1505 * ignore if vtm is not set */
1506 if ((adapter->function_mode & FLEX10_MODE) && !rxcp->vtm)
1507 rxcp->vlanf = 0;
1508
1509 if (!lancer_chip(adapter))
1510 rxcp->vlan_tag = swab16(rxcp->vlan_tag);
1511
1512 if (adapter->pvid == (rxcp->vlan_tag & VLAN_VID_MASK) &&
1513 !adapter->vlan_tag[rxcp->vlan_tag])
1514 rxcp->vlanf = 0;
1515 }
1516
1517 /* As the compl has been parsed, reset it; we wont touch it again */
1518 compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] = 0;
1519
1520 queue_tail_inc(&rxo->cq);
1521 return rxcp;
1522 }
1523
1524 static inline struct page *be_alloc_pages(u32 size, gfp_t gfp)
1525 {
1526 u32 order = get_order(size);
1527
1528 if (order > 0)
1529 gfp |= __GFP_COMP;
1530 return alloc_pages(gfp, order);
1531 }
1532
1533 /*
1534 * Allocate a page, split it to fragments of size rx_frag_size and post as
1535 * receive buffers to BE
1536 */
1537 static void be_post_rx_frags(struct be_rx_obj *rxo, gfp_t gfp)
1538 {
1539 struct be_adapter *adapter = rxo->adapter;
1540 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
1541 struct be_queue_info *rxq = &rxo->q;
1542 struct page *pagep = NULL;
1543 struct be_eth_rx_d *rxd;
1544 u64 page_dmaaddr = 0, frag_dmaaddr;
1545 u32 posted, page_offset = 0;
1546
1547 page_info = &rxo->page_info_tbl[rxq->head];
1548 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1549 if (!pagep) {
1550 pagep = be_alloc_pages(adapter->big_page_size, gfp);
1551 if (unlikely(!pagep)) {
1552 rx_stats(rxo)->rx_post_fail++;
1553 break;
1554 }
1555 page_dmaaddr = dma_map_page(&adapter->pdev->dev, pagep,
1556 0, adapter->big_page_size,
1557 DMA_FROM_DEVICE);
1558 page_info->page_offset = 0;
1559 } else {
1560 get_page(pagep);
1561 page_info->page_offset = page_offset + rx_frag_size;
1562 }
1563 page_offset = page_info->page_offset;
1564 page_info->page = pagep;
1565 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
1566 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1567
1568 rxd = queue_head_node(rxq);
1569 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1570 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
1571
1572 /* Any space left in the current big page for another frag? */
1573 if ((page_offset + rx_frag_size + rx_frag_size) >
1574 adapter->big_page_size) {
1575 pagep = NULL;
1576 page_info->last_page_user = true;
1577 }
1578
1579 prev_page_info = page_info;
1580 queue_head_inc(rxq);
1581 page_info = &rxo->page_info_tbl[rxq->head];
1582 }
1583 if (pagep)
1584 prev_page_info->last_page_user = true;
1585
1586 if (posted) {
1587 atomic_add(posted, &rxq->used);
1588 be_rxq_notify(adapter, rxq->id, posted);
1589 } else if (atomic_read(&rxq->used) == 0) {
1590 /* Let be_worker replenish when memory is available */
1591 rxo->rx_post_starved = true;
1592 }
1593 }
1594
1595 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
1596 {
1597 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1598
1599 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1600 return NULL;
1601
1602 rmb();
1603 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1604
1605 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1606
1607 queue_tail_inc(tx_cq);
1608 return txcp;
1609 }
1610
1611 static u16 be_tx_compl_process(struct be_adapter *adapter,
1612 struct be_tx_obj *txo, u16 last_index)
1613 {
1614 struct be_queue_info *txq = &txo->q;
1615 struct be_eth_wrb *wrb;
1616 struct sk_buff **sent_skbs = txo->sent_skb_list;
1617 struct sk_buff *sent_skb;
1618 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1619 bool unmap_skb_hdr = true;
1620
1621 sent_skb = sent_skbs[txq->tail];
1622 BUG_ON(!sent_skb);
1623 sent_skbs[txq->tail] = NULL;
1624
1625 /* skip header wrb */
1626 queue_tail_inc(txq);
1627
1628 do {
1629 cur_index = txq->tail;
1630 wrb = queue_tail_node(txq);
1631 unmap_tx_frag(&adapter->pdev->dev, wrb,
1632 (unmap_skb_hdr && skb_headlen(sent_skb)));
1633 unmap_skb_hdr = false;
1634
1635 num_wrbs++;
1636 queue_tail_inc(txq);
1637 } while (cur_index != last_index);
1638
1639 kfree_skb(sent_skb);
1640 return num_wrbs;
1641 }
1642
1643 /* Return the number of events in the event queue */
1644 static inline int events_get(struct be_eq_obj *eqo)
1645 {
1646 struct be_eq_entry *eqe;
1647 int num = 0;
1648
1649 do {
1650 eqe = queue_tail_node(&eqo->q);
1651 if (eqe->evt == 0)
1652 break;
1653
1654 rmb();
1655 eqe->evt = 0;
1656 num++;
1657 queue_tail_inc(&eqo->q);
1658 } while (true);
1659
1660 return num;
1661 }
1662
1663 static int event_handle(struct be_eq_obj *eqo)
1664 {
1665 bool rearm = false;
1666 int num = events_get(eqo);
1667
1668 /* Deal with any spurious interrupts that come without events */
1669 if (!num)
1670 rearm = true;
1671
1672 if (num || msix_enabled(eqo->adapter))
1673 be_eq_notify(eqo->adapter, eqo->q.id, rearm, true, num);
1674
1675 if (num)
1676 napi_schedule(&eqo->napi);
1677
1678 return num;
1679 }
1680
1681 /* Leaves the EQ is disarmed state */
1682 static void be_eq_clean(struct be_eq_obj *eqo)
1683 {
1684 int num = events_get(eqo);
1685
1686 be_eq_notify(eqo->adapter, eqo->q.id, false, true, num);
1687 }
1688
1689 static void be_rx_cq_clean(struct be_rx_obj *rxo)
1690 {
1691 struct be_rx_page_info *page_info;
1692 struct be_queue_info *rxq = &rxo->q;
1693 struct be_queue_info *rx_cq = &rxo->cq;
1694 struct be_rx_compl_info *rxcp;
1695 u16 tail;
1696
1697 /* First cleanup pending rx completions */
1698 while ((rxcp = be_rx_compl_get(rxo)) != NULL) {
1699 be_rx_compl_discard(rxo, rxcp);
1700 be_cq_notify(rxo->adapter, rx_cq->id, false, 1);
1701 }
1702
1703 /* Then free posted rx buffer that were not used */
1704 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1705 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1706 page_info = get_rx_page_info(rxo, tail);
1707 put_page(page_info->page);
1708 memset(page_info, 0, sizeof(*page_info));
1709 }
1710 BUG_ON(atomic_read(&rxq->used));
1711 rxq->tail = rxq->head = 0;
1712 }
1713
1714 static void be_tx_compl_clean(struct be_adapter *adapter)
1715 {
1716 struct be_tx_obj *txo;
1717 struct be_queue_info *txq;
1718 struct be_eth_tx_compl *txcp;
1719 u16 end_idx, cmpl = 0, timeo = 0, num_wrbs = 0;
1720 struct sk_buff *sent_skb;
1721 bool dummy_wrb;
1722 int i, pending_txqs;
1723
1724 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1725 do {
1726 pending_txqs = adapter->num_tx_qs;
1727
1728 for_all_tx_queues(adapter, txo, i) {
1729 txq = &txo->q;
1730 while ((txcp = be_tx_compl_get(&txo->cq))) {
1731 end_idx =
1732 AMAP_GET_BITS(struct amap_eth_tx_compl,
1733 wrb_index, txcp);
1734 num_wrbs += be_tx_compl_process(adapter, txo,
1735 end_idx);
1736 cmpl++;
1737 }
1738 if (cmpl) {
1739 be_cq_notify(adapter, txo->cq.id, false, cmpl);
1740 atomic_sub(num_wrbs, &txq->used);
1741 cmpl = 0;
1742 num_wrbs = 0;
1743 }
1744 if (atomic_read(&txq->used) == 0)
1745 pending_txqs--;
1746 }
1747
1748 if (pending_txqs == 0 || ++timeo > 200)
1749 break;
1750
1751 mdelay(1);
1752 } while (true);
1753
1754 for_all_tx_queues(adapter, txo, i) {
1755 txq = &txo->q;
1756 if (atomic_read(&txq->used))
1757 dev_err(&adapter->pdev->dev, "%d pending tx-compls\n",
1758 atomic_read(&txq->used));
1759
1760 /* free posted tx for which compls will never arrive */
1761 while (atomic_read(&txq->used)) {
1762 sent_skb = txo->sent_skb_list[txq->tail];
1763 end_idx = txq->tail;
1764 num_wrbs = wrb_cnt_for_skb(adapter, sent_skb,
1765 &dummy_wrb);
1766 index_adv(&end_idx, num_wrbs - 1, txq->len);
1767 num_wrbs = be_tx_compl_process(adapter, txo, end_idx);
1768 atomic_sub(num_wrbs, &txq->used);
1769 }
1770 }
1771 }
1772
1773 static void be_evt_queues_destroy(struct be_adapter *adapter)
1774 {
1775 struct be_eq_obj *eqo;
1776 int i;
1777
1778 for_all_evt_queues(adapter, eqo, i) {
1779 if (eqo->q.created) {
1780 be_eq_clean(eqo);
1781 be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ);
1782 }
1783 be_queue_free(adapter, &eqo->q);
1784 }
1785 }
1786
1787 static int be_evt_queues_create(struct be_adapter *adapter)
1788 {
1789 struct be_queue_info *eq;
1790 struct be_eq_obj *eqo;
1791 int i, rc;
1792
1793 adapter->num_evt_qs = num_irqs(adapter);
1794
1795 for_all_evt_queues(adapter, eqo, i) {
1796 eqo->adapter = adapter;
1797 eqo->tx_budget = BE_TX_BUDGET;
1798 eqo->idx = i;
1799 eqo->max_eqd = BE_MAX_EQD;
1800 eqo->enable_aic = true;
1801
1802 eq = &eqo->q;
1803 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1804 sizeof(struct be_eq_entry));
1805 if (rc)
1806 return rc;
1807
1808 rc = be_cmd_eq_create(adapter, eq, eqo->cur_eqd);
1809 if (rc)
1810 return rc;
1811 }
1812 return 0;
1813 }
1814
1815 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1816 {
1817 struct be_queue_info *q;
1818
1819 q = &adapter->mcc_obj.q;
1820 if (q->created)
1821 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1822 be_queue_free(adapter, q);
1823
1824 q = &adapter->mcc_obj.cq;
1825 if (q->created)
1826 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1827 be_queue_free(adapter, q);
1828 }
1829
1830 /* Must be called only after TX qs are created as MCC shares TX EQ */
1831 static int be_mcc_queues_create(struct be_adapter *adapter)
1832 {
1833 struct be_queue_info *q, *cq;
1834
1835 cq = &adapter->mcc_obj.cq;
1836 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1837 sizeof(struct be_mcc_compl)))
1838 goto err;
1839
1840 /* Use the default EQ for MCC completions */
1841 if (be_cmd_cq_create(adapter, cq, &mcc_eqo(adapter)->q, true, 0))
1842 goto mcc_cq_free;
1843
1844 q = &adapter->mcc_obj.q;
1845 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1846 goto mcc_cq_destroy;
1847
1848 if (be_cmd_mccq_create(adapter, q, cq))
1849 goto mcc_q_free;
1850
1851 return 0;
1852
1853 mcc_q_free:
1854 be_queue_free(adapter, q);
1855 mcc_cq_destroy:
1856 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1857 mcc_cq_free:
1858 be_queue_free(adapter, cq);
1859 err:
1860 return -1;
1861 }
1862
1863 static void be_tx_queues_destroy(struct be_adapter *adapter)
1864 {
1865 struct be_queue_info *q;
1866 struct be_tx_obj *txo;
1867 u8 i;
1868
1869 for_all_tx_queues(adapter, txo, i) {
1870 q = &txo->q;
1871 if (q->created)
1872 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1873 be_queue_free(adapter, q);
1874
1875 q = &txo->cq;
1876 if (q->created)
1877 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1878 be_queue_free(adapter, q);
1879 }
1880 }
1881
1882 static int be_num_txqs_want(struct be_adapter *adapter)
1883 {
1884 if ((!lancer_chip(adapter) && sriov_want(adapter)) ||
1885 be_is_mc(adapter) ||
1886 (!lancer_chip(adapter) && !be_physfn(adapter)) ||
1887 adapter->generation == BE_GEN2)
1888 return 1;
1889 else
1890 return adapter->max_tx_queues;
1891 }
1892
1893 static int be_tx_cqs_create(struct be_adapter *adapter)
1894 {
1895 struct be_queue_info *cq, *eq;
1896 int status;
1897 struct be_tx_obj *txo;
1898 u8 i;
1899
1900 adapter->num_tx_qs = be_num_txqs_want(adapter);
1901 if (adapter->num_tx_qs != MAX_TX_QS) {
1902 rtnl_lock();
1903 netif_set_real_num_tx_queues(adapter->netdev,
1904 adapter->num_tx_qs);
1905 rtnl_unlock();
1906 }
1907
1908 for_all_tx_queues(adapter, txo, i) {
1909 cq = &txo->cq;
1910 status = be_queue_alloc(adapter, cq, TX_CQ_LEN,
1911 sizeof(struct be_eth_tx_compl));
1912 if (status)
1913 return status;
1914
1915 /* If num_evt_qs is less than num_tx_qs, then more than
1916 * one txq share an eq
1917 */
1918 eq = &adapter->eq_obj[i % adapter->num_evt_qs].q;
1919 status = be_cmd_cq_create(adapter, cq, eq, false, 3);
1920 if (status)
1921 return status;
1922 }
1923 return 0;
1924 }
1925
1926 static int be_tx_qs_create(struct be_adapter *adapter)
1927 {
1928 struct be_tx_obj *txo;
1929 int i, status;
1930
1931 for_all_tx_queues(adapter, txo, i) {
1932 status = be_queue_alloc(adapter, &txo->q, TX_Q_LEN,
1933 sizeof(struct be_eth_wrb));
1934 if (status)
1935 return status;
1936
1937 status = be_cmd_txq_create(adapter, &txo->q, &txo->cq);
1938 if (status)
1939 return status;
1940 }
1941
1942 dev_info(&adapter->pdev->dev, "created %d TX queue(s)\n",
1943 adapter->num_tx_qs);
1944 return 0;
1945 }
1946
1947 static void be_rx_cqs_destroy(struct be_adapter *adapter)
1948 {
1949 struct be_queue_info *q;
1950 struct be_rx_obj *rxo;
1951 int i;
1952
1953 for_all_rx_queues(adapter, rxo, i) {
1954 q = &rxo->cq;
1955 if (q->created)
1956 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1957 be_queue_free(adapter, q);
1958 }
1959 }
1960
1961 static int be_rx_cqs_create(struct be_adapter *adapter)
1962 {
1963 struct be_queue_info *eq, *cq;
1964 struct be_rx_obj *rxo;
1965 int rc, i;
1966
1967 /* We'll create as many RSS rings as there are irqs.
1968 * But when there's only one irq there's no use creating RSS rings
1969 */
1970 adapter->num_rx_qs = (num_irqs(adapter) > 1) ?
1971 num_irqs(adapter) + 1 : 1;
1972 if (adapter->num_rx_qs != MAX_RX_QS) {
1973 rtnl_lock();
1974 netif_set_real_num_rx_queues(adapter->netdev,
1975 adapter->num_rx_qs);
1976 rtnl_unlock();
1977 }
1978
1979 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1980 for_all_rx_queues(adapter, rxo, i) {
1981 rxo->adapter = adapter;
1982 cq = &rxo->cq;
1983 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1984 sizeof(struct be_eth_rx_compl));
1985 if (rc)
1986 return rc;
1987
1988 eq = &adapter->eq_obj[i % adapter->num_evt_qs].q;
1989 rc = be_cmd_cq_create(adapter, cq, eq, false, 3);
1990 if (rc)
1991 return rc;
1992 }
1993
1994 dev_info(&adapter->pdev->dev,
1995 "created %d RSS queue(s) and 1 default RX queue\n",
1996 adapter->num_rx_qs - 1);
1997 return 0;
1998 }
1999
2000 static irqreturn_t be_intx(int irq, void *dev)
2001 {
2002 struct be_adapter *adapter = dev;
2003 int num_evts;
2004
2005 /* With INTx only one EQ is used */
2006 num_evts = event_handle(&adapter->eq_obj[0]);
2007 if (num_evts)
2008 return IRQ_HANDLED;
2009 else
2010 return IRQ_NONE;
2011 }
2012
2013 static irqreturn_t be_msix(int irq, void *dev)
2014 {
2015 struct be_eq_obj *eqo = dev;
2016
2017 event_handle(eqo);
2018 return IRQ_HANDLED;
2019 }
2020
2021 static inline bool do_gro(struct be_rx_compl_info *rxcp)
2022 {
2023 return (rxcp->tcpf && !rxcp->err) ? true : false;
2024 }
2025
2026 static int be_process_rx(struct be_rx_obj *rxo, struct napi_struct *napi,
2027 int budget)
2028 {
2029 struct be_adapter *adapter = rxo->adapter;
2030 struct be_queue_info *rx_cq = &rxo->cq;
2031 struct be_rx_compl_info *rxcp;
2032 u32 work_done;
2033
2034 for (work_done = 0; work_done < budget; work_done++) {
2035 rxcp = be_rx_compl_get(rxo);
2036 if (!rxcp)
2037 break;
2038
2039 /* Is it a flush compl that has no data */
2040 if (unlikely(rxcp->num_rcvd == 0))
2041 goto loop_continue;
2042
2043 /* Discard compl with partial DMA Lancer B0 */
2044 if (unlikely(!rxcp->pkt_size)) {
2045 be_rx_compl_discard(rxo, rxcp);
2046 goto loop_continue;
2047 }
2048
2049 /* On BE drop pkts that arrive due to imperfect filtering in
2050 * promiscuous mode on some skews
2051 */
2052 if (unlikely(rxcp->port != adapter->port_num &&
2053 !lancer_chip(adapter))) {
2054 be_rx_compl_discard(rxo, rxcp);
2055 goto loop_continue;
2056 }
2057
2058 if (do_gro(rxcp))
2059 be_rx_compl_process_gro(rxo, napi, rxcp);
2060 else
2061 be_rx_compl_process(rxo, rxcp);
2062 loop_continue:
2063 be_rx_stats_update(rxo, rxcp);
2064 }
2065
2066 if (work_done) {
2067 be_cq_notify(adapter, rx_cq->id, true, work_done);
2068
2069 if (atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM)
2070 be_post_rx_frags(rxo, GFP_ATOMIC);
2071 }
2072
2073 return work_done;
2074 }
2075
2076 static bool be_process_tx(struct be_adapter *adapter, struct be_tx_obj *txo,
2077 int budget, int idx)
2078 {
2079 struct be_eth_tx_compl *txcp;
2080 int num_wrbs = 0, work_done;
2081
2082 for (work_done = 0; work_done < budget; work_done++) {
2083 txcp = be_tx_compl_get(&txo->cq);
2084 if (!txcp)
2085 break;
2086 num_wrbs += be_tx_compl_process(adapter, txo,
2087 AMAP_GET_BITS(struct amap_eth_tx_compl,
2088 wrb_index, txcp));
2089 }
2090
2091 if (work_done) {
2092 be_cq_notify(adapter, txo->cq.id, true, work_done);
2093 atomic_sub(num_wrbs, &txo->q.used);
2094
2095 /* As Tx wrbs have been freed up, wake up netdev queue
2096 * if it was stopped due to lack of tx wrbs. */
2097 if (__netif_subqueue_stopped(adapter->netdev, idx) &&
2098 atomic_read(&txo->q.used) < txo->q.len / 2) {
2099 netif_wake_subqueue(adapter->netdev, idx);
2100 }
2101
2102 u64_stats_update_begin(&tx_stats(txo)->sync_compl);
2103 tx_stats(txo)->tx_compl += work_done;
2104 u64_stats_update_end(&tx_stats(txo)->sync_compl);
2105 }
2106 return (work_done < budget); /* Done */
2107 }
2108
2109 int be_poll(struct napi_struct *napi, int budget)
2110 {
2111 struct be_eq_obj *eqo = container_of(napi, struct be_eq_obj, napi);
2112 struct be_adapter *adapter = eqo->adapter;
2113 int max_work = 0, work, i;
2114 bool tx_done;
2115
2116 /* Process all TXQs serviced by this EQ */
2117 for (i = eqo->idx; i < adapter->num_tx_qs; i += adapter->num_evt_qs) {
2118 tx_done = be_process_tx(adapter, &adapter->tx_obj[i],
2119 eqo->tx_budget, i);
2120 if (!tx_done)
2121 max_work = budget;
2122 }
2123
2124 /* This loop will iterate twice for EQ0 in which
2125 * completions of the last RXQ (default one) are also processed
2126 * For other EQs the loop iterates only once
2127 */
2128 for (i = eqo->idx; i < adapter->num_rx_qs; i += adapter->num_evt_qs) {
2129 work = be_process_rx(&adapter->rx_obj[i], napi, budget);
2130 max_work = max(work, max_work);
2131 }
2132
2133 if (is_mcc_eqo(eqo))
2134 be_process_mcc(adapter);
2135
2136 if (max_work < budget) {
2137 napi_complete(napi);
2138 be_eq_notify(adapter, eqo->q.id, true, false, 0);
2139 } else {
2140 /* As we'll continue in polling mode, count and clear events */
2141 be_eq_notify(adapter, eqo->q.id, false, false, events_get(eqo));
2142 }
2143 return max_work;
2144 }
2145
2146 void be_detect_error(struct be_adapter *adapter)
2147 {
2148 u32 ue_lo = 0, ue_hi = 0, ue_lo_mask = 0, ue_hi_mask = 0;
2149 u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0;
2150 u32 i;
2151
2152 if (be_crit_error(adapter))
2153 return;
2154
2155 if (lancer_chip(adapter)) {
2156 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
2157 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
2158 sliport_err1 = ioread32(adapter->db +
2159 SLIPORT_ERROR1_OFFSET);
2160 sliport_err2 = ioread32(adapter->db +
2161 SLIPORT_ERROR2_OFFSET);
2162 }
2163 } else {
2164 pci_read_config_dword(adapter->pdev,
2165 PCICFG_UE_STATUS_LOW, &ue_lo);
2166 pci_read_config_dword(adapter->pdev,
2167 PCICFG_UE_STATUS_HIGH, &ue_hi);
2168 pci_read_config_dword(adapter->pdev,
2169 PCICFG_UE_STATUS_LOW_MASK, &ue_lo_mask);
2170 pci_read_config_dword(adapter->pdev,
2171 PCICFG_UE_STATUS_HI_MASK, &ue_hi_mask);
2172
2173 ue_lo = (ue_lo & ~ue_lo_mask);
2174 ue_hi = (ue_hi & ~ue_hi_mask);
2175 }
2176
2177 /* On certain platforms BE hardware can indicate spurious UEs.
2178 * Allow the h/w to stop working completely in case of a real UE.
2179 * Hence not setting the hw_error for UE detection.
2180 */
2181 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
2182 adapter->hw_error = true;
2183 dev_err(&adapter->pdev->dev,
2184 "Error detected in the card\n");
2185 }
2186
2187 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
2188 dev_err(&adapter->pdev->dev,
2189 "ERR: sliport status 0x%x\n", sliport_status);
2190 dev_err(&adapter->pdev->dev,
2191 "ERR: sliport error1 0x%x\n", sliport_err1);
2192 dev_err(&adapter->pdev->dev,
2193 "ERR: sliport error2 0x%x\n", sliport_err2);
2194 }
2195
2196 if (ue_lo) {
2197 for (i = 0; ue_lo; ue_lo >>= 1, i++) {
2198 if (ue_lo & 1)
2199 dev_err(&adapter->pdev->dev,
2200 "UE: %s bit set\n", ue_status_low_desc[i]);
2201 }
2202 }
2203
2204 if (ue_hi) {
2205 for (i = 0; ue_hi; ue_hi >>= 1, i++) {
2206 if (ue_hi & 1)
2207 dev_err(&adapter->pdev->dev,
2208 "UE: %s bit set\n", ue_status_hi_desc[i]);
2209 }
2210 }
2211
2212 }
2213
2214 static void be_msix_disable(struct be_adapter *adapter)
2215 {
2216 if (msix_enabled(adapter)) {
2217 pci_disable_msix(adapter->pdev);
2218 adapter->num_msix_vec = 0;
2219 }
2220 }
2221
2222 static uint be_num_rss_want(struct be_adapter *adapter)
2223 {
2224 u32 num = 0;
2225
2226 if ((adapter->function_caps & BE_FUNCTION_CAPS_RSS) &&
2227 (lancer_chip(adapter) ||
2228 (!sriov_want(adapter) && be_physfn(adapter)))) {
2229 num = adapter->max_rss_queues;
2230 num = min_t(u32, num, (u32)netif_get_num_default_rss_queues());
2231 }
2232 return num;
2233 }
2234
2235 static void be_msix_enable(struct be_adapter *adapter)
2236 {
2237 #define BE_MIN_MSIX_VECTORS 1
2238 int i, status, num_vec, num_roce_vec = 0;
2239 struct device *dev = &adapter->pdev->dev;
2240
2241 /* If RSS queues are not used, need a vec for default RX Q */
2242 num_vec = min(be_num_rss_want(adapter), num_online_cpus());
2243 if (be_roce_supported(adapter)) {
2244 num_roce_vec = min_t(u32, MAX_ROCE_MSIX_VECTORS,
2245 (num_online_cpus() + 1));
2246 num_roce_vec = min(num_roce_vec, MAX_ROCE_EQS);
2247 num_vec += num_roce_vec;
2248 num_vec = min(num_vec, MAX_MSIX_VECTORS);
2249 }
2250 num_vec = max(num_vec, BE_MIN_MSIX_VECTORS);
2251
2252 for (i = 0; i < num_vec; i++)
2253 adapter->msix_entries[i].entry = i;
2254
2255 status = pci_enable_msix(adapter->pdev, adapter->msix_entries, num_vec);
2256 if (status == 0) {
2257 goto done;
2258 } else if (status >= BE_MIN_MSIX_VECTORS) {
2259 num_vec = status;
2260 if (pci_enable_msix(adapter->pdev, adapter->msix_entries,
2261 num_vec) == 0)
2262 goto done;
2263 }
2264
2265 dev_warn(dev, "MSIx enable failed\n");
2266 return;
2267 done:
2268 if (be_roce_supported(adapter)) {
2269 if (num_vec > num_roce_vec) {
2270 adapter->num_msix_vec = num_vec - num_roce_vec;
2271 adapter->num_msix_roce_vec =
2272 num_vec - adapter->num_msix_vec;
2273 } else {
2274 adapter->num_msix_vec = num_vec;
2275 adapter->num_msix_roce_vec = 0;
2276 }
2277 } else
2278 adapter->num_msix_vec = num_vec;
2279 dev_info(dev, "enabled %d MSI-x vector(s)\n", adapter->num_msix_vec);
2280 return;
2281 }
2282
2283 static inline int be_msix_vec_get(struct be_adapter *adapter,
2284 struct be_eq_obj *eqo)
2285 {
2286 return adapter->msix_entries[eqo->idx].vector;
2287 }
2288
2289 static int be_msix_register(struct be_adapter *adapter)
2290 {
2291 struct net_device *netdev = adapter->netdev;
2292 struct be_eq_obj *eqo;
2293 int status, i, vec;
2294
2295 for_all_evt_queues(adapter, eqo, i) {
2296 sprintf(eqo->desc, "%s-q%d", netdev->name, i);
2297 vec = be_msix_vec_get(adapter, eqo);
2298 status = request_irq(vec, be_msix, 0, eqo->desc, eqo);
2299 if (status)
2300 goto err_msix;
2301 }
2302
2303 return 0;
2304 err_msix:
2305 for (i--, eqo = &adapter->eq_obj[i]; i >= 0; i--, eqo--)
2306 free_irq(be_msix_vec_get(adapter, eqo), eqo);
2307 dev_warn(&adapter->pdev->dev, "MSIX Request IRQ failed - err %d\n",
2308 status);
2309 be_msix_disable(adapter);
2310 return status;
2311 }
2312
2313 static int be_irq_register(struct be_adapter *adapter)
2314 {
2315 struct net_device *netdev = adapter->netdev;
2316 int status;
2317
2318 if (msix_enabled(adapter)) {
2319 status = be_msix_register(adapter);
2320 if (status == 0)
2321 goto done;
2322 /* INTx is not supported for VF */
2323 if (!be_physfn(adapter))
2324 return status;
2325 }
2326
2327 /* INTx */
2328 netdev->irq = adapter->pdev->irq;
2329 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
2330 adapter);
2331 if (status) {
2332 dev_err(&adapter->pdev->dev,
2333 "INTx request IRQ failed - err %d\n", status);
2334 return status;
2335 }
2336 done:
2337 adapter->isr_registered = true;
2338 return 0;
2339 }
2340
2341 static void be_irq_unregister(struct be_adapter *adapter)
2342 {
2343 struct net_device *netdev = adapter->netdev;
2344 struct be_eq_obj *eqo;
2345 int i;
2346
2347 if (!adapter->isr_registered)
2348 return;
2349
2350 /* INTx */
2351 if (!msix_enabled(adapter)) {
2352 free_irq(netdev->irq, adapter);
2353 goto done;
2354 }
2355
2356 /* MSIx */
2357 for_all_evt_queues(adapter, eqo, i)
2358 free_irq(be_msix_vec_get(adapter, eqo), eqo);
2359
2360 done:
2361 adapter->isr_registered = false;
2362 }
2363
2364 static void be_rx_qs_destroy(struct be_adapter *adapter)
2365 {
2366 struct be_queue_info *q;
2367 struct be_rx_obj *rxo;
2368 int i;
2369
2370 for_all_rx_queues(adapter, rxo, i) {
2371 q = &rxo->q;
2372 if (q->created) {
2373 be_cmd_rxq_destroy(adapter, q);
2374 /* After the rxq is invalidated, wait for a grace time
2375 * of 1ms for all dma to end and the flush compl to
2376 * arrive
2377 */
2378 mdelay(1);
2379 be_rx_cq_clean(rxo);
2380 }
2381 be_queue_free(adapter, q);
2382 }
2383 }
2384
2385 static int be_close(struct net_device *netdev)
2386 {
2387 struct be_adapter *adapter = netdev_priv(netdev);
2388 struct be_eq_obj *eqo;
2389 int i;
2390
2391 be_roce_dev_close(adapter);
2392
2393 be_async_mcc_disable(adapter);
2394
2395 if (!lancer_chip(adapter))
2396 be_intr_set(adapter, false);
2397
2398 for_all_evt_queues(adapter, eqo, i) {
2399 napi_disable(&eqo->napi);
2400 if (msix_enabled(adapter))
2401 synchronize_irq(be_msix_vec_get(adapter, eqo));
2402 else
2403 synchronize_irq(netdev->irq);
2404 be_eq_clean(eqo);
2405 }
2406
2407 be_irq_unregister(adapter);
2408
2409 /* Wait for all pending tx completions to arrive so that
2410 * all tx skbs are freed.
2411 */
2412 be_tx_compl_clean(adapter);
2413
2414 be_rx_qs_destroy(adapter);
2415 return 0;
2416 }
2417
2418 static int be_rx_qs_create(struct be_adapter *adapter)
2419 {
2420 struct be_rx_obj *rxo;
2421 int rc, i, j;
2422 u8 rsstable[128];
2423
2424 for_all_rx_queues(adapter, rxo, i) {
2425 rc = be_queue_alloc(adapter, &rxo->q, RX_Q_LEN,
2426 sizeof(struct be_eth_rx_d));
2427 if (rc)
2428 return rc;
2429 }
2430
2431 /* The FW would like the default RXQ to be created first */
2432 rxo = default_rxo(adapter);
2433 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id, rx_frag_size,
2434 adapter->if_handle, false, &rxo->rss_id);
2435 if (rc)
2436 return rc;
2437
2438 for_all_rss_queues(adapter, rxo, i) {
2439 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id,
2440 rx_frag_size, adapter->if_handle,
2441 true, &rxo->rss_id);
2442 if (rc)
2443 return rc;
2444 }
2445
2446 if (be_multi_rxq(adapter)) {
2447 for (j = 0; j < 128; j += adapter->num_rx_qs - 1) {
2448 for_all_rss_queues(adapter, rxo, i) {
2449 if ((j + i) >= 128)
2450 break;
2451 rsstable[j + i] = rxo->rss_id;
2452 }
2453 }
2454 rc = be_cmd_rss_config(adapter, rsstable, 128);
2455 if (rc)
2456 return rc;
2457 }
2458
2459 /* First time posting */
2460 for_all_rx_queues(adapter, rxo, i)
2461 be_post_rx_frags(rxo, GFP_KERNEL);
2462 return 0;
2463 }
2464
2465 static int be_open(struct net_device *netdev)
2466 {
2467 struct be_adapter *adapter = netdev_priv(netdev);
2468 struct be_eq_obj *eqo;
2469 struct be_rx_obj *rxo;
2470 struct be_tx_obj *txo;
2471 u8 link_status;
2472 int status, i;
2473
2474 status = be_rx_qs_create(adapter);
2475 if (status)
2476 goto err;
2477
2478 be_irq_register(adapter);
2479
2480 if (!lancer_chip(adapter))
2481 be_intr_set(adapter, true);
2482
2483 for_all_rx_queues(adapter, rxo, i)
2484 be_cq_notify(adapter, rxo->cq.id, true, 0);
2485
2486 for_all_tx_queues(adapter, txo, i)
2487 be_cq_notify(adapter, txo->cq.id, true, 0);
2488
2489 be_async_mcc_enable(adapter);
2490
2491 for_all_evt_queues(adapter, eqo, i) {
2492 napi_enable(&eqo->napi);
2493 be_eq_notify(adapter, eqo->q.id, true, false, 0);
2494 }
2495
2496 status = be_cmd_link_status_query(adapter, NULL, &link_status, 0);
2497 if (!status)
2498 be_link_status_update(adapter, link_status);
2499
2500 be_roce_dev_open(adapter);
2501 return 0;
2502 err:
2503 be_close(adapter->netdev);
2504 return -EIO;
2505 }
2506
2507 static int be_setup_wol(struct be_adapter *adapter, bool enable)
2508 {
2509 struct be_dma_mem cmd;
2510 int status = 0;
2511 u8 mac[ETH_ALEN];
2512
2513 memset(mac, 0, ETH_ALEN);
2514
2515 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2516 cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma,
2517 GFP_KERNEL);
2518 if (cmd.va == NULL)
2519 return -1;
2520 memset(cmd.va, 0, cmd.size);
2521
2522 if (enable) {
2523 status = pci_write_config_dword(adapter->pdev,
2524 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2525 if (status) {
2526 dev_err(&adapter->pdev->dev,
2527 "Could not enable Wake-on-lan\n");
2528 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va,
2529 cmd.dma);
2530 return status;
2531 }
2532 status = be_cmd_enable_magic_wol(adapter,
2533 adapter->netdev->dev_addr, &cmd);
2534 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2535 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2536 } else {
2537 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2538 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2539 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2540 }
2541
2542 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
2543 return status;
2544 }
2545
2546 /*
2547 * Generate a seed MAC address from the PF MAC Address using jhash.
2548 * MAC Address for VFs are assigned incrementally starting from the seed.
2549 * These addresses are programmed in the ASIC by the PF and the VF driver
2550 * queries for the MAC address during its probe.
2551 */
2552 static inline int be_vf_eth_addr_config(struct be_adapter *adapter)
2553 {
2554 u32 vf;
2555 int status = 0;
2556 u8 mac[ETH_ALEN];
2557 struct be_vf_cfg *vf_cfg;
2558
2559 be_vf_eth_addr_generate(adapter, mac);
2560
2561 for_all_vfs(adapter, vf_cfg, vf) {
2562 if (lancer_chip(adapter)) {
2563 status = be_cmd_set_mac_list(adapter, mac, 1, vf + 1);
2564 } else {
2565 status = be_cmd_pmac_add(adapter, mac,
2566 vf_cfg->if_handle,
2567 &vf_cfg->pmac_id, vf + 1);
2568 }
2569
2570 if (status)
2571 dev_err(&adapter->pdev->dev,
2572 "Mac address assignment failed for VF %d\n", vf);
2573 else
2574 memcpy(vf_cfg->mac_addr, mac, ETH_ALEN);
2575
2576 mac[5] += 1;
2577 }
2578 return status;
2579 }
2580
2581 static void be_vf_clear(struct be_adapter *adapter)
2582 {
2583 struct be_vf_cfg *vf_cfg;
2584 u32 vf;
2585
2586 if (be_find_vfs(adapter, ASSIGNED)) {
2587 dev_warn(&adapter->pdev->dev, "VFs are assigned to VMs\n");
2588 goto done;
2589 }
2590
2591 for_all_vfs(adapter, vf_cfg, vf) {
2592 if (lancer_chip(adapter))
2593 be_cmd_set_mac_list(adapter, NULL, 0, vf + 1);
2594 else
2595 be_cmd_pmac_del(adapter, vf_cfg->if_handle,
2596 vf_cfg->pmac_id, vf + 1);
2597
2598 be_cmd_if_destroy(adapter, vf_cfg->if_handle, vf + 1);
2599 }
2600 pci_disable_sriov(adapter->pdev);
2601 done:
2602 kfree(adapter->vf_cfg);
2603 adapter->num_vfs = 0;
2604 }
2605
2606 static int be_clear(struct be_adapter *adapter)
2607 {
2608 int i = 1;
2609
2610 if (adapter->flags & BE_FLAGS_WORKER_SCHEDULED) {
2611 cancel_delayed_work_sync(&adapter->work);
2612 adapter->flags &= ~BE_FLAGS_WORKER_SCHEDULED;
2613 }
2614
2615 if (sriov_enabled(adapter))
2616 be_vf_clear(adapter);
2617
2618 for (; adapter->uc_macs > 0; adapter->uc_macs--, i++)
2619 be_cmd_pmac_del(adapter, adapter->if_handle,
2620 adapter->pmac_id[i], 0);
2621
2622 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
2623
2624 be_mcc_queues_destroy(adapter);
2625 be_rx_cqs_destroy(adapter);
2626 be_tx_queues_destroy(adapter);
2627 be_evt_queues_destroy(adapter);
2628
2629 kfree(adapter->pmac_id);
2630 adapter->pmac_id = NULL;
2631
2632 be_msix_disable(adapter);
2633 return 0;
2634 }
2635
2636 static void be_get_vf_if_cap_flags(struct be_adapter *adapter,
2637 u32 *cap_flags, u8 domain)
2638 {
2639 bool profile_present = false;
2640 int status;
2641
2642 if (lancer_chip(adapter)) {
2643 status = be_cmd_get_profile_config(adapter, cap_flags, domain);
2644 if (!status)
2645 profile_present = true;
2646 }
2647
2648 if (!profile_present)
2649 *cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
2650 BE_IF_FLAGS_MULTICAST;
2651 }
2652
2653 static int be_vf_setup_init(struct be_adapter *adapter)
2654 {
2655 struct be_vf_cfg *vf_cfg;
2656 int vf;
2657
2658 adapter->vf_cfg = kcalloc(adapter->num_vfs, sizeof(*vf_cfg),
2659 GFP_KERNEL);
2660 if (!adapter->vf_cfg)
2661 return -ENOMEM;
2662
2663 for_all_vfs(adapter, vf_cfg, vf) {
2664 vf_cfg->if_handle = -1;
2665 vf_cfg->pmac_id = -1;
2666 }
2667 return 0;
2668 }
2669
2670 static int be_vf_setup(struct be_adapter *adapter)
2671 {
2672 struct be_vf_cfg *vf_cfg;
2673 struct device *dev = &adapter->pdev->dev;
2674 u32 cap_flags, en_flags, vf;
2675 u16 def_vlan, lnk_speed;
2676 int status, enabled_vfs;
2677
2678 enabled_vfs = be_find_vfs(adapter, ENABLED);
2679 if (enabled_vfs) {
2680 dev_warn(dev, "%d VFs are already enabled\n", enabled_vfs);
2681 dev_warn(dev, "Ignoring num_vfs=%d setting\n", num_vfs);
2682 return 0;
2683 }
2684
2685 if (num_vfs > adapter->dev_num_vfs) {
2686 dev_warn(dev, "Device supports %d VFs and not %d\n",
2687 adapter->dev_num_vfs, num_vfs);
2688 num_vfs = adapter->dev_num_vfs;
2689 }
2690
2691 status = pci_enable_sriov(adapter->pdev, num_vfs);
2692 if (!status) {
2693 adapter->num_vfs = num_vfs;
2694 } else {
2695 /* Platform doesn't support SRIOV though device supports it */
2696 dev_warn(dev, "SRIOV enable failed\n");
2697 return 0;
2698 }
2699
2700 status = be_vf_setup_init(adapter);
2701 if (status)
2702 goto err;
2703
2704 for_all_vfs(adapter, vf_cfg, vf) {
2705 be_get_vf_if_cap_flags(adapter, &cap_flags, vf + 1);
2706
2707 en_flags = cap_flags & (BE_IF_FLAGS_UNTAGGED |
2708 BE_IF_FLAGS_BROADCAST |
2709 BE_IF_FLAGS_MULTICAST);
2710
2711 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2712 &vf_cfg->if_handle, vf + 1);
2713 if (status)
2714 goto err;
2715 }
2716
2717 if (!enabled_vfs) {
2718 status = be_vf_eth_addr_config(adapter);
2719 if (status)
2720 goto err;
2721 }
2722
2723 for_all_vfs(adapter, vf_cfg, vf) {
2724 lnk_speed = 1000;
2725 status = be_cmd_set_qos(adapter, lnk_speed, vf + 1);
2726 if (status)
2727 goto err;
2728 vf_cfg->tx_rate = lnk_speed * 10;
2729
2730 status = be_cmd_get_hsw_config(adapter, &def_vlan,
2731 vf + 1, vf_cfg->if_handle);
2732 if (status)
2733 goto err;
2734 vf_cfg->def_vid = def_vlan;
2735
2736 be_cmd_enable_vf(adapter, vf + 1);
2737 }
2738 return 0;
2739 err:
2740 return status;
2741 }
2742
2743 static void be_setup_init(struct be_adapter *adapter)
2744 {
2745 adapter->vlan_prio_bmap = 0xff;
2746 adapter->phy.link_speed = -1;
2747 adapter->if_handle = -1;
2748 adapter->be3_native = false;
2749 adapter->promiscuous = false;
2750 adapter->eq_next_idx = 0;
2751
2752 if (be_physfn(adapter))
2753 adapter->cmd_privileges = MAX_PRIVILEGES;
2754 else
2755 adapter->cmd_privileges = MIN_PRIVILEGES;
2756 }
2757
2758 static int be_get_mac_addr(struct be_adapter *adapter, u8 *mac, u32 if_handle,
2759 bool *active_mac, u32 *pmac_id)
2760 {
2761 int status = 0;
2762
2763 if (!is_zero_ether_addr(adapter->netdev->perm_addr)) {
2764 memcpy(mac, adapter->netdev->dev_addr, ETH_ALEN);
2765 if (!lancer_chip(adapter) && !be_physfn(adapter))
2766 *active_mac = true;
2767 else
2768 *active_mac = false;
2769
2770 return status;
2771 }
2772
2773 if (lancer_chip(adapter)) {
2774 status = be_cmd_get_mac_from_list(adapter, mac,
2775 active_mac, pmac_id, 0);
2776 if (*active_mac) {
2777 status = be_cmd_mac_addr_query(adapter, mac, false,
2778 if_handle, *pmac_id);
2779 }
2780 } else if (be_physfn(adapter)) {
2781 /* For BE3, for PF get permanent MAC */
2782 status = be_cmd_mac_addr_query(adapter, mac, true, 0, 0);
2783 *active_mac = false;
2784 } else {
2785 /* For BE3, for VF get soft MAC assigned by PF*/
2786 status = be_cmd_mac_addr_query(adapter, mac, false,
2787 if_handle, 0);
2788 *active_mac = true;
2789 }
2790 return status;
2791 }
2792
2793 static void be_get_resources(struct be_adapter *adapter)
2794 {
2795 int status;
2796 bool profile_present = false;
2797
2798 if (lancer_chip(adapter)) {
2799 status = be_cmd_get_func_config(adapter);
2800
2801 if (!status)
2802 profile_present = true;
2803 }
2804
2805 if (profile_present) {
2806 /* Sanity fixes for Lancer */
2807 adapter->max_pmac_cnt = min_t(u16, adapter->max_pmac_cnt,
2808 BE_UC_PMAC_COUNT);
2809 adapter->max_vlans = min_t(u16, adapter->max_vlans,
2810 BE_NUM_VLANS_SUPPORTED);
2811 adapter->max_mcast_mac = min_t(u16, adapter->max_mcast_mac,
2812 BE_MAX_MC);
2813 adapter->max_tx_queues = min_t(u16, adapter->max_tx_queues,
2814 MAX_TX_QS);
2815 adapter->max_rss_queues = min_t(u16, adapter->max_rss_queues,
2816 BE3_MAX_RSS_QS);
2817 adapter->max_event_queues = min_t(u16,
2818 adapter->max_event_queues,
2819 BE3_MAX_RSS_QS);
2820
2821 if (adapter->max_rss_queues &&
2822 adapter->max_rss_queues == adapter->max_rx_queues)
2823 adapter->max_rss_queues -= 1;
2824
2825 if (adapter->max_event_queues < adapter->max_rss_queues)
2826 adapter->max_rss_queues = adapter->max_event_queues;
2827
2828 } else {
2829 if (be_physfn(adapter))
2830 adapter->max_pmac_cnt = BE_UC_PMAC_COUNT;
2831 else
2832 adapter->max_pmac_cnt = BE_VF_UC_PMAC_COUNT;
2833
2834 if (adapter->function_mode & FLEX10_MODE)
2835 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/8;
2836 else
2837 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2838
2839 adapter->max_mcast_mac = BE_MAX_MC;
2840 adapter->max_tx_queues = MAX_TX_QS;
2841 adapter->max_rss_queues = (adapter->be3_native) ?
2842 BE3_MAX_RSS_QS : BE2_MAX_RSS_QS;
2843 adapter->max_event_queues = BE3_MAX_RSS_QS;
2844
2845 adapter->if_cap_flags = BE_IF_FLAGS_UNTAGGED |
2846 BE_IF_FLAGS_BROADCAST |
2847 BE_IF_FLAGS_MULTICAST |
2848 BE_IF_FLAGS_PASS_L3L4_ERRORS |
2849 BE_IF_FLAGS_MCAST_PROMISCUOUS |
2850 BE_IF_FLAGS_VLAN_PROMISCUOUS |
2851 BE_IF_FLAGS_PROMISCUOUS;
2852
2853 if (adapter->function_caps & BE_FUNCTION_CAPS_RSS)
2854 adapter->if_cap_flags |= BE_IF_FLAGS_RSS;
2855 }
2856 }
2857
2858 /* Routine to query per function resource limits */
2859 static int be_get_config(struct be_adapter *adapter)
2860 {
2861 int pos, status;
2862 u16 dev_num_vfs;
2863
2864 status = be_cmd_query_fw_cfg(adapter, &adapter->port_num,
2865 &adapter->function_mode,
2866 &adapter->function_caps);
2867 if (status)
2868 goto err;
2869
2870 be_get_resources(adapter);
2871
2872 /* primary mac needs 1 pmac entry */
2873 adapter->pmac_id = kcalloc(adapter->max_pmac_cnt + 1,
2874 sizeof(u32), GFP_KERNEL);
2875 if (!adapter->pmac_id) {
2876 status = -ENOMEM;
2877 goto err;
2878 }
2879
2880 pos = pci_find_ext_capability(adapter->pdev, PCI_EXT_CAP_ID_SRIOV);
2881 if (pos) {
2882 pci_read_config_word(adapter->pdev, pos + PCI_SRIOV_TOTAL_VF,
2883 &dev_num_vfs);
2884 if (!lancer_chip(adapter))
2885 dev_num_vfs = min_t(u16, dev_num_vfs, MAX_VFS);
2886 adapter->dev_num_vfs = dev_num_vfs;
2887 }
2888 err:
2889 return status;
2890 }
2891
2892 static int be_setup(struct be_adapter *adapter)
2893 {
2894 struct device *dev = &adapter->pdev->dev;
2895 u32 en_flags;
2896 u32 tx_fc, rx_fc;
2897 int status;
2898 u8 mac[ETH_ALEN];
2899 bool active_mac;
2900
2901 be_setup_init(adapter);
2902
2903 if (!lancer_chip(adapter))
2904 be_cmd_req_native_mode(adapter);
2905
2906 status = be_get_config(adapter);
2907 if (status)
2908 goto err;
2909
2910 be_msix_enable(adapter);
2911
2912 status = be_evt_queues_create(adapter);
2913 if (status)
2914 goto err;
2915
2916 status = be_tx_cqs_create(adapter);
2917 if (status)
2918 goto err;
2919
2920 status = be_rx_cqs_create(adapter);
2921 if (status)
2922 goto err;
2923
2924 status = be_mcc_queues_create(adapter);
2925 if (status)
2926 goto err;
2927
2928 be_cmd_get_fn_privileges(adapter, &adapter->cmd_privileges, 0);
2929 /* In UMC mode FW does not return right privileges.
2930 * Override with correct privilege equivalent to PF.
2931 */
2932 if (be_is_mc(adapter))
2933 adapter->cmd_privileges = MAX_PRIVILEGES;
2934
2935 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
2936 BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_PASS_L3L4_ERRORS;
2937
2938 if (adapter->function_caps & BE_FUNCTION_CAPS_RSS)
2939 en_flags |= BE_IF_FLAGS_RSS;
2940
2941 en_flags = en_flags & adapter->if_cap_flags;
2942
2943 status = be_cmd_if_create(adapter, adapter->if_cap_flags, en_flags,
2944 &adapter->if_handle, 0);
2945 if (status != 0)
2946 goto err;
2947
2948 memset(mac, 0, ETH_ALEN);
2949 active_mac = false;
2950 status = be_get_mac_addr(adapter, mac, adapter->if_handle,
2951 &active_mac, &adapter->pmac_id[0]);
2952 if (status != 0)
2953 goto err;
2954
2955 if (!active_mac) {
2956 status = be_cmd_pmac_add(adapter, mac, adapter->if_handle,
2957 &adapter->pmac_id[0], 0);
2958 if (status != 0)
2959 goto err;
2960 }
2961
2962 if (is_zero_ether_addr(adapter->netdev->dev_addr)) {
2963 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2964 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2965 }
2966
2967 status = be_tx_qs_create(adapter);
2968 if (status)
2969 goto err;
2970
2971 be_cmd_get_fw_ver(adapter, adapter->fw_ver, NULL);
2972
2973 if (adapter->vlans_added)
2974 be_vid_config(adapter);
2975
2976 be_set_rx_mode(adapter->netdev);
2977
2978 be_cmd_get_flow_control(adapter, &tx_fc, &rx_fc);
2979
2980 if (rx_fc != adapter->rx_fc || tx_fc != adapter->tx_fc)
2981 be_cmd_set_flow_control(adapter, adapter->tx_fc,
2982 adapter->rx_fc);
2983
2984 if (be_physfn(adapter) && num_vfs) {
2985 if (adapter->dev_num_vfs)
2986 be_vf_setup(adapter);
2987 else
2988 dev_warn(dev, "device doesn't support SRIOV\n");
2989 }
2990
2991 status = be_cmd_get_phy_info(adapter);
2992 if (!status && be_pause_supported(adapter))
2993 adapter->phy.fc_autoneg = 1;
2994
2995 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
2996 adapter->flags |= BE_FLAGS_WORKER_SCHEDULED;
2997 return 0;
2998 err:
2999 be_clear(adapter);
3000 return status;
3001 }
3002
3003 #ifdef CONFIG_NET_POLL_CONTROLLER
3004 static void be_netpoll(struct net_device *netdev)
3005 {
3006 struct be_adapter *adapter = netdev_priv(netdev);
3007 struct be_eq_obj *eqo;
3008 int i;
3009
3010 for_all_evt_queues(adapter, eqo, i)
3011 event_handle(eqo);
3012
3013 return;
3014 }
3015 #endif
3016
3017 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
3018 char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "};
3019
3020 static bool be_flash_redboot(struct be_adapter *adapter,
3021 const u8 *p, u32 img_start, int image_size,
3022 int hdr_size)
3023 {
3024 u32 crc_offset;
3025 u8 flashed_crc[4];
3026 int status;
3027
3028 crc_offset = hdr_size + img_start + image_size - 4;
3029
3030 p += crc_offset;
3031
3032 status = be_cmd_get_flash_crc(adapter, flashed_crc,
3033 (image_size - 4));
3034 if (status) {
3035 dev_err(&adapter->pdev->dev,
3036 "could not get crc from flash, not flashing redboot\n");
3037 return false;
3038 }
3039
3040 /*update redboot only if crc does not match*/
3041 if (!memcmp(flashed_crc, p, 4))
3042 return false;
3043 else
3044 return true;
3045 }
3046
3047 static bool phy_flashing_required(struct be_adapter *adapter)
3048 {
3049 return (adapter->phy.phy_type == TN_8022 &&
3050 adapter->phy.interface_type == PHY_TYPE_BASET_10GB);
3051 }
3052
3053 static bool is_comp_in_ufi(struct be_adapter *adapter,
3054 struct flash_section_info *fsec, int type)
3055 {
3056 int i = 0, img_type = 0;
3057 struct flash_section_info_g2 *fsec_g2 = NULL;
3058
3059 if (adapter->generation != BE_GEN3)
3060 fsec_g2 = (struct flash_section_info_g2 *)fsec;
3061
3062 for (i = 0; i < MAX_FLASH_COMP; i++) {
3063 if (fsec_g2)
3064 img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type);
3065 else
3066 img_type = le32_to_cpu(fsec->fsec_entry[i].type);
3067
3068 if (img_type == type)
3069 return true;
3070 }
3071 return false;
3072
3073 }
3074
3075 struct flash_section_info *get_fsec_info(struct be_adapter *adapter,
3076 int header_size,
3077 const struct firmware *fw)
3078 {
3079 struct flash_section_info *fsec = NULL;
3080 const u8 *p = fw->data;
3081
3082 p += header_size;
3083 while (p < (fw->data + fw->size)) {
3084 fsec = (struct flash_section_info *)p;
3085 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie)))
3086 return fsec;
3087 p += 32;
3088 }
3089 return NULL;
3090 }
3091
3092 static int be_flash(struct be_adapter *adapter, const u8 *img,
3093 struct be_dma_mem *flash_cmd, int optype, int img_size)
3094 {
3095 u32 total_bytes = 0, flash_op, num_bytes = 0;
3096 int status = 0;
3097 struct be_cmd_write_flashrom *req = flash_cmd->va;
3098
3099 total_bytes = img_size;
3100 while (total_bytes) {
3101 num_bytes = min_t(u32, 32*1024, total_bytes);
3102
3103 total_bytes -= num_bytes;
3104
3105 if (!total_bytes) {
3106 if (optype == OPTYPE_PHY_FW)
3107 flash_op = FLASHROM_OPER_PHY_FLASH;
3108 else
3109 flash_op = FLASHROM_OPER_FLASH;
3110 } else {
3111 if (optype == OPTYPE_PHY_FW)
3112 flash_op = FLASHROM_OPER_PHY_SAVE;
3113 else
3114 flash_op = FLASHROM_OPER_SAVE;
3115 }
3116
3117 memcpy(req->data_buf, img, num_bytes);
3118 img += num_bytes;
3119 status = be_cmd_write_flashrom(adapter, flash_cmd, optype,
3120 flash_op, num_bytes);
3121 if (status) {
3122 if (status == ILLEGAL_IOCTL_REQ &&
3123 optype == OPTYPE_PHY_FW)
3124 break;
3125 dev_err(&adapter->pdev->dev,
3126 "cmd to write to flash rom failed.\n");
3127 return status;
3128 }
3129 }
3130 return 0;
3131 }
3132
3133 static int be_flash_data(struct be_adapter *adapter,
3134 const struct firmware *fw,
3135 struct be_dma_mem *flash_cmd,
3136 int num_of_images)
3137
3138 {
3139 int status = 0, i, filehdr_size = 0;
3140 int img_hdrs_size = (num_of_images * sizeof(struct image_hdr));
3141 const u8 *p = fw->data;
3142 const struct flash_comp *pflashcomp;
3143 int num_comp, redboot;
3144 struct flash_section_info *fsec = NULL;
3145
3146 struct flash_comp gen3_flash_types[] = {
3147 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, OPTYPE_ISCSI_ACTIVE,
3148 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_iSCSI},
3149 { FLASH_REDBOOT_START_g3, OPTYPE_REDBOOT,
3150 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3, IMAGE_BOOT_CODE},
3151 { FLASH_iSCSI_BIOS_START_g3, OPTYPE_BIOS,
3152 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_ISCSI},
3153 { FLASH_PXE_BIOS_START_g3, OPTYPE_PXE_BIOS,
3154 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_PXE},
3155 { FLASH_FCoE_BIOS_START_g3, OPTYPE_FCOE_BIOS,
3156 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_FCoE},
3157 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, OPTYPE_ISCSI_BACKUP,
3158 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_iSCSI},
3159 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, OPTYPE_FCOE_FW_ACTIVE,
3160 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_FCoE},
3161 { FLASH_FCoE_BACKUP_IMAGE_START_g3, OPTYPE_FCOE_FW_BACKUP,
3162 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_FCoE},
3163 { FLASH_NCSI_START_g3, OPTYPE_NCSI_FW,
3164 FLASH_NCSI_IMAGE_MAX_SIZE_g3, IMAGE_NCSI},
3165 { FLASH_PHY_FW_START_g3, OPTYPE_PHY_FW,
3166 FLASH_PHY_FW_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_PHY}
3167 };
3168
3169 struct flash_comp gen2_flash_types[] = {
3170 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, OPTYPE_ISCSI_ACTIVE,
3171 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_iSCSI},
3172 { FLASH_REDBOOT_START_g2, OPTYPE_REDBOOT,
3173 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2, IMAGE_BOOT_CODE},
3174 { FLASH_iSCSI_BIOS_START_g2, OPTYPE_BIOS,
3175 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_ISCSI},
3176 { FLASH_PXE_BIOS_START_g2, OPTYPE_PXE_BIOS,
3177 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_PXE},
3178 { FLASH_FCoE_BIOS_START_g2, OPTYPE_FCOE_BIOS,
3179 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_FCoE},
3180 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, OPTYPE_ISCSI_BACKUP,
3181 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_iSCSI},
3182 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, OPTYPE_FCOE_FW_ACTIVE,
3183 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_FCoE},
3184 { FLASH_FCoE_BACKUP_IMAGE_START_g2, OPTYPE_FCOE_FW_BACKUP,
3185 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_FCoE}
3186 };
3187
3188 if (adapter->generation == BE_GEN3) {
3189 pflashcomp = gen3_flash_types;
3190 filehdr_size = sizeof(struct flash_file_hdr_g3);
3191 num_comp = ARRAY_SIZE(gen3_flash_types);
3192 } else {
3193 pflashcomp = gen2_flash_types;
3194 filehdr_size = sizeof(struct flash_file_hdr_g2);
3195 num_comp = ARRAY_SIZE(gen2_flash_types);
3196 }
3197 /* Get flash section info*/
3198 fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw);
3199 if (!fsec) {
3200 dev_err(&adapter->pdev->dev,
3201 "Invalid Cookie. UFI corrupted ?\n");
3202 return -1;
3203 }
3204 for (i = 0; i < num_comp; i++) {
3205 if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type))
3206 continue;
3207
3208 if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) &&
3209 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
3210 continue;
3211
3212 if (pflashcomp[i].optype == OPTYPE_PHY_FW &&
3213 !phy_flashing_required(adapter))
3214 continue;
3215
3216 if (pflashcomp[i].optype == OPTYPE_REDBOOT) {
3217 redboot = be_flash_redboot(adapter, fw->data,
3218 pflashcomp[i].offset, pflashcomp[i].size,
3219 filehdr_size + img_hdrs_size);
3220 if (!redboot)
3221 continue;
3222 }
3223
3224 p = fw->data;
3225 p += filehdr_size + pflashcomp[i].offset + img_hdrs_size;
3226 if (p + pflashcomp[i].size > fw->data + fw->size)
3227 return -1;
3228
3229 status = be_flash(adapter, p, flash_cmd, pflashcomp[i].optype,
3230 pflashcomp[i].size);
3231 if (status) {
3232 dev_err(&adapter->pdev->dev,
3233 "Flashing section type %d failed.\n",
3234 pflashcomp[i].img_type);
3235 return status;
3236 }
3237 }
3238 return 0;
3239 }
3240
3241 static int be_flash_skyhawk(struct be_adapter *adapter,
3242 const struct firmware *fw,
3243 struct be_dma_mem *flash_cmd, int num_of_images)
3244 {
3245 int status = 0, i, filehdr_size = 0;
3246 int img_offset, img_size, img_optype, redboot;
3247 int img_hdrs_size = num_of_images * sizeof(struct image_hdr);
3248 const u8 *p = fw->data;
3249 struct flash_section_info *fsec = NULL;
3250
3251 filehdr_size = sizeof(struct flash_file_hdr_g3);
3252 fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw);
3253 if (!fsec) {
3254 dev_err(&adapter->pdev->dev,
3255 "Invalid Cookie. UFI corrupted ?\n");
3256 return -1;
3257 }
3258
3259 for (i = 0; i < le32_to_cpu(fsec->fsec_hdr.num_images); i++) {
3260 img_offset = le32_to_cpu(fsec->fsec_entry[i].offset);
3261 img_size = le32_to_cpu(fsec->fsec_entry[i].pad_size);
3262
3263 switch (le32_to_cpu(fsec->fsec_entry[i].type)) {
3264 case IMAGE_FIRMWARE_iSCSI:
3265 img_optype = OPTYPE_ISCSI_ACTIVE;
3266 break;
3267 case IMAGE_BOOT_CODE:
3268 img_optype = OPTYPE_REDBOOT;
3269 break;
3270 case IMAGE_OPTION_ROM_ISCSI:
3271 img_optype = OPTYPE_BIOS;
3272 break;
3273 case IMAGE_OPTION_ROM_PXE:
3274 img_optype = OPTYPE_PXE_BIOS;
3275 break;
3276 case IMAGE_OPTION_ROM_FCoE:
3277 img_optype = OPTYPE_FCOE_BIOS;
3278 break;
3279 case IMAGE_FIRMWARE_BACKUP_iSCSI:
3280 img_optype = OPTYPE_ISCSI_BACKUP;
3281 break;
3282 case IMAGE_NCSI:
3283 img_optype = OPTYPE_NCSI_FW;
3284 break;
3285 default:
3286 continue;
3287 }
3288
3289 if (img_optype == OPTYPE_REDBOOT) {
3290 redboot = be_flash_redboot(adapter, fw->data,
3291 img_offset, img_size,
3292 filehdr_size + img_hdrs_size);
3293 if (!redboot)
3294 continue;
3295 }
3296
3297 p = fw->data;
3298 p += filehdr_size + img_offset + img_hdrs_size;
3299 if (p + img_size > fw->data + fw->size)
3300 return -1;
3301
3302 status = be_flash(adapter, p, flash_cmd, img_optype, img_size);
3303 if (status) {
3304 dev_err(&adapter->pdev->dev,
3305 "Flashing section type %d failed.\n",
3306 fsec->fsec_entry[i].type);
3307 return status;
3308 }
3309 }
3310 return 0;
3311 }
3312
3313 static int lancer_wait_idle(struct be_adapter *adapter)
3314 {
3315 #define SLIPORT_IDLE_TIMEOUT 30
3316 u32 reg_val;
3317 int status = 0, i;
3318
3319 for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) {
3320 reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET);
3321 if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0)
3322 break;
3323
3324 ssleep(1);
3325 }
3326
3327 if (i == SLIPORT_IDLE_TIMEOUT)
3328 status = -1;
3329
3330 return status;
3331 }
3332
3333 static int lancer_fw_reset(struct be_adapter *adapter)
3334 {
3335 int status = 0;
3336
3337 status = lancer_wait_idle(adapter);
3338 if (status)
3339 return status;
3340
3341 iowrite32(PHYSDEV_CONTROL_FW_RESET_MASK, adapter->db +
3342 PHYSDEV_CONTROL_OFFSET);
3343
3344 return status;
3345 }
3346
3347 static int lancer_fw_download(struct be_adapter *adapter,
3348 const struct firmware *fw)
3349 {
3350 #define LANCER_FW_DOWNLOAD_CHUNK (32 * 1024)
3351 #define LANCER_FW_DOWNLOAD_LOCATION "/prg"
3352 struct be_dma_mem flash_cmd;
3353 const u8 *data_ptr = NULL;
3354 u8 *dest_image_ptr = NULL;
3355 size_t image_size = 0;
3356 u32 chunk_size = 0;
3357 u32 data_written = 0;
3358 u32 offset = 0;
3359 int status = 0;
3360 u8 add_status = 0;
3361 u8 change_status;
3362
3363 if (!IS_ALIGNED(fw->size, sizeof(u32))) {
3364 dev_err(&adapter->pdev->dev,
3365 "FW Image not properly aligned. "
3366 "Length must be 4 byte aligned.\n");
3367 status = -EINVAL;
3368 goto lancer_fw_exit;
3369 }
3370
3371 flash_cmd.size = sizeof(struct lancer_cmd_req_write_object)
3372 + LANCER_FW_DOWNLOAD_CHUNK;
3373 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
3374 &flash_cmd.dma, GFP_KERNEL);
3375 if (!flash_cmd.va) {
3376 status = -ENOMEM;
3377 dev_err(&adapter->pdev->dev,
3378 "Memory allocation failure while flashing\n");
3379 goto lancer_fw_exit;
3380 }
3381
3382 dest_image_ptr = flash_cmd.va +
3383 sizeof(struct lancer_cmd_req_write_object);
3384 image_size = fw->size;
3385 data_ptr = fw->data;
3386
3387 while (image_size) {
3388 chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK);
3389
3390 /* Copy the image chunk content. */
3391 memcpy(dest_image_ptr, data_ptr, chunk_size);
3392
3393 status = lancer_cmd_write_object(adapter, &flash_cmd,
3394 chunk_size, offset,
3395 LANCER_FW_DOWNLOAD_LOCATION,
3396 &data_written, &change_status,
3397 &add_status);
3398 if (status)
3399 break;
3400
3401 offset += data_written;
3402 data_ptr += data_written;
3403 image_size -= data_written;
3404 }
3405
3406 if (!status) {
3407 /* Commit the FW written */
3408 status = lancer_cmd_write_object(adapter, &flash_cmd,
3409 0, offset,
3410 LANCER_FW_DOWNLOAD_LOCATION,
3411 &data_written, &change_status,
3412 &add_status);
3413 }
3414
3415 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
3416 flash_cmd.dma);
3417 if (status) {
3418 dev_err(&adapter->pdev->dev,
3419 "Firmware load error. "
3420 "Status code: 0x%x Additional Status: 0x%x\n",
3421 status, add_status);
3422 goto lancer_fw_exit;
3423 }
3424
3425 if (change_status == LANCER_FW_RESET_NEEDED) {
3426 status = lancer_fw_reset(adapter);
3427 if (status) {
3428 dev_err(&adapter->pdev->dev,
3429 "Adapter busy for FW reset.\n"
3430 "New FW will not be active.\n");
3431 goto lancer_fw_exit;
3432 }
3433 } else if (change_status != LANCER_NO_RESET_NEEDED) {
3434 dev_err(&adapter->pdev->dev,
3435 "System reboot required for new FW"
3436 " to be active\n");
3437 }
3438
3439 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
3440 lancer_fw_exit:
3441 return status;
3442 }
3443
3444 static int be_get_ufi_gen(struct be_adapter *adapter,
3445 struct flash_file_hdr_g2 *fhdr)
3446 {
3447 if (fhdr == NULL)
3448 goto be_get_ufi_exit;
3449
3450 if (adapter->generation == BE_GEN3) {
3451 if (skyhawk_chip(adapter) && fhdr->build[0] == '4')
3452 return SH_HW;
3453 else if (!skyhawk_chip(adapter) && fhdr->build[0] == '3')
3454 return BE_GEN3;
3455 } else if (adapter->generation == BE_GEN2 && fhdr->build[0] == '2') {
3456 return BE_GEN2;
3457 }
3458
3459 be_get_ufi_exit:
3460 dev_err(&adapter->pdev->dev,
3461 "UFI and Interface are not compatible for flashing\n");
3462 return -1;
3463 }
3464
3465 static int be_fw_download(struct be_adapter *adapter, const struct firmware* fw)
3466 {
3467 struct flash_file_hdr_g2 *fhdr;
3468 struct flash_file_hdr_g3 *fhdr3;
3469 struct image_hdr *img_hdr_ptr = NULL;
3470 struct be_dma_mem flash_cmd;
3471 const u8 *p;
3472 int status = 0, i = 0, num_imgs = 0, ufi_type = 0;
3473
3474 flash_cmd.size = sizeof(struct be_cmd_write_flashrom);
3475 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
3476 &flash_cmd.dma, GFP_KERNEL);
3477 if (!flash_cmd.va) {
3478 status = -ENOMEM;
3479 dev_err(&adapter->pdev->dev,
3480 "Memory allocation failure while flashing\n");
3481 goto be_fw_exit;
3482 }
3483
3484 p = fw->data;
3485 fhdr = (struct flash_file_hdr_g2 *)p;
3486
3487 ufi_type = be_get_ufi_gen(adapter, fhdr);
3488
3489 fhdr3 = (struct flash_file_hdr_g3 *)fw->data;
3490 num_imgs = le32_to_cpu(fhdr3->num_imgs);
3491 for (i = 0; i < num_imgs; i++) {
3492 img_hdr_ptr = (struct image_hdr *)(fw->data +
3493 (sizeof(struct flash_file_hdr_g3) +
3494 i * sizeof(struct image_hdr)));
3495 if (le32_to_cpu(img_hdr_ptr->imageid) == 1) {
3496 if (ufi_type == SH_HW)
3497 status = be_flash_skyhawk(adapter, fw,
3498 &flash_cmd, num_imgs);
3499 else if (ufi_type == BE_GEN3)
3500 status = be_flash_data(adapter, fw,
3501 &flash_cmd, num_imgs);
3502 }
3503 }
3504
3505 if (ufi_type == BE_GEN2)
3506 status = be_flash_data(adapter, fw, &flash_cmd, 0);
3507 else if (ufi_type == -1)
3508 status = -1;
3509
3510 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
3511 flash_cmd.dma);
3512 if (status) {
3513 dev_err(&adapter->pdev->dev, "Firmware load error\n");
3514 goto be_fw_exit;
3515 }
3516
3517 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
3518
3519 be_fw_exit:
3520 return status;
3521 }
3522
3523 int be_load_fw(struct be_adapter *adapter, u8 *fw_file)
3524 {
3525 const struct firmware *fw;
3526 int status;
3527
3528 if (!netif_running(adapter->netdev)) {
3529 dev_err(&adapter->pdev->dev,
3530 "Firmware load not allowed (interface is down)\n");
3531 return -1;
3532 }
3533
3534 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
3535 if (status)
3536 goto fw_exit;
3537
3538 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
3539
3540 if (lancer_chip(adapter))
3541 status = lancer_fw_download(adapter, fw);
3542 else
3543 status = be_fw_download(adapter, fw);
3544
3545 fw_exit:
3546 release_firmware(fw);
3547 return status;
3548 }
3549
3550 static const struct net_device_ops be_netdev_ops = {
3551 .ndo_open = be_open,
3552 .ndo_stop = be_close,
3553 .ndo_start_xmit = be_xmit,
3554 .ndo_set_rx_mode = be_set_rx_mode,
3555 .ndo_set_mac_address = be_mac_addr_set,
3556 .ndo_change_mtu = be_change_mtu,
3557 .ndo_get_stats64 = be_get_stats64,
3558 .ndo_validate_addr = eth_validate_addr,
3559 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
3560 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
3561 .ndo_set_vf_mac = be_set_vf_mac,
3562 .ndo_set_vf_vlan = be_set_vf_vlan,
3563 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
3564 .ndo_get_vf_config = be_get_vf_config,
3565 #ifdef CONFIG_NET_POLL_CONTROLLER
3566 .ndo_poll_controller = be_netpoll,
3567 #endif
3568 };
3569
3570 static void be_netdev_init(struct net_device *netdev)
3571 {
3572 struct be_adapter *adapter = netdev_priv(netdev);
3573 struct be_eq_obj *eqo;
3574 int i;
3575
3576 netdev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
3577 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
3578 NETIF_F_HW_VLAN_TX;
3579 if (be_multi_rxq(adapter))
3580 netdev->hw_features |= NETIF_F_RXHASH;
3581
3582 netdev->features |= netdev->hw_features |
3583 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
3584
3585 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
3586 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
3587
3588 netdev->priv_flags |= IFF_UNICAST_FLT;
3589
3590 netdev->flags |= IFF_MULTICAST;
3591
3592 netif_set_gso_max_size(netdev, 65535 - ETH_HLEN);
3593
3594 netdev->netdev_ops = &be_netdev_ops;
3595
3596 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
3597
3598 for_all_evt_queues(adapter, eqo, i)
3599 netif_napi_add(netdev, &eqo->napi, be_poll, BE_NAPI_WEIGHT);
3600 }
3601
3602 static void be_unmap_pci_bars(struct be_adapter *adapter)
3603 {
3604 if (adapter->csr)
3605 iounmap(adapter->csr);
3606 if (adapter->db)
3607 iounmap(adapter->db);
3608 if (adapter->roce_db.base)
3609 pci_iounmap(adapter->pdev, adapter->roce_db.base);
3610 }
3611
3612 static int lancer_roce_map_pci_bars(struct be_adapter *adapter)
3613 {
3614 struct pci_dev *pdev = adapter->pdev;
3615 u8 __iomem *addr;
3616
3617 addr = pci_iomap(pdev, 2, 0);
3618 if (addr == NULL)
3619 return -ENOMEM;
3620
3621 adapter->roce_db.base = addr;
3622 adapter->roce_db.io_addr = pci_resource_start(pdev, 2);
3623 adapter->roce_db.size = 8192;
3624 adapter->roce_db.total_size = pci_resource_len(pdev, 2);
3625 return 0;
3626 }
3627
3628 static int be_map_pci_bars(struct be_adapter *adapter)
3629 {
3630 u8 __iomem *addr;
3631 int db_reg;
3632
3633 if (lancer_chip(adapter)) {
3634 if (be_type_2_3(adapter)) {
3635 addr = ioremap_nocache(
3636 pci_resource_start(adapter->pdev, 0),
3637 pci_resource_len(adapter->pdev, 0));
3638 if (addr == NULL)
3639 return -ENOMEM;
3640 adapter->db = addr;
3641 }
3642 if (adapter->if_type == SLI_INTF_TYPE_3) {
3643 if (lancer_roce_map_pci_bars(adapter))
3644 goto pci_map_err;
3645 }
3646 return 0;
3647 }
3648
3649 if (be_physfn(adapter)) {
3650 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
3651 pci_resource_len(adapter->pdev, 2));
3652 if (addr == NULL)
3653 return -ENOMEM;
3654 adapter->csr = addr;
3655 }
3656
3657 if (adapter->generation == BE_GEN2) {
3658 db_reg = 4;
3659 } else {
3660 if (be_physfn(adapter))
3661 db_reg = 4;
3662 else
3663 db_reg = 0;
3664 }
3665 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
3666 pci_resource_len(adapter->pdev, db_reg));
3667 if (addr == NULL)
3668 goto pci_map_err;
3669 adapter->db = addr;
3670 if (adapter->sli_family == SKYHAWK_SLI_FAMILY) {
3671 adapter->roce_db.size = 4096;
3672 adapter->roce_db.io_addr =
3673 pci_resource_start(adapter->pdev, db_reg);
3674 adapter->roce_db.total_size =
3675 pci_resource_len(adapter->pdev, db_reg);
3676 }
3677 return 0;
3678 pci_map_err:
3679 be_unmap_pci_bars(adapter);
3680 return -ENOMEM;
3681 }
3682
3683 static void be_ctrl_cleanup(struct be_adapter *adapter)
3684 {
3685 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
3686
3687 be_unmap_pci_bars(adapter);
3688
3689 if (mem->va)
3690 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
3691 mem->dma);
3692
3693 mem = &adapter->rx_filter;
3694 if (mem->va)
3695 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
3696 mem->dma);
3697 }
3698
3699 static int be_ctrl_init(struct be_adapter *adapter)
3700 {
3701 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
3702 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
3703 struct be_dma_mem *rx_filter = &adapter->rx_filter;
3704 int status;
3705
3706 status = be_map_pci_bars(adapter);
3707 if (status)
3708 goto done;
3709
3710 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
3711 mbox_mem_alloc->va = dma_alloc_coherent(&adapter->pdev->dev,
3712 mbox_mem_alloc->size,
3713 &mbox_mem_alloc->dma,
3714 GFP_KERNEL);
3715 if (!mbox_mem_alloc->va) {
3716 status = -ENOMEM;
3717 goto unmap_pci_bars;
3718 }
3719 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
3720 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
3721 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
3722 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
3723
3724 rx_filter->size = sizeof(struct be_cmd_req_rx_filter);
3725 rx_filter->va = dma_alloc_coherent(&adapter->pdev->dev, rx_filter->size,
3726 &rx_filter->dma, GFP_KERNEL);
3727 if (rx_filter->va == NULL) {
3728 status = -ENOMEM;
3729 goto free_mbox;
3730 }
3731 memset(rx_filter->va, 0, rx_filter->size);
3732 mutex_init(&adapter->mbox_lock);
3733 spin_lock_init(&adapter->mcc_lock);
3734 spin_lock_init(&adapter->mcc_cq_lock);
3735
3736 init_completion(&adapter->flash_compl);
3737 pci_save_state(adapter->pdev);
3738 return 0;
3739
3740 free_mbox:
3741 dma_free_coherent(&adapter->pdev->dev, mbox_mem_alloc->size,
3742 mbox_mem_alloc->va, mbox_mem_alloc->dma);
3743
3744 unmap_pci_bars:
3745 be_unmap_pci_bars(adapter);
3746
3747 done:
3748 return status;
3749 }
3750
3751 static void be_stats_cleanup(struct be_adapter *adapter)
3752 {
3753 struct be_dma_mem *cmd = &adapter->stats_cmd;
3754
3755 if (cmd->va)
3756 dma_free_coherent(&adapter->pdev->dev, cmd->size,
3757 cmd->va, cmd->dma);
3758 }
3759
3760 static int be_stats_init(struct be_adapter *adapter)
3761 {
3762 struct be_dma_mem *cmd = &adapter->stats_cmd;
3763
3764 if (adapter->generation == BE_GEN2) {
3765 cmd->size = sizeof(struct be_cmd_req_get_stats_v0);
3766 } else {
3767 if (lancer_chip(adapter))
3768 cmd->size = sizeof(struct lancer_cmd_req_pport_stats);
3769 else
3770 cmd->size = sizeof(struct be_cmd_req_get_stats_v1);
3771 }
3772 cmd->va = dma_alloc_coherent(&adapter->pdev->dev, cmd->size, &cmd->dma,
3773 GFP_KERNEL);
3774 if (cmd->va == NULL)
3775 return -1;
3776 memset(cmd->va, 0, cmd->size);
3777 return 0;
3778 }
3779
3780 static void __devexit be_remove(struct pci_dev *pdev)
3781 {
3782 struct be_adapter *adapter = pci_get_drvdata(pdev);
3783
3784 if (!adapter)
3785 return;
3786
3787 be_roce_dev_remove(adapter);
3788
3789 cancel_delayed_work_sync(&adapter->func_recovery_work);
3790
3791 unregister_netdev(adapter->netdev);
3792
3793 be_clear(adapter);
3794
3795 /* tell fw we're done with firing cmds */
3796 be_cmd_fw_clean(adapter);
3797
3798 be_stats_cleanup(adapter);
3799
3800 be_ctrl_cleanup(adapter);
3801
3802 pci_disable_pcie_error_reporting(pdev);
3803
3804 pci_set_drvdata(pdev, NULL);
3805 pci_release_regions(pdev);
3806 pci_disable_device(pdev);
3807
3808 free_netdev(adapter->netdev);
3809 }
3810
3811 bool be_is_wol_supported(struct be_adapter *adapter)
3812 {
3813 return ((adapter->wol_cap & BE_WOL_CAP) &&
3814 !be_is_wol_excluded(adapter)) ? true : false;
3815 }
3816
3817 u32 be_get_fw_log_level(struct be_adapter *adapter)
3818 {
3819 struct be_dma_mem extfat_cmd;
3820 struct be_fat_conf_params *cfgs;
3821 int status;
3822 u32 level = 0;
3823 int j;
3824
3825 if (lancer_chip(adapter))
3826 return 0;
3827
3828 memset(&extfat_cmd, 0, sizeof(struct be_dma_mem));
3829 extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);
3830 extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size,
3831 &extfat_cmd.dma);
3832
3833 if (!extfat_cmd.va) {
3834 dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n",
3835 __func__);
3836 goto err;
3837 }
3838
3839 status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd);
3840 if (!status) {
3841 cfgs = (struct be_fat_conf_params *)(extfat_cmd.va +
3842 sizeof(struct be_cmd_resp_hdr));
3843 for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) {
3844 if (cfgs->module[0].trace_lvl[j].mode == MODE_UART)
3845 level = cfgs->module[0].trace_lvl[j].dbg_lvl;
3846 }
3847 }
3848 pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va,
3849 extfat_cmd.dma);
3850 err:
3851 return level;
3852 }
3853
3854 static int be_get_initial_config(struct be_adapter *adapter)
3855 {
3856 int status;
3857 u32 level;
3858
3859 status = be_cmd_get_cntl_attributes(adapter);
3860 if (status)
3861 return status;
3862
3863 status = be_cmd_get_acpi_wol_cap(adapter);
3864 if (status) {
3865 /* in case of a failure to get wol capabillities
3866 * check the exclusion list to determine WOL capability */
3867 if (!be_is_wol_excluded(adapter))
3868 adapter->wol_cap |= BE_WOL_CAP;
3869 }
3870
3871 if (be_is_wol_supported(adapter))
3872 adapter->wol = true;
3873
3874 /* Must be a power of 2 or else MODULO will BUG_ON */
3875 adapter->be_get_temp_freq = 64;
3876
3877 level = be_get_fw_log_level(adapter);
3878 adapter->msg_enable = level <= FW_LOG_LEVEL_DEFAULT ? NETIF_MSG_HW : 0;
3879
3880 return 0;
3881 }
3882
3883 static int be_dev_type_check(struct be_adapter *adapter)
3884 {
3885 struct pci_dev *pdev = adapter->pdev;
3886 u32 sli_intf = 0, if_type;
3887
3888 switch (pdev->device) {
3889 case BE_DEVICE_ID1:
3890 case OC_DEVICE_ID1:
3891 adapter->generation = BE_GEN2;
3892 break;
3893 case BE_DEVICE_ID2:
3894 case OC_DEVICE_ID2:
3895 adapter->generation = BE_GEN3;
3896 break;
3897 case OC_DEVICE_ID3:
3898 case OC_DEVICE_ID4:
3899 pci_read_config_dword(pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3900 adapter->if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
3901 SLI_INTF_IF_TYPE_SHIFT;
3902 if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
3903 SLI_INTF_IF_TYPE_SHIFT;
3904 if (((sli_intf & SLI_INTF_VALID_MASK) != SLI_INTF_VALID) ||
3905 !be_type_2_3(adapter)) {
3906 dev_err(&pdev->dev, "SLI_INTF reg val is not valid\n");
3907 return -EINVAL;
3908 }
3909 adapter->sli_family = ((sli_intf & SLI_INTF_FAMILY_MASK) >>
3910 SLI_INTF_FAMILY_SHIFT);
3911 adapter->generation = BE_GEN3;
3912 break;
3913 case OC_DEVICE_ID5:
3914 case OC_DEVICE_ID6:
3915 pci_read_config_dword(pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3916 if ((sli_intf & SLI_INTF_VALID_MASK) != SLI_INTF_VALID) {
3917 dev_err(&pdev->dev, "SLI_INTF reg val is not valid\n");
3918 return -EINVAL;
3919 }
3920 adapter->sli_family = ((sli_intf & SLI_INTF_FAMILY_MASK) >>
3921 SLI_INTF_FAMILY_SHIFT);
3922 adapter->generation = BE_GEN3;
3923 break;
3924 default:
3925 adapter->generation = 0;
3926 }
3927
3928 pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3929 adapter->virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
3930 return 0;
3931 }
3932
3933 static int lancer_recover_func(struct be_adapter *adapter)
3934 {
3935 int status;
3936
3937 status = lancer_test_and_set_rdy_state(adapter);
3938 if (status)
3939 goto err;
3940
3941 if (netif_running(adapter->netdev))
3942 be_close(adapter->netdev);
3943
3944 be_clear(adapter);
3945
3946 adapter->hw_error = false;
3947 adapter->fw_timeout = false;
3948
3949 status = be_setup(adapter);
3950 if (status)
3951 goto err;
3952
3953 if (netif_running(adapter->netdev)) {
3954 status = be_open(adapter->netdev);
3955 if (status)
3956 goto err;
3957 }
3958
3959 dev_err(&adapter->pdev->dev,
3960 "Adapter SLIPORT recovery succeeded\n");
3961 return 0;
3962 err:
3963 if (adapter->eeh_error)
3964 dev_err(&adapter->pdev->dev,
3965 "Adapter SLIPORT recovery failed\n");
3966
3967 return status;
3968 }
3969
3970 static void be_func_recovery_task(struct work_struct *work)
3971 {
3972 struct be_adapter *adapter =
3973 container_of(work, struct be_adapter, func_recovery_work.work);
3974 int status;
3975
3976 be_detect_error(adapter);
3977
3978 if (adapter->hw_error && lancer_chip(adapter)) {
3979
3980 if (adapter->eeh_error)
3981 goto out;
3982
3983 rtnl_lock();
3984 netif_device_detach(adapter->netdev);
3985 rtnl_unlock();
3986
3987 status = lancer_recover_func(adapter);
3988
3989 if (!status)
3990 netif_device_attach(adapter->netdev);
3991 }
3992
3993 out:
3994 schedule_delayed_work(&adapter->func_recovery_work,
3995 msecs_to_jiffies(1000));
3996 }
3997
3998 static void be_worker(struct work_struct *work)
3999 {
4000 struct be_adapter *adapter =
4001 container_of(work, struct be_adapter, work.work);
4002 struct be_rx_obj *rxo;
4003 struct be_eq_obj *eqo;
4004 int i;
4005
4006 /* when interrupts are not yet enabled, just reap any pending
4007 * mcc completions */
4008 if (!netif_running(adapter->netdev)) {
4009 local_bh_disable();
4010 be_process_mcc(adapter);
4011 local_bh_enable();
4012 goto reschedule;
4013 }
4014
4015 if (!adapter->stats_cmd_sent) {
4016 if (lancer_chip(adapter))
4017 lancer_cmd_get_pport_stats(adapter,
4018 &adapter->stats_cmd);
4019 else
4020 be_cmd_get_stats(adapter, &adapter->stats_cmd);
4021 }
4022
4023 if (MODULO(adapter->work_counter, adapter->be_get_temp_freq) == 0)
4024 be_cmd_get_die_temperature(adapter);
4025
4026 for_all_rx_queues(adapter, rxo, i) {
4027 if (rxo->rx_post_starved) {
4028 rxo->rx_post_starved = false;
4029 be_post_rx_frags(rxo, GFP_KERNEL);
4030 }
4031 }
4032
4033 for_all_evt_queues(adapter, eqo, i)
4034 be_eqd_update(adapter, eqo);
4035
4036 reschedule:
4037 adapter->work_counter++;
4038 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
4039 }
4040
4041 static bool be_reset_required(struct be_adapter *adapter)
4042 {
4043 return be_find_vfs(adapter, ENABLED) > 0 ? false : true;
4044 }
4045
4046 static char *mc_name(struct be_adapter *adapter)
4047 {
4048 if (adapter->function_mode & FLEX10_MODE)
4049 return "FLEX10";
4050 else if (adapter->function_mode & VNIC_MODE)
4051 return "vNIC";
4052 else if (adapter->function_mode & UMC_ENABLED)
4053 return "UMC";
4054 else
4055 return "";
4056 }
4057
4058 static inline char *func_name(struct be_adapter *adapter)
4059 {
4060 return be_physfn(adapter) ? "PF" : "VF";
4061 }
4062
4063 static int __devinit be_probe(struct pci_dev *pdev,
4064 const struct pci_device_id *pdev_id)
4065 {
4066 int status = 0;
4067 struct be_adapter *adapter;
4068 struct net_device *netdev;
4069 char port_name;
4070
4071 status = pci_enable_device(pdev);
4072 if (status)
4073 goto do_none;
4074
4075 status = pci_request_regions(pdev, DRV_NAME);
4076 if (status)
4077 goto disable_dev;
4078 pci_set_master(pdev);
4079
4080 netdev = alloc_etherdev_mqs(sizeof(*adapter), MAX_TX_QS, MAX_RX_QS);
4081 if (netdev == NULL) {
4082 status = -ENOMEM;
4083 goto rel_reg;
4084 }
4085 adapter = netdev_priv(netdev);
4086 adapter->pdev = pdev;
4087 pci_set_drvdata(pdev, adapter);
4088
4089 status = be_dev_type_check(adapter);
4090 if (status)
4091 goto free_netdev;
4092
4093 adapter->netdev = netdev;
4094 SET_NETDEV_DEV(netdev, &pdev->dev);
4095
4096 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
4097 if (!status) {
4098 netdev->features |= NETIF_F_HIGHDMA;
4099 } else {
4100 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
4101 if (status) {
4102 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
4103 goto free_netdev;
4104 }
4105 }
4106
4107 status = pci_enable_pcie_error_reporting(pdev);
4108 if (status)
4109 dev_err(&pdev->dev, "Could not use PCIe error reporting\n");
4110
4111 status = be_ctrl_init(adapter);
4112 if (status)
4113 goto free_netdev;
4114
4115 /* sync up with fw's ready state */
4116 if (be_physfn(adapter)) {
4117 status = be_fw_wait_ready(adapter);
4118 if (status)
4119 goto ctrl_clean;
4120 }
4121
4122 /* tell fw we're ready to fire cmds */
4123 status = be_cmd_fw_init(adapter);
4124 if (status)
4125 goto ctrl_clean;
4126
4127 if (be_reset_required(adapter)) {
4128 status = be_cmd_reset_function(adapter);
4129 if (status)
4130 goto ctrl_clean;
4131 }
4132
4133 /* The INTR bit may be set in the card when probed by a kdump kernel
4134 * after a crash.
4135 */
4136 if (!lancer_chip(adapter))
4137 be_intr_set(adapter, false);
4138
4139 status = be_stats_init(adapter);
4140 if (status)
4141 goto ctrl_clean;
4142
4143 status = be_get_initial_config(adapter);
4144 if (status)
4145 goto stats_clean;
4146
4147 INIT_DELAYED_WORK(&adapter->work, be_worker);
4148 INIT_DELAYED_WORK(&adapter->func_recovery_work, be_func_recovery_task);
4149 adapter->rx_fc = adapter->tx_fc = true;
4150
4151 status = be_setup(adapter);
4152 if (status)
4153 goto stats_clean;
4154
4155 be_netdev_init(netdev);
4156 status = register_netdev(netdev);
4157 if (status != 0)
4158 goto unsetup;
4159
4160 be_roce_dev_add(adapter);
4161
4162 schedule_delayed_work(&adapter->func_recovery_work,
4163 msecs_to_jiffies(1000));
4164
4165 be_cmd_query_port_name(adapter, &port_name);
4166
4167 dev_info(&pdev->dev, "%s: %s %s port %c\n", nic_name(pdev),
4168 func_name(adapter), mc_name(adapter), port_name);
4169
4170 return 0;
4171
4172 unsetup:
4173 be_clear(adapter);
4174 stats_clean:
4175 be_stats_cleanup(adapter);
4176 ctrl_clean:
4177 be_ctrl_cleanup(adapter);
4178 free_netdev:
4179 free_netdev(netdev);
4180 pci_set_drvdata(pdev, NULL);
4181 rel_reg:
4182 pci_release_regions(pdev);
4183 disable_dev:
4184 pci_disable_device(pdev);
4185 do_none:
4186 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
4187 return status;
4188 }
4189
4190 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
4191 {
4192 struct be_adapter *adapter = pci_get_drvdata(pdev);
4193 struct net_device *netdev = adapter->netdev;
4194
4195 if (adapter->wol)
4196 be_setup_wol(adapter, true);
4197
4198 cancel_delayed_work_sync(&adapter->func_recovery_work);
4199
4200 netif_device_detach(netdev);
4201 if (netif_running(netdev)) {
4202 rtnl_lock();
4203 be_close(netdev);
4204 rtnl_unlock();
4205 }
4206 be_clear(adapter);
4207
4208 pci_save_state(pdev);
4209 pci_disable_device(pdev);
4210 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4211 return 0;
4212 }
4213
4214 static int be_resume(struct pci_dev *pdev)
4215 {
4216 int status = 0;
4217 struct be_adapter *adapter = pci_get_drvdata(pdev);
4218 struct net_device *netdev = adapter->netdev;
4219
4220 netif_device_detach(netdev);
4221
4222 status = pci_enable_device(pdev);
4223 if (status)
4224 return status;
4225
4226 pci_set_power_state(pdev, 0);
4227 pci_restore_state(pdev);
4228
4229 /* tell fw we're ready to fire cmds */
4230 status = be_cmd_fw_init(adapter);
4231 if (status)
4232 return status;
4233
4234 be_setup(adapter);
4235 if (netif_running(netdev)) {
4236 rtnl_lock();
4237 be_open(netdev);
4238 rtnl_unlock();
4239 }
4240
4241 schedule_delayed_work(&adapter->func_recovery_work,
4242 msecs_to_jiffies(1000));
4243 netif_device_attach(netdev);
4244
4245 if (adapter->wol)
4246 be_setup_wol(adapter, false);
4247
4248 return 0;
4249 }
4250
4251 /*
4252 * An FLR will stop BE from DMAing any data.
4253 */
4254 static void be_shutdown(struct pci_dev *pdev)
4255 {
4256 struct be_adapter *adapter = pci_get_drvdata(pdev);
4257
4258 if (!adapter)
4259 return;
4260
4261 cancel_delayed_work_sync(&adapter->work);
4262 cancel_delayed_work_sync(&adapter->func_recovery_work);
4263
4264 netif_device_detach(adapter->netdev);
4265
4266 be_cmd_reset_function(adapter);
4267
4268 pci_disable_device(pdev);
4269 }
4270
4271 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
4272 pci_channel_state_t state)
4273 {
4274 struct be_adapter *adapter = pci_get_drvdata(pdev);
4275 struct net_device *netdev = adapter->netdev;
4276
4277 dev_err(&adapter->pdev->dev, "EEH error detected\n");
4278
4279 adapter->eeh_error = true;
4280
4281 cancel_delayed_work_sync(&adapter->func_recovery_work);
4282
4283 rtnl_lock();
4284 netif_device_detach(netdev);
4285 rtnl_unlock();
4286
4287 if (netif_running(netdev)) {
4288 rtnl_lock();
4289 be_close(netdev);
4290 rtnl_unlock();
4291 }
4292 be_clear(adapter);
4293
4294 if (state == pci_channel_io_perm_failure)
4295 return PCI_ERS_RESULT_DISCONNECT;
4296
4297 pci_disable_device(pdev);
4298
4299 /* The error could cause the FW to trigger a flash debug dump.
4300 * Resetting the card while flash dump is in progress
4301 * can cause it not to recover; wait for it to finish.
4302 * Wait only for first function as it is needed only once per
4303 * adapter.
4304 */
4305 if (pdev->devfn == 0)
4306 ssleep(30);
4307
4308 return PCI_ERS_RESULT_NEED_RESET;
4309 }
4310
4311 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
4312 {
4313 struct be_adapter *adapter = pci_get_drvdata(pdev);
4314 int status;
4315
4316 dev_info(&adapter->pdev->dev, "EEH reset\n");
4317 be_clear_all_error(adapter);
4318
4319 status = pci_enable_device(pdev);
4320 if (status)
4321 return PCI_ERS_RESULT_DISCONNECT;
4322
4323 pci_set_master(pdev);
4324 pci_set_power_state(pdev, 0);
4325 pci_restore_state(pdev);
4326
4327 /* Check if card is ok and fw is ready */
4328 status = be_fw_wait_ready(adapter);
4329 if (status)
4330 return PCI_ERS_RESULT_DISCONNECT;
4331
4332 pci_cleanup_aer_uncorrect_error_status(pdev);
4333 return PCI_ERS_RESULT_RECOVERED;
4334 }
4335
4336 static void be_eeh_resume(struct pci_dev *pdev)
4337 {
4338 int status = 0;
4339 struct be_adapter *adapter = pci_get_drvdata(pdev);
4340 struct net_device *netdev = adapter->netdev;
4341
4342 dev_info(&adapter->pdev->dev, "EEH resume\n");
4343
4344 pci_save_state(pdev);
4345
4346 /* tell fw we're ready to fire cmds */
4347 status = be_cmd_fw_init(adapter);
4348 if (status)
4349 goto err;
4350
4351 status = be_cmd_reset_function(adapter);
4352 if (status)
4353 goto err;
4354
4355 status = be_setup(adapter);
4356 if (status)
4357 goto err;
4358
4359 if (netif_running(netdev)) {
4360 status = be_open(netdev);
4361 if (status)
4362 goto err;
4363 }
4364
4365 schedule_delayed_work(&adapter->func_recovery_work,
4366 msecs_to_jiffies(1000));
4367 netif_device_attach(netdev);
4368 return;
4369 err:
4370 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
4371 }
4372
4373 static const struct pci_error_handlers be_eeh_handlers = {
4374 .error_detected = be_eeh_err_detected,
4375 .slot_reset = be_eeh_reset,
4376 .resume = be_eeh_resume,
4377 };
4378
4379 static struct pci_driver be_driver = {
4380 .name = DRV_NAME,
4381 .id_table = be_dev_ids,
4382 .probe = be_probe,
4383 .remove = be_remove,
4384 .suspend = be_suspend,
4385 .resume = be_resume,
4386 .shutdown = be_shutdown,
4387 .err_handler = &be_eeh_handlers
4388 };
4389
4390 static int __init be_init_module(void)
4391 {
4392 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
4393 rx_frag_size != 2048) {
4394 printk(KERN_WARNING DRV_NAME
4395 " : Module param rx_frag_size must be 2048/4096/8192."
4396 " Using 2048\n");
4397 rx_frag_size = 2048;
4398 }
4399
4400 return pci_register_driver(&be_driver);
4401 }
4402 module_init(be_init_module);
4403
4404 static void __exit be_exit_module(void)
4405 {
4406 pci_unregister_driver(&be_driver);
4407 }
4408 module_exit(be_exit_module);
Linux kernel - Deliverables
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