drivers/net/ethernet/ezchip/nps_enet.c

   1 /*
   2  * Copyright(c) 2015 EZchip Technologies.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/of_address.h>
  20 #include <linux/of_irq.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_platform.h>
  23 #include "nps_enet.h"
  24
  25 #define DRV_NAME                        "nps_mgt_enet"
  26
  27 static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len)
  28 {
  29         struct nps_enet_priv *priv = netdev_priv(ndev);
  30         u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32));
  31
  32         /* Empty Rx FIFO buffer by reading all words */
  33         for (i = 0; i < len; i++)
  34                 nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
  35 }
  36
  37 static void nps_enet_read_rx_fifo(struct net_device *ndev,
  38                                   unsigned char *dst, u32 length)
  39 {
  40         struct nps_enet_priv *priv = netdev_priv(ndev);
  41         s32 i, last = length & (sizeof(u32) - 1);
  42         u32 *reg = (u32 *)dst, len = length / sizeof(u32);
  43         bool dst_is_aligned = IS_ALIGNED((unsigned long)dst, sizeof(u32));
  44
  45         /* In case dst is not aligned we need an intermediate buffer */
  46         if (dst_is_aligned)
  47                 for (i = 0; i < len; i++, reg++)
  48                         *reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
  49         else { /* !dst_is_aligned */
  50                 for (i = 0; i < len; i++, reg++) {
  51                         u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
  52                         put_unaligned(buf, reg);
  53                 }
  54         }
  55
  56         /* copy last bytes (if any) */
  57         if (last) {
  58                 u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
  59                 memcpy((u8*)reg, &buf, last);
  60         }
  61 }
  62
  63 static u32 nps_enet_rx_handler(struct net_device *ndev)
  64 {
  65         u32 frame_len, err = 0;
  66         u32 work_done = 0;
  67         struct nps_enet_priv *priv = netdev_priv(ndev);
  68         struct sk_buff *skb;
  69         struct nps_enet_rx_ctl rx_ctrl;
  70
  71         rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
  72         frame_len = rx_ctrl.nr;
  73
  74         /* Check if we got RX */
  75         if (!rx_ctrl.cr)
  76                 return work_done;
  77
  78         /* If we got here there is a work for us */
  79         work_done++;
  80
  81         /* Check Rx error */
  82         if (rx_ctrl.er) {
  83                 ndev->stats.rx_errors++;
  84                 err = 1;
  85         }
  86
  87         /* Check Rx CRC error */
  88         if (rx_ctrl.crc) {
  89                 ndev->stats.rx_crc_errors++;
  90                 ndev->stats.rx_dropped++;
  91                 err = 1;
  92         }
  93
  94         /* Check Frame length Min 64b */
  95         if (unlikely(frame_len < ETH_ZLEN)) {
  96                 ndev->stats.rx_length_errors++;
  97                 ndev->stats.rx_dropped++;
  98                 err = 1;
  99         }
 100
 101         if (err)
 102                 goto rx_irq_clean;
 103
 104         /* Skb allocation */
 105         skb = netdev_alloc_skb_ip_align(ndev, frame_len);
 106         if (unlikely(!skb)) {
 107                 ndev->stats.rx_errors++;
 108                 ndev->stats.rx_dropped++;
 109                 goto rx_irq_clean;
 110         }
 111
 112         /* Copy frame from Rx fifo into the skb */
 113         nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
 114
 115         skb_put(skb, frame_len);
 116         skb->protocol = eth_type_trans(skb, ndev);
 117         skb->ip_summed = CHECKSUM_UNNECESSARY;
 118
 119         ndev->stats.rx_packets++;
 120         ndev->stats.rx_bytes += frame_len;
 121         netif_receive_skb(skb);
 122
 123         goto rx_irq_frame_done;
 124
 125 rx_irq_clean:
 126         /* Clean Rx fifo */
 127         nps_enet_clean_rx_fifo(ndev, frame_len);
 128
 129 rx_irq_frame_done:
 130         /* Ack Rx ctrl register */
 131         nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
 132
 133         return work_done;
 134 }
 135
 136 static void nps_enet_tx_handler(struct net_device *ndev)
 137 {
 138         struct nps_enet_priv *priv = netdev_priv(ndev);
 139         struct nps_enet_tx_ctl tx_ctrl;
 140
 141         tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
 142
 143         /* Check if we got TX */
 144         if (!priv->tx_packet_sent || tx_ctrl.ct)
 145                 return;
 146
 147         /* Ack Tx ctrl register */
 148         nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, 0);
 149
 150         /* Check Tx transmit error */
 151         if (unlikely(tx_ctrl.et)) {
 152                 ndev->stats.tx_errors++;
 153         } else {
 154                 ndev->stats.tx_packets++;
 155                 ndev->stats.tx_bytes += tx_ctrl.nt;
 156         }
 157
 158         dev_kfree_skb(priv->tx_skb);
 159         priv->tx_packet_sent = false;
 160
 161         if (netif_queue_stopped(ndev))
 162                 netif_wake_queue(ndev);
 163 }
 164
 165 /**
 166  * nps_enet_poll - NAPI poll handler.
 167  * @napi:       Pointer to napi_struct structure.
 168  * @budget:     How many frames to process on one call.
 169  *
 170  * returns:     Number of processed frames
 171  */
 172 static int nps_enet_poll(struct napi_struct *napi, int budget)
 173 {
 174         struct net_device *ndev = napi->dev;
 175         struct nps_enet_priv *priv = netdev_priv(ndev);
 176         u32 work_done;
 177
 178         nps_enet_tx_handler(ndev);
 179         work_done = nps_enet_rx_handler(ndev);
 180         if (work_done < budget) {
 181                 struct nps_enet_buf_int_enable buf_int_enable;
 182
 183                 napi_complete(napi);
 184                 buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
 185                 buf_int_enable.tx_done = NPS_ENET_ENABLE;
 186                 nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
 187                                  buf_int_enable.value);
 188         }
 189
 190         return work_done;
 191 }
 192
 193 /**
 194  * nps_enet_irq_handler - Global interrupt handler for ENET.
 195  * @irq:                irq number.
 196  * @dev_instance:       device instance.
 197  *
 198  * returns: IRQ_HANDLED for all cases.
 199  *
 200  * EZchip ENET has 2 interrupt causes, and depending on bits raised in
 201  * CTRL registers we may tell what is a reason for interrupt to fire up.
 202  * We got one for RX and the other for TX (completion).
 203  */
 204 static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
 205 {
 206         struct net_device *ndev = dev_instance;
 207         struct nps_enet_priv *priv = netdev_priv(ndev);
 208         struct nps_enet_rx_ctl rx_ctrl;
 209         struct nps_enet_tx_ctl tx_ctrl;
 210
 211         rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
 212         tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
 213
 214         if ((!tx_ctrl.ct && priv->tx_packet_sent) || rx_ctrl.cr)
 215                 if (likely(napi_schedule_prep(&priv->napi))) {
 216                         nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
 217                         __napi_schedule(&priv->napi);
 218                 }
 219
 220         return IRQ_HANDLED;
 221 }
 222
 223 static void nps_enet_set_hw_mac_address(struct net_device *ndev)
 224 {
 225         struct nps_enet_priv *priv = netdev_priv(ndev);
 226         struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
 227         struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
 228
 229         /* set MAC address in HW */
 230         ge_mac_cfg_1.octet_0 = ndev->dev_addr[0];
 231         ge_mac_cfg_1.octet_1 = ndev->dev_addr[1];
 232         ge_mac_cfg_1.octet_2 = ndev->dev_addr[2];
 233         ge_mac_cfg_1.octet_3 = ndev->dev_addr[3];
 234         ge_mac_cfg_2->octet_4 = ndev->dev_addr[4];
 235         ge_mac_cfg_2->octet_5 = ndev->dev_addr[5];
 236
 237         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1,
 238                          ge_mac_cfg_1.value);
 239
 240         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
 241                          ge_mac_cfg_2->value);
 242 }
 243
 244 /**
 245  * nps_enet_hw_reset - Reset the network device.
 246  * @ndev:       Pointer to the network device.
 247  *
 248  * This function reset the PCS and TX fifo.
 249  * The programming model is to set the relevant reset bits
 250  * wait for some time for this to propagate and then unset
 251  * the reset bits. This way we ensure that reset procedure
 252  * is done successfully by device.
 253  */
 254 static void nps_enet_hw_reset(struct net_device *ndev)
 255 {
 256         struct nps_enet_priv *priv = netdev_priv(ndev);
 257         struct nps_enet_ge_rst ge_rst;
 258         struct nps_enet_phase_fifo_ctl phase_fifo_ctl;
 259
 260         ge_rst.value = 0;
 261         phase_fifo_ctl.value = 0;
 262         /* Pcs reset sequence*/
 263         ge_rst.gmac_0 = NPS_ENET_ENABLE;
 264         nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
 265         usleep_range(10, 20);
 266         ge_rst.value = 0;
 267         nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
 268
 269         /* Tx fifo reset sequence */
 270         phase_fifo_ctl.rst = NPS_ENET_ENABLE;
 271         phase_fifo_ctl.init = NPS_ENET_ENABLE;
 272         nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
 273                          phase_fifo_ctl.value);
 274         usleep_range(10, 20);
 275         phase_fifo_ctl.value = 0;
 276         nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
 277                          phase_fifo_ctl.value);
 278 }
 279
 280 static void nps_enet_hw_enable_control(struct net_device *ndev)
 281 {
 282         struct nps_enet_priv *priv = netdev_priv(ndev);
 283         struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0;
 284         struct nps_enet_buf_int_enable buf_int_enable;
 285         struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
 286         struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3;
 287         s32 max_frame_length;
 288
 289         ge_mac_cfg_0.value = 0;
 290         buf_int_enable.value = 0;
 291         /* Enable Rx and Tx statistics */
 292         ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
 293
 294         /* Discard packets with different MAC address */
 295         ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
 296
 297         /* Discard multicast packets */
 298         ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
 299
 300         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
 301                          ge_mac_cfg_2->value);
 302
 303         /* Discard Packets bigger than max frame length */
 304         max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN;
 305         if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH)
 306                 ge_mac_cfg_3->max_len = max_frame_length;
 307
 308         /* Enable interrupts */
 309         buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
 310         buf_int_enable.tx_done = NPS_ENET_ENABLE;
 311         nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
 312                          buf_int_enable.value);
 313
 314         /* Write device MAC address to HW */
 315         nps_enet_set_hw_mac_address(ndev);
 316
 317         /* Rx and Tx HW features */
 318         ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
 319         ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
 320         ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
 321
 322         /* IFG configuration */
 323         ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
 324         ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
 325
 326         /* preamble configuration */
 327         ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
 328         ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
 329
 330         /* enable flow control frames */
 331         ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
 332         ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
 333         ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
 334         ge_mac_cfg_3->cf_drop = NPS_ENET_ENABLE;
 335
 336         /* Enable Rx and Tx */
 337         ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
 338         ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
 339
 340         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3,
 341                          ge_mac_cfg_3->value);
 342         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0,
 343                          ge_mac_cfg_0.value);
 344 }
 345
 346 static void nps_enet_hw_disable_control(struct net_device *ndev)
 347 {
 348         struct nps_enet_priv *priv = netdev_priv(ndev);
 349
 350         /* Disable interrupts */
 351         nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
 352
 353         /* Disable Rx and Tx */
 354         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
 355 }
 356
 357 static void nps_enet_send_frame(struct net_device *ndev,
 358                                 struct sk_buff *skb)
 359 {
 360         struct nps_enet_priv *priv = netdev_priv(ndev);
 361         struct nps_enet_tx_ctl tx_ctrl;
 362         short length = skb->len;
 363         u32 i, len = DIV_ROUND_UP(length, sizeof(u32));
 364         u32 *src = (void *)skb->data;
 365         bool src_is_aligned = IS_ALIGNED((unsigned long)src, sizeof(u32));
 366
 367         tx_ctrl.value = 0;
 368         /* In case src is not aligned we need an intermediate buffer */
 369         if (src_is_aligned)
 370                 for (i = 0; i < len; i++, src++)
 371                         nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src);
 372         else /* !src_is_aligned */
 373                 for (i = 0; i < len; i++, src++)
 374                         nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF,
 375                                          get_unaligned(src));
 376
 377         /* Write the length of the Frame */
 378         tx_ctrl.nt = length;
 379
 380         /* Indicate SW is done */
 381         priv->tx_packet_sent = true;
 382         tx_ctrl.ct = NPS_ENET_ENABLE;
 383
 384         /* Send Frame */
 385         nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
 386 }
 387
 388 /**
 389  * nps_enet_set_mac_address - Set the MAC address for this device.
 390  * @ndev:       Pointer to net_device structure.
 391  * @p:          6 byte Address to be written as MAC address.
 392  *
 393  * This function copies the HW address from the sockaddr structure to the
 394  * net_device structure and updates the address in HW.
 395  *
 396  * returns:     -EBUSY if the net device is busy or 0 if the address is set
 397  *              successfully.
 398  */
 399 static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
 400 {
 401         struct sockaddr *addr = p;
 402         s32 res;
 403
 404         if (netif_running(ndev))
 405                 return -EBUSY;
 406
 407         res = eth_mac_addr(ndev, p);
 408         if (!res) {
 409                 ether_addr_copy(ndev->dev_addr, addr->sa_data);
 410                 nps_enet_set_hw_mac_address(ndev);
 411         }
 412
 413         return res;
 414 }
 415
 416 /**
 417  * nps_enet_set_rx_mode - Change the receive filtering mode.
 418  * @ndev:       Pointer to the network device.
 419  *
 420  * This function enables/disables promiscuous mode
 421  */
 422 static void nps_enet_set_rx_mode(struct net_device *ndev)
 423 {
 424         struct nps_enet_priv *priv = netdev_priv(ndev);
 425         struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
 426
 427         ge_mac_cfg_2.value = priv->ge_mac_cfg_2.value;
 428
 429         if (ndev->flags & IFF_PROMISC) {
 430                 ge_mac_cfg_2.disc_da = NPS_ENET_DISABLE;
 431                 ge_mac_cfg_2.disc_mc = NPS_ENET_DISABLE;
 432         } else {
 433                 ge_mac_cfg_2.disc_da = NPS_ENET_ENABLE;
 434                 ge_mac_cfg_2.disc_mc = NPS_ENET_ENABLE;
 435         }
 436
 437         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, ge_mac_cfg_2.value);
 438 }
 439
 440 /**
 441  * nps_enet_open - Open the network device.
 442  * @ndev:       Pointer to the network device.
 443  *
 444  * returns: 0, on success or non-zero error value on failure.
 445  *
 446  * This function sets the MAC address, requests and enables an IRQ
 447  * for the ENET device and starts the Tx queue.
 448  */
 449 static s32 nps_enet_open(struct net_device *ndev)
 450 {
 451         struct nps_enet_priv *priv = netdev_priv(ndev);
 452         s32 err;
 453
 454         /* Reset private variables */
 455         priv->tx_packet_sent = false;
 456         priv->ge_mac_cfg_2.value = 0;
 457         priv->ge_mac_cfg_3.value = 0;
 458
 459         /* ge_mac_cfg_3 default values */
 460         priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
 461         priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
 462
 463         /* Disable HW device */
 464         nps_enet_hw_disable_control(ndev);
 465
 466         /* irq Rx allocation */
 467         err = request_irq(priv->irq, nps_enet_irq_handler,
 468                           0, "enet-rx-tx", ndev);
 469         if (err)
 470                 return err;
 471
 472         napi_enable(&priv->napi);
 473
 474         /* Enable HW device */
 475         nps_enet_hw_reset(ndev);
 476         nps_enet_hw_enable_control(ndev);
 477
 478         netif_start_queue(ndev);
 479
 480         return 0;
 481 }
 482
 483 /**
 484  * nps_enet_stop - Close the network device.
 485  * @ndev:       Pointer to the network device.
 486  *
 487  * This function stops the Tx queue, disables interrupts for the ENET device.
 488  */
 489 static s32 nps_enet_stop(struct net_device *ndev)
 490 {
 491         struct nps_enet_priv *priv = netdev_priv(ndev);
 492
 493         napi_disable(&priv->napi);
 494         netif_stop_queue(ndev);
 495         nps_enet_hw_disable_control(ndev);
 496         free_irq(priv->irq, ndev);
 497
 498         return 0;
 499 }
 500
 501 /**
 502  * nps_enet_start_xmit - Starts the data transmission.
 503  * @skb:        sk_buff pointer that contains data to be Transmitted.
 504  * @ndev:       Pointer to net_device structure.
 505  *
 506  * returns: NETDEV_TX_OK, on success
 507  *              NETDEV_TX_BUSY, if any of the descriptors are not free.
 508  *
 509  * This function is invoked from upper layers to initiate transmission.
 510  */
 511 static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
 512                                        struct net_device *ndev)
 513 {
 514         struct nps_enet_priv *priv = netdev_priv(ndev);
 515
 516         /* This driver handles one frame at a time  */
 517         netif_stop_queue(ndev);
 518
 519         priv->tx_skb = skb;
 520
 521         nps_enet_send_frame(ndev, skb);
 522
 523         return NETDEV_TX_OK;
 524 }
 525
 526 #ifdef CONFIG_NET_POLL_CONTROLLER
 527 static void nps_enet_poll_controller(struct net_device *ndev)
 528 {
 529         disable_irq(ndev->irq);
 530         nps_enet_irq_handler(ndev->irq, ndev);
 531         enable_irq(ndev->irq);
 532 }
 533 #endif
 534
 535 static const struct net_device_ops nps_netdev_ops = {
 536         .ndo_open               = nps_enet_open,
 537         .ndo_stop               = nps_enet_stop,
 538         .ndo_start_xmit         = nps_enet_start_xmit,
 539         .ndo_set_mac_address    = nps_enet_set_mac_address,
 540         .ndo_set_rx_mode        = nps_enet_set_rx_mode,
 541 #ifdef CONFIG_NET_POLL_CONTROLLER
 542         .ndo_poll_controller    = nps_enet_poll_controller,
 543 #endif
 544 };
 545
 546 static s32 nps_enet_probe(struct platform_device *pdev)
 547 {
 548         struct device *dev = &pdev->dev;
 549         struct net_device *ndev;
 550         struct nps_enet_priv *priv;
 551         s32 err = 0;
 552         const char *mac_addr;
 553         struct resource *res_regs;
 554
 555         if (!dev->of_node)
 556                 return -ENODEV;
 557
 558         ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
 559         if (!ndev)
 560                 return -ENOMEM;
 561
 562         platform_set_drvdata(pdev, ndev);
 563         SET_NETDEV_DEV(ndev, dev);
 564         priv = netdev_priv(ndev);
 565
 566         /* The EZ NET specific entries in the device structure. */
 567         ndev->netdev_ops = &nps_netdev_ops;
 568         ndev->watchdog_timeo = (400 * HZ / 1000);
 569         /* FIXME :: no multicast support yet */
 570         ndev->flags &= ~IFF_MULTICAST;
 571
 572         res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 573         priv->regs_base = devm_ioremap_resource(dev, res_regs);
 574         if (IS_ERR(priv->regs_base)) {
 575                 err = PTR_ERR(priv->regs_base);
 576                 goto out_netdev;
 577         }
 578         dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
 579
 580         /* set kernel MAC address to dev */
 581         mac_addr = of_get_mac_address(dev->of_node);
 582         if (mac_addr)
 583                 ether_addr_copy(ndev->dev_addr, mac_addr);
 584         else
 585                 eth_hw_addr_random(ndev);
 586
 587         /* Get IRQ number */
 588         priv->irq = platform_get_irq(pdev, 0);
 589         if (!priv->irq) {
 590                 dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
 591                 err = -ENODEV;
 592                 goto out_netdev;
 593         }
 594
 595         netif_napi_add(ndev, &priv->napi, nps_enet_poll,
 596                        NPS_ENET_NAPI_POLL_WEIGHT);
 597
 598         /* Register the driver. Should be the last thing in probe */
 599         err = register_netdev(ndev);
 600         if (err) {
 601                 dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
 602                         ndev->name, (s32)err);
 603                 goto out_netif_api;
 604         }
 605
 606         dev_info(dev, "(rx/tx=%d)\n", priv->irq);
 607         return 0;
 608
 609 out_netif_api:
 610         netif_napi_del(&priv->napi);
 611 out_netdev:
 612         if (err)
 613                 free_netdev(ndev);
 614
 615         return err;
 616 }
 617
 618 static s32 nps_enet_remove(struct platform_device *pdev)
 619 {
 620         struct net_device *ndev = platform_get_drvdata(pdev);
 621         struct nps_enet_priv *priv = netdev_priv(ndev);
 622
 623         unregister_netdev(ndev);
 624         free_netdev(ndev);
 625         netif_napi_del(&priv->napi);
 626
 627         return 0;
 628 }
 629
 630 static const struct of_device_id nps_enet_dt_ids[] = {
 631         { .compatible = "ezchip,nps-mgt-enet" },
 632         { /* Sentinel */ }
 633 };
 634
 635 static struct platform_driver nps_enet_driver = {
 636         .probe = nps_enet_probe,
 637         .remove = nps_enet_remove,
 638         .driver = {
 639                 .name = DRV_NAME,
 640                 .of_match_table  = nps_enet_dt_ids,
 641         },
 642 };
 643
 644 module_platform_driver(nps_enet_driver);
 645
 646 MODULE_AUTHOR("EZchip Semiconductor");
 647 MODULE_LICENSE("GPL v2");