2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
5 * Right now, I am very wasteful with the buffers. I allocate memory
6 * pages and then divide them into 2K frame buffers. This way I know I
7 * have buffers large enough to hold one frame within one buffer descriptor.
8 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
9 * will be much more memory efficient and will easily handle lots of
12 * Much better multiple PHY support by Magnus Damm.
13 * Copyright (c) 2000 Ericsson Radio Systems AB.
15 * Support for FEC controller of ColdFire processors.
16 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
18 * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
19 * Copyright (c) 2004-2006 Macq Electronique SA.
21 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/string.h>
27 #include <linux/ptrace.h>
28 #include <linux/errno.h>
29 #include <linux/ioport.h>
30 #include <linux/slab.h>
31 #include <linux/interrupt.h>
32 #include <linux/delay.h>
33 #include <linux/netdevice.h>
34 #include <linux/etherdevice.h>
35 #include <linux/skbuff.h>
40 #include <linux/tcp.h>
41 #include <linux/udp.h>
42 #include <linux/icmp.h>
43 #include <linux/spinlock.h>
44 #include <linux/workqueue.h>
45 #include <linux/bitops.h>
47 #include <linux/irq.h>
48 #include <linux/clk.h>
49 #include <linux/platform_device.h>
50 #include <linux/phy.h>
51 #include <linux/fec.h>
53 #include <linux/of_device.h>
54 #include <linux/of_gpio.h>
55 #include <linux/of_mdio.h>
56 #include <linux/of_net.h>
57 #include <linux/regulator/consumer.h>
58 #include <linux/if_vlan.h>
59 #include <linux/pinctrl/consumer.h>
60 #include <linux/prefetch.h>
62 #include <asm/cacheflush.h>
66 static void set_multicast_list(struct net_device
*ndev
);
67 static void fec_enet_itr_coal_init(struct net_device
*ndev
);
69 #define DRIVER_NAME "fec"
71 #define FEC_ENET_GET_QUQUE(_x) ((_x == 0) ? 1 : ((_x == 1) ? 2 : 0))
73 /* Pause frame feild and FIFO threshold */
74 #define FEC_ENET_FCE (1 << 5)
75 #define FEC_ENET_RSEM_V 0x84
76 #define FEC_ENET_RSFL_V 16
77 #define FEC_ENET_RAEM_V 0x8
78 #define FEC_ENET_RAFL_V 0x8
79 #define FEC_ENET_OPD_V 0xFFF0
81 static struct platform_device_id fec_devtype
[] = {
83 /* keep it for coldfire */
88 .driver_data
= FEC_QUIRK_USE_GASKET
,
94 .driver_data
= FEC_QUIRK_ENET_MAC
| FEC_QUIRK_SWAP_FRAME
|
95 FEC_QUIRK_SINGLE_MDIO
,
98 .driver_data
= FEC_QUIRK_ENET_MAC
| FEC_QUIRK_HAS_GBIT
|
99 FEC_QUIRK_HAS_BUFDESC_EX
| FEC_QUIRK_HAS_CSUM
|
100 FEC_QUIRK_HAS_VLAN
| FEC_QUIRK_ERR006358
,
102 .name
= "mvf600-fec",
103 .driver_data
= FEC_QUIRK_ENET_MAC
,
105 .name
= "imx6sx-fec",
106 .driver_data
= FEC_QUIRK_ENET_MAC
| FEC_QUIRK_HAS_GBIT
|
107 FEC_QUIRK_HAS_BUFDESC_EX
| FEC_QUIRK_HAS_CSUM
|
108 FEC_QUIRK_HAS_VLAN
| FEC_QUIRK_HAS_AVB
|
109 FEC_QUIRK_ERR007885
| FEC_QUIRK_BUG_CAPTURE
,
114 MODULE_DEVICE_TABLE(platform
, fec_devtype
);
117 IMX25_FEC
= 1, /* runs on i.mx25/50/53 */
118 IMX27_FEC
, /* runs on i.mx27/35/51 */
125 static const struct of_device_id fec_dt_ids
[] = {
126 { .compatible
= "fsl,imx25-fec", .data
= &fec_devtype
[IMX25_FEC
], },
127 { .compatible
= "fsl,imx27-fec", .data
= &fec_devtype
[IMX27_FEC
], },
128 { .compatible
= "fsl,imx28-fec", .data
= &fec_devtype
[IMX28_FEC
], },
129 { .compatible
= "fsl,imx6q-fec", .data
= &fec_devtype
[IMX6Q_FEC
], },
130 { .compatible
= "fsl,mvf600-fec", .data
= &fec_devtype
[MVF600_FEC
], },
131 { .compatible
= "fsl,imx6sx-fec", .data
= &fec_devtype
[IMX6SX_FEC
], },
134 MODULE_DEVICE_TABLE(of
, fec_dt_ids
);
136 static unsigned char macaddr
[ETH_ALEN
];
137 module_param_array(macaddr
, byte
, NULL
, 0);
138 MODULE_PARM_DESC(macaddr
, "FEC Ethernet MAC address");
140 #if defined(CONFIG_M5272)
142 * Some hardware gets it MAC address out of local flash memory.
143 * if this is non-zero then assume it is the address to get MAC from.
145 #if defined(CONFIG_NETtel)
146 #define FEC_FLASHMAC 0xf0006006
147 #elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
148 #define FEC_FLASHMAC 0xf0006000
149 #elif defined(CONFIG_CANCam)
150 #define FEC_FLASHMAC 0xf0020000
151 #elif defined (CONFIG_M5272C3)
152 #define FEC_FLASHMAC (0xffe04000 + 4)
153 #elif defined(CONFIG_MOD5272)
154 #define FEC_FLASHMAC 0xffc0406b
156 #define FEC_FLASHMAC 0
158 #endif /* CONFIG_M5272 */
160 /* The FEC stores dest/src/type/vlan, data, and checksum for receive packets.
162 #define PKT_MAXBUF_SIZE 1522
163 #define PKT_MINBUF_SIZE 64
164 #define PKT_MAXBLR_SIZE 1536
166 /* FEC receive acceleration */
167 #define FEC_RACC_IPDIS (1 << 1)
168 #define FEC_RACC_PRODIS (1 << 2)
169 #define FEC_RACC_OPTIONS (FEC_RACC_IPDIS | FEC_RACC_PRODIS)
172 * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
173 * size bits. Other FEC hardware does not, so we need to take that into
174 * account when setting it.
176 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
177 defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM)
178 #define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
180 #define OPT_FRAME_SIZE 0
183 /* FEC MII MMFR bits definition */
184 #define FEC_MMFR_ST (1 << 30)
185 #define FEC_MMFR_OP_READ (2 << 28)
186 #define FEC_MMFR_OP_WRITE (1 << 28)
187 #define FEC_MMFR_PA(v) ((v & 0x1f) << 23)
188 #define FEC_MMFR_RA(v) ((v & 0x1f) << 18)
189 #define FEC_MMFR_TA (2 << 16)
190 #define FEC_MMFR_DATA(v) (v & 0xffff)
191 /* FEC ECR bits definition */
192 #define FEC_ECR_MAGICEN (1 << 2)
193 #define FEC_ECR_SLEEP (1 << 3)
195 #define FEC_MII_TIMEOUT 30000 /* us */
197 /* Transmitter timeout */
198 #define TX_TIMEOUT (2 * HZ)
200 #define FEC_PAUSE_FLAG_AUTONEG 0x1
201 #define FEC_PAUSE_FLAG_ENABLE 0x2
202 #define FEC_WOL_HAS_MAGIC_PACKET (0x1 << 0)
203 #define FEC_WOL_FLAG_ENABLE (0x1 << 1)
204 #define FEC_WOL_FLAG_SLEEP_ON (0x1 << 2)
206 #define COPYBREAK_DEFAULT 256
208 #define TSO_HEADER_SIZE 128
209 /* Max number of allowed TCP segments for software TSO */
210 #define FEC_MAX_TSO_SEGS 100
211 #define FEC_MAX_SKB_DESCS (FEC_MAX_TSO_SEGS * 2 + MAX_SKB_FRAGS)
213 #define IS_TSO_HEADER(txq, addr) \
214 ((addr >= txq->tso_hdrs_dma) && \
215 (addr < txq->tso_hdrs_dma + txq->tx_ring_size * TSO_HEADER_SIZE))
220 struct bufdesc
*fec_enet_get_nextdesc(struct bufdesc
*bdp
,
221 struct fec_enet_private
*fep
,
224 struct bufdesc
*new_bd
= bdp
+ 1;
225 struct bufdesc_ex
*ex_new_bd
= (struct bufdesc_ex
*)bdp
+ 1;
226 struct fec_enet_priv_tx_q
*txq
= fep
->tx_queue
[queue_id
];
227 struct fec_enet_priv_rx_q
*rxq
= fep
->rx_queue
[queue_id
];
228 struct bufdesc_ex
*ex_base
;
229 struct bufdesc
*base
;
232 if (bdp
>= txq
->tx_bd_base
) {
233 base
= txq
->tx_bd_base
;
234 ring_size
= txq
->tx_ring_size
;
235 ex_base
= (struct bufdesc_ex
*)txq
->tx_bd_base
;
237 base
= rxq
->rx_bd_base
;
238 ring_size
= rxq
->rx_ring_size
;
239 ex_base
= (struct bufdesc_ex
*)rxq
->rx_bd_base
;
243 return (struct bufdesc
*)((ex_new_bd
>= (ex_base
+ ring_size
)) ?
244 ex_base
: ex_new_bd
);
246 return (new_bd
>= (base
+ ring_size
)) ?
251 struct bufdesc
*fec_enet_get_prevdesc(struct bufdesc
*bdp
,
252 struct fec_enet_private
*fep
,
255 struct bufdesc
*new_bd
= bdp
- 1;
256 struct bufdesc_ex
*ex_new_bd
= (struct bufdesc_ex
*)bdp
- 1;
257 struct fec_enet_priv_tx_q
*txq
= fep
->tx_queue
[queue_id
];
258 struct fec_enet_priv_rx_q
*rxq
= fep
->rx_queue
[queue_id
];
259 struct bufdesc_ex
*ex_base
;
260 struct bufdesc
*base
;
263 if (bdp
>= txq
->tx_bd_base
) {
264 base
= txq
->tx_bd_base
;
265 ring_size
= txq
->tx_ring_size
;
266 ex_base
= (struct bufdesc_ex
*)txq
->tx_bd_base
;
268 base
= rxq
->rx_bd_base
;
269 ring_size
= rxq
->rx_ring_size
;
270 ex_base
= (struct bufdesc_ex
*)rxq
->rx_bd_base
;
274 return (struct bufdesc
*)((ex_new_bd
< ex_base
) ?
275 (ex_new_bd
+ ring_size
) : ex_new_bd
);
277 return (new_bd
< base
) ? (new_bd
+ ring_size
) : new_bd
;
280 static int fec_enet_get_bd_index(struct bufdesc
*base
, struct bufdesc
*bdp
,
281 struct fec_enet_private
*fep
)
283 return ((const char *)bdp
- (const char *)base
) / fep
->bufdesc_size
;
286 static int fec_enet_get_free_txdesc_num(struct fec_enet_private
*fep
,
287 struct fec_enet_priv_tx_q
*txq
)
291 entries
= ((const char *)txq
->dirty_tx
-
292 (const char *)txq
->cur_tx
) / fep
->bufdesc_size
- 1;
294 return entries
> 0 ? entries
: entries
+ txq
->tx_ring_size
;
297 static void swap_buffer(void *bufaddr
, int len
)
300 unsigned int *buf
= bufaddr
;
302 for (i
= 0; i
< len
; i
+= 4, buf
++)
306 static void swap_buffer2(void *dst_buf
, void *src_buf
, int len
)
309 unsigned int *src
= src_buf
;
310 unsigned int *dst
= dst_buf
;
312 for (i
= 0; i
< len
; i
+= 4, src
++, dst
++)
316 static void fec_dump(struct net_device
*ndev
)
318 struct fec_enet_private
*fep
= netdev_priv(ndev
);
320 struct fec_enet_priv_tx_q
*txq
;
323 netdev_info(ndev
, "TX ring dump\n");
324 pr_info("Nr SC addr len SKB\n");
326 txq
= fep
->tx_queue
[0];
327 bdp
= txq
->tx_bd_base
;
330 pr_info("%3u %c%c 0x%04x 0x%08lx %4u %p\n",
332 bdp
== txq
->cur_tx
? 'S' : ' ',
333 bdp
== txq
->dirty_tx
? 'H' : ' ',
334 bdp
->cbd_sc
, bdp
->cbd_bufaddr
, bdp
->cbd_datlen
,
335 txq
->tx_skbuff
[index
]);
336 bdp
= fec_enet_get_nextdesc(bdp
, fep
, 0);
338 } while (bdp
!= txq
->tx_bd_base
);
341 static inline bool is_ipv4_pkt(struct sk_buff
*skb
)
343 return skb
->protocol
== htons(ETH_P_IP
) && ip_hdr(skb
)->version
== 4;
347 fec_enet_clear_csum(struct sk_buff
*skb
, struct net_device
*ndev
)
349 /* Only run for packets requiring a checksum. */
350 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
353 if (unlikely(skb_cow_head(skb
, 0)))
356 if (is_ipv4_pkt(skb
))
357 ip_hdr(skb
)->check
= 0;
358 *(__sum16
*)(skb
->head
+ skb
->csum_start
+ skb
->csum_offset
) = 0;
364 fec_enet_txq_submit_frag_skb(struct fec_enet_priv_tx_q
*txq
,
366 struct net_device
*ndev
)
368 struct fec_enet_private
*fep
= netdev_priv(ndev
);
369 struct bufdesc
*bdp
= txq
->cur_tx
;
370 struct bufdesc_ex
*ebdp
;
371 int nr_frags
= skb_shinfo(skb
)->nr_frags
;
372 unsigned short queue
= skb_get_queue_mapping(skb
);
374 unsigned short status
;
375 unsigned int estatus
= 0;
376 skb_frag_t
*this_frag
;
382 for (frag
= 0; frag
< nr_frags
; frag
++) {
383 this_frag
= &skb_shinfo(skb
)->frags
[frag
];
384 bdp
= fec_enet_get_nextdesc(bdp
, fep
, queue
);
385 ebdp
= (struct bufdesc_ex
*)bdp
;
387 status
= bdp
->cbd_sc
;
388 status
&= ~BD_ENET_TX_STATS
;
389 status
|= (BD_ENET_TX_TC
| BD_ENET_TX_READY
);
390 frag_len
= skb_shinfo(skb
)->frags
[frag
].size
;
392 /* Handle the last BD specially */
393 if (frag
== nr_frags
- 1) {
394 status
|= (BD_ENET_TX_INTR
| BD_ENET_TX_LAST
);
395 if (fep
->bufdesc_ex
) {
396 estatus
|= BD_ENET_TX_INT
;
397 if (unlikely(skb_shinfo(skb
)->tx_flags
&
398 SKBTX_HW_TSTAMP
&& fep
->hwts_tx_en
))
399 estatus
|= BD_ENET_TX_TS
;
403 if (fep
->bufdesc_ex
) {
404 if (fep
->quirks
& FEC_QUIRK_HAS_AVB
)
405 estatus
|= FEC_TX_BD_FTYPE(queue
);
406 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
407 estatus
|= BD_ENET_TX_PINS
| BD_ENET_TX_IINS
;
409 ebdp
->cbd_esc
= estatus
;
412 bufaddr
= page_address(this_frag
->page
.p
) + this_frag
->page_offset
;
414 index
= fec_enet_get_bd_index(txq
->tx_bd_base
, bdp
, fep
);
415 if (((unsigned long) bufaddr
) & fep
->tx_align
||
416 fep
->quirks
& FEC_QUIRK_SWAP_FRAME
) {
417 memcpy(txq
->tx_bounce
[index
], bufaddr
, frag_len
);
418 bufaddr
= txq
->tx_bounce
[index
];
420 if (fep
->quirks
& FEC_QUIRK_SWAP_FRAME
)
421 swap_buffer(bufaddr
, frag_len
);
424 addr
= dma_map_single(&fep
->pdev
->dev
, bufaddr
, frag_len
,
426 if (dma_mapping_error(&fep
->pdev
->dev
, addr
)) {
427 dev_kfree_skb_any(skb
);
429 netdev_err(ndev
, "Tx DMA memory map failed\n");
430 goto dma_mapping_error
;
433 bdp
->cbd_bufaddr
= addr
;
434 bdp
->cbd_datlen
= frag_len
;
435 bdp
->cbd_sc
= status
;
444 for (i
= 0; i
< frag
; i
++) {
445 bdp
= fec_enet_get_nextdesc(bdp
, fep
, queue
);
446 dma_unmap_single(&fep
->pdev
->dev
, bdp
->cbd_bufaddr
,
447 bdp
->cbd_datlen
, DMA_TO_DEVICE
);
452 static int fec_enet_txq_submit_skb(struct fec_enet_priv_tx_q
*txq
,
453 struct sk_buff
*skb
, struct net_device
*ndev
)
455 struct fec_enet_private
*fep
= netdev_priv(ndev
);
456 int nr_frags
= skb_shinfo(skb
)->nr_frags
;
457 struct bufdesc
*bdp
, *last_bdp
;
460 unsigned short status
;
461 unsigned short buflen
;
462 unsigned short queue
;
463 unsigned int estatus
= 0;
468 entries_free
= fec_enet_get_free_txdesc_num(fep
, txq
);
469 if (entries_free
< MAX_SKB_FRAGS
+ 1) {
470 dev_kfree_skb_any(skb
);
472 netdev_err(ndev
, "NOT enough BD for SG!\n");
476 /* Protocol checksum off-load for TCP and UDP. */
477 if (fec_enet_clear_csum(skb
, ndev
)) {
478 dev_kfree_skb_any(skb
);
482 /* Fill in a Tx ring entry */
484 status
= bdp
->cbd_sc
;
485 status
&= ~BD_ENET_TX_STATS
;
487 /* Set buffer length and buffer pointer */
489 buflen
= skb_headlen(skb
);
491 queue
= skb_get_queue_mapping(skb
);
492 index
= fec_enet_get_bd_index(txq
->tx_bd_base
, bdp
, fep
);
493 if (((unsigned long) bufaddr
) & fep
->tx_align
||
494 fep
->quirks
& FEC_QUIRK_SWAP_FRAME
) {
495 memcpy(txq
->tx_bounce
[index
], skb
->data
, buflen
);
496 bufaddr
= txq
->tx_bounce
[index
];
498 if (fep
->quirks
& FEC_QUIRK_SWAP_FRAME
)
499 swap_buffer(bufaddr
, buflen
);
502 /* Push the data cache so the CPM does not get stale memory data. */
503 addr
= dma_map_single(&fep
->pdev
->dev
, bufaddr
, buflen
, DMA_TO_DEVICE
);
504 if (dma_mapping_error(&fep
->pdev
->dev
, addr
)) {
505 dev_kfree_skb_any(skb
);
507 netdev_err(ndev
, "Tx DMA memory map failed\n");
512 ret
= fec_enet_txq_submit_frag_skb(txq
, skb
, ndev
);
516 status
|= (BD_ENET_TX_INTR
| BD_ENET_TX_LAST
);
517 if (fep
->bufdesc_ex
) {
518 estatus
= BD_ENET_TX_INT
;
519 if (unlikely(skb_shinfo(skb
)->tx_flags
&
520 SKBTX_HW_TSTAMP
&& fep
->hwts_tx_en
))
521 estatus
|= BD_ENET_TX_TS
;
525 if (fep
->bufdesc_ex
) {
527 struct bufdesc_ex
*ebdp
= (struct bufdesc_ex
*)bdp
;
529 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
&&
531 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
533 if (fep
->quirks
& FEC_QUIRK_HAS_AVB
)
534 estatus
|= FEC_TX_BD_FTYPE(queue
);
536 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
537 estatus
|= BD_ENET_TX_PINS
| BD_ENET_TX_IINS
;
540 ebdp
->cbd_esc
= estatus
;
543 last_bdp
= txq
->cur_tx
;
544 index
= fec_enet_get_bd_index(txq
->tx_bd_base
, last_bdp
, fep
);
545 /* Save skb pointer */
546 txq
->tx_skbuff
[index
] = skb
;
548 bdp
->cbd_datlen
= buflen
;
549 bdp
->cbd_bufaddr
= addr
;
551 /* Send it on its way. Tell FEC it's ready, interrupt when done,
552 * it's the last BD of the frame, and to put the CRC on the end.
554 status
|= (BD_ENET_TX_READY
| BD_ENET_TX_TC
);
555 bdp
->cbd_sc
= status
;
557 /* If this was the last BD in the ring, start at the beginning again. */
558 bdp
= fec_enet_get_nextdesc(last_bdp
, fep
, queue
);
560 skb_tx_timestamp(skb
);
564 /* Trigger transmission start */
565 writel(0, fep
->hwp
+ FEC_X_DES_ACTIVE(queue
));
571 fec_enet_txq_put_data_tso(struct fec_enet_priv_tx_q
*txq
, struct sk_buff
*skb
,
572 struct net_device
*ndev
,
573 struct bufdesc
*bdp
, int index
, char *data
,
574 int size
, bool last_tcp
, bool is_last
)
576 struct fec_enet_private
*fep
= netdev_priv(ndev
);
577 struct bufdesc_ex
*ebdp
= container_of(bdp
, struct bufdesc_ex
, desc
);
578 unsigned short queue
= skb_get_queue_mapping(skb
);
579 unsigned short status
;
580 unsigned int estatus
= 0;
583 status
= bdp
->cbd_sc
;
584 status
&= ~BD_ENET_TX_STATS
;
586 status
|= (BD_ENET_TX_TC
| BD_ENET_TX_READY
);
588 if (((unsigned long) data
) & fep
->tx_align
||
589 fep
->quirks
& FEC_QUIRK_SWAP_FRAME
) {
590 memcpy(txq
->tx_bounce
[index
], data
, size
);
591 data
= txq
->tx_bounce
[index
];
593 if (fep
->quirks
& FEC_QUIRK_SWAP_FRAME
)
594 swap_buffer(data
, size
);
597 addr
= dma_map_single(&fep
->pdev
->dev
, data
, size
, DMA_TO_DEVICE
);
598 if (dma_mapping_error(&fep
->pdev
->dev
, addr
)) {
599 dev_kfree_skb_any(skb
);
601 netdev_err(ndev
, "Tx DMA memory map failed\n");
602 return NETDEV_TX_BUSY
;
605 bdp
->cbd_datlen
= size
;
606 bdp
->cbd_bufaddr
= addr
;
608 if (fep
->bufdesc_ex
) {
609 if (fep
->quirks
& FEC_QUIRK_HAS_AVB
)
610 estatus
|= FEC_TX_BD_FTYPE(queue
);
611 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
612 estatus
|= BD_ENET_TX_PINS
| BD_ENET_TX_IINS
;
614 ebdp
->cbd_esc
= estatus
;
617 /* Handle the last BD specially */
619 status
|= (BD_ENET_TX_LAST
| BD_ENET_TX_TC
);
621 status
|= BD_ENET_TX_INTR
;
623 ebdp
->cbd_esc
|= BD_ENET_TX_INT
;
626 bdp
->cbd_sc
= status
;
632 fec_enet_txq_put_hdr_tso(struct fec_enet_priv_tx_q
*txq
,
633 struct sk_buff
*skb
, struct net_device
*ndev
,
634 struct bufdesc
*bdp
, int index
)
636 struct fec_enet_private
*fep
= netdev_priv(ndev
);
637 int hdr_len
= skb_transport_offset(skb
) + tcp_hdrlen(skb
);
638 struct bufdesc_ex
*ebdp
= container_of(bdp
, struct bufdesc_ex
, desc
);
639 unsigned short queue
= skb_get_queue_mapping(skb
);
641 unsigned long dmabuf
;
642 unsigned short status
;
643 unsigned int estatus
= 0;
645 status
= bdp
->cbd_sc
;
646 status
&= ~BD_ENET_TX_STATS
;
647 status
|= (BD_ENET_TX_TC
| BD_ENET_TX_READY
);
649 bufaddr
= txq
->tso_hdrs
+ index
* TSO_HEADER_SIZE
;
650 dmabuf
= txq
->tso_hdrs_dma
+ index
* TSO_HEADER_SIZE
;
651 if (((unsigned long)bufaddr
) & fep
->tx_align
||
652 fep
->quirks
& FEC_QUIRK_SWAP_FRAME
) {
653 memcpy(txq
->tx_bounce
[index
], skb
->data
, hdr_len
);
654 bufaddr
= txq
->tx_bounce
[index
];
656 if (fep
->quirks
& FEC_QUIRK_SWAP_FRAME
)
657 swap_buffer(bufaddr
, hdr_len
);
659 dmabuf
= dma_map_single(&fep
->pdev
->dev
, bufaddr
,
660 hdr_len
, DMA_TO_DEVICE
);
661 if (dma_mapping_error(&fep
->pdev
->dev
, dmabuf
)) {
662 dev_kfree_skb_any(skb
);
664 netdev_err(ndev
, "Tx DMA memory map failed\n");
665 return NETDEV_TX_BUSY
;
669 bdp
->cbd_bufaddr
= dmabuf
;
670 bdp
->cbd_datlen
= hdr_len
;
672 if (fep
->bufdesc_ex
) {
673 if (fep
->quirks
& FEC_QUIRK_HAS_AVB
)
674 estatus
|= FEC_TX_BD_FTYPE(queue
);
675 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
676 estatus
|= BD_ENET_TX_PINS
| BD_ENET_TX_IINS
;
678 ebdp
->cbd_esc
= estatus
;
681 bdp
->cbd_sc
= status
;
686 static int fec_enet_txq_submit_tso(struct fec_enet_priv_tx_q
*txq
,
688 struct net_device
*ndev
)
690 struct fec_enet_private
*fep
= netdev_priv(ndev
);
691 int hdr_len
= skb_transport_offset(skb
) + tcp_hdrlen(skb
);
692 int total_len
, data_left
;
693 struct bufdesc
*bdp
= txq
->cur_tx
;
694 unsigned short queue
= skb_get_queue_mapping(skb
);
696 unsigned int index
= 0;
699 if (tso_count_descs(skb
) >= fec_enet_get_free_txdesc_num(fep
, txq
)) {
700 dev_kfree_skb_any(skb
);
702 netdev_err(ndev
, "NOT enough BD for TSO!\n");
706 /* Protocol checksum off-load for TCP and UDP. */
707 if (fec_enet_clear_csum(skb
, ndev
)) {
708 dev_kfree_skb_any(skb
);
712 /* Initialize the TSO handler, and prepare the first payload */
713 tso_start(skb
, &tso
);
715 total_len
= skb
->len
- hdr_len
;
716 while (total_len
> 0) {
719 index
= fec_enet_get_bd_index(txq
->tx_bd_base
, bdp
, fep
);
720 data_left
= min_t(int, skb_shinfo(skb
)->gso_size
, total_len
);
721 total_len
-= data_left
;
723 /* prepare packet headers: MAC + IP + TCP */
724 hdr
= txq
->tso_hdrs
+ index
* TSO_HEADER_SIZE
;
725 tso_build_hdr(skb
, hdr
, &tso
, data_left
, total_len
== 0);
726 ret
= fec_enet_txq_put_hdr_tso(txq
, skb
, ndev
, bdp
, index
);
730 while (data_left
> 0) {
733 size
= min_t(int, tso
.size
, data_left
);
734 bdp
= fec_enet_get_nextdesc(bdp
, fep
, queue
);
735 index
= fec_enet_get_bd_index(txq
->tx_bd_base
,
737 ret
= fec_enet_txq_put_data_tso(txq
, skb
, ndev
,
746 tso_build_data(skb
, &tso
, size
);
749 bdp
= fec_enet_get_nextdesc(bdp
, fep
, queue
);
752 /* Save skb pointer */
753 txq
->tx_skbuff
[index
] = skb
;
755 skb_tx_timestamp(skb
);
758 /* Trigger transmission start */
759 if (!(fep
->quirks
& FEC_QUIRK_ERR007885
) ||
760 !readl(fep
->hwp
+ FEC_X_DES_ACTIVE(queue
)) ||
761 !readl(fep
->hwp
+ FEC_X_DES_ACTIVE(queue
)) ||
762 !readl(fep
->hwp
+ FEC_X_DES_ACTIVE(queue
)) ||
763 !readl(fep
->hwp
+ FEC_X_DES_ACTIVE(queue
)))
764 writel(0, fep
->hwp
+ FEC_X_DES_ACTIVE(queue
));
769 /* TODO: Release all used data descriptors for TSO */
774 fec_enet_start_xmit(struct sk_buff
*skb
, struct net_device
*ndev
)
776 struct fec_enet_private
*fep
= netdev_priv(ndev
);
778 unsigned short queue
;
779 struct fec_enet_priv_tx_q
*txq
;
780 struct netdev_queue
*nq
;
783 queue
= skb_get_queue_mapping(skb
);
784 txq
= fep
->tx_queue
[queue
];
785 nq
= netdev_get_tx_queue(ndev
, queue
);
788 ret
= fec_enet_txq_submit_tso(txq
, skb
, ndev
);
790 ret
= fec_enet_txq_submit_skb(txq
, skb
, ndev
);
794 entries_free
= fec_enet_get_free_txdesc_num(fep
, txq
);
795 if (entries_free
<= txq
->tx_stop_threshold
)
796 netif_tx_stop_queue(nq
);
801 /* Init RX & TX buffer descriptors
803 static void fec_enet_bd_init(struct net_device
*dev
)
805 struct fec_enet_private
*fep
= netdev_priv(dev
);
806 struct fec_enet_priv_tx_q
*txq
;
807 struct fec_enet_priv_rx_q
*rxq
;
812 for (q
= 0; q
< fep
->num_rx_queues
; q
++) {
813 /* Initialize the receive buffer descriptors. */
814 rxq
= fep
->rx_queue
[q
];
815 bdp
= rxq
->rx_bd_base
;
817 for (i
= 0; i
< rxq
->rx_ring_size
; i
++) {
819 /* Initialize the BD for every fragment in the page. */
820 if (bdp
->cbd_bufaddr
)
821 bdp
->cbd_sc
= BD_ENET_RX_EMPTY
;
824 bdp
= fec_enet_get_nextdesc(bdp
, fep
, q
);
827 /* Set the last buffer to wrap */
828 bdp
= fec_enet_get_prevdesc(bdp
, fep
, q
);
829 bdp
->cbd_sc
|= BD_SC_WRAP
;
831 rxq
->cur_rx
= rxq
->rx_bd_base
;
834 for (q
= 0; q
< fep
->num_tx_queues
; q
++) {
835 /* ...and the same for transmit */
836 txq
= fep
->tx_queue
[q
];
837 bdp
= txq
->tx_bd_base
;
840 for (i
= 0; i
< txq
->tx_ring_size
; i
++) {
841 /* Initialize the BD for every fragment in the page. */
843 if (txq
->tx_skbuff
[i
]) {
844 dev_kfree_skb_any(txq
->tx_skbuff
[i
]);
845 txq
->tx_skbuff
[i
] = NULL
;
847 bdp
->cbd_bufaddr
= 0;
848 bdp
= fec_enet_get_nextdesc(bdp
, fep
, q
);
851 /* Set the last buffer to wrap */
852 bdp
= fec_enet_get_prevdesc(bdp
, fep
, q
);
853 bdp
->cbd_sc
|= BD_SC_WRAP
;
858 static void fec_enet_active_rxring(struct net_device
*ndev
)
860 struct fec_enet_private
*fep
= netdev_priv(ndev
);
863 for (i
= 0; i
< fep
->num_rx_queues
; i
++)
864 writel(0, fep
->hwp
+ FEC_R_DES_ACTIVE(i
));
867 static void fec_enet_enable_ring(struct net_device
*ndev
)
869 struct fec_enet_private
*fep
= netdev_priv(ndev
);
870 struct fec_enet_priv_tx_q
*txq
;
871 struct fec_enet_priv_rx_q
*rxq
;
874 for (i
= 0; i
< fep
->num_rx_queues
; i
++) {
875 rxq
= fep
->rx_queue
[i
];
876 writel(rxq
->bd_dma
, fep
->hwp
+ FEC_R_DES_START(i
));
877 writel(PKT_MAXBLR_SIZE
, fep
->hwp
+ FEC_R_BUFF_SIZE(i
));
881 writel(RCMR_MATCHEN
| RCMR_CMP(i
),
882 fep
->hwp
+ FEC_RCMR(i
));
885 for (i
= 0; i
< fep
->num_tx_queues
; i
++) {
886 txq
= fep
->tx_queue
[i
];
887 writel(txq
->bd_dma
, fep
->hwp
+ FEC_X_DES_START(i
));
891 writel(DMA_CLASS_EN
| IDLE_SLOPE(i
),
892 fep
->hwp
+ FEC_DMA_CFG(i
));
896 static void fec_enet_reset_skb(struct net_device
*ndev
)
898 struct fec_enet_private
*fep
= netdev_priv(ndev
);
899 struct fec_enet_priv_tx_q
*txq
;
902 for (i
= 0; i
< fep
->num_tx_queues
; i
++) {
903 txq
= fep
->tx_queue
[i
];
905 for (j
= 0; j
< txq
->tx_ring_size
; j
++) {
906 if (txq
->tx_skbuff
[j
]) {
907 dev_kfree_skb_any(txq
->tx_skbuff
[j
]);
908 txq
->tx_skbuff
[j
] = NULL
;
915 * This function is called to start or restart the FEC during a link
916 * change, transmit timeout, or to reconfigure the FEC. The network
917 * packet processing for this device must be stopped before this call.
920 fec_restart(struct net_device
*ndev
)
922 struct fec_enet_private
*fep
= netdev_priv(ndev
);
925 u32 rcntl
= OPT_FRAME_SIZE
| 0x04;
926 u32 ecntl
= 0x2; /* ETHEREN */
928 /* Whack a reset. We should wait for this.
929 * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
930 * instead of reset MAC itself.
932 if (fep
->quirks
& FEC_QUIRK_HAS_AVB
) {
933 writel(0, fep
->hwp
+ FEC_ECNTRL
);
935 writel(1, fep
->hwp
+ FEC_ECNTRL
);
940 * enet-mac reset will reset mac address registers too,
941 * so need to reconfigure it.
943 if (fep
->quirks
& FEC_QUIRK_ENET_MAC
) {
944 memcpy(&temp_mac
, ndev
->dev_addr
, ETH_ALEN
);
945 writel(cpu_to_be32(temp_mac
[0]), fep
->hwp
+ FEC_ADDR_LOW
);
946 writel(cpu_to_be32(temp_mac
[1]), fep
->hwp
+ FEC_ADDR_HIGH
);
949 /* Clear any outstanding interrupt. */
950 writel(0xffffffff, fep
->hwp
+ FEC_IEVENT
);
952 fec_enet_bd_init(ndev
);
954 fec_enet_enable_ring(ndev
);
956 /* Reset tx SKB buffers. */
957 fec_enet_reset_skb(ndev
);
959 /* Enable MII mode */
960 if (fep
->full_duplex
== DUPLEX_FULL
) {
962 writel(0x04, fep
->hwp
+ FEC_X_CNTRL
);
966 writel(0x0, fep
->hwp
+ FEC_X_CNTRL
);
970 writel(fep
->phy_speed
, fep
->hwp
+ FEC_MII_SPEED
);
972 #if !defined(CONFIG_M5272)
973 /* set RX checksum */
974 val
= readl(fep
->hwp
+ FEC_RACC
);
975 if (fep
->csum_flags
& FLAG_RX_CSUM_ENABLED
)
976 val
|= FEC_RACC_OPTIONS
;
978 val
&= ~FEC_RACC_OPTIONS
;
979 writel(val
, fep
->hwp
+ FEC_RACC
);
983 * The phy interface and speed need to get configured
984 * differently on enet-mac.
986 if (fep
->quirks
& FEC_QUIRK_ENET_MAC
) {
987 /* Enable flow control and length check */
988 rcntl
|= 0x40000000 | 0x00000020;
990 /* RGMII, RMII or MII */
991 if (fep
->phy_interface
== PHY_INTERFACE_MODE_RGMII
)
993 else if (fep
->phy_interface
== PHY_INTERFACE_MODE_RMII
)
998 /* 1G, 100M or 10M */
1000 if (fep
->phy_dev
->speed
== SPEED_1000
)
1002 else if (fep
->phy_dev
->speed
== SPEED_100
)
1008 #ifdef FEC_MIIGSK_ENR
1009 if (fep
->quirks
& FEC_QUIRK_USE_GASKET
) {
1011 /* disable the gasket and wait */
1012 writel(0, fep
->hwp
+ FEC_MIIGSK_ENR
);
1013 while (readl(fep
->hwp
+ FEC_MIIGSK_ENR
) & 4)
1017 * configure the gasket:
1018 * RMII, 50 MHz, no loopback, no echo
1019 * MII, 25 MHz, no loopback, no echo
1021 cfgr
= (fep
->phy_interface
== PHY_INTERFACE_MODE_RMII
)
1022 ? BM_MIIGSK_CFGR_RMII
: BM_MIIGSK_CFGR_MII
;
1023 if (fep
->phy_dev
&& fep
->phy_dev
->speed
== SPEED_10
)
1024 cfgr
|= BM_MIIGSK_CFGR_FRCONT_10M
;
1025 writel(cfgr
, fep
->hwp
+ FEC_MIIGSK_CFGR
);
1027 /* re-enable the gasket */
1028 writel(2, fep
->hwp
+ FEC_MIIGSK_ENR
);
1033 #if !defined(CONFIG_M5272)
1034 /* enable pause frame*/
1035 if ((fep
->pause_flag
& FEC_PAUSE_FLAG_ENABLE
) ||
1036 ((fep
->pause_flag
& FEC_PAUSE_FLAG_AUTONEG
) &&
1037 fep
->phy_dev
&& fep
->phy_dev
->pause
)) {
1038 rcntl
|= FEC_ENET_FCE
;
1040 /* set FIFO threshold parameter to reduce overrun */
1041 writel(FEC_ENET_RSEM_V
, fep
->hwp
+ FEC_R_FIFO_RSEM
);
1042 writel(FEC_ENET_RSFL_V
, fep
->hwp
+ FEC_R_FIFO_RSFL
);
1043 writel(FEC_ENET_RAEM_V
, fep
->hwp
+ FEC_R_FIFO_RAEM
);
1044 writel(FEC_ENET_RAFL_V
, fep
->hwp
+ FEC_R_FIFO_RAFL
);
1047 writel(FEC_ENET_OPD_V
, fep
->hwp
+ FEC_OPD
);
1049 rcntl
&= ~FEC_ENET_FCE
;
1051 #endif /* !defined(CONFIG_M5272) */
1053 writel(rcntl
, fep
->hwp
+ FEC_R_CNTRL
);
1055 /* Setup multicast filter. */
1056 set_multicast_list(ndev
);
1057 #ifndef CONFIG_M5272
1058 writel(0, fep
->hwp
+ FEC_HASH_TABLE_HIGH
);
1059 writel(0, fep
->hwp
+ FEC_HASH_TABLE_LOW
);
1062 if (fep
->quirks
& FEC_QUIRK_ENET_MAC
) {
1063 /* enable ENET endian swap */
1065 /* enable ENET store and forward mode */
1066 writel(1 << 8, fep
->hwp
+ FEC_X_WMRK
);
1069 if (fep
->bufdesc_ex
)
1072 #ifndef CONFIG_M5272
1073 /* Enable the MIB statistic event counters */
1074 writel(0 << 31, fep
->hwp
+ FEC_MIB_CTRLSTAT
);
1077 /* And last, enable the transmit and receive processing */
1078 writel(ecntl
, fep
->hwp
+ FEC_ECNTRL
);
1079 fec_enet_active_rxring(ndev
);
1081 if (fep
->bufdesc_ex
)
1082 fec_ptp_start_cyclecounter(ndev
);
1084 /* Enable interrupts we wish to service */
1086 writel(FEC_DEFAULT_IMASK
, fep
->hwp
+ FEC_IMASK
);
1088 writel(FEC_ENET_MII
, fep
->hwp
+ FEC_IMASK
);
1090 /* Init the interrupt coalescing */
1091 fec_enet_itr_coal_init(ndev
);
1096 fec_stop(struct net_device
*ndev
)
1098 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1099 struct fec_platform_data
*pdata
= fep
->pdev
->dev
.platform_data
;
1100 u32 rmii_mode
= readl(fep
->hwp
+ FEC_R_CNTRL
) & (1 << 8);
1103 /* We cannot expect a graceful transmit stop without link !!! */
1105 writel(1, fep
->hwp
+ FEC_X_CNTRL
); /* Graceful transmit stop */
1107 if (!(readl(fep
->hwp
+ FEC_IEVENT
) & FEC_ENET_GRA
))
1108 netdev_err(ndev
, "Graceful transmit stop did not complete!\n");
1111 /* Whack a reset. We should wait for this.
1112 * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
1113 * instead of reset MAC itself.
1115 if (!(fep
->wol_flag
& FEC_WOL_FLAG_SLEEP_ON
)) {
1116 if (fep
->quirks
& FEC_QUIRK_HAS_AVB
) {
1117 writel(0, fep
->hwp
+ FEC_ECNTRL
);
1119 writel(1, fep
->hwp
+ FEC_ECNTRL
);
1122 writel(FEC_DEFAULT_IMASK
, fep
->hwp
+ FEC_IMASK
);
1124 writel(FEC_DEFAULT_IMASK
| FEC_ENET_WAKEUP
, fep
->hwp
+ FEC_IMASK
);
1125 val
= readl(fep
->hwp
+ FEC_ECNTRL
);
1126 val
|= (FEC_ECR_MAGICEN
| FEC_ECR_SLEEP
);
1127 writel(val
, fep
->hwp
+ FEC_ECNTRL
);
1129 if (pdata
&& pdata
->sleep_mode_enable
)
1130 pdata
->sleep_mode_enable(true);
1132 writel(fep
->phy_speed
, fep
->hwp
+ FEC_MII_SPEED
);
1134 /* We have to keep ENET enabled to have MII interrupt stay working */
1135 if (fep
->quirks
& FEC_QUIRK_ENET_MAC
&&
1136 !(fep
->wol_flag
& FEC_WOL_FLAG_SLEEP_ON
)) {
1137 writel(2, fep
->hwp
+ FEC_ECNTRL
);
1138 writel(rmii_mode
, fep
->hwp
+ FEC_R_CNTRL
);
1144 fec_timeout(struct net_device
*ndev
)
1146 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1150 ndev
->stats
.tx_errors
++;
1152 schedule_work(&fep
->tx_timeout_work
);
1155 static void fec_enet_timeout_work(struct work_struct
*work
)
1157 struct fec_enet_private
*fep
=
1158 container_of(work
, struct fec_enet_private
, tx_timeout_work
);
1159 struct net_device
*ndev
= fep
->netdev
;
1162 if (netif_device_present(ndev
) || netif_running(ndev
)) {
1163 napi_disable(&fep
->napi
);
1164 netif_tx_lock_bh(ndev
);
1166 netif_wake_queue(ndev
);
1167 netif_tx_unlock_bh(ndev
);
1168 napi_enable(&fep
->napi
);
1174 fec_enet_hwtstamp(struct fec_enet_private
*fep
, unsigned ts
,
1175 struct skb_shared_hwtstamps
*hwtstamps
)
1177 unsigned long flags
;
1180 spin_lock_irqsave(&fep
->tmreg_lock
, flags
);
1181 ns
= timecounter_cyc2time(&fep
->tc
, ts
);
1182 spin_unlock_irqrestore(&fep
->tmreg_lock
, flags
);
1184 memset(hwtstamps
, 0, sizeof(*hwtstamps
));
1185 hwtstamps
->hwtstamp
= ns_to_ktime(ns
);
1189 fec_enet_tx_queue(struct net_device
*ndev
, u16 queue_id
)
1191 struct fec_enet_private
*fep
;
1192 struct bufdesc
*bdp
, *bdp_t
;
1193 unsigned short status
;
1194 struct sk_buff
*skb
;
1195 struct fec_enet_priv_tx_q
*txq
;
1196 struct netdev_queue
*nq
;
1201 fep
= netdev_priv(ndev
);
1203 queue_id
= FEC_ENET_GET_QUQUE(queue_id
);
1205 txq
= fep
->tx_queue
[queue_id
];
1206 /* get next bdp of dirty_tx */
1207 nq
= netdev_get_tx_queue(ndev
, queue_id
);
1208 bdp
= txq
->dirty_tx
;
1210 /* get next bdp of dirty_tx */
1211 bdp
= fec_enet_get_nextdesc(bdp
, fep
, queue_id
);
1213 while (((status
= bdp
->cbd_sc
) & BD_ENET_TX_READY
) == 0) {
1215 /* current queue is empty */
1216 if (bdp
== txq
->cur_tx
)
1221 index
= fec_enet_get_bd_index(txq
->tx_bd_base
, bdp_t
, fep
);
1222 skb
= txq
->tx_skbuff
[index
];
1224 bdp_t
= fec_enet_get_nextdesc(bdp_t
, fep
, queue_id
);
1225 index
= fec_enet_get_bd_index(txq
->tx_bd_base
, bdp_t
, fep
);
1226 skb
= txq
->tx_skbuff
[index
];
1229 if (skb_shinfo(skb
)->nr_frags
&&
1230 (status
= bdp_t
->cbd_sc
) & BD_ENET_TX_READY
)
1233 for (i
= 0; i
< bdnum
; i
++) {
1234 if (!IS_TSO_HEADER(txq
, bdp
->cbd_bufaddr
))
1235 dma_unmap_single(&fep
->pdev
->dev
, bdp
->cbd_bufaddr
,
1236 bdp
->cbd_datlen
, DMA_TO_DEVICE
);
1237 bdp
->cbd_bufaddr
= 0;
1239 bdp
= fec_enet_get_nextdesc(bdp
, fep
, queue_id
);
1241 txq
->tx_skbuff
[index
] = NULL
;
1243 /* Check for errors. */
1244 if (status
& (BD_ENET_TX_HB
| BD_ENET_TX_LC
|
1245 BD_ENET_TX_RL
| BD_ENET_TX_UN
|
1247 ndev
->stats
.tx_errors
++;
1248 if (status
& BD_ENET_TX_HB
) /* No heartbeat */
1249 ndev
->stats
.tx_heartbeat_errors
++;
1250 if (status
& BD_ENET_TX_LC
) /* Late collision */
1251 ndev
->stats
.tx_window_errors
++;
1252 if (status
& BD_ENET_TX_RL
) /* Retrans limit */
1253 ndev
->stats
.tx_aborted_errors
++;
1254 if (status
& BD_ENET_TX_UN
) /* Underrun */
1255 ndev
->stats
.tx_fifo_errors
++;
1256 if (status
& BD_ENET_TX_CSL
) /* Carrier lost */
1257 ndev
->stats
.tx_carrier_errors
++;
1259 ndev
->stats
.tx_packets
++;
1260 ndev
->stats
.tx_bytes
+= skb
->len
;
1263 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_IN_PROGRESS
) &&
1265 struct skb_shared_hwtstamps shhwtstamps
;
1266 struct bufdesc_ex
*ebdp
= (struct bufdesc_ex
*)bdp
;
1268 fec_enet_hwtstamp(fep
, ebdp
->ts
, &shhwtstamps
);
1269 skb_tstamp_tx(skb
, &shhwtstamps
);
1272 /* Deferred means some collisions occurred during transmit,
1273 * but we eventually sent the packet OK.
1275 if (status
& BD_ENET_TX_DEF
)
1276 ndev
->stats
.collisions
++;
1278 /* Free the sk buffer associated with this last transmit */
1279 dev_kfree_skb_any(skb
);
1281 txq
->dirty_tx
= bdp
;
1283 /* Update pointer to next buffer descriptor to be transmitted */
1284 bdp
= fec_enet_get_nextdesc(bdp
, fep
, queue_id
);
1286 /* Since we have freed up a buffer, the ring is no longer full
1288 if (netif_queue_stopped(ndev
)) {
1289 entries_free
= fec_enet_get_free_txdesc_num(fep
, txq
);
1290 if (entries_free
>= txq
->tx_wake_threshold
)
1291 netif_tx_wake_queue(nq
);
1295 /* ERR006538: Keep the transmitter going */
1296 if (bdp
!= txq
->cur_tx
&&
1297 readl(fep
->hwp
+ FEC_X_DES_ACTIVE(queue_id
)) == 0)
1298 writel(0, fep
->hwp
+ FEC_X_DES_ACTIVE(queue_id
));
1302 fec_enet_tx(struct net_device
*ndev
)
1304 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1306 /* First process class A queue, then Class B and Best Effort queue */
1307 for_each_set_bit(queue_id
, &fep
->work_tx
, FEC_ENET_MAX_TX_QS
) {
1308 clear_bit(queue_id
, &fep
->work_tx
);
1309 fec_enet_tx_queue(ndev
, queue_id
);
1315 fec_enet_new_rxbdp(struct net_device
*ndev
, struct bufdesc
*bdp
, struct sk_buff
*skb
)
1317 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1320 off
= ((unsigned long)skb
->data
) & fep
->rx_align
;
1322 skb_reserve(skb
, fep
->rx_align
+ 1 - off
);
1324 bdp
->cbd_bufaddr
= dma_map_single(&fep
->pdev
->dev
, skb
->data
,
1325 FEC_ENET_RX_FRSIZE
- fep
->rx_align
,
1327 if (dma_mapping_error(&fep
->pdev
->dev
, bdp
->cbd_bufaddr
)) {
1328 if (net_ratelimit())
1329 netdev_err(ndev
, "Rx DMA memory map failed\n");
1336 static bool fec_enet_copybreak(struct net_device
*ndev
, struct sk_buff
**skb
,
1337 struct bufdesc
*bdp
, u32 length
, bool swap
)
1339 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1340 struct sk_buff
*new_skb
;
1342 if (length
> fep
->rx_copybreak
)
1345 new_skb
= netdev_alloc_skb(ndev
, length
);
1349 dma_sync_single_for_cpu(&fep
->pdev
->dev
, bdp
->cbd_bufaddr
,
1350 FEC_ENET_RX_FRSIZE
- fep
->rx_align
,
1353 memcpy(new_skb
->data
, (*skb
)->data
, length
);
1355 swap_buffer2(new_skb
->data
, (*skb
)->data
, length
);
1361 /* During a receive, the cur_rx points to the current incoming buffer.
1362 * When we update through the ring, if the next incoming buffer has
1363 * not been given to the system, we just set the empty indicator,
1364 * effectively tossing the packet.
1367 fec_enet_rx_queue(struct net_device
*ndev
, int budget
, u16 queue_id
)
1369 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1370 struct fec_enet_priv_rx_q
*rxq
;
1371 struct bufdesc
*bdp
;
1372 unsigned short status
;
1373 struct sk_buff
*skb_new
= NULL
;
1374 struct sk_buff
*skb
;
1377 int pkt_received
= 0;
1378 struct bufdesc_ex
*ebdp
= NULL
;
1379 bool vlan_packet_rcvd
= false;
1383 bool need_swap
= fep
->quirks
& FEC_QUIRK_SWAP_FRAME
;
1388 queue_id
= FEC_ENET_GET_QUQUE(queue_id
);
1389 rxq
= fep
->rx_queue
[queue_id
];
1391 /* First, grab all of the stats for the incoming packet.
1392 * These get messed up if we get called due to a busy condition.
1396 while (!((status
= bdp
->cbd_sc
) & BD_ENET_RX_EMPTY
)) {
1398 if (pkt_received
>= budget
)
1402 /* Since we have allocated space to hold a complete frame,
1403 * the last indicator should be set.
1405 if ((status
& BD_ENET_RX_LAST
) == 0)
1406 netdev_err(ndev
, "rcv is not +last\n");
1409 /* Check for errors. */
1410 if (status
& (BD_ENET_RX_LG
| BD_ENET_RX_SH
| BD_ENET_RX_NO
|
1411 BD_ENET_RX_CR
| BD_ENET_RX_OV
)) {
1412 ndev
->stats
.rx_errors
++;
1413 if (status
& (BD_ENET_RX_LG
| BD_ENET_RX_SH
)) {
1414 /* Frame too long or too short. */
1415 ndev
->stats
.rx_length_errors
++;
1417 if (status
& BD_ENET_RX_NO
) /* Frame alignment */
1418 ndev
->stats
.rx_frame_errors
++;
1419 if (status
& BD_ENET_RX_CR
) /* CRC Error */
1420 ndev
->stats
.rx_crc_errors
++;
1421 if (status
& BD_ENET_RX_OV
) /* FIFO overrun */
1422 ndev
->stats
.rx_fifo_errors
++;
1425 /* Report late collisions as a frame error.
1426 * On this error, the BD is closed, but we don't know what we
1427 * have in the buffer. So, just drop this frame on the floor.
1429 if (status
& BD_ENET_RX_CL
) {
1430 ndev
->stats
.rx_errors
++;
1431 ndev
->stats
.rx_frame_errors
++;
1432 goto rx_processing_done
;
1435 /* Process the incoming frame. */
1436 ndev
->stats
.rx_packets
++;
1437 pkt_len
= bdp
->cbd_datlen
;
1438 ndev
->stats
.rx_bytes
+= pkt_len
;
1440 index
= fec_enet_get_bd_index(rxq
->rx_bd_base
, bdp
, fep
);
1441 skb
= rxq
->rx_skbuff
[index
];
1443 /* The packet length includes FCS, but we don't want to
1444 * include that when passing upstream as it messes up
1445 * bridging applications.
1447 is_copybreak
= fec_enet_copybreak(ndev
, &skb
, bdp
, pkt_len
- 4,
1449 if (!is_copybreak
) {
1450 skb_new
= netdev_alloc_skb(ndev
, FEC_ENET_RX_FRSIZE
);
1451 if (unlikely(!skb_new
)) {
1452 ndev
->stats
.rx_dropped
++;
1453 goto rx_processing_done
;
1455 dma_unmap_single(&fep
->pdev
->dev
, bdp
->cbd_bufaddr
,
1456 FEC_ENET_RX_FRSIZE
- fep
->rx_align
,
1460 prefetch(skb
->data
- NET_IP_ALIGN
);
1461 skb_put(skb
, pkt_len
- 4);
1463 if (!is_copybreak
&& need_swap
)
1464 swap_buffer(data
, pkt_len
);
1466 /* Extract the enhanced buffer descriptor */
1468 if (fep
->bufdesc_ex
)
1469 ebdp
= (struct bufdesc_ex
*)bdp
;
1471 /* If this is a VLAN packet remove the VLAN Tag */
1472 vlan_packet_rcvd
= false;
1473 if ((ndev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
1474 fep
->bufdesc_ex
&& (ebdp
->cbd_esc
& BD_ENET_RX_VLAN
)) {
1475 /* Push and remove the vlan tag */
1476 struct vlan_hdr
*vlan_header
=
1477 (struct vlan_hdr
*) (data
+ ETH_HLEN
);
1478 vlan_tag
= ntohs(vlan_header
->h_vlan_TCI
);
1480 vlan_packet_rcvd
= true;
1482 skb_copy_to_linear_data_offset(skb
, VLAN_HLEN
,
1483 data
, (2 * ETH_ALEN
));
1484 skb_pull(skb
, VLAN_HLEN
);
1487 skb
->protocol
= eth_type_trans(skb
, ndev
);
1489 /* Get receive timestamp from the skb */
1490 if (fep
->hwts_rx_en
&& fep
->bufdesc_ex
)
1491 fec_enet_hwtstamp(fep
, ebdp
->ts
,
1492 skb_hwtstamps(skb
));
1494 if (fep
->bufdesc_ex
&&
1495 (fep
->csum_flags
& FLAG_RX_CSUM_ENABLED
)) {
1496 if (!(ebdp
->cbd_esc
& FLAG_RX_CSUM_ERROR
)) {
1497 /* don't check it */
1498 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1500 skb_checksum_none_assert(skb
);
1504 /* Handle received VLAN packets */
1505 if (vlan_packet_rcvd
)
1506 __vlan_hwaccel_put_tag(skb
,
1510 napi_gro_receive(&fep
->napi
, skb
);
1513 dma_sync_single_for_device(&fep
->pdev
->dev
, bdp
->cbd_bufaddr
,
1514 FEC_ENET_RX_FRSIZE
- fep
->rx_align
,
1517 rxq
->rx_skbuff
[index
] = skb_new
;
1518 fec_enet_new_rxbdp(ndev
, bdp
, skb_new
);
1522 /* Clear the status flags for this buffer */
1523 status
&= ~BD_ENET_RX_STATS
;
1525 /* Mark the buffer empty */
1526 status
|= BD_ENET_RX_EMPTY
;
1527 bdp
->cbd_sc
= status
;
1529 if (fep
->bufdesc_ex
) {
1530 struct bufdesc_ex
*ebdp
= (struct bufdesc_ex
*)bdp
;
1532 ebdp
->cbd_esc
= BD_ENET_RX_INT
;
1537 /* Update BD pointer to next entry */
1538 bdp
= fec_enet_get_nextdesc(bdp
, fep
, queue_id
);
1540 /* Doing this here will keep the FEC running while we process
1541 * incoming frames. On a heavily loaded network, we should be
1542 * able to keep up at the expense of system resources.
1544 writel(0, fep
->hwp
+ FEC_R_DES_ACTIVE(queue_id
));
1547 return pkt_received
;
1551 fec_enet_rx(struct net_device
*ndev
, int budget
)
1553 int pkt_received
= 0;
1555 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1557 for_each_set_bit(queue_id
, &fep
->work_rx
, FEC_ENET_MAX_RX_QS
) {
1558 clear_bit(queue_id
, &fep
->work_rx
);
1559 pkt_received
+= fec_enet_rx_queue(ndev
,
1560 budget
- pkt_received
, queue_id
);
1562 return pkt_received
;
1566 fec_enet_collect_events(struct fec_enet_private
*fep
, uint int_events
)
1568 if (int_events
== 0)
1571 if (int_events
& FEC_ENET_RXF
)
1572 fep
->work_rx
|= (1 << 2);
1573 if (int_events
& FEC_ENET_RXF_1
)
1574 fep
->work_rx
|= (1 << 0);
1575 if (int_events
& FEC_ENET_RXF_2
)
1576 fep
->work_rx
|= (1 << 1);
1578 if (int_events
& FEC_ENET_TXF
)
1579 fep
->work_tx
|= (1 << 2);
1580 if (int_events
& FEC_ENET_TXF_1
)
1581 fep
->work_tx
|= (1 << 0);
1582 if (int_events
& FEC_ENET_TXF_2
)
1583 fep
->work_tx
|= (1 << 1);
1589 fec_enet_interrupt(int irq
, void *dev_id
)
1591 struct net_device
*ndev
= dev_id
;
1592 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1594 irqreturn_t ret
= IRQ_NONE
;
1596 int_events
= readl(fep
->hwp
+ FEC_IEVENT
);
1597 writel(int_events
, fep
->hwp
+ FEC_IEVENT
);
1598 fec_enet_collect_events(fep
, int_events
);
1600 if (fep
->work_tx
|| fep
->work_rx
) {
1603 if (napi_schedule_prep(&fep
->napi
)) {
1604 /* Disable the NAPI interrupts */
1605 writel(FEC_ENET_MII
, fep
->hwp
+ FEC_IMASK
);
1606 __napi_schedule(&fep
->napi
);
1610 if (int_events
& FEC_ENET_MII
) {
1612 complete(&fep
->mdio_done
);
1616 fec_ptp_check_pps_event(fep
);
1621 static int fec_enet_rx_napi(struct napi_struct
*napi
, int budget
)
1623 struct net_device
*ndev
= napi
->dev
;
1624 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1627 pkts
= fec_enet_rx(ndev
, budget
);
1631 if (pkts
< budget
) {
1632 napi_complete(napi
);
1633 writel(FEC_DEFAULT_IMASK
, fep
->hwp
+ FEC_IMASK
);
1638 /* ------------------------------------------------------------------------- */
1639 static void fec_get_mac(struct net_device
*ndev
)
1641 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1642 struct fec_platform_data
*pdata
= dev_get_platdata(&fep
->pdev
->dev
);
1643 unsigned char *iap
, tmpaddr
[ETH_ALEN
];
1646 * try to get mac address in following order:
1648 * 1) module parameter via kernel command line in form
1649 * fec.macaddr=0x00,0x04,0x9f,0x01,0x30,0xe0
1654 * 2) from device tree data
1656 if (!is_valid_ether_addr(iap
)) {
1657 struct device_node
*np
= fep
->pdev
->dev
.of_node
;
1659 const char *mac
= of_get_mac_address(np
);
1661 iap
= (unsigned char *) mac
;
1666 * 3) from flash or fuse (via platform data)
1668 if (!is_valid_ether_addr(iap
)) {
1671 iap
= (unsigned char *)FEC_FLASHMAC
;
1674 iap
= (unsigned char *)&pdata
->mac
;
1679 * 4) FEC mac registers set by bootloader
1681 if (!is_valid_ether_addr(iap
)) {
1682 *((__be32
*) &tmpaddr
[0]) =
1683 cpu_to_be32(readl(fep
->hwp
+ FEC_ADDR_LOW
));
1684 *((__be16
*) &tmpaddr
[4]) =
1685 cpu_to_be16(readl(fep
->hwp
+ FEC_ADDR_HIGH
) >> 16);
1690 * 5) random mac address
1692 if (!is_valid_ether_addr(iap
)) {
1693 /* Report it and use a random ethernet address instead */
1694 netdev_err(ndev
, "Invalid MAC address: %pM\n", iap
);
1695 eth_hw_addr_random(ndev
);
1696 netdev_info(ndev
, "Using random MAC address: %pM\n",
1701 memcpy(ndev
->dev_addr
, iap
, ETH_ALEN
);
1703 /* Adjust MAC if using macaddr */
1705 ndev
->dev_addr
[ETH_ALEN
-1] = macaddr
[ETH_ALEN
-1] + fep
->dev_id
;
1708 /* ------------------------------------------------------------------------- */
1713 static void fec_enet_adjust_link(struct net_device
*ndev
)
1715 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1716 struct phy_device
*phy_dev
= fep
->phy_dev
;
1717 int status_change
= 0;
1719 /* Prevent a state halted on mii error */
1720 if (fep
->mii_timeout
&& phy_dev
->state
== PHY_HALTED
) {
1721 phy_dev
->state
= PHY_RESUMING
;
1726 * If the netdev is down, or is going down, we're not interested
1727 * in link state events, so just mark our idea of the link as down
1728 * and ignore the event.
1730 if (!netif_running(ndev
) || !netif_device_present(ndev
)) {
1732 } else if (phy_dev
->link
) {
1734 fep
->link
= phy_dev
->link
;
1738 if (fep
->full_duplex
!= phy_dev
->duplex
) {
1739 fep
->full_duplex
= phy_dev
->duplex
;
1743 if (phy_dev
->speed
!= fep
->speed
) {
1744 fep
->speed
= phy_dev
->speed
;
1748 /* if any of the above changed restart the FEC */
1749 if (status_change
) {
1750 napi_disable(&fep
->napi
);
1751 netif_tx_lock_bh(ndev
);
1753 netif_wake_queue(ndev
);
1754 netif_tx_unlock_bh(ndev
);
1755 napi_enable(&fep
->napi
);
1759 napi_disable(&fep
->napi
);
1760 netif_tx_lock_bh(ndev
);
1762 netif_tx_unlock_bh(ndev
);
1763 napi_enable(&fep
->napi
);
1764 fep
->link
= phy_dev
->link
;
1770 phy_print_status(phy_dev
);
1773 static int fec_enet_mdio_read(struct mii_bus
*bus
, int mii_id
, int regnum
)
1775 struct fec_enet_private
*fep
= bus
->priv
;
1776 unsigned long time_left
;
1778 fep
->mii_timeout
= 0;
1779 init_completion(&fep
->mdio_done
);
1781 /* start a read op */
1782 writel(FEC_MMFR_ST
| FEC_MMFR_OP_READ
|
1783 FEC_MMFR_PA(mii_id
) | FEC_MMFR_RA(regnum
) |
1784 FEC_MMFR_TA
, fep
->hwp
+ FEC_MII_DATA
);
1786 /* wait for end of transfer */
1787 time_left
= wait_for_completion_timeout(&fep
->mdio_done
,
1788 usecs_to_jiffies(FEC_MII_TIMEOUT
));
1789 if (time_left
== 0) {
1790 fep
->mii_timeout
= 1;
1791 netdev_err(fep
->netdev
, "MDIO read timeout\n");
1796 return FEC_MMFR_DATA(readl(fep
->hwp
+ FEC_MII_DATA
));
1799 static int fec_enet_mdio_write(struct mii_bus
*bus
, int mii_id
, int regnum
,
1802 struct fec_enet_private
*fep
= bus
->priv
;
1803 unsigned long time_left
;
1805 fep
->mii_timeout
= 0;
1806 init_completion(&fep
->mdio_done
);
1808 /* start a write op */
1809 writel(FEC_MMFR_ST
| FEC_MMFR_OP_WRITE
|
1810 FEC_MMFR_PA(mii_id
) | FEC_MMFR_RA(regnum
) |
1811 FEC_MMFR_TA
| FEC_MMFR_DATA(value
),
1812 fep
->hwp
+ FEC_MII_DATA
);
1814 /* wait for end of transfer */
1815 time_left
= wait_for_completion_timeout(&fep
->mdio_done
,
1816 usecs_to_jiffies(FEC_MII_TIMEOUT
));
1817 if (time_left
== 0) {
1818 fep
->mii_timeout
= 1;
1819 netdev_err(fep
->netdev
, "MDIO write timeout\n");
1826 static int fec_enet_clk_enable(struct net_device
*ndev
, bool enable
)
1828 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1832 ret
= clk_prepare_enable(fep
->clk_ahb
);
1835 ret
= clk_prepare_enable(fep
->clk_ipg
);
1837 goto failed_clk_ipg
;
1838 if (fep
->clk_enet_out
) {
1839 ret
= clk_prepare_enable(fep
->clk_enet_out
);
1841 goto failed_clk_enet_out
;
1844 mutex_lock(&fep
->ptp_clk_mutex
);
1845 ret
= clk_prepare_enable(fep
->clk_ptp
);
1847 mutex_unlock(&fep
->ptp_clk_mutex
);
1848 goto failed_clk_ptp
;
1850 fep
->ptp_clk_on
= true;
1852 mutex_unlock(&fep
->ptp_clk_mutex
);
1855 ret
= clk_prepare_enable(fep
->clk_ref
);
1857 goto failed_clk_ref
;
1860 clk_disable_unprepare(fep
->clk_ahb
);
1861 clk_disable_unprepare(fep
->clk_ipg
);
1862 if (fep
->clk_enet_out
)
1863 clk_disable_unprepare(fep
->clk_enet_out
);
1865 mutex_lock(&fep
->ptp_clk_mutex
);
1866 clk_disable_unprepare(fep
->clk_ptp
);
1867 fep
->ptp_clk_on
= false;
1868 mutex_unlock(&fep
->ptp_clk_mutex
);
1871 clk_disable_unprepare(fep
->clk_ref
);
1878 clk_disable_unprepare(fep
->clk_ref
);
1880 if (fep
->clk_enet_out
)
1881 clk_disable_unprepare(fep
->clk_enet_out
);
1882 failed_clk_enet_out
:
1883 clk_disable_unprepare(fep
->clk_ipg
);
1885 clk_disable_unprepare(fep
->clk_ahb
);
1890 static int fec_enet_mii_probe(struct net_device
*ndev
)
1892 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1893 struct phy_device
*phy_dev
= NULL
;
1894 char mdio_bus_id
[MII_BUS_ID_SIZE
];
1895 char phy_name
[MII_BUS_ID_SIZE
+ 3];
1897 int dev_id
= fep
->dev_id
;
1899 fep
->phy_dev
= NULL
;
1901 if (fep
->phy_node
) {
1902 phy_dev
= of_phy_connect(ndev
, fep
->phy_node
,
1903 &fec_enet_adjust_link
, 0,
1904 fep
->phy_interface
);
1908 /* check for attached phy */
1909 for (phy_id
= 0; (phy_id
< PHY_MAX_ADDR
); phy_id
++) {
1910 if ((fep
->mii_bus
->phy_mask
& (1 << phy_id
)))
1912 if (fep
->mii_bus
->phy_map
[phy_id
] == NULL
)
1914 if (fep
->mii_bus
->phy_map
[phy_id
]->phy_id
== 0)
1918 strlcpy(mdio_bus_id
, fep
->mii_bus
->id
, MII_BUS_ID_SIZE
);
1922 if (phy_id
>= PHY_MAX_ADDR
) {
1923 netdev_info(ndev
, "no PHY, assuming direct connection to switch\n");
1924 strlcpy(mdio_bus_id
, "fixed-0", MII_BUS_ID_SIZE
);
1928 snprintf(phy_name
, sizeof(phy_name
),
1929 PHY_ID_FMT
, mdio_bus_id
, phy_id
);
1930 phy_dev
= phy_connect(ndev
, phy_name
, &fec_enet_adjust_link
,
1931 fep
->phy_interface
);
1934 if (IS_ERR(phy_dev
)) {
1935 netdev_err(ndev
, "could not attach to PHY\n");
1936 return PTR_ERR(phy_dev
);
1939 /* mask with MAC supported features */
1940 if (fep
->quirks
& FEC_QUIRK_HAS_GBIT
) {
1941 phy_dev
->supported
&= PHY_GBIT_FEATURES
;
1942 phy_dev
->supported
&= ~SUPPORTED_1000baseT_Half
;
1943 #if !defined(CONFIG_M5272)
1944 phy_dev
->supported
|= SUPPORTED_Pause
;
1948 phy_dev
->supported
&= PHY_BASIC_FEATURES
;
1950 phy_dev
->advertising
= phy_dev
->supported
;
1952 fep
->phy_dev
= phy_dev
;
1954 fep
->full_duplex
= 0;
1956 netdev_info(ndev
, "Freescale FEC PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1957 fep
->phy_dev
->drv
->name
, dev_name(&fep
->phy_dev
->dev
),
1963 static int fec_enet_mii_init(struct platform_device
*pdev
)
1965 static struct mii_bus
*fec0_mii_bus
;
1966 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1967 struct fec_enet_private
*fep
= netdev_priv(ndev
);
1968 struct device_node
*node
;
1969 int err
= -ENXIO
, i
;
1972 * The i.MX28 dual fec interfaces are not equal.
1973 * Here are the differences:
1975 * - fec0 supports MII & RMII modes while fec1 only supports RMII
1976 * - fec0 acts as the 1588 time master while fec1 is slave
1977 * - external phys can only be configured by fec0
1979 * That is to say fec1 can not work independently. It only works
1980 * when fec0 is working. The reason behind this design is that the
1981 * second interface is added primarily for Switch mode.
1983 * Because of the last point above, both phys are attached on fec0
1984 * mdio interface in board design, and need to be configured by
1987 if ((fep
->quirks
& FEC_QUIRK_SINGLE_MDIO
) && fep
->dev_id
> 0) {
1988 /* fec1 uses fec0 mii_bus */
1989 if (mii_cnt
&& fec0_mii_bus
) {
1990 fep
->mii_bus
= fec0_mii_bus
;
1997 fep
->mii_timeout
= 0;
2000 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
2002 * The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
2003 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28
2004 * Reference Manual has an error on this, and gets fixed on i.MX6Q
2007 fep
->phy_speed
= DIV_ROUND_UP(clk_get_rate(fep
->clk_ipg
), 5000000);
2008 if (fep
->quirks
& FEC_QUIRK_ENET_MAC
)
2010 fep
->phy_speed
<<= 1;
2011 writel(fep
->phy_speed
, fep
->hwp
+ FEC_MII_SPEED
);
2013 fep
->mii_bus
= mdiobus_alloc();
2014 if (fep
->mii_bus
== NULL
) {
2019 fep
->mii_bus
->name
= "fec_enet_mii_bus";
2020 fep
->mii_bus
->read
= fec_enet_mdio_read
;
2021 fep
->mii_bus
->write
= fec_enet_mdio_write
;
2022 snprintf(fep
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%s-%x",
2023 pdev
->name
, fep
->dev_id
+ 1);
2024 fep
->mii_bus
->priv
= fep
;
2025 fep
->mii_bus
->parent
= &pdev
->dev
;
2027 fep
->mii_bus
->irq
= kmalloc(sizeof(int) * PHY_MAX_ADDR
, GFP_KERNEL
);
2028 if (!fep
->mii_bus
->irq
) {
2030 goto err_out_free_mdiobus
;
2033 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
2034 fep
->mii_bus
->irq
[i
] = PHY_POLL
;
2036 node
= of_get_child_by_name(pdev
->dev
.of_node
, "mdio");
2038 err
= of_mdiobus_register(fep
->mii_bus
, node
);
2041 err
= mdiobus_register(fep
->mii_bus
);
2045 goto err_out_free_mdio_irq
;
2049 /* save fec0 mii_bus */
2050 if (fep
->quirks
& FEC_QUIRK_SINGLE_MDIO
)
2051 fec0_mii_bus
= fep
->mii_bus
;
2055 err_out_free_mdio_irq
:
2056 kfree(fep
->mii_bus
->irq
);
2057 err_out_free_mdiobus
:
2058 mdiobus_free(fep
->mii_bus
);
2063 static void fec_enet_mii_remove(struct fec_enet_private
*fep
)
2065 if (--mii_cnt
== 0) {
2066 mdiobus_unregister(fep
->mii_bus
);
2067 kfree(fep
->mii_bus
->irq
);
2068 mdiobus_free(fep
->mii_bus
);
2072 static int fec_enet_get_settings(struct net_device
*ndev
,
2073 struct ethtool_cmd
*cmd
)
2075 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2076 struct phy_device
*phydev
= fep
->phy_dev
;
2081 return phy_ethtool_gset(phydev
, cmd
);
2084 static int fec_enet_set_settings(struct net_device
*ndev
,
2085 struct ethtool_cmd
*cmd
)
2087 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2088 struct phy_device
*phydev
= fep
->phy_dev
;
2093 return phy_ethtool_sset(phydev
, cmd
);
2096 static void fec_enet_get_drvinfo(struct net_device
*ndev
,
2097 struct ethtool_drvinfo
*info
)
2099 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2101 strlcpy(info
->driver
, fep
->pdev
->dev
.driver
->name
,
2102 sizeof(info
->driver
));
2103 strlcpy(info
->version
, "Revision: 1.0", sizeof(info
->version
));
2104 strlcpy(info
->bus_info
, dev_name(&ndev
->dev
), sizeof(info
->bus_info
));
2107 static int fec_enet_get_ts_info(struct net_device
*ndev
,
2108 struct ethtool_ts_info
*info
)
2110 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2112 if (fep
->bufdesc_ex
) {
2114 info
->so_timestamping
= SOF_TIMESTAMPING_TX_SOFTWARE
|
2115 SOF_TIMESTAMPING_RX_SOFTWARE
|
2116 SOF_TIMESTAMPING_SOFTWARE
|
2117 SOF_TIMESTAMPING_TX_HARDWARE
|
2118 SOF_TIMESTAMPING_RX_HARDWARE
|
2119 SOF_TIMESTAMPING_RAW_HARDWARE
;
2121 info
->phc_index
= ptp_clock_index(fep
->ptp_clock
);
2123 info
->phc_index
= -1;
2125 info
->tx_types
= (1 << HWTSTAMP_TX_OFF
) |
2126 (1 << HWTSTAMP_TX_ON
);
2128 info
->rx_filters
= (1 << HWTSTAMP_FILTER_NONE
) |
2129 (1 << HWTSTAMP_FILTER_ALL
);
2132 return ethtool_op_get_ts_info(ndev
, info
);
2136 #if !defined(CONFIG_M5272)
2138 static void fec_enet_get_pauseparam(struct net_device
*ndev
,
2139 struct ethtool_pauseparam
*pause
)
2141 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2143 pause
->autoneg
= (fep
->pause_flag
& FEC_PAUSE_FLAG_AUTONEG
) != 0;
2144 pause
->tx_pause
= (fep
->pause_flag
& FEC_PAUSE_FLAG_ENABLE
) != 0;
2145 pause
->rx_pause
= pause
->tx_pause
;
2148 static int fec_enet_set_pauseparam(struct net_device
*ndev
,
2149 struct ethtool_pauseparam
*pause
)
2151 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2156 if (pause
->tx_pause
!= pause
->rx_pause
) {
2158 "hardware only support enable/disable both tx and rx");
2162 fep
->pause_flag
= 0;
2164 /* tx pause must be same as rx pause */
2165 fep
->pause_flag
|= pause
->rx_pause
? FEC_PAUSE_FLAG_ENABLE
: 0;
2166 fep
->pause_flag
|= pause
->autoneg
? FEC_PAUSE_FLAG_AUTONEG
: 0;
2168 if (pause
->rx_pause
|| pause
->autoneg
) {
2169 fep
->phy_dev
->supported
|= ADVERTISED_Pause
;
2170 fep
->phy_dev
->advertising
|= ADVERTISED_Pause
;
2172 fep
->phy_dev
->supported
&= ~ADVERTISED_Pause
;
2173 fep
->phy_dev
->advertising
&= ~ADVERTISED_Pause
;
2176 if (pause
->autoneg
) {
2177 if (netif_running(ndev
))
2179 phy_start_aneg(fep
->phy_dev
);
2181 if (netif_running(ndev
)) {
2182 napi_disable(&fep
->napi
);
2183 netif_tx_lock_bh(ndev
);
2185 netif_wake_queue(ndev
);
2186 netif_tx_unlock_bh(ndev
);
2187 napi_enable(&fep
->napi
);
2193 static const struct fec_stat
{
2194 char name
[ETH_GSTRING_LEN
];
2198 { "tx_dropped", RMON_T_DROP
},
2199 { "tx_packets", RMON_T_PACKETS
},
2200 { "tx_broadcast", RMON_T_BC_PKT
},
2201 { "tx_multicast", RMON_T_MC_PKT
},
2202 { "tx_crc_errors", RMON_T_CRC_ALIGN
},
2203 { "tx_undersize", RMON_T_UNDERSIZE
},
2204 { "tx_oversize", RMON_T_OVERSIZE
},
2205 { "tx_fragment", RMON_T_FRAG
},
2206 { "tx_jabber", RMON_T_JAB
},
2207 { "tx_collision", RMON_T_COL
},
2208 { "tx_64byte", RMON_T_P64
},
2209 { "tx_65to127byte", RMON_T_P65TO127
},
2210 { "tx_128to255byte", RMON_T_P128TO255
},
2211 { "tx_256to511byte", RMON_T_P256TO511
},
2212 { "tx_512to1023byte", RMON_T_P512TO1023
},
2213 { "tx_1024to2047byte", RMON_T_P1024TO2047
},
2214 { "tx_GTE2048byte", RMON_T_P_GTE2048
},
2215 { "tx_octets", RMON_T_OCTETS
},
2218 { "IEEE_tx_drop", IEEE_T_DROP
},
2219 { "IEEE_tx_frame_ok", IEEE_T_FRAME_OK
},
2220 { "IEEE_tx_1col", IEEE_T_1COL
},
2221 { "IEEE_tx_mcol", IEEE_T_MCOL
},
2222 { "IEEE_tx_def", IEEE_T_DEF
},
2223 { "IEEE_tx_lcol", IEEE_T_LCOL
},
2224 { "IEEE_tx_excol", IEEE_T_EXCOL
},
2225 { "IEEE_tx_macerr", IEEE_T_MACERR
},
2226 { "IEEE_tx_cserr", IEEE_T_CSERR
},
2227 { "IEEE_tx_sqe", IEEE_T_SQE
},
2228 { "IEEE_tx_fdxfc", IEEE_T_FDXFC
},
2229 { "IEEE_tx_octets_ok", IEEE_T_OCTETS_OK
},
2232 { "rx_packets", RMON_R_PACKETS
},
2233 { "rx_broadcast", RMON_R_BC_PKT
},
2234 { "rx_multicast", RMON_R_MC_PKT
},
2235 { "rx_crc_errors", RMON_R_CRC_ALIGN
},
2236 { "rx_undersize", RMON_R_UNDERSIZE
},
2237 { "rx_oversize", RMON_R_OVERSIZE
},
2238 { "rx_fragment", RMON_R_FRAG
},
2239 { "rx_jabber", RMON_R_JAB
},
2240 { "rx_64byte", RMON_R_P64
},
2241 { "rx_65to127byte", RMON_R_P65TO127
},
2242 { "rx_128to255byte", RMON_R_P128TO255
},
2243 { "rx_256to511byte", RMON_R_P256TO511
},
2244 { "rx_512to1023byte", RMON_R_P512TO1023
},
2245 { "rx_1024to2047byte", RMON_R_P1024TO2047
},
2246 { "rx_GTE2048byte", RMON_R_P_GTE2048
},
2247 { "rx_octets", RMON_R_OCTETS
},
2250 { "IEEE_rx_drop", IEEE_R_DROP
},
2251 { "IEEE_rx_frame_ok", IEEE_R_FRAME_OK
},
2252 { "IEEE_rx_crc", IEEE_R_CRC
},
2253 { "IEEE_rx_align", IEEE_R_ALIGN
},
2254 { "IEEE_rx_macerr", IEEE_R_MACERR
},
2255 { "IEEE_rx_fdxfc", IEEE_R_FDXFC
},
2256 { "IEEE_rx_octets_ok", IEEE_R_OCTETS_OK
},
2259 static void fec_enet_get_ethtool_stats(struct net_device
*dev
,
2260 struct ethtool_stats
*stats
, u64
*data
)
2262 struct fec_enet_private
*fep
= netdev_priv(dev
);
2265 for (i
= 0; i
< ARRAY_SIZE(fec_stats
); i
++)
2266 data
[i
] = readl(fep
->hwp
+ fec_stats
[i
].offset
);
2269 static void fec_enet_get_strings(struct net_device
*netdev
,
2270 u32 stringset
, u8
*data
)
2273 switch (stringset
) {
2275 for (i
= 0; i
< ARRAY_SIZE(fec_stats
); i
++)
2276 memcpy(data
+ i
* ETH_GSTRING_LEN
,
2277 fec_stats
[i
].name
, ETH_GSTRING_LEN
);
2282 static int fec_enet_get_sset_count(struct net_device
*dev
, int sset
)
2286 return ARRAY_SIZE(fec_stats
);
2291 #endif /* !defined(CONFIG_M5272) */
2293 static int fec_enet_nway_reset(struct net_device
*dev
)
2295 struct fec_enet_private
*fep
= netdev_priv(dev
);
2296 struct phy_device
*phydev
= fep
->phy_dev
;
2301 return genphy_restart_aneg(phydev
);
2304 /* ITR clock source is enet system clock (clk_ahb).
2305 * TCTT unit is cycle_ns * 64 cycle
2306 * So, the ICTT value = X us / (cycle_ns * 64)
2308 static int fec_enet_us_to_itr_clock(struct net_device
*ndev
, int us
)
2310 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2312 return us
* (fep
->itr_clk_rate
/ 64000) / 1000;
2315 /* Set threshold for interrupt coalescing */
2316 static void fec_enet_itr_coal_set(struct net_device
*ndev
)
2318 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2321 if (!(fep
->quirks
& FEC_QUIRK_HAS_AVB
))
2324 /* Must be greater than zero to avoid unpredictable behavior */
2325 if (!fep
->rx_time_itr
|| !fep
->rx_pkts_itr
||
2326 !fep
->tx_time_itr
|| !fep
->tx_pkts_itr
)
2329 /* Select enet system clock as Interrupt Coalescing
2330 * timer Clock Source
2332 rx_itr
= FEC_ITR_CLK_SEL
;
2333 tx_itr
= FEC_ITR_CLK_SEL
;
2335 /* set ICFT and ICTT */
2336 rx_itr
|= FEC_ITR_ICFT(fep
->rx_pkts_itr
);
2337 rx_itr
|= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev
, fep
->rx_time_itr
));
2338 tx_itr
|= FEC_ITR_ICFT(fep
->tx_pkts_itr
);
2339 tx_itr
|= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev
, fep
->tx_time_itr
));
2341 rx_itr
|= FEC_ITR_EN
;
2342 tx_itr
|= FEC_ITR_EN
;
2344 writel(tx_itr
, fep
->hwp
+ FEC_TXIC0
);
2345 writel(rx_itr
, fep
->hwp
+ FEC_RXIC0
);
2346 writel(tx_itr
, fep
->hwp
+ FEC_TXIC1
);
2347 writel(rx_itr
, fep
->hwp
+ FEC_RXIC1
);
2348 writel(tx_itr
, fep
->hwp
+ FEC_TXIC2
);
2349 writel(rx_itr
, fep
->hwp
+ FEC_RXIC2
);
2353 fec_enet_get_coalesce(struct net_device
*ndev
, struct ethtool_coalesce
*ec
)
2355 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2357 if (!(fep
->quirks
& FEC_QUIRK_HAS_AVB
))
2360 ec
->rx_coalesce_usecs
= fep
->rx_time_itr
;
2361 ec
->rx_max_coalesced_frames
= fep
->rx_pkts_itr
;
2363 ec
->tx_coalesce_usecs
= fep
->tx_time_itr
;
2364 ec
->tx_max_coalesced_frames
= fep
->tx_pkts_itr
;
2370 fec_enet_set_coalesce(struct net_device
*ndev
, struct ethtool_coalesce
*ec
)
2372 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2375 if (!(fep
->quirks
& FEC_QUIRK_HAS_AVB
))
2378 if (ec
->rx_max_coalesced_frames
> 255) {
2379 pr_err("Rx coalesced frames exceed hardware limiation");
2383 if (ec
->tx_max_coalesced_frames
> 255) {
2384 pr_err("Tx coalesced frame exceed hardware limiation");
2388 cycle
= fec_enet_us_to_itr_clock(ndev
, fep
->rx_time_itr
);
2389 if (cycle
> 0xFFFF) {
2390 pr_err("Rx coalesed usec exceeed hardware limiation");
2394 cycle
= fec_enet_us_to_itr_clock(ndev
, fep
->tx_time_itr
);
2395 if (cycle
> 0xFFFF) {
2396 pr_err("Rx coalesed usec exceeed hardware limiation");
2400 fep
->rx_time_itr
= ec
->rx_coalesce_usecs
;
2401 fep
->rx_pkts_itr
= ec
->rx_max_coalesced_frames
;
2403 fep
->tx_time_itr
= ec
->tx_coalesce_usecs
;
2404 fep
->tx_pkts_itr
= ec
->tx_max_coalesced_frames
;
2406 fec_enet_itr_coal_set(ndev
);
2411 static void fec_enet_itr_coal_init(struct net_device
*ndev
)
2413 struct ethtool_coalesce ec
;
2415 ec
.rx_coalesce_usecs
= FEC_ITR_ICTT_DEFAULT
;
2416 ec
.rx_max_coalesced_frames
= FEC_ITR_ICFT_DEFAULT
;
2418 ec
.tx_coalesce_usecs
= FEC_ITR_ICTT_DEFAULT
;
2419 ec
.tx_max_coalesced_frames
= FEC_ITR_ICFT_DEFAULT
;
2421 fec_enet_set_coalesce(ndev
, &ec
);
2424 static int fec_enet_get_tunable(struct net_device
*netdev
,
2425 const struct ethtool_tunable
*tuna
,
2428 struct fec_enet_private
*fep
= netdev_priv(netdev
);
2432 case ETHTOOL_RX_COPYBREAK
:
2433 *(u32
*)data
= fep
->rx_copybreak
;
2443 static int fec_enet_set_tunable(struct net_device
*netdev
,
2444 const struct ethtool_tunable
*tuna
,
2447 struct fec_enet_private
*fep
= netdev_priv(netdev
);
2451 case ETHTOOL_RX_COPYBREAK
:
2452 fep
->rx_copybreak
= *(u32
*)data
;
2463 fec_enet_get_wol(struct net_device
*ndev
, struct ethtool_wolinfo
*wol
)
2465 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2467 if (fep
->wol_flag
& FEC_WOL_HAS_MAGIC_PACKET
) {
2468 wol
->supported
= WAKE_MAGIC
;
2469 wol
->wolopts
= fep
->wol_flag
& FEC_WOL_FLAG_ENABLE
? WAKE_MAGIC
: 0;
2471 wol
->supported
= wol
->wolopts
= 0;
2476 fec_enet_set_wol(struct net_device
*ndev
, struct ethtool_wolinfo
*wol
)
2478 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2480 if (!(fep
->wol_flag
& FEC_WOL_HAS_MAGIC_PACKET
))
2483 if (wol
->wolopts
& ~WAKE_MAGIC
)
2486 device_set_wakeup_enable(&ndev
->dev
, wol
->wolopts
& WAKE_MAGIC
);
2487 if (device_may_wakeup(&ndev
->dev
)) {
2488 fep
->wol_flag
|= FEC_WOL_FLAG_ENABLE
;
2489 if (fep
->irq
[0] > 0)
2490 enable_irq_wake(fep
->irq
[0]);
2492 fep
->wol_flag
&= (~FEC_WOL_FLAG_ENABLE
);
2493 if (fep
->irq
[0] > 0)
2494 disable_irq_wake(fep
->irq
[0]);
2500 static const struct ethtool_ops fec_enet_ethtool_ops
= {
2501 .get_settings
= fec_enet_get_settings
,
2502 .set_settings
= fec_enet_set_settings
,
2503 .get_drvinfo
= fec_enet_get_drvinfo
,
2504 .nway_reset
= fec_enet_nway_reset
,
2505 .get_link
= ethtool_op_get_link
,
2506 .get_coalesce
= fec_enet_get_coalesce
,
2507 .set_coalesce
= fec_enet_set_coalesce
,
2508 #ifndef CONFIG_M5272
2509 .get_pauseparam
= fec_enet_get_pauseparam
,
2510 .set_pauseparam
= fec_enet_set_pauseparam
,
2511 .get_strings
= fec_enet_get_strings
,
2512 .get_ethtool_stats
= fec_enet_get_ethtool_stats
,
2513 .get_sset_count
= fec_enet_get_sset_count
,
2515 .get_ts_info
= fec_enet_get_ts_info
,
2516 .get_tunable
= fec_enet_get_tunable
,
2517 .set_tunable
= fec_enet_set_tunable
,
2518 .get_wol
= fec_enet_get_wol
,
2519 .set_wol
= fec_enet_set_wol
,
2522 static int fec_enet_ioctl(struct net_device
*ndev
, struct ifreq
*rq
, int cmd
)
2524 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2525 struct phy_device
*phydev
= fep
->phy_dev
;
2527 if (!netif_running(ndev
))
2533 if (fep
->bufdesc_ex
) {
2534 if (cmd
== SIOCSHWTSTAMP
)
2535 return fec_ptp_set(ndev
, rq
);
2536 if (cmd
== SIOCGHWTSTAMP
)
2537 return fec_ptp_get(ndev
, rq
);
2540 return phy_mii_ioctl(phydev
, rq
, cmd
);
2543 static void fec_enet_free_buffers(struct net_device
*ndev
)
2545 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2547 struct sk_buff
*skb
;
2548 struct bufdesc
*bdp
;
2549 struct fec_enet_priv_tx_q
*txq
;
2550 struct fec_enet_priv_rx_q
*rxq
;
2553 for (q
= 0; q
< fep
->num_rx_queues
; q
++) {
2554 rxq
= fep
->rx_queue
[q
];
2555 bdp
= rxq
->rx_bd_base
;
2556 for (i
= 0; i
< rxq
->rx_ring_size
; i
++) {
2557 skb
= rxq
->rx_skbuff
[i
];
2558 rxq
->rx_skbuff
[i
] = NULL
;
2560 dma_unmap_single(&fep
->pdev
->dev
,
2562 FEC_ENET_RX_FRSIZE
- fep
->rx_align
,
2566 bdp
= fec_enet_get_nextdesc(bdp
, fep
, q
);
2570 for (q
= 0; q
< fep
->num_tx_queues
; q
++) {
2571 txq
= fep
->tx_queue
[q
];
2572 bdp
= txq
->tx_bd_base
;
2573 for (i
= 0; i
< txq
->tx_ring_size
; i
++) {
2574 kfree(txq
->tx_bounce
[i
]);
2575 txq
->tx_bounce
[i
] = NULL
;
2576 skb
= txq
->tx_skbuff
[i
];
2577 txq
->tx_skbuff
[i
] = NULL
;
2583 static void fec_enet_free_queue(struct net_device
*ndev
)
2585 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2587 struct fec_enet_priv_tx_q
*txq
;
2589 for (i
= 0; i
< fep
->num_tx_queues
; i
++)
2590 if (fep
->tx_queue
[i
] && fep
->tx_queue
[i
]->tso_hdrs
) {
2591 txq
= fep
->tx_queue
[i
];
2592 dma_free_coherent(NULL
,
2593 txq
->tx_ring_size
* TSO_HEADER_SIZE
,
2598 for (i
= 0; i
< fep
->num_rx_queues
; i
++)
2599 kfree(fep
->rx_queue
[i
]);
2600 for (i
= 0; i
< fep
->num_tx_queues
; i
++)
2601 kfree(fep
->tx_queue
[i
]);
2604 static int fec_enet_alloc_queue(struct net_device
*ndev
)
2606 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2609 struct fec_enet_priv_tx_q
*txq
;
2611 for (i
= 0; i
< fep
->num_tx_queues
; i
++) {
2612 txq
= kzalloc(sizeof(*txq
), GFP_KERNEL
);
2618 fep
->tx_queue
[i
] = txq
;
2619 txq
->tx_ring_size
= TX_RING_SIZE
;
2620 fep
->total_tx_ring_size
+= fep
->tx_queue
[i
]->tx_ring_size
;
2622 txq
->tx_stop_threshold
= FEC_MAX_SKB_DESCS
;
2623 txq
->tx_wake_threshold
=
2624 (txq
->tx_ring_size
- txq
->tx_stop_threshold
) / 2;
2626 txq
->tso_hdrs
= dma_alloc_coherent(NULL
,
2627 txq
->tx_ring_size
* TSO_HEADER_SIZE
,
2630 if (!txq
->tso_hdrs
) {
2636 for (i
= 0; i
< fep
->num_rx_queues
; i
++) {
2637 fep
->rx_queue
[i
] = kzalloc(sizeof(*fep
->rx_queue
[i
]),
2639 if (!fep
->rx_queue
[i
]) {
2644 fep
->rx_queue
[i
]->rx_ring_size
= RX_RING_SIZE
;
2645 fep
->total_rx_ring_size
+= fep
->rx_queue
[i
]->rx_ring_size
;
2650 fec_enet_free_queue(ndev
);
2655 fec_enet_alloc_rxq_buffers(struct net_device
*ndev
, unsigned int queue
)
2657 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2659 struct sk_buff
*skb
;
2660 struct bufdesc
*bdp
;
2661 struct fec_enet_priv_rx_q
*rxq
;
2663 rxq
= fep
->rx_queue
[queue
];
2664 bdp
= rxq
->rx_bd_base
;
2665 for (i
= 0; i
< rxq
->rx_ring_size
; i
++) {
2666 skb
= netdev_alloc_skb(ndev
, FEC_ENET_RX_FRSIZE
);
2670 if (fec_enet_new_rxbdp(ndev
, bdp
, skb
)) {
2675 rxq
->rx_skbuff
[i
] = skb
;
2676 bdp
->cbd_sc
= BD_ENET_RX_EMPTY
;
2678 if (fep
->bufdesc_ex
) {
2679 struct bufdesc_ex
*ebdp
= (struct bufdesc_ex
*)bdp
;
2680 ebdp
->cbd_esc
= BD_ENET_RX_INT
;
2683 bdp
= fec_enet_get_nextdesc(bdp
, fep
, queue
);
2686 /* Set the last buffer to wrap. */
2687 bdp
= fec_enet_get_prevdesc(bdp
, fep
, queue
);
2688 bdp
->cbd_sc
|= BD_SC_WRAP
;
2692 fec_enet_free_buffers(ndev
);
2697 fec_enet_alloc_txq_buffers(struct net_device
*ndev
, unsigned int queue
)
2699 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2701 struct bufdesc
*bdp
;
2702 struct fec_enet_priv_tx_q
*txq
;
2704 txq
= fep
->tx_queue
[queue
];
2705 bdp
= txq
->tx_bd_base
;
2706 for (i
= 0; i
< txq
->tx_ring_size
; i
++) {
2707 txq
->tx_bounce
[i
] = kmalloc(FEC_ENET_TX_FRSIZE
, GFP_KERNEL
);
2708 if (!txq
->tx_bounce
[i
])
2712 bdp
->cbd_bufaddr
= 0;
2714 if (fep
->bufdesc_ex
) {
2715 struct bufdesc_ex
*ebdp
= (struct bufdesc_ex
*)bdp
;
2716 ebdp
->cbd_esc
= BD_ENET_TX_INT
;
2719 bdp
= fec_enet_get_nextdesc(bdp
, fep
, queue
);
2722 /* Set the last buffer to wrap. */
2723 bdp
= fec_enet_get_prevdesc(bdp
, fep
, queue
);
2724 bdp
->cbd_sc
|= BD_SC_WRAP
;
2729 fec_enet_free_buffers(ndev
);
2733 static int fec_enet_alloc_buffers(struct net_device
*ndev
)
2735 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2738 for (i
= 0; i
< fep
->num_rx_queues
; i
++)
2739 if (fec_enet_alloc_rxq_buffers(ndev
, i
))
2742 for (i
= 0; i
< fep
->num_tx_queues
; i
++)
2743 if (fec_enet_alloc_txq_buffers(ndev
, i
))
2749 fec_enet_open(struct net_device
*ndev
)
2751 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2754 pinctrl_pm_select_default_state(&fep
->pdev
->dev
);
2755 ret
= fec_enet_clk_enable(ndev
, true);
2759 /* I should reset the ring buffers here, but I don't yet know
2760 * a simple way to do that.
2763 ret
= fec_enet_alloc_buffers(ndev
);
2765 goto err_enet_alloc
;
2767 /* Probe and connect to PHY when open the interface */
2768 ret
= fec_enet_mii_probe(ndev
);
2770 goto err_enet_mii_probe
;
2773 napi_enable(&fep
->napi
);
2774 phy_start(fep
->phy_dev
);
2775 netif_tx_start_all_queues(ndev
);
2777 device_set_wakeup_enable(&ndev
->dev
, fep
->wol_flag
&
2778 FEC_WOL_FLAG_ENABLE
);
2783 fec_enet_free_buffers(ndev
);
2785 fec_enet_clk_enable(ndev
, false);
2786 pinctrl_pm_select_sleep_state(&fep
->pdev
->dev
);
2791 fec_enet_close(struct net_device
*ndev
)
2793 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2795 phy_stop(fep
->phy_dev
);
2797 if (netif_device_present(ndev
)) {
2798 napi_disable(&fep
->napi
);
2799 netif_tx_disable(ndev
);
2803 phy_disconnect(fep
->phy_dev
);
2804 fep
->phy_dev
= NULL
;
2806 fec_enet_clk_enable(ndev
, false);
2807 pinctrl_pm_select_sleep_state(&fep
->pdev
->dev
);
2808 fec_enet_free_buffers(ndev
);
2813 /* Set or clear the multicast filter for this adaptor.
2814 * Skeleton taken from sunlance driver.
2815 * The CPM Ethernet implementation allows Multicast as well as individual
2816 * MAC address filtering. Some of the drivers check to make sure it is
2817 * a group multicast address, and discard those that are not. I guess I
2818 * will do the same for now, but just remove the test if you want
2819 * individual filtering as well (do the upper net layers want or support
2820 * this kind of feature?).
2823 #define HASH_BITS 6 /* #bits in hash */
2824 #define CRC32_POLY 0xEDB88320
2826 static void set_multicast_list(struct net_device
*ndev
)
2828 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2829 struct netdev_hw_addr
*ha
;
2830 unsigned int i
, bit
, data
, crc
, tmp
;
2833 if (ndev
->flags
& IFF_PROMISC
) {
2834 tmp
= readl(fep
->hwp
+ FEC_R_CNTRL
);
2836 writel(tmp
, fep
->hwp
+ FEC_R_CNTRL
);
2840 tmp
= readl(fep
->hwp
+ FEC_R_CNTRL
);
2842 writel(tmp
, fep
->hwp
+ FEC_R_CNTRL
);
2844 if (ndev
->flags
& IFF_ALLMULTI
) {
2845 /* Catch all multicast addresses, so set the
2848 writel(0xffffffff, fep
->hwp
+ FEC_GRP_HASH_TABLE_HIGH
);
2849 writel(0xffffffff, fep
->hwp
+ FEC_GRP_HASH_TABLE_LOW
);
2854 /* Clear filter and add the addresses in hash register
2856 writel(0, fep
->hwp
+ FEC_GRP_HASH_TABLE_HIGH
);
2857 writel(0, fep
->hwp
+ FEC_GRP_HASH_TABLE_LOW
);
2859 netdev_for_each_mc_addr(ha
, ndev
) {
2860 /* calculate crc32 value of mac address */
2863 for (i
= 0; i
< ndev
->addr_len
; i
++) {
2865 for (bit
= 0; bit
< 8; bit
++, data
>>= 1) {
2867 (((crc
^ data
) & 1) ? CRC32_POLY
: 0);
2871 /* only upper 6 bits (HASH_BITS) are used
2872 * which point to specific bit in he hash registers
2874 hash
= (crc
>> (32 - HASH_BITS
)) & 0x3f;
2877 tmp
= readl(fep
->hwp
+ FEC_GRP_HASH_TABLE_HIGH
);
2878 tmp
|= 1 << (hash
- 32);
2879 writel(tmp
, fep
->hwp
+ FEC_GRP_HASH_TABLE_HIGH
);
2881 tmp
= readl(fep
->hwp
+ FEC_GRP_HASH_TABLE_LOW
);
2883 writel(tmp
, fep
->hwp
+ FEC_GRP_HASH_TABLE_LOW
);
2888 /* Set a MAC change in hardware. */
2890 fec_set_mac_address(struct net_device
*ndev
, void *p
)
2892 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2893 struct sockaddr
*addr
= p
;
2896 if (!is_valid_ether_addr(addr
->sa_data
))
2897 return -EADDRNOTAVAIL
;
2898 memcpy(ndev
->dev_addr
, addr
->sa_data
, ndev
->addr_len
);
2901 writel(ndev
->dev_addr
[3] | (ndev
->dev_addr
[2] << 8) |
2902 (ndev
->dev_addr
[1] << 16) | (ndev
->dev_addr
[0] << 24),
2903 fep
->hwp
+ FEC_ADDR_LOW
);
2904 writel((ndev
->dev_addr
[5] << 16) | (ndev
->dev_addr
[4] << 24),
2905 fep
->hwp
+ FEC_ADDR_HIGH
);
2909 #ifdef CONFIG_NET_POLL_CONTROLLER
2911 * fec_poll_controller - FEC Poll controller function
2912 * @dev: The FEC network adapter
2914 * Polled functionality used by netconsole and others in non interrupt mode
2917 static void fec_poll_controller(struct net_device
*dev
)
2920 struct fec_enet_private
*fep
= netdev_priv(dev
);
2922 for (i
= 0; i
< FEC_IRQ_NUM
; i
++) {
2923 if (fep
->irq
[i
] > 0) {
2924 disable_irq(fep
->irq
[i
]);
2925 fec_enet_interrupt(fep
->irq
[i
], dev
);
2926 enable_irq(fep
->irq
[i
]);
2932 #define FEATURES_NEED_QUIESCE NETIF_F_RXCSUM
2933 static inline void fec_enet_set_netdev_features(struct net_device
*netdev
,
2934 netdev_features_t features
)
2936 struct fec_enet_private
*fep
= netdev_priv(netdev
);
2937 netdev_features_t changed
= features
^ netdev
->features
;
2939 netdev
->features
= features
;
2941 /* Receive checksum has been changed */
2942 if (changed
& NETIF_F_RXCSUM
) {
2943 if (features
& NETIF_F_RXCSUM
)
2944 fep
->csum_flags
|= FLAG_RX_CSUM_ENABLED
;
2946 fep
->csum_flags
&= ~FLAG_RX_CSUM_ENABLED
;
2950 static int fec_set_features(struct net_device
*netdev
,
2951 netdev_features_t features
)
2953 struct fec_enet_private
*fep
= netdev_priv(netdev
);
2954 netdev_features_t changed
= features
^ netdev
->features
;
2956 if (netif_running(netdev
) && changed
& FEATURES_NEED_QUIESCE
) {
2957 napi_disable(&fep
->napi
);
2958 netif_tx_lock_bh(netdev
);
2960 fec_enet_set_netdev_features(netdev
, features
);
2961 fec_restart(netdev
);
2962 netif_tx_wake_all_queues(netdev
);
2963 netif_tx_unlock_bh(netdev
);
2964 napi_enable(&fep
->napi
);
2966 fec_enet_set_netdev_features(netdev
, features
);
2972 static const struct net_device_ops fec_netdev_ops
= {
2973 .ndo_open
= fec_enet_open
,
2974 .ndo_stop
= fec_enet_close
,
2975 .ndo_start_xmit
= fec_enet_start_xmit
,
2976 .ndo_set_rx_mode
= set_multicast_list
,
2977 .ndo_change_mtu
= eth_change_mtu
,
2978 .ndo_validate_addr
= eth_validate_addr
,
2979 .ndo_tx_timeout
= fec_timeout
,
2980 .ndo_set_mac_address
= fec_set_mac_address
,
2981 .ndo_do_ioctl
= fec_enet_ioctl
,
2982 #ifdef CONFIG_NET_POLL_CONTROLLER
2983 .ndo_poll_controller
= fec_poll_controller
,
2985 .ndo_set_features
= fec_set_features
,
2989 * XXX: We need to clean up on failure exits here.
2992 static int fec_enet_init(struct net_device
*ndev
)
2994 struct fec_enet_private
*fep
= netdev_priv(ndev
);
2995 struct fec_enet_priv_tx_q
*txq
;
2996 struct fec_enet_priv_rx_q
*rxq
;
2997 struct bufdesc
*cbd_base
;
3002 #if defined(CONFIG_ARM)
3003 fep
->rx_align
= 0xf;
3004 fep
->tx_align
= 0xf;
3006 fep
->rx_align
= 0x3;
3007 fep
->tx_align
= 0x3;
3010 fec_enet_alloc_queue(ndev
);
3012 if (fep
->bufdesc_ex
)
3013 fep
->bufdesc_size
= sizeof(struct bufdesc_ex
);
3015 fep
->bufdesc_size
= sizeof(struct bufdesc
);
3016 bd_size
= (fep
->total_tx_ring_size
+ fep
->total_rx_ring_size
) *
3019 /* Allocate memory for buffer descriptors. */
3020 cbd_base
= dma_alloc_coherent(NULL
, bd_size
, &bd_dma
,
3026 memset(cbd_base
, 0, bd_size
);
3028 /* Get the Ethernet address */
3030 /* make sure MAC we just acquired is programmed into the hw */
3031 fec_set_mac_address(ndev
, NULL
);
3033 /* Set receive and transmit descriptor base. */
3034 for (i
= 0; i
< fep
->num_rx_queues
; i
++) {
3035 rxq
= fep
->rx_queue
[i
];
3037 rxq
->rx_bd_base
= (struct bufdesc
*)cbd_base
;
3038 rxq
->bd_dma
= bd_dma
;
3039 if (fep
->bufdesc_ex
) {
3040 bd_dma
+= sizeof(struct bufdesc_ex
) * rxq
->rx_ring_size
;
3041 cbd_base
= (struct bufdesc
*)
3042 (((struct bufdesc_ex
*)cbd_base
) + rxq
->rx_ring_size
);
3044 bd_dma
+= sizeof(struct bufdesc
) * rxq
->rx_ring_size
;
3045 cbd_base
+= rxq
->rx_ring_size
;
3049 for (i
= 0; i
< fep
->num_tx_queues
; i
++) {
3050 txq
= fep
->tx_queue
[i
];
3052 txq
->tx_bd_base
= (struct bufdesc
*)cbd_base
;
3053 txq
->bd_dma
= bd_dma
;
3054 if (fep
->bufdesc_ex
) {
3055 bd_dma
+= sizeof(struct bufdesc_ex
) * txq
->tx_ring_size
;
3056 cbd_base
= (struct bufdesc
*)
3057 (((struct bufdesc_ex
*)cbd_base
) + txq
->tx_ring_size
);
3059 bd_dma
+= sizeof(struct bufdesc
) * txq
->tx_ring_size
;
3060 cbd_base
+= txq
->tx_ring_size
;
3065 /* The FEC Ethernet specific entries in the device structure */
3066 ndev
->watchdog_timeo
= TX_TIMEOUT
;
3067 ndev
->netdev_ops
= &fec_netdev_ops
;
3068 ndev
->ethtool_ops
= &fec_enet_ethtool_ops
;
3070 writel(FEC_RX_DISABLED_IMASK
, fep
->hwp
+ FEC_IMASK
);
3071 netif_napi_add(ndev
, &fep
->napi
, fec_enet_rx_napi
, NAPI_POLL_WEIGHT
);
3073 if (fep
->quirks
& FEC_QUIRK_HAS_VLAN
)
3074 /* enable hw VLAN support */
3075 ndev
->features
|= NETIF_F_HW_VLAN_CTAG_RX
;
3077 if (fep
->quirks
& FEC_QUIRK_HAS_CSUM
) {
3078 ndev
->gso_max_segs
= FEC_MAX_TSO_SEGS
;
3080 /* enable hw accelerator */
3081 ndev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
3082 | NETIF_F_RXCSUM
| NETIF_F_SG
| NETIF_F_TSO
);
3083 fep
->csum_flags
|= FLAG_RX_CSUM_ENABLED
;
3086 if (fep
->quirks
& FEC_QUIRK_HAS_AVB
) {
3088 fep
->rx_align
= 0x3f;
3091 ndev
->hw_features
= ndev
->features
;
3099 static void fec_reset_phy(struct platform_device
*pdev
)
3103 struct device_node
*np
= pdev
->dev
.of_node
;
3108 of_property_read_u32(np
, "phy-reset-duration", &msec
);
3109 /* A sane reset duration should not be longer than 1s */
3113 phy_reset
= of_get_named_gpio(np
, "phy-reset-gpios", 0);
3114 if (!gpio_is_valid(phy_reset
))
3117 err
= devm_gpio_request_one(&pdev
->dev
, phy_reset
,
3118 GPIOF_OUT_INIT_LOW
, "phy-reset");
3120 dev_err(&pdev
->dev
, "failed to get phy-reset-gpios: %d\n", err
);
3124 gpio_set_value(phy_reset
, 1);
3126 #else /* CONFIG_OF */
3127 static void fec_reset_phy(struct platform_device
*pdev
)
3130 * In case of platform probe, the reset has been done
3134 #endif /* CONFIG_OF */
3137 fec_enet_get_queue_num(struct platform_device
*pdev
, int *num_tx
, int *num_rx
)
3139 struct device_node
*np
= pdev
->dev
.of_node
;
3142 *num_tx
= *num_rx
= 1;
3144 if (!np
|| !of_device_is_available(np
))
3147 /* parse the num of tx and rx queues */
3148 err
= of_property_read_u32(np
, "fsl,num-tx-queues", num_tx
);
3152 err
= of_property_read_u32(np
, "fsl,num-rx-queues", num_rx
);
3156 if (*num_tx
< 1 || *num_tx
> FEC_ENET_MAX_TX_QS
) {
3157 dev_warn(&pdev
->dev
, "Invalid num_tx(=%d), fall back to 1\n",
3163 if (*num_rx
< 1 || *num_rx
> FEC_ENET_MAX_RX_QS
) {
3164 dev_warn(&pdev
->dev
, "Invalid num_rx(=%d), fall back to 1\n",
3173 fec_probe(struct platform_device
*pdev
)
3175 struct fec_enet_private
*fep
;
3176 struct fec_platform_data
*pdata
;
3177 struct net_device
*ndev
;
3178 int i
, irq
, ret
= 0;
3180 const struct of_device_id
*of_id
;
3182 struct device_node
*np
= pdev
->dev
.of_node
, *phy_node
;
3186 fec_enet_get_queue_num(pdev
, &num_tx_qs
, &num_rx_qs
);
3188 /* Init network device */
3189 ndev
= alloc_etherdev_mqs(sizeof(struct fec_enet_private
),
3190 num_tx_qs
, num_rx_qs
);
3194 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
3196 /* setup board info structure */
3197 fep
= netdev_priv(ndev
);
3199 of_id
= of_match_device(fec_dt_ids
, &pdev
->dev
);
3201 pdev
->id_entry
= of_id
->data
;
3202 fep
->quirks
= pdev
->id_entry
->driver_data
;
3205 fep
->num_rx_queues
= num_rx_qs
;
3206 fep
->num_tx_queues
= num_tx_qs
;
3208 #if !defined(CONFIG_M5272)
3209 /* default enable pause frame auto negotiation */
3210 if (fep
->quirks
& FEC_QUIRK_HAS_GBIT
)
3211 fep
->pause_flag
|= FEC_PAUSE_FLAG_AUTONEG
;
3214 /* Select default pin state */
3215 pinctrl_pm_select_default_state(&pdev
->dev
);
3217 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
3218 fep
->hwp
= devm_ioremap_resource(&pdev
->dev
, r
);
3219 if (IS_ERR(fep
->hwp
)) {
3220 ret
= PTR_ERR(fep
->hwp
);
3221 goto failed_ioremap
;
3225 fep
->dev_id
= dev_id
++;
3227 platform_set_drvdata(pdev
, ndev
);
3229 if (of_get_property(np
, "fsl,magic-packet", NULL
))
3230 fep
->wol_flag
|= FEC_WOL_HAS_MAGIC_PACKET
;
3232 phy_node
= of_parse_phandle(np
, "phy-handle", 0);
3233 if (!phy_node
&& of_phy_is_fixed_link(np
)) {
3234 ret
= of_phy_register_fixed_link(np
);
3237 "broken fixed-link specification\n");
3240 phy_node
= of_node_get(np
);
3242 fep
->phy_node
= phy_node
;
3244 ret
= of_get_phy_mode(pdev
->dev
.of_node
);
3246 pdata
= dev_get_platdata(&pdev
->dev
);
3248 fep
->phy_interface
= pdata
->phy
;
3250 fep
->phy_interface
= PHY_INTERFACE_MODE_MII
;
3252 fep
->phy_interface
= ret
;
3255 fep
->clk_ipg
= devm_clk_get(&pdev
->dev
, "ipg");
3256 if (IS_ERR(fep
->clk_ipg
)) {
3257 ret
= PTR_ERR(fep
->clk_ipg
);
3261 fep
->clk_ahb
= devm_clk_get(&pdev
->dev
, "ahb");
3262 if (IS_ERR(fep
->clk_ahb
)) {
3263 ret
= PTR_ERR(fep
->clk_ahb
);
3267 fep
->itr_clk_rate
= clk_get_rate(fep
->clk_ahb
);
3269 /* enet_out is optional, depends on board */
3270 fep
->clk_enet_out
= devm_clk_get(&pdev
->dev
, "enet_out");
3271 if (IS_ERR(fep
->clk_enet_out
))
3272 fep
->clk_enet_out
= NULL
;
3274 fep
->ptp_clk_on
= false;
3275 mutex_init(&fep
->ptp_clk_mutex
);
3277 /* clk_ref is optional, depends on board */
3278 fep
->clk_ref
= devm_clk_get(&pdev
->dev
, "enet_clk_ref");
3279 if (IS_ERR(fep
->clk_ref
))
3280 fep
->clk_ref
= NULL
;
3282 fep
->bufdesc_ex
= fep
->quirks
& FEC_QUIRK_HAS_BUFDESC_EX
;
3283 fep
->clk_ptp
= devm_clk_get(&pdev
->dev
, "ptp");
3284 if (IS_ERR(fep
->clk_ptp
)) {
3285 fep
->clk_ptp
= NULL
;
3286 fep
->bufdesc_ex
= false;
3289 ret
= fec_enet_clk_enable(ndev
, true);
3293 fep
->reg_phy
= devm_regulator_get(&pdev
->dev
, "phy");
3294 if (!IS_ERR(fep
->reg_phy
)) {
3295 ret
= regulator_enable(fep
->reg_phy
);
3298 "Failed to enable phy regulator: %d\n", ret
);
3299 goto failed_regulator
;
3302 fep
->reg_phy
= NULL
;
3305 fec_reset_phy(pdev
);
3307 if (fep
->bufdesc_ex
)
3310 ret
= fec_enet_init(ndev
);
3314 for (i
= 0; i
< FEC_IRQ_NUM
; i
++) {
3315 irq
= platform_get_irq(pdev
, i
);
3322 ret
= devm_request_irq(&pdev
->dev
, irq
, fec_enet_interrupt
,
3323 0, pdev
->name
, ndev
);
3330 init_completion(&fep
->mdio_done
);
3331 ret
= fec_enet_mii_init(pdev
);
3333 goto failed_mii_init
;
3335 /* Carrier starts down, phylib will bring it up */
3336 netif_carrier_off(ndev
);
3337 fec_enet_clk_enable(ndev
, false);
3338 pinctrl_pm_select_sleep_state(&pdev
->dev
);
3340 ret
= register_netdev(ndev
);
3342 goto failed_register
;
3344 device_init_wakeup(&ndev
->dev
, fep
->wol_flag
&
3345 FEC_WOL_HAS_MAGIC_PACKET
);
3347 if (fep
->bufdesc_ex
&& fep
->ptp_clock
)
3348 netdev_info(ndev
, "registered PHC device %d\n", fep
->dev_id
);
3350 fep
->rx_copybreak
= COPYBREAK_DEFAULT
;
3351 INIT_WORK(&fep
->tx_timeout_work
, fec_enet_timeout_work
);
3355 fec_enet_mii_remove(fep
);
3360 regulator_disable(fep
->reg_phy
);
3362 fec_enet_clk_enable(ndev
, false);
3365 of_node_put(phy_node
);
3373 fec_drv_remove(struct platform_device
*pdev
)
3375 struct net_device
*ndev
= platform_get_drvdata(pdev
);
3376 struct fec_enet_private
*fep
= netdev_priv(ndev
);
3378 cancel_delayed_work_sync(&fep
->time_keep
);
3379 cancel_work_sync(&fep
->tx_timeout_work
);
3380 unregister_netdev(ndev
);
3381 fec_enet_mii_remove(fep
);
3383 regulator_disable(fep
->reg_phy
);
3385 ptp_clock_unregister(fep
->ptp_clock
);
3386 fec_enet_clk_enable(ndev
, false);
3387 of_node_put(fep
->phy_node
);
3393 static int __maybe_unused
fec_suspend(struct device
*dev
)
3395 struct net_device
*ndev
= dev_get_drvdata(dev
);
3396 struct fec_enet_private
*fep
= netdev_priv(ndev
);
3399 if (netif_running(ndev
)) {
3400 if (fep
->wol_flag
& FEC_WOL_FLAG_ENABLE
)
3401 fep
->wol_flag
|= FEC_WOL_FLAG_SLEEP_ON
;
3402 phy_stop(fep
->phy_dev
);
3403 napi_disable(&fep
->napi
);
3404 netif_tx_lock_bh(ndev
);
3405 netif_device_detach(ndev
);
3406 netif_tx_unlock_bh(ndev
);
3408 fec_enet_clk_enable(ndev
, false);
3409 if (!(fep
->wol_flag
& FEC_WOL_FLAG_ENABLE
))
3410 pinctrl_pm_select_sleep_state(&fep
->pdev
->dev
);
3414 if (fep
->reg_phy
&& !(fep
->wol_flag
& FEC_WOL_FLAG_ENABLE
))
3415 regulator_disable(fep
->reg_phy
);
3417 /* SOC supply clock to phy, when clock is disabled, phy link down
3418 * SOC control phy regulator, when regulator is disabled, phy link down
3420 if (fep
->clk_enet_out
|| fep
->reg_phy
)
3426 static int __maybe_unused
fec_resume(struct device
*dev
)
3428 struct net_device
*ndev
= dev_get_drvdata(dev
);
3429 struct fec_enet_private
*fep
= netdev_priv(ndev
);
3430 struct fec_platform_data
*pdata
= fep
->pdev
->dev
.platform_data
;
3434 if (fep
->reg_phy
&& !(fep
->wol_flag
& FEC_WOL_FLAG_ENABLE
)) {
3435 ret
= regulator_enable(fep
->reg_phy
);
3441 if (netif_running(ndev
)) {
3442 ret
= fec_enet_clk_enable(ndev
, true);
3447 if (fep
->wol_flag
& FEC_WOL_FLAG_ENABLE
) {
3448 if (pdata
&& pdata
->sleep_mode_enable
)
3449 pdata
->sleep_mode_enable(false);
3450 val
= readl(fep
->hwp
+ FEC_ECNTRL
);
3451 val
&= ~(FEC_ECR_MAGICEN
| FEC_ECR_SLEEP
);
3452 writel(val
, fep
->hwp
+ FEC_ECNTRL
);
3453 fep
->wol_flag
&= ~FEC_WOL_FLAG_SLEEP_ON
;
3455 pinctrl_pm_select_default_state(&fep
->pdev
->dev
);
3458 netif_tx_lock_bh(ndev
);
3459 netif_device_attach(ndev
);
3460 netif_tx_unlock_bh(ndev
);
3461 napi_enable(&fep
->napi
);
3462 phy_start(fep
->phy_dev
);
3470 regulator_disable(fep
->reg_phy
);
3474 static SIMPLE_DEV_PM_OPS(fec_pm_ops
, fec_suspend
, fec_resume
);
3476 static struct platform_driver fec_driver
= {
3478 .name
= DRIVER_NAME
,
3480 .of_match_table
= fec_dt_ids
,
3482 .id_table
= fec_devtype
,
3484 .remove
= fec_drv_remove
,
3487 module_platform_driver(fec_driver
);
3489 MODULE_ALIAS("platform:"DRIVER_NAME
);
3490 MODULE_LICENSE("GPL");