drivers/net/ethernet/freescale/fec_ptp.c

   1 /*
   2  * Fast Ethernet Controller (ENET) PTP driver for MX6x.
   3  *
   4  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along with
  16  * this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18  */
  19
  20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  21
  22 #include <linux/module.h>
  23 #include <linux/kernel.h>
  24 #include <linux/string.h>
  25 #include <linux/ptrace.h>
  26 #include <linux/errno.h>
  27 #include <linux/ioport.h>
  28 #include <linux/slab.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/pci.h>
  31 #include <linux/delay.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/etherdevice.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/spinlock.h>
  36 #include <linux/workqueue.h>
  37 #include <linux/bitops.h>
  38 #include <linux/io.h>
  39 #include <linux/irq.h>
  40 #include <linux/clk.h>
  41 #include <linux/platform_device.h>
  42 #include <linux/phy.h>
  43 #include <linux/fec.h>
  44 #include <linux/of.h>
  45 #include <linux/of_device.h>
  46 #include <linux/of_gpio.h>
  47 #include <linux/of_net.h>
  48
  49 #include "fec.h"
  50
  51 /* FEC 1588 register bits */
  52 #define FEC_T_CTRL_SLAVE                0x00002000
  53 #define FEC_T_CTRL_CAPTURE              0x00000800
  54 #define FEC_T_CTRL_RESTART              0x00000200
  55 #define FEC_T_CTRL_PERIOD_RST           0x00000030
  56 #define FEC_T_CTRL_PERIOD_EN            0x00000010
  57 #define FEC_T_CTRL_ENABLE               0x00000001
  58
  59 #define FEC_T_INC_MASK                  0x0000007f
  60 #define FEC_T_INC_OFFSET                0
  61 #define FEC_T_INC_CORR_MASK             0x00007f00
  62 #define FEC_T_INC_CORR_OFFSET           8
  63
  64 #define FEC_ATIME_CTRL          0x400
  65 #define FEC_ATIME               0x404
  66 #define FEC_ATIME_EVT_OFFSET    0x408
  67 #define FEC_ATIME_EVT_PERIOD    0x40c
  68 #define FEC_ATIME_CORR          0x410
  69 #define FEC_ATIME_INC           0x414
  70 #define FEC_TS_TIMESTAMP        0x418
  71
  72 #define FEC_CC_MULT     (1 << 31)
  73 /**
  74  * fec_ptp_read - read raw cycle counter (to be used by time counter)
  75  * @cc: the cyclecounter structure
  76  *
  77  * this function reads the cyclecounter registers and is called by the
  78  * cyclecounter structure used to construct a ns counter from the
  79  * arbitrary fixed point registers
  80  */
  81 static cycle_t fec_ptp_read(const struct cyclecounter *cc)
  82 {
  83         struct fec_enet_private *fep =
  84                 container_of(cc, struct fec_enet_private, cc);
  85         u32 tempval;
  86
  87         tempval = readl(fep->hwp + FEC_ATIME_CTRL);
  88         tempval |= FEC_T_CTRL_CAPTURE;
  89         writel(tempval, fep->hwp + FEC_ATIME_CTRL);
  90
  91         return readl(fep->hwp + FEC_ATIME);
  92 }
  93
  94 /**
  95  * fec_ptp_start_cyclecounter - create the cycle counter from hw
  96  * @ndev: network device
  97  *
  98  * this function initializes the timecounter and cyclecounter
  99  * structures for use in generated a ns counter from the arbitrary
 100  * fixed point cycles registers in the hardware.
 101  */
 102 void fec_ptp_start_cyclecounter(struct net_device *ndev)
 103 {
 104         struct fec_enet_private *fep = netdev_priv(ndev);
 105         unsigned long flags;
 106         int inc;
 107
 108         inc = 1000000000 / fep->cycle_speed;
 109
 110         /* grab the ptp lock */
 111         spin_lock_irqsave(&fep->tmreg_lock, flags);
 112
 113         /* 1ns counter */
 114         writel(inc << FEC_T_INC_OFFSET, fep->hwp + FEC_ATIME_INC);
 115
 116         /* use free running count */
 117         writel(0, fep->hwp + FEC_ATIME_EVT_PERIOD);
 118
 119         writel(FEC_T_CTRL_ENABLE, fep->hwp + FEC_ATIME_CTRL);
 120
 121         memset(&fep->cc, 0, sizeof(fep->cc));
 122         fep->cc.read = fec_ptp_read;
 123         fep->cc.mask = CLOCKSOURCE_MASK(32);
 124         fep->cc.shift = 31;
 125         fep->cc.mult = FEC_CC_MULT;
 126
 127         /* reset the ns time counter */
 128         timecounter_init(&fep->tc, &fep->cc, ktime_to_ns(ktime_get_real()));
 129
 130         spin_unlock_irqrestore(&fep->tmreg_lock, flags);
 131 }
 132
 133 /**
 134  * fec_ptp_adjfreq - adjust ptp cycle frequency
 135  * @ptp: the ptp clock structure
 136  * @ppb: parts per billion adjustment from base
 137  *
 138  * Adjust the frequency of the ptp cycle counter by the
 139  * indicated ppb from the base frequency.
 140  *
 141  * Because ENET hardware frequency adjust is complex,
 142  * using software method to do that.
 143  */
 144 static int fec_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
 145 {
 146         u64 diff;
 147         unsigned long flags;
 148         int neg_adj = 0;
 149         u32 mult = FEC_CC_MULT;
 150
 151         struct fec_enet_private *fep =
 152             container_of(ptp, struct fec_enet_private, ptp_caps);
 153
 154         if (ppb < 0) {
 155                 ppb = -ppb;
 156                 neg_adj = 1;
 157         }
 158
 159         diff = mult;
 160         diff *= ppb;
 161         diff = div_u64(diff, 1000000000ULL);
 162
 163         spin_lock_irqsave(&fep->tmreg_lock, flags);
 164         /*
 165          * dummy read to set cycle_last in tc to now.
 166          * So use adjusted mult to calculate when next call
 167          * timercounter_read.
 168          */
 169         timecounter_read(&fep->tc);
 170
 171         fep->cc.mult = neg_adj ? mult - diff : mult + diff;
 172
 173         spin_unlock_irqrestore(&fep->tmreg_lock, flags);
 174
 175         return 0;
 176 }
 177
 178 /**
 179  * fec_ptp_adjtime
 180  * @ptp: the ptp clock structure
 181  * @delta: offset to adjust the cycle counter by
 182  *
 183  * adjust the timer by resetting the timecounter structure.
 184  */
 185 static int fec_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
 186 {
 187         struct fec_enet_private *fep =
 188             container_of(ptp, struct fec_enet_private, ptp_caps);
 189         unsigned long flags;
 190         u64 now;
 191
 192         spin_lock_irqsave(&fep->tmreg_lock, flags);
 193
 194         now = timecounter_read(&fep->tc);
 195         now += delta;
 196
 197         /* reset the timecounter */
 198         timecounter_init(&fep->tc, &fep->cc, now);
 199
 200         spin_unlock_irqrestore(&fep->tmreg_lock, flags);
 201
 202         return 0;
 203 }
 204
 205 /**
 206  * fec_ptp_gettime
 207  * @ptp: the ptp clock structure
 208  * @ts: timespec structure to hold the current time value
 209  *
 210  * read the timecounter and return the correct value on ns,
 211  * after converting it into a struct timespec.
 212  */
 213 static int fec_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
 214 {
 215         struct fec_enet_private *adapter =
 216             container_of(ptp, struct fec_enet_private, ptp_caps);
 217         u64 ns;
 218         u32 remainder;
 219         unsigned long flags;
 220
 221         spin_lock_irqsave(&adapter->tmreg_lock, flags);
 222         ns = timecounter_read(&adapter->tc);
 223         spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
 224
 225         ts->tv_sec = div_u64_rem(ns, 1000000000ULL, &remainder);
 226         ts->tv_nsec = remainder;
 227
 228         return 0;
 229 }
 230
 231 /**
 232  * fec_ptp_settime
 233  * @ptp: the ptp clock structure
 234  * @ts: the timespec containing the new time for the cycle counter
 235  *
 236  * reset the timecounter to use a new base value instead of the kernel
 237  * wall timer value.
 238  */
 239 static int fec_ptp_settime(struct ptp_clock_info *ptp,
 240                            const struct timespec *ts)
 241 {
 242         struct fec_enet_private *fep =
 243             container_of(ptp, struct fec_enet_private, ptp_caps);
 244
 245         u64 ns;
 246         unsigned long flags;
 247
 248         ns = ts->tv_sec * 1000000000ULL;
 249         ns += ts->tv_nsec;
 250
 251         spin_lock_irqsave(&fep->tmreg_lock, flags);
 252         timecounter_init(&fep->tc, &fep->cc, ns);
 253         spin_unlock_irqrestore(&fep->tmreg_lock, flags);
 254         return 0;
 255 }
 256
 257 /**
 258  * fec_ptp_enable
 259  * @ptp: the ptp clock structure
 260  * @rq: the requested feature to change
 261  * @on: whether to enable or disable the feature
 262  *
 263  */
 264 static int fec_ptp_enable(struct ptp_clock_info *ptp,
 265                           struct ptp_clock_request *rq, int on)
 266 {
 267         return -EOPNOTSUPP;
 268 }
 269
 270 /**
 271  * fec_ptp_hwtstamp_ioctl - control hardware time stamping
 272  * @ndev: pointer to net_device
 273  * @ifreq: ioctl data
 274  * @cmd: particular ioctl requested
 275  */
 276 int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr)
 277 {
 278         struct fec_enet_private *fep = netdev_priv(ndev);
 279
 280         struct hwtstamp_config config;
 281
 282         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
 283                 return -EFAULT;
 284
 285         /* reserved for future extensions */
 286         if (config.flags)
 287                 return -EINVAL;
 288
 289         switch (config.tx_type) {
 290         case HWTSTAMP_TX_OFF:
 291                 fep->hwts_tx_en = 0;
 292                 break;
 293         case HWTSTAMP_TX_ON:
 294                 fep->hwts_tx_en = 1;
 295                 break;
 296         default:
 297                 return -ERANGE;
 298         }
 299
 300         switch (config.rx_filter) {
 301         case HWTSTAMP_FILTER_NONE:
 302                 if (fep->hwts_rx_en)
 303                         fep->hwts_rx_en = 0;
 304                 config.rx_filter = HWTSTAMP_FILTER_NONE;
 305                 break;
 306
 307         default:
 308                 /*
 309                  * register RXMTRL must be set in order to do V1 packets,
 310                  * therefore it is not possible to time stamp both V1 Sync and
 311                  * Delay_Req messages and hardware does not support
 312                  * timestamping all packets => return error
 313                  */
 314                 fep->hwts_rx_en = 1;
 315                 config.rx_filter = HWTSTAMP_FILTER_ALL;
 316                 break;
 317         }
 318
 319         return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
 320             -EFAULT : 0;
 321 }
 322
 323 int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr)
 324 {
 325         struct fec_enet_private *fep = netdev_priv(ndev);
 326         struct hwtstamp_config config;
 327
 328         config.flags = 0;
 329         config.tx_type = fep->hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
 330         config.rx_filter = (fep->hwts_rx_en ?
 331                             HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE);
 332
 333         return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
 334                 -EFAULT : 0;
 335 }
 336
 337 /**
 338  * fec_time_keep - call timecounter_read every second to avoid timer overrun
 339  *                 because ENET just support 32bit counter, will timeout in 4s
 340  */
 341 static void fec_time_keep(unsigned long _data)
 342 {
 343         struct fec_enet_private *fep = (struct fec_enet_private *)_data;
 344         u64 ns;
 345         unsigned long flags;
 346
 347         spin_lock_irqsave(&fep->tmreg_lock, flags);
 348         ns = timecounter_read(&fep->tc);
 349         spin_unlock_irqrestore(&fep->tmreg_lock, flags);
 350
 351         mod_timer(&fep->time_keep, jiffies + HZ);
 352 }
 353
 354 /**
 355  * fec_ptp_init
 356  * @ndev: The FEC network adapter
 357  *
 358  * This function performs the required steps for enabling ptp
 359  * support. If ptp support has already been loaded it simply calls the
 360  * cyclecounter init routine and exits.
 361  */
 362
 363 void fec_ptp_init(struct platform_device *pdev)
 364 {
 365         struct net_device *ndev = platform_get_drvdata(pdev);
 366         struct fec_enet_private *fep = netdev_priv(ndev);
 367
 368         fep->ptp_caps.owner = THIS_MODULE;
 369         snprintf(fep->ptp_caps.name, 16, "fec ptp");
 370
 371         fep->ptp_caps.max_adj = 250000000;
 372         fep->ptp_caps.n_alarm = 0;
 373         fep->ptp_caps.n_ext_ts = 0;
 374         fep->ptp_caps.n_per_out = 0;
 375         fep->ptp_caps.n_pins = 0;
 376         fep->ptp_caps.pps = 0;
 377         fep->ptp_caps.adjfreq = fec_ptp_adjfreq;
 378         fep->ptp_caps.adjtime = fec_ptp_adjtime;
 379         fep->ptp_caps.gettime = fec_ptp_gettime;
 380         fep->ptp_caps.settime = fec_ptp_settime;
 381         fep->ptp_caps.enable = fec_ptp_enable;
 382
 383         fep->cycle_speed = clk_get_rate(fep->clk_ptp);
 384
 385         spin_lock_init(&fep->tmreg_lock);
 386
 387         fec_ptp_start_cyclecounter(ndev);
 388
 389         init_timer(&fep->time_keep);
 390         fep->time_keep.data = (unsigned long)fep;
 391         fep->time_keep.function = fec_time_keep;
 392         fep->time_keep.expires = jiffies + HZ;
 393         add_timer(&fep->time_keep);
 394
 395         fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev);
 396         if (IS_ERR(fep->ptp_clock)) {
 397                 fep->ptp_clock = NULL;
 398                 pr_err("ptp_clock_register failed\n");
 399         }
 400 }