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net: hns: delete redundancy ring enable operations
[deliverable/linux.git] / drivers / net / ethernet / hisilicon / hns / hns_dsaf_main.c
1 /*
2 * Copyright (c) 2014-2015 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10 #include <linux/acpi.h>
11 #include <linux/device.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/netdevice.h>
17 #include <linux/mfd/syscon.h>
18 #include <linux/of.h>
19 #include <linux/of_address.h>
20 #include <linux/of_irq.h>
21 #include <linux/platform_device.h>
22 #include <linux/vmalloc.h>
23
24 #include "hns_dsaf_mac.h"
25 #include "hns_dsaf_main.h"
26 #include "hns_dsaf_ppe.h"
27 #include "hns_dsaf_rcb.h"
28 #include "hns_dsaf_misc.h"
29
30 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
31 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
32 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
33 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
34 [DSAF_MODE_DISABLE_SP] = "single-port",
35 };
36
37 static const struct acpi_device_id hns_dsaf_acpi_match[] = {
38 { "HISI00B1", 0 },
39 { "HISI00B2", 0 },
40 { },
41 };
42 MODULE_DEVICE_TABLE(acpi, hns_dsaf_acpi_match);
43
44 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
45 {
46 int ret, i;
47 u32 desc_num;
48 u32 buf_size;
49 u32 reset_offset = 0;
50 u32 res_idx = 0;
51 const char *mode_str;
52 struct regmap *syscon;
53 struct resource *res;
54 struct device_node *np = dsaf_dev->dev->of_node;
55 struct platform_device *pdev = to_platform_device(dsaf_dev->dev);
56
57 if (dev_of_node(dsaf_dev->dev)) {
58 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
59 dsaf_dev->dsaf_ver = AE_VERSION_1;
60 else
61 dsaf_dev->dsaf_ver = AE_VERSION_2;
62 } else if (is_acpi_node(dsaf_dev->dev->fwnode)) {
63 if (acpi_dev_found(hns_dsaf_acpi_match[0].id))
64 dsaf_dev->dsaf_ver = AE_VERSION_1;
65 else if (acpi_dev_found(hns_dsaf_acpi_match[1].id))
66 dsaf_dev->dsaf_ver = AE_VERSION_2;
67 else
68 return -ENXIO;
69 } else {
70 dev_err(dsaf_dev->dev, "cannot get cfg data from of or acpi\n");
71 return -ENXIO;
72 }
73
74 ret = device_property_read_string(dsaf_dev->dev, "mode", &mode_str);
75 if (ret) {
76 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
77 return ret;
78 }
79 for (i = 0; i < DSAF_MODE_MAX; i++) {
80 if (g_dsaf_mode_match[i] &&
81 !strcmp(mode_str, g_dsaf_mode_match[i]))
82 break;
83 }
84 if (i >= DSAF_MODE_MAX ||
85 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
86 dev_err(dsaf_dev->dev,
87 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
88 return -EINVAL;
89 }
90 dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
91
92 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
93 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
94 else
95 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
96
97 if ((i == DSAF_MODE_ENABLE_16VM) ||
98 (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
99 (i == DSAF_MODE_DISABLE_6PORT_2VM))
100 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
101 else
102 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
103
104 if (dev_of_node(dsaf_dev->dev)) {
105 syscon = syscon_node_to_regmap(
106 of_parse_phandle(np, "subctrl-syscon", 0));
107 if (IS_ERR_OR_NULL(syscon)) {
108 res = platform_get_resource(pdev, IORESOURCE_MEM,
109 res_idx++);
110 if (!res) {
111 dev_err(dsaf_dev->dev, "subctrl info is needed!\n");
112 return -ENOMEM;
113 }
114
115 dsaf_dev->sc_base = devm_ioremap_resource(&pdev->dev,
116 res);
117 if (!dsaf_dev->sc_base) {
118 dev_err(dsaf_dev->dev, "subctrl can not map!\n");
119 return -ENOMEM;
120 }
121
122 res = platform_get_resource(pdev, IORESOURCE_MEM,
123 res_idx++);
124 if (!res) {
125 dev_err(dsaf_dev->dev, "serdes-ctrl info is needed!\n");
126 return -ENOMEM;
127 }
128
129 dsaf_dev->sds_base = devm_ioremap_resource(&pdev->dev,
130 res);
131 if (!dsaf_dev->sds_base) {
132 dev_err(dsaf_dev->dev, "serdes-ctrl can not map!\n");
133 return -ENOMEM;
134 }
135 } else {
136 dsaf_dev->sub_ctrl = syscon;
137 }
138 }
139
140 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ppe-base");
141 if (!res) {
142 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++);
143 if (!res) {
144 dev_err(dsaf_dev->dev, "ppe-base info is needed!\n");
145 return -ENOMEM;
146 }
147 }
148 dsaf_dev->ppe_base = devm_ioremap_resource(&pdev->dev, res);
149 if (!dsaf_dev->ppe_base) {
150 dev_err(dsaf_dev->dev, "ppe-base resource can not map!\n");
151 return -ENOMEM;
152 }
153 dsaf_dev->ppe_paddr = res->start;
154
155 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
156 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
157 "dsaf-base");
158 if (!res) {
159 res = platform_get_resource(pdev, IORESOURCE_MEM,
160 res_idx);
161 if (!res) {
162 dev_err(dsaf_dev->dev,
163 "dsaf-base info is needed!\n");
164 return -ENOMEM;
165 }
166 }
167 dsaf_dev->io_base = devm_ioremap_resource(&pdev->dev, res);
168 if (!dsaf_dev->io_base) {
169 dev_err(dsaf_dev->dev, "dsaf-base resource can not map!\n");
170 return -ENOMEM;
171 }
172 }
173
174 ret = device_property_read_u32(dsaf_dev->dev, "desc-num", &desc_num);
175 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
176 desc_num > HNS_DSAF_MAX_DESC_CNT) {
177 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
178 desc_num, ret);
179 return -EINVAL;
180 }
181 dsaf_dev->desc_num = desc_num;
182
183 ret = device_property_read_u32(dsaf_dev->dev, "reset-field-offset",
184 &reset_offset);
185 if (ret < 0) {
186 dev_dbg(dsaf_dev->dev,
187 "get reset-field-offset fail, ret=%d!\r\n", ret);
188 }
189 dsaf_dev->reset_offset = reset_offset;
190
191 ret = device_property_read_u32(dsaf_dev->dev, "buf-size", &buf_size);
192 if (ret < 0) {
193 dev_err(dsaf_dev->dev,
194 "get buf-size fail, ret=%d!\r\n", ret);
195 return ret;
196 }
197 dsaf_dev->buf_size = buf_size;
198
199 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
200 if (dsaf_dev->buf_size_type < 0) {
201 dev_err(dsaf_dev->dev,
202 "buf_size(%d) is wrong!\n", buf_size);
203 return -EINVAL;
204 }
205
206 dsaf_dev->misc_op = hns_misc_op_get(dsaf_dev);
207 if (!dsaf_dev->misc_op)
208 return -ENOMEM;
209
210 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
211 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
212 else
213 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
214
215 return 0;
216 }
217
218 /**
219 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
220 * @dsaf_id: dsa fabric id
221 */
222 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
223 {
224 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
225 }
226
227 /**
228 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
229 * @dsaf_id: dsa fabric id
230 * @hns_dsaf_reg_cnt_clr_ce: config value
231 */
232 static void
233 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
234 {
235 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
236 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
237 }
238
239 /**
240 * hns_ppe_qid_cfg - config ppe qid
241 * @dsaf_id: dsa fabric id
242 * @pppe_qid_cfg: value array
243 */
244 static void
245 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
246 {
247 u32 i;
248
249 for (i = 0; i < DSAF_COMM_CHN; i++) {
250 dsaf_set_dev_field(dsaf_dev,
251 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
252 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
253 qid_cfg);
254 }
255 }
256
257 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
258 {
259 u16 max_q_per_vf, max_vfn;
260 u32 q_id, q_num_per_port;
261 u32 i;
262
263 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
264 q_num_per_port = max_vfn * max_q_per_vf;
265
266 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
267 dsaf_set_dev_field(dsaf_dev,
268 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
269 0xff, 0, q_id);
270 q_id += q_num_per_port;
271 }
272 }
273
274 static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev)
275 {
276 u16 max_q_per_vf, max_vfn;
277 u32 q_id, q_num_per_port;
278 u32 mac_id;
279
280 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
281 return;
282
283 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
284 q_num_per_port = max_vfn * max_q_per_vf;
285
286 for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) {
287 dsaf_set_dev_field(dsaf_dev,
288 DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
289 DSAFV2_SERDES_LBK_QID_M,
290 DSAFV2_SERDES_LBK_QID_S,
291 q_id);
292 q_id += q_num_per_port;
293 }
294 }
295
296 /**
297 * hns_dsaf_sw_port_type_cfg - cfg sw type
298 * @dsaf_id: dsa fabric id
299 * @psw_port_type: array
300 */
301 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
302 enum dsaf_sw_port_type port_type)
303 {
304 u32 i;
305
306 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
307 dsaf_set_dev_field(dsaf_dev,
308 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
309 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
310 port_type);
311 }
312 }
313
314 /**
315 * hns_dsaf_stp_port_type_cfg - cfg stp type
316 * @dsaf_id: dsa fabric id
317 * @pstp_port_type: array
318 */
319 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
320 enum dsaf_stp_port_type port_type)
321 {
322 u32 i;
323
324 for (i = 0; i < DSAF_COMM_CHN; i++) {
325 dsaf_set_dev_field(dsaf_dev,
326 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
327 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
328 port_type);
329 }
330 }
331
332 #define HNS_DSAF_SBM_NUM(dev) \
333 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
334 /**
335 * hns_dsaf_sbm_cfg - config sbm
336 * @dsaf_id: dsa fabric id
337 */
338 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
339 {
340 u32 o_sbm_cfg;
341 u32 i;
342
343 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
344 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
345 DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
346 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
347 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
348 dsaf_write_dev(dsaf_dev,
349 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
350 }
351 }
352
353 /**
354 * hns_dsaf_sbm_cfg_mib_en - config sbm
355 * @dsaf_id: dsa fabric id
356 */
357 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
358 {
359 u32 sbm_cfg_mib_en;
360 u32 i;
361 u32 reg;
362 u32 read_cnt;
363
364 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
365 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
366 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
367 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
368 }
369
370 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
371 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
372 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
373 }
374
375 /* waitint for all sbm enable finished */
376 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
377 read_cnt = 0;
378 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
379 do {
380 udelay(1);
381 sbm_cfg_mib_en = dsaf_get_dev_bit(
382 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
383 read_cnt++;
384 } while (sbm_cfg_mib_en == 0 &&
385 read_cnt < DSAF_CFG_READ_CNT);
386
387 if (sbm_cfg_mib_en == 0) {
388 dev_err(dsaf_dev->dev,
389 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
390 dsaf_dev->ae_dev.name, i);
391 return -ENODEV;
392 }
393 }
394
395 return 0;
396 }
397
398 /**
399 * hns_dsaf_sbm_bp_wl_cfg - config sbm
400 * @dsaf_id: dsa fabric id
401 */
402 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
403 {
404 u32 o_sbm_bp_cfg;
405 u32 reg;
406 u32 i;
407
408 /* XGE */
409 for (i = 0; i < DSAF_XGE_NUM; i++) {
410 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
411 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
412 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
413 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
414 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
415 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
416 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
417 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
418 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
419
420 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
421 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
422 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
423 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
424 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
425 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
426 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
427
428 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
429 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
430 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
431 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
432 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
433 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
434 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
435
436 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
437 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
438 dsaf_set_field(o_sbm_bp_cfg,
439 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
440 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
441 dsaf_set_field(o_sbm_bp_cfg,
442 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
443 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
444 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
445
446 /* for no enable pfc mode */
447 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
448 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
449 dsaf_set_field(o_sbm_bp_cfg,
450 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
451 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
452 dsaf_set_field(o_sbm_bp_cfg,
453 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
454 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
455 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
456 }
457
458 /* PPE */
459 for (i = 0; i < DSAF_COMM_CHN; i++) {
460 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
461 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
462 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
463 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
464 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
465 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
466 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
467 }
468
469 /* RoCEE */
470 for (i = 0; i < DSAF_COMM_CHN; i++) {
471 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
472 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
473 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
474 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
475 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
476 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
477 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
478 }
479 }
480
481 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
482 {
483 u32 o_sbm_bp_cfg;
484 u32 reg;
485 u32 i;
486
487 /* XGE */
488 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
489 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
490 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
491 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
492 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
493 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
494 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
495 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
496 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
497 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
498
499 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
500 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
501 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
502 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
503 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
504 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
505 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
506
507 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
508 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
509 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
510 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
511 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
512 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
513 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
514
515 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
516 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
517 dsaf_set_field(o_sbm_bp_cfg,
518 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
519 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
520 dsaf_set_field(o_sbm_bp_cfg,
521 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
522 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
523 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
524
525 /* for no enable pfc mode */
526 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
527 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
528 dsaf_set_field(o_sbm_bp_cfg,
529 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
530 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
531 dsaf_set_field(o_sbm_bp_cfg,
532 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
533 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
534 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
535 }
536
537 /* PPE */
538 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
539 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
540 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
541 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
542 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
543 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
544 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
545 /* RoCEE */
546 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
547 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
548 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
549 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
550 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
551 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
552 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
553 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
554 }
555 }
556
557 /**
558 * hns_dsaf_voq_bp_all_thrd_cfg - voq
559 * @dsaf_id: dsa fabric id
560 */
561 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
562 {
563 u32 voq_bp_all_thrd;
564 u32 i;
565
566 for (i = 0; i < DSAF_VOQ_NUM; i++) {
567 voq_bp_all_thrd = dsaf_read_dev(
568 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
569 if (i < DSAF_XGE_NUM) {
570 dsaf_set_field(voq_bp_all_thrd,
571 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
572 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
573 dsaf_set_field(voq_bp_all_thrd,
574 DSAF_VOQ_BP_ALL_UPTHRD_M,
575 DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
576 } else {
577 dsaf_set_field(voq_bp_all_thrd,
578 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
579 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
580 dsaf_set_field(voq_bp_all_thrd,
581 DSAF_VOQ_BP_ALL_UPTHRD_M,
582 DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
583 }
584 dsaf_write_dev(
585 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
586 voq_bp_all_thrd);
587 }
588 }
589
590 /**
591 * hns_dsaf_tbl_tcam_data_cfg - tbl
592 * @dsaf_id: dsa fabric id
593 * @ptbl_tcam_data: addr
594 */
595 static void hns_dsaf_tbl_tcam_data_cfg(
596 struct dsaf_device *dsaf_dev,
597 struct dsaf_tbl_tcam_data *ptbl_tcam_data)
598 {
599 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
600 ptbl_tcam_data->tbl_tcam_data_low);
601 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
602 ptbl_tcam_data->tbl_tcam_data_high);
603 }
604
605 /**
606 * dsaf_tbl_tcam_mcast_cfg - tbl
607 * @dsaf_id: dsa fabric id
608 * @ptbl_tcam_mcast: addr
609 */
610 static void hns_dsaf_tbl_tcam_mcast_cfg(
611 struct dsaf_device *dsaf_dev,
612 struct dsaf_tbl_tcam_mcast_cfg *mcast)
613 {
614 u32 mcast_cfg4;
615
616 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
617 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
618 mcast->tbl_mcast_item_vld);
619 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
620 mcast->tbl_mcast_old_en);
621 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
622 DSAF_TBL_MCAST_CFG4_VM128_112_S,
623 mcast->tbl_mcast_port_msk[4]);
624 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
625
626 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
627 mcast->tbl_mcast_port_msk[3]);
628
629 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
630 mcast->tbl_mcast_port_msk[2]);
631
632 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
633 mcast->tbl_mcast_port_msk[1]);
634
635 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
636 mcast->tbl_mcast_port_msk[0]);
637 }
638
639 /**
640 * hns_dsaf_tbl_tcam_ucast_cfg - tbl
641 * @dsaf_id: dsa fabric id
642 * @ptbl_tcam_ucast: addr
643 */
644 static void hns_dsaf_tbl_tcam_ucast_cfg(
645 struct dsaf_device *dsaf_dev,
646 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
647 {
648 u32 ucast_cfg1;
649
650 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
651 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
652 tbl_tcam_ucast->tbl_ucast_mac_discard);
653 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
654 tbl_tcam_ucast->tbl_ucast_item_vld);
655 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
656 tbl_tcam_ucast->tbl_ucast_old_en);
657 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
658 tbl_tcam_ucast->tbl_ucast_dvc);
659 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
660 DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
661 tbl_tcam_ucast->tbl_ucast_out_port);
662 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
663 }
664
665 /**
666 * hns_dsaf_tbl_line_cfg - tbl
667 * @dsaf_id: dsa fabric id
668 * @ptbl_lin: addr
669 */
670 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
671 struct dsaf_tbl_line_cfg *tbl_lin)
672 {
673 u32 tbl_line;
674
675 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
676 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
677 tbl_lin->tbl_line_mac_discard);
678 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
679 tbl_lin->tbl_line_dvc);
680 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
681 DSAF_TBL_LINE_CFG_OUT_PORT_S,
682 tbl_lin->tbl_line_out_port);
683 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
684 }
685
686 /**
687 * hns_dsaf_tbl_tcam_mcast_pul - tbl
688 * @dsaf_id: dsa fabric id
689 */
690 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
691 {
692 u32 o_tbl_pul;
693
694 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
695 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
696 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
697 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
698 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
699 }
700
701 /**
702 * hns_dsaf_tbl_line_pul - tbl
703 * @dsaf_id: dsa fabric id
704 */
705 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
706 {
707 u32 tbl_pul;
708
709 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
710 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
711 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
712 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
713 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
714 }
715
716 /**
717 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
718 * @dsaf_id: dsa fabric id
719 */
720 static void hns_dsaf_tbl_tcam_data_mcast_pul(
721 struct dsaf_device *dsaf_dev)
722 {
723 u32 o_tbl_pul;
724
725 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
726 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
727 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
728 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
729 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
730 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
731 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
732 }
733
734 /**
735 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
736 * @dsaf_id: dsa fabric id
737 */
738 static void hns_dsaf_tbl_tcam_data_ucast_pul(
739 struct dsaf_device *dsaf_dev)
740 {
741 u32 o_tbl_pul;
742
743 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
744 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
745 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
746 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
747 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
748 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
749 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
750 }
751
752 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
753 {
754 if (!HNS_DSAF_IS_DEBUG(dsaf_dev))
755 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG,
756 DSAF_CFG_MIX_MODE_S, !!en);
757 }
758
759 void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en)
760 {
761 if (AE_IS_VER1(dsaf_dev->dsaf_ver) ||
762 dsaf_dev->mac_cb[mac_id]->mac_type == HNAE_PORT_DEBUG)
763 return;
764
765 dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
766 DSAFV2_SERDES_LBK_EN_B, !!en);
767 }
768
769 /**
770 * hns_dsaf_tbl_stat_en - tbl
771 * @dsaf_id: dsa fabric id
772 * @ptbl_stat_en: addr
773 */
774 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
775 {
776 u32 o_tbl_ctrl;
777
778 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
779 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
780 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
781 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
782 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
783 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
784 }
785
786 /**
787 * hns_dsaf_rocee_bp_en - rocee back press enable
788 * @dsaf_id: dsa fabric id
789 */
790 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
791 {
792 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
793 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
794 DSAF_FC_XGE_TX_PAUSE_S, 1);
795 }
796
797 /* set msk for dsaf exception irq*/
798 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
799 u32 chnn_num, u32 mask_set)
800 {
801 dsaf_write_dev(dsaf_dev,
802 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
803 }
804
805 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
806 u32 chnn_num, u32 msk_set)
807 {
808 dsaf_write_dev(dsaf_dev,
809 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
810 }
811
812 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
813 u32 chnn, u32 msk_set)
814 {
815 dsaf_write_dev(dsaf_dev,
816 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
817 }
818
819 static void
820 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
821 {
822 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
823 }
824
825 /* clr dsaf exception irq*/
826 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
827 u32 chnn_num, u32 int_src)
828 {
829 dsaf_write_dev(dsaf_dev,
830 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
831 }
832
833 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
834 u32 chnn, u32 int_src)
835 {
836 dsaf_write_dev(dsaf_dev,
837 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
838 }
839
840 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
841 u32 chnn, u32 int_src)
842 {
843 dsaf_write_dev(dsaf_dev,
844 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
845 }
846
847 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
848 u32 int_src)
849 {
850 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
851 }
852
853 /**
854 * hns_dsaf_single_line_tbl_cfg - INT
855 * @dsaf_id: dsa fabric id
856 * @address:
857 * @ptbl_line:
858 */
859 static void hns_dsaf_single_line_tbl_cfg(
860 struct dsaf_device *dsaf_dev,
861 u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
862 {
863 spin_lock_bh(&dsaf_dev->tcam_lock);
864
865 /*Write Addr*/
866 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
867
868 /*Write Line*/
869 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
870
871 /*Write Plus*/
872 hns_dsaf_tbl_line_pul(dsaf_dev);
873
874 spin_unlock_bh(&dsaf_dev->tcam_lock);
875 }
876
877 /**
878 * hns_dsaf_tcam_uc_cfg - INT
879 * @dsaf_id: dsa fabric id
880 * @address,
881 * @ptbl_tcam_data,
882 */
883 static void hns_dsaf_tcam_uc_cfg(
884 struct dsaf_device *dsaf_dev, u32 address,
885 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
886 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
887 {
888 spin_lock_bh(&dsaf_dev->tcam_lock);
889
890 /*Write Addr*/
891 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
892 /*Write Tcam Data*/
893 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
894 /*Write Tcam Ucast*/
895 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
896 /*Write Plus*/
897 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
898
899 spin_unlock_bh(&dsaf_dev->tcam_lock);
900 }
901
902 /**
903 * hns_dsaf_tcam_mc_cfg - INT
904 * @dsaf_id: dsa fabric id
905 * @address,
906 * @ptbl_tcam_data,
907 * @ptbl_tcam_mcast,
908 */
909 static void hns_dsaf_tcam_mc_cfg(
910 struct dsaf_device *dsaf_dev, u32 address,
911 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
912 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
913 {
914 spin_lock_bh(&dsaf_dev->tcam_lock);
915
916 /*Write Addr*/
917 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
918 /*Write Tcam Data*/
919 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
920 /*Write Tcam Mcast*/
921 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
922 /*Write Plus*/
923 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
924
925 spin_unlock_bh(&dsaf_dev->tcam_lock);
926 }
927
928 /**
929 * hns_dsaf_tcam_mc_invld - INT
930 * @dsaf_id: dsa fabric id
931 * @address
932 */
933 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
934 {
935 spin_lock_bh(&dsaf_dev->tcam_lock);
936
937 /*Write Addr*/
938 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
939
940 /*write tcam mcast*/
941 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
942 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
943 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
944 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
945 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
946
947 /*Write Plus*/
948 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
949
950 spin_unlock_bh(&dsaf_dev->tcam_lock);
951 }
952
953 /**
954 * hns_dsaf_tcam_uc_get - INT
955 * @dsaf_id: dsa fabric id
956 * @address
957 * @ptbl_tcam_data
958 * @ptbl_tcam_ucast
959 */
960 static void hns_dsaf_tcam_uc_get(
961 struct dsaf_device *dsaf_dev, u32 address,
962 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
963 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
964 {
965 u32 tcam_read_data0;
966 u32 tcam_read_data4;
967
968 spin_lock_bh(&dsaf_dev->tcam_lock);
969
970 /*Write Addr*/
971 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
972
973 /*read tcam item puls*/
974 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
975
976 /*read tcam data*/
977 ptbl_tcam_data->tbl_tcam_data_high
978 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
979 ptbl_tcam_data->tbl_tcam_data_low
980 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
981
982 /*read tcam mcast*/
983 tcam_read_data0 = dsaf_read_dev(dsaf_dev,
984 DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
985 tcam_read_data4 = dsaf_read_dev(dsaf_dev,
986 DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
987
988 ptbl_tcam_ucast->tbl_ucast_item_vld
989 = dsaf_get_bit(tcam_read_data4,
990 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
991 ptbl_tcam_ucast->tbl_ucast_old_en
992 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
993 ptbl_tcam_ucast->tbl_ucast_mac_discard
994 = dsaf_get_bit(tcam_read_data0,
995 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
996 ptbl_tcam_ucast->tbl_ucast_out_port
997 = dsaf_get_field(tcam_read_data0,
998 DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
999 DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
1000 ptbl_tcam_ucast->tbl_ucast_dvc
1001 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
1002
1003 spin_unlock_bh(&dsaf_dev->tcam_lock);
1004 }
1005
1006 /**
1007 * hns_dsaf_tcam_mc_get - INT
1008 * @dsaf_id: dsa fabric id
1009 * @address
1010 * @ptbl_tcam_data
1011 * @ptbl_tcam_ucast
1012 */
1013 static void hns_dsaf_tcam_mc_get(
1014 struct dsaf_device *dsaf_dev, u32 address,
1015 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
1016 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
1017 {
1018 u32 data_tmp;
1019
1020 spin_lock_bh(&dsaf_dev->tcam_lock);
1021
1022 /*Write Addr*/
1023 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
1024
1025 /*read tcam item puls*/
1026 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
1027
1028 /*read tcam data*/
1029 ptbl_tcam_data->tbl_tcam_data_high =
1030 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
1031 ptbl_tcam_data->tbl_tcam_data_low =
1032 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
1033
1034 /*read tcam mcast*/
1035 ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
1036 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
1037 ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
1038 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
1039 ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
1040 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
1041 ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
1042 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
1043
1044 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
1045 ptbl_tcam_mcast->tbl_mcast_item_vld =
1046 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
1047 ptbl_tcam_mcast->tbl_mcast_old_en =
1048 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
1049 ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
1050 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
1051 DSAF_TBL_MCAST_CFG4_VM128_112_S);
1052
1053 spin_unlock_bh(&dsaf_dev->tcam_lock);
1054 }
1055
1056 /**
1057 * hns_dsaf_tbl_line_init - INT
1058 * @dsaf_id: dsa fabric id
1059 */
1060 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
1061 {
1062 u32 i;
1063 /* defaultly set all lineal mac table entry resulting discard */
1064 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
1065
1066 for (i = 0; i < DSAF_LINE_SUM; i++)
1067 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
1068 }
1069
1070 /**
1071 * hns_dsaf_tbl_tcam_init - INT
1072 * @dsaf_id: dsa fabric id
1073 */
1074 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
1075 {
1076 u32 i;
1077 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
1078 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
1079
1080 /*tcam tbl*/
1081 for (i = 0; i < DSAF_TCAM_SUM; i++)
1082 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
1083 }
1084
1085 /**
1086 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1087 * @mac_cb: mac contrl block
1088 */
1089 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
1090 int mac_id, int tc_en)
1091 {
1092 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, tc_en);
1093 }
1094
1095 static void hns_dsaf_set_pfc_pause(struct dsaf_device *dsaf_dev,
1096 int mac_id, int tx_en, int rx_en)
1097 {
1098 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1099 if (!tx_en || !rx_en)
1100 dev_err(dsaf_dev->dev, "dsaf v1 can not close pfc!\n");
1101
1102 return;
1103 }
1104
1105 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1106 DSAF_PFC_PAUSE_RX_EN_B, !!rx_en);
1107 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1108 DSAF_PFC_PAUSE_TX_EN_B, !!tx_en);
1109 }
1110
1111 int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1112 u32 en)
1113 {
1114 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1115 if (!en) {
1116 dev_err(dsaf_dev->dev, "dsafv1 can't close rx_pause!\n");
1117 return -EINVAL;
1118 }
1119 }
1120
1121 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1122 DSAF_MAC_PAUSE_RX_EN_B, !!en);
1123
1124 return 0;
1125 }
1126
1127 void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1128 u32 *en)
1129 {
1130 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
1131 *en = 1;
1132 else
1133 *en = dsaf_get_dev_bit(dsaf_dev,
1134 DSAF_PAUSE_CFG_REG + mac_id * 4,
1135 DSAF_MAC_PAUSE_RX_EN_B);
1136 }
1137
1138 /**
1139 * hns_dsaf_tbl_tcam_init - INT
1140 * @dsaf_id: dsa fabric id
1141 * @dsaf_mode
1142 */
1143 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1144 {
1145 u32 i;
1146 u32 o_dsaf_cfg;
1147 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
1148
1149 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1150 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1151 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1152 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1153 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1154 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1155 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1156
1157 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1158 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1159
1160 /* set 22 queue per tx ppe engine, only used in switch mode */
1161 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1162
1163 /* set promisc def queue id */
1164 hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1165
1166 /* set inner loopback queue id */
1167 hns_dsaf_inner_qid_cfg(dsaf_dev);
1168
1169 /* in non switch mode, set all port to access mode */
1170 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1171
1172 /*set dsaf pfc to 0 for parseing rx pause*/
1173 for (i = 0; i < DSAF_COMM_CHN; i++) {
1174 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
1175 hns_dsaf_set_pfc_pause(dsaf_dev, i, is_ver1, is_ver1);
1176 }
1177
1178 /*msk and clr exception irqs */
1179 for (i = 0; i < DSAF_COMM_CHN; i++) {
1180 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1181 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1182 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1183
1184 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1185 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1186 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1187 }
1188 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1189 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1190 }
1191
1192 /**
1193 * hns_dsaf_inode_init - INT
1194 * @dsaf_id: dsa fabric id
1195 */
1196 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1197 {
1198 u32 reg;
1199 u32 tc_cfg;
1200 u32 i;
1201
1202 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1203 tc_cfg = HNS_DSAF_I4TC_CFG;
1204 else
1205 tc_cfg = HNS_DSAF_I8TC_CFG;
1206
1207 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1208 for (i = 0; i < DSAF_INODE_NUM; i++) {
1209 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1210 dsaf_set_dev_field(dsaf_dev, reg,
1211 DSAF_INODE_IN_PORT_NUM_M,
1212 DSAF_INODE_IN_PORT_NUM_S,
1213 i % DSAF_XGE_NUM);
1214 }
1215 } else {
1216 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1217 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1218 dsaf_set_dev_field(dsaf_dev, reg,
1219 DSAF_INODE_IN_PORT_NUM_M,
1220 DSAF_INODE_IN_PORT_NUM_S, 0);
1221 dsaf_set_dev_field(dsaf_dev, reg,
1222 DSAFV2_INODE_IN_PORT1_NUM_M,
1223 DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1224 dsaf_set_dev_field(dsaf_dev, reg,
1225 DSAFV2_INODE_IN_PORT2_NUM_M,
1226 DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1227 dsaf_set_dev_field(dsaf_dev, reg,
1228 DSAFV2_INODE_IN_PORT3_NUM_M,
1229 DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1230 dsaf_set_dev_field(dsaf_dev, reg,
1231 DSAFV2_INODE_IN_PORT4_NUM_M,
1232 DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1233 dsaf_set_dev_field(dsaf_dev, reg,
1234 DSAFV2_INODE_IN_PORT5_NUM_M,
1235 DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1236 }
1237 }
1238 for (i = 0; i < DSAF_INODE_NUM; i++) {
1239 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1240 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1241 }
1242 }
1243
1244 /**
1245 * hns_dsaf_sbm_init - INT
1246 * @dsaf_id: dsa fabric id
1247 */
1248 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1249 {
1250 u32 flag;
1251 u32 finish_msk;
1252 u32 cnt = 0;
1253 int ret;
1254
1255 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1256 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1257 finish_msk = DSAF_SRAM_INIT_OVER_M;
1258 } else {
1259 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1260 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1261 }
1262
1263 /* enable sbm chanel, disable sbm chanel shcut function*/
1264 hns_dsaf_sbm_cfg(dsaf_dev);
1265
1266 /* enable sbm mib */
1267 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1268 if (ret) {
1269 dev_err(dsaf_dev->dev,
1270 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1271 dsaf_dev->ae_dev.name, ret);
1272 return ret;
1273 }
1274
1275 /* enable sbm initial link sram */
1276 hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1277
1278 do {
1279 usleep_range(200, 210);/*udelay(200);*/
1280 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1281 finish_msk, DSAF_SRAM_INIT_OVER_S);
1282 cnt++;
1283 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1284 cnt < DSAF_CFG_READ_CNT);
1285
1286 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
1287 dev_err(dsaf_dev->dev,
1288 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1289 dsaf_dev->ae_dev.name, flag, cnt);
1290 return -ENODEV;
1291 }
1292
1293 hns_dsaf_rocee_bp_en(dsaf_dev);
1294
1295 return 0;
1296 }
1297
1298 /**
1299 * hns_dsaf_tbl_init - INT
1300 * @dsaf_id: dsa fabric id
1301 */
1302 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1303 {
1304 hns_dsaf_tbl_stat_en(dsaf_dev);
1305
1306 hns_dsaf_tbl_tcam_init(dsaf_dev);
1307 hns_dsaf_tbl_line_init(dsaf_dev);
1308 }
1309
1310 /**
1311 * hns_dsaf_voq_init - INT
1312 * @dsaf_id: dsa fabric id
1313 */
1314 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1315 {
1316 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1317 }
1318
1319 /**
1320 * hns_dsaf_init_hw - init dsa fabric hardware
1321 * @dsaf_dev: dsa fabric device struct pointer
1322 */
1323 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1324 {
1325 int ret;
1326
1327 dev_dbg(dsaf_dev->dev,
1328 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1329
1330 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 0);
1331 mdelay(10);
1332 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 1);
1333
1334 hns_dsaf_comm_init(dsaf_dev);
1335
1336 /*init XBAR_INODE*/
1337 hns_dsaf_inode_init(dsaf_dev);
1338
1339 /*init SBM*/
1340 ret = hns_dsaf_sbm_init(dsaf_dev);
1341 if (ret)
1342 return ret;
1343
1344 /*init TBL*/
1345 hns_dsaf_tbl_init(dsaf_dev);
1346
1347 /*init VOQ*/
1348 hns_dsaf_voq_init(dsaf_dev);
1349
1350 return 0;
1351 }
1352
1353 /**
1354 * hns_dsaf_remove_hw - uninit dsa fabric hardware
1355 * @dsaf_dev: dsa fabric device struct pointer
1356 */
1357 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1358 {
1359 /*reset*/
1360 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 0);
1361 }
1362
1363 /**
1364 * hns_dsaf_init - init dsa fabric
1365 * @dsaf_dev: dsa fabric device struct pointer
1366 * retuen 0 - success , negative --fail
1367 */
1368 static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1369 {
1370 struct dsaf_drv_priv *priv =
1371 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1372 u32 i;
1373 int ret;
1374
1375 if (HNS_DSAF_IS_DEBUG(dsaf_dev))
1376 return 0;
1377
1378 spin_lock_init(&dsaf_dev->tcam_lock);
1379 ret = hns_dsaf_init_hw(dsaf_dev);
1380 if (ret)
1381 return ret;
1382
1383 /* malloc mem for tcam mac key(vlan+mac) */
1384 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1385 * DSAF_TCAM_SUM);
1386 if (!priv->soft_mac_tbl) {
1387 ret = -ENOMEM;
1388 goto remove_hw;
1389 }
1390
1391 /*all entry invall */
1392 for (i = 0; i < DSAF_TCAM_SUM; i++)
1393 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1394
1395 return 0;
1396
1397 remove_hw:
1398 hns_dsaf_remove_hw(dsaf_dev);
1399 return ret;
1400 }
1401
1402 /**
1403 * hns_dsaf_free - free dsa fabric
1404 * @dsaf_dev: dsa fabric device struct pointer
1405 */
1406 static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1407 {
1408 struct dsaf_drv_priv *priv =
1409 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1410
1411 hns_dsaf_remove_hw(dsaf_dev);
1412
1413 /* free all mac mem */
1414 vfree(priv->soft_mac_tbl);
1415 priv->soft_mac_tbl = NULL;
1416 }
1417
1418 /**
1419 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1420 * @dsaf_dev: dsa fabric device struct pointer
1421 * @mac_key: mac entry struct pointer
1422 */
1423 static u16 hns_dsaf_find_soft_mac_entry(
1424 struct dsaf_device *dsaf_dev,
1425 struct dsaf_drv_tbl_tcam_key *mac_key)
1426 {
1427 struct dsaf_drv_priv *priv =
1428 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1429 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1430 u32 i;
1431
1432 soft_mac_entry = priv->soft_mac_tbl;
1433 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1434 /* invall tab entry */
1435 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1436 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1437 (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1438 /* return find result --soft index */
1439 return soft_mac_entry->index;
1440
1441 soft_mac_entry++;
1442 }
1443 return DSAF_INVALID_ENTRY_IDX;
1444 }
1445
1446 /**
1447 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1448 * @dsaf_dev: dsa fabric device struct pointer
1449 */
1450 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1451 {
1452 struct dsaf_drv_priv *priv =
1453 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1454 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1455 u32 i;
1456
1457 soft_mac_entry = priv->soft_mac_tbl;
1458 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1459 /* inv all entry */
1460 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1461 /* return find result --soft index */
1462 return i;
1463
1464 soft_mac_entry++;
1465 }
1466 return DSAF_INVALID_ENTRY_IDX;
1467 }
1468
1469 /**
1470 * hns_dsaf_set_mac_key - set mac key
1471 * @dsaf_dev: dsa fabric device struct pointer
1472 * @mac_key: tcam key pointer
1473 * @vlan_id: vlan id
1474 * @in_port_num: input port num
1475 * @addr: mac addr
1476 */
1477 static void hns_dsaf_set_mac_key(
1478 struct dsaf_device *dsaf_dev,
1479 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1480 u8 *addr)
1481 {
1482 u8 port;
1483
1484 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1485 /*DSAF mode : in port id fixed 0*/
1486 port = 0;
1487 else
1488 /*non-dsaf mode*/
1489 port = in_port_num;
1490
1491 mac_key->high.bits.mac_0 = addr[0];
1492 mac_key->high.bits.mac_1 = addr[1];
1493 mac_key->high.bits.mac_2 = addr[2];
1494 mac_key->high.bits.mac_3 = addr[3];
1495 mac_key->low.bits.mac_4 = addr[4];
1496 mac_key->low.bits.mac_5 = addr[5];
1497 mac_key->low.bits.vlan = vlan_id;
1498 mac_key->low.bits.port = port;
1499 }
1500
1501 /**
1502 * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1503 * @dsaf_dev: dsa fabric device struct pointer
1504 * @mac_entry: uc-mac entry
1505 */
1506 int hns_dsaf_set_mac_uc_entry(
1507 struct dsaf_device *dsaf_dev,
1508 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1509 {
1510 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1511 struct dsaf_drv_tbl_tcam_key mac_key;
1512 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1513 struct dsaf_drv_priv *priv =
1514 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1515 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1516
1517 /* mac addr check */
1518 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1519 MAC_IS_BROADCAST(mac_entry->addr) ||
1520 MAC_IS_MULTICAST(mac_entry->addr)) {
1521 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1522 dsaf_dev->ae_dev.name, mac_entry->addr);
1523 return -EINVAL;
1524 }
1525
1526 /* config key */
1527 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1528 mac_entry->in_port_num, mac_entry->addr);
1529
1530 /* entry ie exist? */
1531 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1532 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1533 /*if has not inv entry,find a empty entry */
1534 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1535 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1536 /* has not empty,return error */
1537 dev_err(dsaf_dev->dev,
1538 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1539 dsaf_dev->ae_dev.name,
1540 mac_key.high.val, mac_key.low.val);
1541 return -EINVAL;
1542 }
1543 }
1544
1545 dev_dbg(dsaf_dev->dev,
1546 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1547 dsaf_dev->ae_dev.name, mac_key.high.val,
1548 mac_key.low.val, entry_index);
1549
1550 /* config hardware entry */
1551 mac_data.tbl_ucast_item_vld = 1;
1552 mac_data.tbl_ucast_mac_discard = 0;
1553 mac_data.tbl_ucast_old_en = 0;
1554 /* default config dvc to 0 */
1555 mac_data.tbl_ucast_dvc = 0;
1556 mac_data.tbl_ucast_out_port = mac_entry->port_num;
1557 hns_dsaf_tcam_uc_cfg(
1558 dsaf_dev, entry_index,
1559 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1560
1561 /* config software entry */
1562 soft_mac_entry += entry_index;
1563 soft_mac_entry->index = entry_index;
1564 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1565 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1566
1567 return 0;
1568 }
1569
1570 /**
1571 * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1572 * @dsaf_dev: dsa fabric device struct pointer
1573 * @mac_entry: mc-mac entry
1574 */
1575 int hns_dsaf_set_mac_mc_entry(
1576 struct dsaf_device *dsaf_dev,
1577 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1578 {
1579 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1580 struct dsaf_drv_tbl_tcam_key mac_key;
1581 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1582 struct dsaf_drv_priv *priv =
1583 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1584 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1585 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1586
1587 /* mac addr check */
1588 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1589 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1590 dsaf_dev->ae_dev.name, mac_entry->addr);
1591 return -EINVAL;
1592 }
1593
1594 /*config key */
1595 hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1596 mac_entry->in_vlan_id,
1597 mac_entry->in_port_num, mac_entry->addr);
1598
1599 /* entry ie exist? */
1600 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1601 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1602 /*if hasnot, find enpty entry*/
1603 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1604 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1605 /*if hasnot empty, error*/
1606 dev_err(dsaf_dev->dev,
1607 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1608 dsaf_dev->ae_dev.name,
1609 mac_key.high.val, mac_key.low.val);
1610 return -EINVAL;
1611 }
1612
1613 /* config hardware entry */
1614 memset(mac_data.tbl_mcast_port_msk,
1615 0, sizeof(mac_data.tbl_mcast_port_msk));
1616 } else {
1617 /* config hardware entry */
1618 hns_dsaf_tcam_mc_get(
1619 dsaf_dev, entry_index,
1620 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1621 }
1622 mac_data.tbl_mcast_old_en = 0;
1623 mac_data.tbl_mcast_item_vld = 1;
1624 dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1625 0x3F, 0, mac_entry->port_mask[0]);
1626
1627 dev_dbg(dsaf_dev->dev,
1628 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1629 dsaf_dev->ae_dev.name, mac_key.high.val,
1630 mac_key.low.val, entry_index);
1631
1632 hns_dsaf_tcam_mc_cfg(
1633 dsaf_dev, entry_index,
1634 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1635
1636 /* config software entry */
1637 soft_mac_entry += entry_index;
1638 soft_mac_entry->index = entry_index;
1639 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1640 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1641
1642 return 0;
1643 }
1644
1645 /**
1646 * hns_dsaf_add_mac_mc_port - add mac mc-port
1647 * @dsaf_dev: dsa fabric device struct pointer
1648 * @mac_entry: mc-mac entry
1649 */
1650 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1651 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1652 {
1653 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1654 struct dsaf_drv_tbl_tcam_key mac_key;
1655 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1656 struct dsaf_drv_priv *priv =
1657 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1658 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1659 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1660 int mskid;
1661
1662 /*chechk mac addr */
1663 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1664 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1665 mac_entry->addr);
1666 return -EINVAL;
1667 }
1668
1669 /*config key */
1670 hns_dsaf_set_mac_key(
1671 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1672 mac_entry->in_port_num, mac_entry->addr);
1673
1674 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1675
1676 /*check exist? */
1677 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1678 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1679 /*if hasnot , find a empty*/
1680 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1681 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1682 /*if hasnot empty, error*/
1683 dev_err(dsaf_dev->dev,
1684 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1685 dsaf_dev->ae_dev.name, mac_key.high.val,
1686 mac_key.low.val);
1687 return -EINVAL;
1688 }
1689 } else {
1690 /*if exist, add in */
1691 hns_dsaf_tcam_mc_get(
1692 dsaf_dev, entry_index,
1693 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1694 }
1695 /* config hardware entry */
1696 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1697 mskid = mac_entry->port_num;
1698 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1699 mskid = mac_entry->port_num -
1700 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1701 } else {
1702 dev_err(dsaf_dev->dev,
1703 "%s,pnum(%d)error,key(%#x:%#x)\n",
1704 dsaf_dev->ae_dev.name, mac_entry->port_num,
1705 mac_key.high.val, mac_key.low.val);
1706 return -EINVAL;
1707 }
1708 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1709 mac_data.tbl_mcast_old_en = 0;
1710 mac_data.tbl_mcast_item_vld = 1;
1711
1712 dev_dbg(dsaf_dev->dev,
1713 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1714 dsaf_dev->ae_dev.name, mac_key.high.val,
1715 mac_key.low.val, entry_index);
1716
1717 hns_dsaf_tcam_mc_cfg(
1718 dsaf_dev, entry_index,
1719 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1720
1721 /*config software entry */
1722 soft_mac_entry += entry_index;
1723 soft_mac_entry->index = entry_index;
1724 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1725 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1726
1727 return 0;
1728 }
1729
1730 /**
1731 * hns_dsaf_del_mac_entry - del mac mc-port
1732 * @dsaf_dev: dsa fabric device struct pointer
1733 * @vlan_id: vlian id
1734 * @in_port_num: input port num
1735 * @addr : mac addr
1736 */
1737 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1738 u8 in_port_num, u8 *addr)
1739 {
1740 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1741 struct dsaf_drv_tbl_tcam_key mac_key;
1742 struct dsaf_drv_priv *priv =
1743 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1744 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1745
1746 /*check mac addr */
1747 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
1748 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1749 addr);
1750 return -EINVAL;
1751 }
1752
1753 /*config key */
1754 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1755
1756 /*exist ?*/
1757 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1758 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1759 /*not exist, error */
1760 dev_err(dsaf_dev->dev,
1761 "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1762 dsaf_dev->ae_dev.name,
1763 mac_key.high.val, mac_key.low.val);
1764 return -EINVAL;
1765 }
1766 dev_dbg(dsaf_dev->dev,
1767 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1768 dsaf_dev->ae_dev.name, mac_key.high.val,
1769 mac_key.low.val, entry_index);
1770
1771 /*do del opt*/
1772 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1773
1774 /*del soft emtry */
1775 soft_mac_entry += entry_index;
1776 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1777
1778 return 0;
1779 }
1780
1781 /**
1782 * hns_dsaf_del_mac_mc_port - del mac mc- port
1783 * @dsaf_dev: dsa fabric device struct pointer
1784 * @mac_entry: mac entry
1785 */
1786 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1787 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1788 {
1789 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1790 struct dsaf_drv_tbl_tcam_key mac_key;
1791 struct dsaf_drv_priv *priv =
1792 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1793 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1794 u16 vlan_id;
1795 u8 in_port_num;
1796 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1797 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1798 int mskid;
1799 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1800
1801 if (!(void *)mac_entry) {
1802 dev_err(dsaf_dev->dev,
1803 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1804 return -EINVAL;
1805 }
1806
1807 /*get key info*/
1808 vlan_id = mac_entry->in_vlan_id;
1809 in_port_num = mac_entry->in_port_num;
1810
1811 /*check mac addr */
1812 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1813 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1814 mac_entry->addr);
1815 return -EINVAL;
1816 }
1817
1818 /*config key */
1819 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1820 mac_entry->addr);
1821
1822 /*check is exist? */
1823 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1824 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1825 /*find none */
1826 dev_err(dsaf_dev->dev,
1827 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1828 dsaf_dev->ae_dev.name,
1829 mac_key.high.val, mac_key.low.val);
1830 return -EINVAL;
1831 }
1832
1833 dev_dbg(dsaf_dev->dev,
1834 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1835 dsaf_dev->ae_dev.name, mac_key.high.val,
1836 mac_key.low.val, entry_index);
1837
1838 /*read entry*/
1839 hns_dsaf_tcam_mc_get(
1840 dsaf_dev, entry_index,
1841 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1842
1843 /*del the port*/
1844 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1845 mskid = mac_entry->port_num;
1846 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1847 mskid = mac_entry->port_num -
1848 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1849 } else {
1850 dev_err(dsaf_dev->dev,
1851 "%s,pnum(%d)error,key(%#x:%#x)\n",
1852 dsaf_dev->ae_dev.name, mac_entry->port_num,
1853 mac_key.high.val, mac_key.low.val);
1854 return -EINVAL;
1855 }
1856 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1857
1858 /*check non port, do del entry */
1859 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1860 sizeof(mac_data.tbl_mcast_port_msk))) {
1861 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1862
1863 /* del soft entry */
1864 soft_mac_entry += entry_index;
1865 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1866 } else { /* not zer, just del port, updata*/
1867 hns_dsaf_tcam_mc_cfg(
1868 dsaf_dev, entry_index,
1869 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1870 }
1871
1872 return 0;
1873 }
1874
1875 /**
1876 * hns_dsaf_get_mac_uc_entry - get mac uc entry
1877 * @dsaf_dev: dsa fabric device struct pointer
1878 * @mac_entry: mac entry
1879 */
1880 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1881 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1882 {
1883 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1884 struct dsaf_drv_tbl_tcam_key mac_key;
1885
1886 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1887
1888 /* check macaddr */
1889 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1890 MAC_IS_BROADCAST(mac_entry->addr)) {
1891 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1892 mac_entry->addr);
1893 return -EINVAL;
1894 }
1895
1896 /*config key */
1897 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1898 mac_entry->in_port_num, mac_entry->addr);
1899
1900 /*check exist? */
1901 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1902 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1903 /*find none, error */
1904 dev_err(dsaf_dev->dev,
1905 "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1906 dsaf_dev->ae_dev.name,
1907 mac_key.high.val, mac_key.low.val);
1908 return -EINVAL;
1909 }
1910 dev_dbg(dsaf_dev->dev,
1911 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1912 dsaf_dev->ae_dev.name, mac_key.high.val,
1913 mac_key.low.val, entry_index);
1914
1915 /*read entry*/
1916 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1917 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1918 mac_entry->port_num = mac_data.tbl_ucast_out_port;
1919
1920 return 0;
1921 }
1922
1923 /**
1924 * hns_dsaf_get_mac_mc_entry - get mac mc entry
1925 * @dsaf_dev: dsa fabric device struct pointer
1926 * @mac_entry: mac entry
1927 */
1928 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1929 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1930 {
1931 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1932 struct dsaf_drv_tbl_tcam_key mac_key;
1933
1934 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1935
1936 /*check mac addr */
1937 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1938 MAC_IS_BROADCAST(mac_entry->addr)) {
1939 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1940 mac_entry->addr);
1941 return -EINVAL;
1942 }
1943
1944 /*config key */
1945 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1946 mac_entry->in_port_num, mac_entry->addr);
1947
1948 /*check exist? */
1949 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1950 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1951 /* find none, error */
1952 dev_err(dsaf_dev->dev,
1953 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1954 dsaf_dev->ae_dev.name, mac_key.high.val,
1955 mac_key.low.val);
1956 return -EINVAL;
1957 }
1958 dev_dbg(dsaf_dev->dev,
1959 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1960 dsaf_dev->ae_dev.name, mac_key.high.val,
1961 mac_key.low.val, entry_index);
1962
1963 /*read entry */
1964 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1965 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1966
1967 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1968 return 0;
1969 }
1970
1971 /**
1972 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1973 * @dsaf_dev: dsa fabric device struct pointer
1974 * @entry_index: tab entry index
1975 * @mac_entry: mac entry
1976 */
1977 int hns_dsaf_get_mac_entry_by_index(
1978 struct dsaf_device *dsaf_dev,
1979 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1980 {
1981 struct dsaf_drv_tbl_tcam_key mac_key;
1982
1983 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1984 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1985 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1986
1987 if (entry_index >= DSAF_TCAM_SUM) {
1988 /* find none, del error */
1989 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1990 dsaf_dev->ae_dev.name);
1991 return -EINVAL;
1992 }
1993
1994 /* mc entry, do read opt */
1995 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1996 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1997
1998 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1999
2000 /***get mac addr*/
2001 mac_addr[0] = mac_key.high.bits.mac_0;
2002 mac_addr[1] = mac_key.high.bits.mac_1;
2003 mac_addr[2] = mac_key.high.bits.mac_2;
2004 mac_addr[3] = mac_key.high.bits.mac_3;
2005 mac_addr[4] = mac_key.low.bits.mac_4;
2006 mac_addr[5] = mac_key.low.bits.mac_5;
2007 /**is mc or uc*/
2008 if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
2009 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
2010 /**mc donot do*/
2011 } else {
2012 /*is not mc, just uc... */
2013 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
2014 (struct dsaf_tbl_tcam_data *)&mac_key,
2015 &mac_uc_data);
2016 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
2017 }
2018
2019 return 0;
2020 }
2021
2022 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
2023 size_t sizeof_priv)
2024 {
2025 struct dsaf_device *dsaf_dev;
2026
2027 dsaf_dev = devm_kzalloc(dev,
2028 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
2029 if (unlikely(!dsaf_dev)) {
2030 dsaf_dev = ERR_PTR(-ENOMEM);
2031 } else {
2032 dsaf_dev->dev = dev;
2033 dev_set_drvdata(dev, dsaf_dev);
2034 }
2035
2036 return dsaf_dev;
2037 }
2038
2039 /**
2040 * hns_dsaf_free_dev - free dev mem
2041 * @dev: struct device pointer
2042 */
2043 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
2044 {
2045 (void)dev_set_drvdata(dsaf_dev->dev, NULL);
2046 }
2047
2048 /**
2049 * dsaf_pfc_unit_cnt - set pfc unit count
2050 * @dsaf_id: dsa fabric id
2051 * @pport_rate: value array
2052 * @pdsaf_pfc_unit_cnt: value array
2053 */
2054 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id,
2055 enum dsaf_port_rate_mode rate)
2056 {
2057 u32 unit_cnt;
2058
2059 switch (rate) {
2060 case DSAF_PORT_RATE_10000:
2061 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2062 break;
2063 case DSAF_PORT_RATE_1000:
2064 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2065 break;
2066 case DSAF_PORT_RATE_2500:
2067 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2068 break;
2069 default:
2070 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2071 }
2072
2073 dsaf_set_dev_field(dsaf_dev,
2074 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
2075 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
2076 unit_cnt);
2077 }
2078
2079 /**
2080 * dsaf_port_work_rate_cfg - fifo
2081 * @dsaf_id: dsa fabric id
2082 * @xge_ge_work_mode
2083 */
2084 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
2085 enum dsaf_port_rate_mode rate_mode)
2086 {
2087 u32 port_work_mode;
2088
2089 port_work_mode = dsaf_read_dev(
2090 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
2091
2092 if (rate_mode == DSAF_PORT_RATE_10000)
2093 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
2094 else
2095 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
2096
2097 dsaf_write_dev(dsaf_dev,
2098 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
2099 port_work_mode);
2100
2101 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
2102 }
2103
2104 /**
2105 * hns_dsaf_fix_mac_mode - dsaf modify mac mode
2106 * @mac_cb: mac contrl block
2107 */
2108 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
2109 {
2110 enum dsaf_port_rate_mode mode;
2111 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
2112 int mac_id = mac_cb->mac_id;
2113
2114 if (mac_cb->mac_type != HNAE_PORT_SERVICE)
2115 return;
2116 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
2117 mode = DSAF_PORT_RATE_10000;
2118 else
2119 mode = DSAF_PORT_RATE_1000;
2120
2121 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
2122 }
2123
2124 static u32 hns_dsaf_get_inode_prio_reg(int index)
2125 {
2126 int base_index, offset;
2127 u32 base_addr = DSAF_INODE_IN_PRIO_PAUSE_BASE_REG;
2128
2129 base_index = (index + 1) / DSAF_REG_PER_ZONE;
2130 offset = (index + 1) % DSAF_REG_PER_ZONE;
2131
2132 return base_addr + DSAF_INODE_IN_PRIO_PAUSE_BASE_OFFSET * base_index +
2133 DSAF_INODE_IN_PRIO_PAUSE_OFFSET * offset;
2134 }
2135
2136 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
2137 {
2138 struct dsaf_hw_stats *hw_stats
2139 = &dsaf_dev->hw_stats[node_num];
2140 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2141 int i;
2142 u32 reg_tmp;
2143
2144 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
2145 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2146 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
2147 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
2148 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
2149 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
2150 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
2151 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
2152
2153 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2154 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2155 hw_stats->rx_pause_frame +=
2156 dsaf_read_dev(dsaf_dev, reg_tmp + 0x80 * (u64)node_num);
2157
2158 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
2159 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
2160 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2161 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2162 hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2163 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2164 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2165 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2166 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2167 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2168 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2169 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2170
2171 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2172 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2173 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2174 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2175
2176 /* pfc pause frame statistics stored in dsaf inode*/
2177 if ((node_num < DSAF_SERVICE_NW_NUM) && !is_ver1) {
2178 for (i = 0; i < DSAF_PRIO_NR; i++) {
2179 reg_tmp = hns_dsaf_get_inode_prio_reg(i);
2180 hw_stats->rx_pfc[i] += dsaf_read_dev(dsaf_dev,
2181 reg_tmp + 0x4 * (u64)node_num);
2182 hw_stats->tx_pfc[i] += dsaf_read_dev(dsaf_dev,
2183 DSAF_XOD_XGE_PFC_PRIO_CNT_BASE_REG +
2184 DSAF_XOD_XGE_PFC_PRIO_CNT_OFFSET * i +
2185 0xF0 * (u64)node_num);
2186 }
2187 }
2188 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2189 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2190 }
2191
2192 /**
2193 *hns_dsaf_get_regs - dump dsaf regs
2194 *@dsaf_dev: dsaf device
2195 *@data:data for value of regs
2196 */
2197 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2198 {
2199 u32 i = 0;
2200 u32 j;
2201 u32 *p = data;
2202 u32 reg_tmp;
2203 bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver);
2204
2205 /* dsaf common registers */
2206 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2207 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2208 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2209 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2210 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2211 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2212 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2213 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2214 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2215
2216 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2217 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2218 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2219 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2220 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2221 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2222 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2223 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2224 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2225 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2226 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2227 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2228 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2229 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2230 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2231
2232 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2233 p[24 + i] = dsaf_read_dev(ddev,
2234 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2235
2236 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2237
2238 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2239 p[33 + i] = dsaf_read_dev(ddev,
2240 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2241
2242 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2243 p[41 + i] = dsaf_read_dev(ddev,
2244 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2245
2246 /* dsaf inode registers */
2247 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2248
2249 p[171] = dsaf_read_dev(ddev,
2250 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2251
2252 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2253 j = i * DSAF_COMM_CHN + port;
2254 p[172 + i] = dsaf_read_dev(ddev,
2255 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2256 p[175 + i] = dsaf_read_dev(ddev,
2257 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2258 p[178 + i] = dsaf_read_dev(ddev,
2259 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2260 p[181 + i] = dsaf_read_dev(ddev,
2261 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2262 p[184 + i] = dsaf_read_dev(ddev,
2263 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2264 p[187 + i] = dsaf_read_dev(ddev,
2265 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2266 p[190 + i] = dsaf_read_dev(ddev,
2267 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
2268 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2269 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2270 p[193 + i] = dsaf_read_dev(ddev, reg_tmp + j * 0x80);
2271 p[196 + i] = dsaf_read_dev(ddev,
2272 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2273 p[199 + i] = dsaf_read_dev(ddev,
2274 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2275 p[202 + i] = dsaf_read_dev(ddev,
2276 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2277 p[205 + i] = dsaf_read_dev(ddev,
2278 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2279 p[208 + i] = dsaf_read_dev(ddev,
2280 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2281 p[211 + i] = dsaf_read_dev(ddev,
2282 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2283 p[214 + i] = dsaf_read_dev(ddev,
2284 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2285 p[217 + i] = dsaf_read_dev(ddev,
2286 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2287 p[220 + i] = dsaf_read_dev(ddev,
2288 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2289 p[223 + i] = dsaf_read_dev(ddev,
2290 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2291 p[224 + i] = dsaf_read_dev(ddev,
2292 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2293 }
2294
2295 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2296
2297 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2298 j = i * DSAF_COMM_CHN + port;
2299 p[228 + i] = dsaf_read_dev(ddev,
2300 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2301 }
2302
2303 p[231] = dsaf_read_dev(ddev,
2304 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2305
2306 /* dsaf inode registers */
2307 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
2308 j = i * DSAF_COMM_CHN + port;
2309 p[232 + i] = dsaf_read_dev(ddev,
2310 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2311 p[235 + i] = dsaf_read_dev(ddev,
2312 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2313 p[238 + i] = dsaf_read_dev(ddev,
2314 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2315 p[241 + i] = dsaf_read_dev(ddev,
2316 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2317 p[244 + i] = dsaf_read_dev(ddev,
2318 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2319 p[245 + i] = dsaf_read_dev(ddev,
2320 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2321 p[248 + i] = dsaf_read_dev(ddev,
2322 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2323 p[251 + i] = dsaf_read_dev(ddev,
2324 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2325 p[254 + i] = dsaf_read_dev(ddev,
2326 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2327 p[257 + i] = dsaf_read_dev(ddev,
2328 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2329 p[260 + i] = dsaf_read_dev(ddev,
2330 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2331 p[263 + i] = dsaf_read_dev(ddev,
2332 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2333 p[266 + i] = dsaf_read_dev(ddev,
2334 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2335 p[269 + i] = dsaf_read_dev(ddev,
2336 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2337 p[272 + i] = dsaf_read_dev(ddev,
2338 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2339 p[275 + i] = dsaf_read_dev(ddev,
2340 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2341 p[278 + i] = dsaf_read_dev(ddev,
2342 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2343 p[281 + i] = dsaf_read_dev(ddev,
2344 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2345 p[284 + i] = dsaf_read_dev(ddev,
2346 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2347 p[287 + i] = dsaf_read_dev(ddev,
2348 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2349 p[290 + i] = dsaf_read_dev(ddev,
2350 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2351 p[293 + i] = dsaf_read_dev(ddev,
2352 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2353 p[296 + i] = dsaf_read_dev(ddev,
2354 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2355 p[299 + i] = dsaf_read_dev(ddev,
2356 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2357 p[302 + i] = dsaf_read_dev(ddev,
2358 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2359 p[305 + i] = dsaf_read_dev(ddev,
2360 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2361 p[308 + i] = dsaf_read_dev(ddev,
2362 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2363 }
2364
2365 /* dsaf onode registers */
2366 for (i = 0; i < DSAF_XOD_NUM; i++) {
2367 p[311 + i] = dsaf_read_dev(ddev,
2368 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + i * 0x90);
2369 p[319 + i] = dsaf_read_dev(ddev,
2370 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + i * 0x90);
2371 p[327 + i] = dsaf_read_dev(ddev,
2372 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + i * 0x90);
2373 p[335 + i] = dsaf_read_dev(ddev,
2374 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + i * 0x90);
2375 p[343 + i] = dsaf_read_dev(ddev,
2376 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + i * 0x90);
2377 p[351 + i] = dsaf_read_dev(ddev,
2378 DSAF_XOD_ETS_TOKEN_CFG_0_REG + i * 0x90);
2379 }
2380
2381 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2382 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2383 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2384
2385 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2386 j = i * DSAF_COMM_CHN + port;
2387 p[362 + i] = dsaf_read_dev(ddev,
2388 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2389 p[365 + i] = dsaf_read_dev(ddev,
2390 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2391 p[368 + i] = dsaf_read_dev(ddev,
2392 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2393 p[371 + i] = dsaf_read_dev(ddev,
2394 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2395 p[374 + i] = dsaf_read_dev(ddev,
2396 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2397 p[377 + i] = dsaf_read_dev(ddev,
2398 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2399 p[380 + i] = dsaf_read_dev(ddev,
2400 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2401 p[383 + i] = dsaf_read_dev(ddev,
2402 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2403 p[386 + i] = dsaf_read_dev(ddev,
2404 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2405 p[389 + i] = dsaf_read_dev(ddev,
2406 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2407 }
2408
2409 p[392] = dsaf_read_dev(ddev,
2410 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2411 p[393] = dsaf_read_dev(ddev,
2412 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2413 p[394] = dsaf_read_dev(ddev,
2414 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2415 p[395] = dsaf_read_dev(ddev,
2416 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2417 p[396] = dsaf_read_dev(ddev,
2418 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2419 p[397] = dsaf_read_dev(ddev,
2420 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2421 p[398] = dsaf_read_dev(ddev,
2422 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2423 p[399] = dsaf_read_dev(ddev,
2424 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2425 p[400] = dsaf_read_dev(ddev,
2426 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2427 p[401] = dsaf_read_dev(ddev,
2428 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2429 p[402] = dsaf_read_dev(ddev,
2430 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2431 p[403] = dsaf_read_dev(ddev,
2432 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2433 p[404] = dsaf_read_dev(ddev,
2434 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2435
2436 /* dsaf voq registers */
2437 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2438 j = (i * DSAF_COMM_CHN + port) * 0x90;
2439 p[405 + i] = dsaf_read_dev(ddev,
2440 DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2441 p[408 + i] = dsaf_read_dev(ddev,
2442 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2443 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2444 p[414 + i] = dsaf_read_dev(ddev,
2445 DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2446 p[417 + i] = dsaf_read_dev(ddev,
2447 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2448 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2449 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2450 p[426 + i] = dsaf_read_dev(ddev,
2451 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2452 p[429 + i] = dsaf_read_dev(ddev,
2453 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2454 p[432 + i] = dsaf_read_dev(ddev,
2455 DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2456 p[435 + i] = dsaf_read_dev(ddev,
2457 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2458 p[438 + i] = dsaf_read_dev(ddev,
2459 DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2460 }
2461
2462 /* dsaf tbl registers */
2463 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2464 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2465 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2466 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2467 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2468 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2469 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2470 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2471 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2472 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2473 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2474 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2475 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2476 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2477 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2478 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2479 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2480 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2481 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2482 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2483 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2484 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2485 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2486
2487 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2488 j = i * 0x8;
2489 p[464 + 2 * i] = dsaf_read_dev(ddev,
2490 DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2491 p[465 + 2 * i] = dsaf_read_dev(ddev,
2492 DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2493 }
2494
2495 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2496 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2497 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2498 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2499 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2500 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2501 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2502 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2503 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2504 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2505 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2506 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2507
2508 /* dsaf other registers */
2509 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2510 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2511 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2512 p[495] = dsaf_read_dev(ddev,
2513 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2514 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2515 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2516
2517 if (!is_ver1)
2518 p[498] = dsaf_read_dev(ddev, DSAF_PAUSE_CFG_REG + port * 0x4);
2519
2520 /* mark end of dsaf regs */
2521 for (i = 499; i < 504; i++)
2522 p[i] = 0xdddddddd;
2523 }
2524
2525 static char *hns_dsaf_get_node_stats_strings(char *data, int node,
2526 struct dsaf_device *dsaf_dev)
2527 {
2528 char *buff = data;
2529 int i;
2530 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2531
2532 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2533 buff = buff + ETH_GSTRING_LEN;
2534 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2535 buff = buff + ETH_GSTRING_LEN;
2536 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2537 buff = buff + ETH_GSTRING_LEN;
2538 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2539 buff = buff + ETH_GSTRING_LEN;
2540 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2541 buff = buff + ETH_GSTRING_LEN;
2542 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2543 buff = buff + ETH_GSTRING_LEN;
2544 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2545 buff = buff + ETH_GSTRING_LEN;
2546 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2547 buff = buff + ETH_GSTRING_LEN;
2548 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2549 buff = buff + ETH_GSTRING_LEN;
2550 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2551 buff = buff + ETH_GSTRING_LEN;
2552 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2553 buff = buff + ETH_GSTRING_LEN;
2554 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2555 buff = buff + ETH_GSTRING_LEN;
2556 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2557 buff = buff + ETH_GSTRING_LEN;
2558 if ((node < DSAF_SERVICE_NW_NUM) && (!is_ver1)) {
2559 for (i = 0; i < DSAF_PRIO_NR; i++) {
2560 snprintf(buff, ETH_GSTRING_LEN,
2561 "inod%d_pfc_prio%d_pkts", node, i);
2562 buff = buff + ETH_GSTRING_LEN;
2563 }
2564 for (i = 0; i < DSAF_PRIO_NR; i++) {
2565 snprintf(buff, ETH_GSTRING_LEN,
2566 "onod%d_pfc_prio%d_pkts", node, i);
2567 buff = buff + ETH_GSTRING_LEN;
2568 }
2569 }
2570 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2571 buff = buff + ETH_GSTRING_LEN;
2572
2573 return buff;
2574 }
2575
2576 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2577 int node_num)
2578 {
2579 u64 *p = data;
2580 int i;
2581 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2582 bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver);
2583
2584 p[0] = hw_stats->pad_drop;
2585 p[1] = hw_stats->man_pkts;
2586 p[2] = hw_stats->rx_pkts;
2587 p[3] = hw_stats->rx_pkt_id;
2588 p[4] = hw_stats->rx_pause_frame;
2589 p[5] = hw_stats->release_buf_num;
2590 p[6] = hw_stats->sbm_drop;
2591 p[7] = hw_stats->crc_false;
2592 p[8] = hw_stats->bp_drop;
2593 p[9] = hw_stats->rslt_drop;
2594 p[10] = hw_stats->local_addr_false;
2595 p[11] = hw_stats->vlan_drop;
2596 p[12] = hw_stats->stp_drop;
2597 if ((node_num < DSAF_SERVICE_NW_NUM) && (!is_ver1)) {
2598 for (i = 0; i < DSAF_PRIO_NR; i++) {
2599 p[13 + i] = hw_stats->rx_pfc[i];
2600 p[13 + i + DSAF_PRIO_NR] = hw_stats->tx_pfc[i];
2601 }
2602 p[29] = hw_stats->tx_pkts;
2603 return &p[30];
2604 }
2605
2606 p[13] = hw_stats->tx_pkts;
2607 return &p[14];
2608 }
2609
2610 /**
2611 *hns_dsaf_get_stats - get dsaf statistic
2612 *@ddev: dsaf device
2613 *@data:statistic value
2614 *@port: port num
2615 */
2616 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2617 {
2618 u64 *p = data;
2619 int node_num = port;
2620
2621 /* for ge/xge node info */
2622 p = hns_dsaf_get_node_stats(ddev, p, node_num);
2623
2624 /* for ppe node info */
2625 node_num = port + DSAF_PPE_INODE_BASE;
2626 (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2627 }
2628
2629 /**
2630 *hns_dsaf_get_sset_count - get dsaf string set count
2631 *@stringset: type of values in data
2632 *return dsaf string name count
2633 */
2634 int hns_dsaf_get_sset_count(struct dsaf_device *dsaf_dev, int stringset)
2635 {
2636 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2637
2638 if (stringset == ETH_SS_STATS) {
2639 if (is_ver1)
2640 return DSAF_STATIC_NUM;
2641 else
2642 return DSAF_V2_STATIC_NUM;
2643 }
2644 return 0;
2645 }
2646
2647 /**
2648 *hns_dsaf_get_strings - get dsaf string set
2649 *@stringset:srting set index
2650 *@data:strings name value
2651 *@port:port index
2652 */
2653 void hns_dsaf_get_strings(int stringset, u8 *data, int port,
2654 struct dsaf_device *dsaf_dev)
2655 {
2656 char *buff = (char *)data;
2657 int node = port;
2658
2659 if (stringset != ETH_SS_STATS)
2660 return;
2661
2662 /* for ge/xge node info */
2663 buff = hns_dsaf_get_node_stats_strings(buff, node, dsaf_dev);
2664
2665 /* for ppe node info */
2666 node = port + DSAF_PPE_INODE_BASE;
2667 (void)hns_dsaf_get_node_stats_strings(buff, node, dsaf_dev);
2668 }
2669
2670 /**
2671 *hns_dsaf_get_sset_count - get dsaf regs count
2672 *return dsaf regs count
2673 */
2674 int hns_dsaf_get_regs_count(void)
2675 {
2676 return DSAF_DUMP_REGS_NUM;
2677 }
2678
2679 /**
2680 * dsaf_probe - probo dsaf dev
2681 * @pdev: dasf platform device
2682 * retuen 0 - success , negative --fail
2683 */
2684 static int hns_dsaf_probe(struct platform_device *pdev)
2685 {
2686 struct dsaf_device *dsaf_dev;
2687 int ret;
2688
2689 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2690 if (IS_ERR(dsaf_dev)) {
2691 ret = PTR_ERR(dsaf_dev);
2692 dev_err(&pdev->dev,
2693 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2694 return ret;
2695 }
2696
2697 ret = hns_dsaf_get_cfg(dsaf_dev);
2698 if (ret)
2699 goto free_dev;
2700
2701 ret = hns_dsaf_init(dsaf_dev);
2702 if (ret)
2703 goto free_dev;
2704
2705 ret = hns_mac_init(dsaf_dev);
2706 if (ret)
2707 goto uninit_dsaf;
2708
2709 ret = hns_ppe_init(dsaf_dev);
2710 if (ret)
2711 goto uninit_mac;
2712
2713 ret = hns_dsaf_ae_init(dsaf_dev);
2714 if (ret)
2715 goto uninit_ppe;
2716
2717 return 0;
2718
2719 uninit_ppe:
2720 hns_ppe_uninit(dsaf_dev);
2721
2722 uninit_mac:
2723 hns_mac_uninit(dsaf_dev);
2724
2725 uninit_dsaf:
2726 hns_dsaf_free(dsaf_dev);
2727
2728 free_dev:
2729 hns_dsaf_free_dev(dsaf_dev);
2730
2731 return ret;
2732 }
2733
2734 /**
2735 * dsaf_remove - remove dsaf dev
2736 * @pdev: dasf platform device
2737 */
2738 static int hns_dsaf_remove(struct platform_device *pdev)
2739 {
2740 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2741
2742 hns_dsaf_ae_uninit(dsaf_dev);
2743
2744 hns_ppe_uninit(dsaf_dev);
2745
2746 hns_mac_uninit(dsaf_dev);
2747
2748 hns_dsaf_free(dsaf_dev);
2749
2750 hns_dsaf_free_dev(dsaf_dev);
2751
2752 return 0;
2753 }
2754
2755 static const struct of_device_id g_dsaf_match[] = {
2756 {.compatible = "hisilicon,hns-dsaf-v1"},
2757 {.compatible = "hisilicon,hns-dsaf-v2"},
2758 {}
2759 };
2760
2761 static struct platform_driver g_dsaf_driver = {
2762 .probe = hns_dsaf_probe,
2763 .remove = hns_dsaf_remove,
2764 .driver = {
2765 .name = DSAF_DRV_NAME,
2766 .of_match_table = g_dsaf_match,
2767 .acpi_match_table = hns_dsaf_acpi_match,
2768 },
2769 };
2770
2771 module_platform_driver(g_dsaf_driver);
2772
2773 MODULE_LICENSE("GPL");
2774 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2775 MODULE_DESCRIPTION("HNS DSAF driver");
2776 MODULE_VERSION(DSAF_MOD_VERSION);
Linux kernel - Deliverables
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