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net: hns: enet specify a reference to dsaf by fwnode_handle
[deliverable/linux.git] / drivers / net / ethernet / hisilicon / hns / hns_dsaf_main.c
1 /*
2 * Copyright (c) 2014-2015 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10 #include <linux/device.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/netdevice.h>
16 #include <linux/mfd/syscon.h>
17 #include <linux/of.h>
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <linux/platform_device.h>
21 #include <linux/vmalloc.h>
22
23 #include "hns_dsaf_mac.h"
24 #include "hns_dsaf_main.h"
25 #include "hns_dsaf_ppe.h"
26 #include "hns_dsaf_rcb.h"
27
28 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
29 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
30 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
31 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
32 [DSAF_MODE_DISABLE_SP] = "single-port",
33 };
34
35 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
36 {
37 int ret, i;
38 u32 desc_num;
39 u32 buf_size;
40 u32 reset_offset = 0;
41 u32 res_idx = 0;
42 const char *mode_str;
43 struct regmap *syscon;
44 struct resource *res;
45 struct device_node *np = dsaf_dev->dev->of_node;
46 struct platform_device *pdev = to_platform_device(dsaf_dev->dev);
47
48 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
49 dsaf_dev->dsaf_ver = AE_VERSION_1;
50 else
51 dsaf_dev->dsaf_ver = AE_VERSION_2;
52
53 ret = device_property_read_string(dsaf_dev->dev, "mode", &mode_str);
54 if (ret) {
55 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
56 return ret;
57 }
58 for (i = 0; i < DSAF_MODE_MAX; i++) {
59 if (g_dsaf_mode_match[i] &&
60 !strcmp(mode_str, g_dsaf_mode_match[i]))
61 break;
62 }
63 if (i >= DSAF_MODE_MAX ||
64 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
65 dev_err(dsaf_dev->dev,
66 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
67 return -EINVAL;
68 }
69 dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
70
71 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
72 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
73 else
74 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
75
76 if ((i == DSAF_MODE_ENABLE_16VM) ||
77 (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
78 (i == DSAF_MODE_DISABLE_6PORT_2VM))
79 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
80 else
81 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
82
83 syscon = syscon_node_to_regmap(
84 of_parse_phandle(np, "subctrl-syscon", 0));
85 if (IS_ERR_OR_NULL(syscon)) {
86 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++);
87 if (!res) {
88 dev_err(dsaf_dev->dev, "subctrl info is needed!\n");
89 return -ENOMEM;
90 }
91 dsaf_dev->sc_base = devm_ioremap_resource(&pdev->dev, res);
92 if (!dsaf_dev->sc_base) {
93 dev_err(dsaf_dev->dev, "subctrl can not map!\n");
94 return -ENOMEM;
95 }
96
97 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++);
98 if (!res) {
99 dev_err(dsaf_dev->dev, "serdes-ctrl info is needed!\n");
100 return -ENOMEM;
101 }
102 dsaf_dev->sds_base = devm_ioremap_resource(&pdev->dev, res);
103 if (!dsaf_dev->sds_base) {
104 dev_err(dsaf_dev->dev, "serdes-ctrl can not map!\n");
105 return -ENOMEM;
106 }
107 } else {
108 dsaf_dev->sub_ctrl = syscon;
109 }
110
111 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ppe-base");
112 if (!res) {
113 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++);
114 if (!res) {
115 dev_err(dsaf_dev->dev, "ppe-base info is needed!\n");
116 return -ENOMEM;
117 }
118 }
119 dsaf_dev->ppe_base = devm_ioremap_resource(&pdev->dev, res);
120 if (!dsaf_dev->ppe_base) {
121 dev_err(dsaf_dev->dev, "ppe-base resource can not map!\n");
122 return -ENOMEM;
123 }
124 dsaf_dev->ppe_paddr = res->start;
125
126 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
127 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
128 "dsaf-base");
129 if (!res) {
130 res = platform_get_resource(pdev, IORESOURCE_MEM,
131 res_idx);
132 if (!res) {
133 dev_err(dsaf_dev->dev,
134 "dsaf-base info is needed!\n");
135 return -ENOMEM;
136 }
137 }
138 dsaf_dev->io_base = devm_ioremap_resource(&pdev->dev, res);
139 if (!dsaf_dev->io_base) {
140 dev_err(dsaf_dev->dev, "dsaf-base resource can not map!\n");
141 return -ENOMEM;
142 }
143 }
144
145 ret = device_property_read_u32(dsaf_dev->dev, "desc-num", &desc_num);
146 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
147 desc_num > HNS_DSAF_MAX_DESC_CNT) {
148 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
149 desc_num, ret);
150 goto unmap_base_addr;
151 }
152 dsaf_dev->desc_num = desc_num;
153
154 ret = device_property_read_u32(dsaf_dev->dev, "reset-field-offset",
155 &reset_offset);
156 if (ret < 0) {
157 dev_dbg(dsaf_dev->dev,
158 "get reset-field-offset fail, ret=%d!\r\n", ret);
159 }
160 dsaf_dev->reset_offset = reset_offset;
161
162 ret = device_property_read_u32(dsaf_dev->dev, "buf-size", &buf_size);
163 if (ret < 0) {
164 dev_err(dsaf_dev->dev,
165 "get buf-size fail, ret=%d!\r\n", ret);
166 goto unmap_base_addr;
167 }
168 dsaf_dev->buf_size = buf_size;
169
170 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
171 if (dsaf_dev->buf_size_type < 0) {
172 dev_err(dsaf_dev->dev,
173 "buf_size(%d) is wrong!\n", buf_size);
174 goto unmap_base_addr;
175 }
176
177 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
178 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
179 else
180 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
181
182 return 0;
183
184 unmap_base_addr:
185 if (dsaf_dev->io_base)
186 iounmap(dsaf_dev->io_base);
187 if (dsaf_dev->ppe_base)
188 iounmap(dsaf_dev->ppe_base);
189 if (dsaf_dev->sds_base)
190 iounmap(dsaf_dev->sds_base);
191 if (dsaf_dev->sc_base)
192 iounmap(dsaf_dev->sc_base);
193 return ret;
194 }
195
196 static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev)
197 {
198 if (dsaf_dev->io_base)
199 iounmap(dsaf_dev->io_base);
200
201 if (dsaf_dev->ppe_base)
202 iounmap(dsaf_dev->ppe_base);
203
204 if (dsaf_dev->sds_base)
205 iounmap(dsaf_dev->sds_base);
206
207 if (dsaf_dev->sc_base)
208 iounmap(dsaf_dev->sc_base);
209 }
210
211 /**
212 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
213 * @dsaf_id: dsa fabric id
214 */
215 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
216 {
217 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
218 }
219
220 /**
221 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
222 * @dsaf_id: dsa fabric id
223 * @hns_dsaf_reg_cnt_clr_ce: config value
224 */
225 static void
226 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
227 {
228 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
229 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
230 }
231
232 /**
233 * hns_ppe_qid_cfg - config ppe qid
234 * @dsaf_id: dsa fabric id
235 * @pppe_qid_cfg: value array
236 */
237 static void
238 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
239 {
240 u32 i;
241
242 for (i = 0; i < DSAF_COMM_CHN; i++) {
243 dsaf_set_dev_field(dsaf_dev,
244 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
245 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
246 qid_cfg);
247 }
248 }
249
250 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
251 {
252 u16 max_q_per_vf, max_vfn;
253 u32 q_id, q_num_per_port;
254 u32 i;
255
256 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
257 q_num_per_port = max_vfn * max_q_per_vf;
258
259 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
260 dsaf_set_dev_field(dsaf_dev,
261 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
262 0xff, 0, q_id);
263 q_id += q_num_per_port;
264 }
265 }
266
267 static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev)
268 {
269 u16 max_q_per_vf, max_vfn;
270 u32 q_id, q_num_per_port;
271 u32 mac_id;
272
273 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
274 return;
275
276 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
277 q_num_per_port = max_vfn * max_q_per_vf;
278
279 for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) {
280 dsaf_set_dev_field(dsaf_dev,
281 DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
282 DSAFV2_SERDES_LBK_QID_M,
283 DSAFV2_SERDES_LBK_QID_S,
284 q_id);
285 q_id += q_num_per_port;
286 }
287 }
288
289 /**
290 * hns_dsaf_sw_port_type_cfg - cfg sw type
291 * @dsaf_id: dsa fabric id
292 * @psw_port_type: array
293 */
294 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
295 enum dsaf_sw_port_type port_type)
296 {
297 u32 i;
298
299 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
300 dsaf_set_dev_field(dsaf_dev,
301 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
302 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
303 port_type);
304 }
305 }
306
307 /**
308 * hns_dsaf_stp_port_type_cfg - cfg stp type
309 * @dsaf_id: dsa fabric id
310 * @pstp_port_type: array
311 */
312 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
313 enum dsaf_stp_port_type port_type)
314 {
315 u32 i;
316
317 for (i = 0; i < DSAF_COMM_CHN; i++) {
318 dsaf_set_dev_field(dsaf_dev,
319 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
320 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
321 port_type);
322 }
323 }
324
325 #define HNS_DSAF_SBM_NUM(dev) \
326 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
327 /**
328 * hns_dsaf_sbm_cfg - config sbm
329 * @dsaf_id: dsa fabric id
330 */
331 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
332 {
333 u32 o_sbm_cfg;
334 u32 i;
335
336 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
337 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
338 DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
339 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
340 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
341 dsaf_write_dev(dsaf_dev,
342 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
343 }
344 }
345
346 /**
347 * hns_dsaf_sbm_cfg_mib_en - config sbm
348 * @dsaf_id: dsa fabric id
349 */
350 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
351 {
352 u32 sbm_cfg_mib_en;
353 u32 i;
354 u32 reg;
355 u32 read_cnt;
356
357 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
358 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
359 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
360 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
361 }
362
363 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
364 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
365 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
366 }
367
368 /* waitint for all sbm enable finished */
369 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
370 read_cnt = 0;
371 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
372 do {
373 udelay(1);
374 sbm_cfg_mib_en = dsaf_get_dev_bit(
375 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
376 read_cnt++;
377 } while (sbm_cfg_mib_en == 0 &&
378 read_cnt < DSAF_CFG_READ_CNT);
379
380 if (sbm_cfg_mib_en == 0) {
381 dev_err(dsaf_dev->dev,
382 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
383 dsaf_dev->ae_dev.name, i);
384 return -ENODEV;
385 }
386 }
387
388 return 0;
389 }
390
391 /**
392 * hns_dsaf_sbm_bp_wl_cfg - config sbm
393 * @dsaf_id: dsa fabric id
394 */
395 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
396 {
397 u32 o_sbm_bp_cfg;
398 u32 reg;
399 u32 i;
400
401 /* XGE */
402 for (i = 0; i < DSAF_XGE_NUM; i++) {
403 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
404 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
405 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
406 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
407 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
408 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
409 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
410 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
411 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
412
413 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
414 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
415 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
416 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
417 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
418 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
419 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
420
421 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
422 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
423 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
424 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
425 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
426 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
427 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
428
429 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
430 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
431 dsaf_set_field(o_sbm_bp_cfg,
432 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
433 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
434 dsaf_set_field(o_sbm_bp_cfg,
435 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
436 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
437 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
438
439 /* for no enable pfc mode */
440 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
441 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
442 dsaf_set_field(o_sbm_bp_cfg,
443 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
444 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
445 dsaf_set_field(o_sbm_bp_cfg,
446 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
447 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
448 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
449 }
450
451 /* PPE */
452 for (i = 0; i < DSAF_COMM_CHN; i++) {
453 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
454 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
455 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
456 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
457 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
458 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
459 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
460 }
461
462 /* RoCEE */
463 for (i = 0; i < DSAF_COMM_CHN; i++) {
464 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
465 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
466 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
467 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
468 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
469 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
470 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
471 }
472 }
473
474 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
475 {
476 u32 o_sbm_bp_cfg;
477 u32 reg;
478 u32 i;
479
480 /* XGE */
481 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
482 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
483 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
484 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
485 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
486 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
487 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
488 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
489 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
490 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
491
492 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
493 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
494 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
495 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
496 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
497 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
498 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
499
500 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
501 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
502 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
503 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
504 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
505 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
506 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
507
508 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
509 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
510 dsaf_set_field(o_sbm_bp_cfg,
511 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
512 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
513 dsaf_set_field(o_sbm_bp_cfg,
514 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
515 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
516 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
517
518 /* for no enable pfc mode */
519 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
520 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
521 dsaf_set_field(o_sbm_bp_cfg,
522 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
523 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
524 dsaf_set_field(o_sbm_bp_cfg,
525 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
526 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
527 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
528 }
529
530 /* PPE */
531 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
532 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
533 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
534 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
535 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
536 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
537 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
538 /* RoCEE */
539 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
540 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
541 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
542 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
543 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
544 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
545 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
546 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
547 }
548 }
549
550 /**
551 * hns_dsaf_voq_bp_all_thrd_cfg - voq
552 * @dsaf_id: dsa fabric id
553 */
554 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
555 {
556 u32 voq_bp_all_thrd;
557 u32 i;
558
559 for (i = 0; i < DSAF_VOQ_NUM; i++) {
560 voq_bp_all_thrd = dsaf_read_dev(
561 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
562 if (i < DSAF_XGE_NUM) {
563 dsaf_set_field(voq_bp_all_thrd,
564 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
565 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
566 dsaf_set_field(voq_bp_all_thrd,
567 DSAF_VOQ_BP_ALL_UPTHRD_M,
568 DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
569 } else {
570 dsaf_set_field(voq_bp_all_thrd,
571 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
572 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
573 dsaf_set_field(voq_bp_all_thrd,
574 DSAF_VOQ_BP_ALL_UPTHRD_M,
575 DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
576 }
577 dsaf_write_dev(
578 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
579 voq_bp_all_thrd);
580 }
581 }
582
583 /**
584 * hns_dsaf_tbl_tcam_data_cfg - tbl
585 * @dsaf_id: dsa fabric id
586 * @ptbl_tcam_data: addr
587 */
588 static void hns_dsaf_tbl_tcam_data_cfg(
589 struct dsaf_device *dsaf_dev,
590 struct dsaf_tbl_tcam_data *ptbl_tcam_data)
591 {
592 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
593 ptbl_tcam_data->tbl_tcam_data_low);
594 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
595 ptbl_tcam_data->tbl_tcam_data_high);
596 }
597
598 /**
599 * dsaf_tbl_tcam_mcast_cfg - tbl
600 * @dsaf_id: dsa fabric id
601 * @ptbl_tcam_mcast: addr
602 */
603 static void hns_dsaf_tbl_tcam_mcast_cfg(
604 struct dsaf_device *dsaf_dev,
605 struct dsaf_tbl_tcam_mcast_cfg *mcast)
606 {
607 u32 mcast_cfg4;
608
609 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
610 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
611 mcast->tbl_mcast_item_vld);
612 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
613 mcast->tbl_mcast_old_en);
614 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
615 DSAF_TBL_MCAST_CFG4_VM128_112_S,
616 mcast->tbl_mcast_port_msk[4]);
617 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
618
619 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
620 mcast->tbl_mcast_port_msk[3]);
621
622 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
623 mcast->tbl_mcast_port_msk[2]);
624
625 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
626 mcast->tbl_mcast_port_msk[1]);
627
628 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
629 mcast->tbl_mcast_port_msk[0]);
630 }
631
632 /**
633 * hns_dsaf_tbl_tcam_ucast_cfg - tbl
634 * @dsaf_id: dsa fabric id
635 * @ptbl_tcam_ucast: addr
636 */
637 static void hns_dsaf_tbl_tcam_ucast_cfg(
638 struct dsaf_device *dsaf_dev,
639 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
640 {
641 u32 ucast_cfg1;
642
643 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
644 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
645 tbl_tcam_ucast->tbl_ucast_mac_discard);
646 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
647 tbl_tcam_ucast->tbl_ucast_item_vld);
648 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
649 tbl_tcam_ucast->tbl_ucast_old_en);
650 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
651 tbl_tcam_ucast->tbl_ucast_dvc);
652 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
653 DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
654 tbl_tcam_ucast->tbl_ucast_out_port);
655 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
656 }
657
658 /**
659 * hns_dsaf_tbl_line_cfg - tbl
660 * @dsaf_id: dsa fabric id
661 * @ptbl_lin: addr
662 */
663 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
664 struct dsaf_tbl_line_cfg *tbl_lin)
665 {
666 u32 tbl_line;
667
668 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
669 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
670 tbl_lin->tbl_line_mac_discard);
671 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
672 tbl_lin->tbl_line_dvc);
673 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
674 DSAF_TBL_LINE_CFG_OUT_PORT_S,
675 tbl_lin->tbl_line_out_port);
676 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
677 }
678
679 /**
680 * hns_dsaf_tbl_tcam_mcast_pul - tbl
681 * @dsaf_id: dsa fabric id
682 */
683 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
684 {
685 u32 o_tbl_pul;
686
687 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
688 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
689 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
690 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
691 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
692 }
693
694 /**
695 * hns_dsaf_tbl_line_pul - tbl
696 * @dsaf_id: dsa fabric id
697 */
698 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
699 {
700 u32 tbl_pul;
701
702 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
703 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
704 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
705 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
706 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
707 }
708
709 /**
710 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
711 * @dsaf_id: dsa fabric id
712 */
713 static void hns_dsaf_tbl_tcam_data_mcast_pul(
714 struct dsaf_device *dsaf_dev)
715 {
716 u32 o_tbl_pul;
717
718 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
719 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
720 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
721 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
722 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
723 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
724 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
725 }
726
727 /**
728 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
729 * @dsaf_id: dsa fabric id
730 */
731 static void hns_dsaf_tbl_tcam_data_ucast_pul(
732 struct dsaf_device *dsaf_dev)
733 {
734 u32 o_tbl_pul;
735
736 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
737 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
738 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
739 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
740 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
741 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
742 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
743 }
744
745 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
746 {
747 if (!HNS_DSAF_IS_DEBUG(dsaf_dev))
748 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG,
749 DSAF_CFG_MIX_MODE_S, !!en);
750 }
751
752 void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en)
753 {
754 if (AE_IS_VER1(dsaf_dev->dsaf_ver) ||
755 dsaf_dev->mac_cb[mac_id]->mac_type == HNAE_PORT_DEBUG)
756 return;
757
758 dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
759 DSAFV2_SERDES_LBK_EN_B, !!en);
760 }
761
762 /**
763 * hns_dsaf_tbl_stat_en - tbl
764 * @dsaf_id: dsa fabric id
765 * @ptbl_stat_en: addr
766 */
767 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
768 {
769 u32 o_tbl_ctrl;
770
771 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
772 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
773 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
774 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
775 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
776 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
777 }
778
779 /**
780 * hns_dsaf_rocee_bp_en - rocee back press enable
781 * @dsaf_id: dsa fabric id
782 */
783 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
784 {
785 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
786 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
787 DSAF_FC_XGE_TX_PAUSE_S, 1);
788 }
789
790 /* set msk for dsaf exception irq*/
791 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
792 u32 chnn_num, u32 mask_set)
793 {
794 dsaf_write_dev(dsaf_dev,
795 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
796 }
797
798 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
799 u32 chnn_num, u32 msk_set)
800 {
801 dsaf_write_dev(dsaf_dev,
802 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
803 }
804
805 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
806 u32 chnn, u32 msk_set)
807 {
808 dsaf_write_dev(dsaf_dev,
809 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
810 }
811
812 static void
813 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
814 {
815 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
816 }
817
818 /* clr dsaf exception irq*/
819 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
820 u32 chnn_num, u32 int_src)
821 {
822 dsaf_write_dev(dsaf_dev,
823 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
824 }
825
826 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
827 u32 chnn, u32 int_src)
828 {
829 dsaf_write_dev(dsaf_dev,
830 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
831 }
832
833 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
834 u32 chnn, u32 int_src)
835 {
836 dsaf_write_dev(dsaf_dev,
837 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
838 }
839
840 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
841 u32 int_src)
842 {
843 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
844 }
845
846 /**
847 * hns_dsaf_single_line_tbl_cfg - INT
848 * @dsaf_id: dsa fabric id
849 * @address:
850 * @ptbl_line:
851 */
852 static void hns_dsaf_single_line_tbl_cfg(
853 struct dsaf_device *dsaf_dev,
854 u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
855 {
856 /*Write Addr*/
857 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
858
859 /*Write Line*/
860 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
861
862 /*Write Plus*/
863 hns_dsaf_tbl_line_pul(dsaf_dev);
864 }
865
866 /**
867 * hns_dsaf_tcam_uc_cfg - INT
868 * @dsaf_id: dsa fabric id
869 * @address,
870 * @ptbl_tcam_data,
871 */
872 static void hns_dsaf_tcam_uc_cfg(
873 struct dsaf_device *dsaf_dev, u32 address,
874 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
875 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
876 {
877 /*Write Addr*/
878 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
879 /*Write Tcam Data*/
880 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
881 /*Write Tcam Ucast*/
882 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
883 /*Write Plus*/
884 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
885 }
886
887 /**
888 * hns_dsaf_tcam_mc_cfg - INT
889 * @dsaf_id: dsa fabric id
890 * @address,
891 * @ptbl_tcam_data,
892 * @ptbl_tcam_mcast,
893 */
894 static void hns_dsaf_tcam_mc_cfg(
895 struct dsaf_device *dsaf_dev, u32 address,
896 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
897 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
898 {
899 /*Write Addr*/
900 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
901 /*Write Tcam Data*/
902 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
903 /*Write Tcam Mcast*/
904 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
905 /*Write Plus*/
906 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
907 }
908
909 /**
910 * hns_dsaf_tcam_mc_invld - INT
911 * @dsaf_id: dsa fabric id
912 * @address
913 */
914 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
915 {
916 /*Write Addr*/
917 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
918
919 /*write tcam mcast*/
920 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
921 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
922 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
923 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
924 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
925
926 /*Write Plus*/
927 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
928 }
929
930 /**
931 * hns_dsaf_tcam_uc_get - INT
932 * @dsaf_id: dsa fabric id
933 * @address
934 * @ptbl_tcam_data
935 * @ptbl_tcam_ucast
936 */
937 static void hns_dsaf_tcam_uc_get(
938 struct dsaf_device *dsaf_dev, u32 address,
939 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
940 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
941 {
942 u32 tcam_read_data0;
943 u32 tcam_read_data4;
944
945 /*Write Addr*/
946 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
947
948 /*read tcam item puls*/
949 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
950
951 /*read tcam data*/
952 ptbl_tcam_data->tbl_tcam_data_high
953 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
954 ptbl_tcam_data->tbl_tcam_data_low
955 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
956
957 /*read tcam mcast*/
958 tcam_read_data0 = dsaf_read_dev(dsaf_dev,
959 DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
960 tcam_read_data4 = dsaf_read_dev(dsaf_dev,
961 DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
962
963 ptbl_tcam_ucast->tbl_ucast_item_vld
964 = dsaf_get_bit(tcam_read_data4,
965 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
966 ptbl_tcam_ucast->tbl_ucast_old_en
967 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
968 ptbl_tcam_ucast->tbl_ucast_mac_discard
969 = dsaf_get_bit(tcam_read_data0,
970 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
971 ptbl_tcam_ucast->tbl_ucast_out_port
972 = dsaf_get_field(tcam_read_data0,
973 DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
974 DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
975 ptbl_tcam_ucast->tbl_ucast_dvc
976 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
977 }
978
979 /**
980 * hns_dsaf_tcam_mc_get - INT
981 * @dsaf_id: dsa fabric id
982 * @address
983 * @ptbl_tcam_data
984 * @ptbl_tcam_ucast
985 */
986 static void hns_dsaf_tcam_mc_get(
987 struct dsaf_device *dsaf_dev, u32 address,
988 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
989 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
990 {
991 u32 data_tmp;
992
993 /*Write Addr*/
994 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
995
996 /*read tcam item puls*/
997 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
998
999 /*read tcam data*/
1000 ptbl_tcam_data->tbl_tcam_data_high =
1001 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
1002 ptbl_tcam_data->tbl_tcam_data_low =
1003 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
1004
1005 /*read tcam mcast*/
1006 ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
1007 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
1008 ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
1009 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
1010 ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
1011 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
1012 ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
1013 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
1014
1015 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
1016 ptbl_tcam_mcast->tbl_mcast_item_vld =
1017 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
1018 ptbl_tcam_mcast->tbl_mcast_old_en =
1019 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
1020 ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
1021 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
1022 DSAF_TBL_MCAST_CFG4_VM128_112_S);
1023 }
1024
1025 /**
1026 * hns_dsaf_tbl_line_init - INT
1027 * @dsaf_id: dsa fabric id
1028 */
1029 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
1030 {
1031 u32 i;
1032 /* defaultly set all lineal mac table entry resulting discard */
1033 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
1034
1035 for (i = 0; i < DSAF_LINE_SUM; i++)
1036 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
1037 }
1038
1039 /**
1040 * hns_dsaf_tbl_tcam_init - INT
1041 * @dsaf_id: dsa fabric id
1042 */
1043 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
1044 {
1045 u32 i;
1046 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
1047 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
1048
1049 /*tcam tbl*/
1050 for (i = 0; i < DSAF_TCAM_SUM; i++)
1051 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
1052 }
1053
1054 /**
1055 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1056 * @mac_cb: mac contrl block
1057 */
1058 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
1059 int mac_id, int tc_en)
1060 {
1061 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, tc_en);
1062 }
1063
1064 static void hns_dsaf_set_pfc_pause(struct dsaf_device *dsaf_dev,
1065 int mac_id, int tx_en, int rx_en)
1066 {
1067 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1068 if (!tx_en || !rx_en)
1069 dev_err(dsaf_dev->dev, "dsaf v1 can not close pfc!\n");
1070
1071 return;
1072 }
1073
1074 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1075 DSAF_PFC_PAUSE_RX_EN_B, !!rx_en);
1076 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1077 DSAF_PFC_PAUSE_TX_EN_B, !!tx_en);
1078 }
1079
1080 int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1081 u32 en)
1082 {
1083 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1084 if (!en)
1085 dev_err(dsaf_dev->dev, "dsafv1 can't close rx_pause!\n");
1086
1087 return -EINVAL;
1088 }
1089
1090 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1091 DSAF_MAC_PAUSE_RX_EN_B, !!en);
1092
1093 return 0;
1094 }
1095
1096 void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1097 u32 *en)
1098 {
1099 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
1100 *en = 1;
1101 else
1102 *en = dsaf_get_dev_bit(dsaf_dev,
1103 DSAF_PAUSE_CFG_REG + mac_id * 4,
1104 DSAF_MAC_PAUSE_RX_EN_B);
1105 }
1106
1107 /**
1108 * hns_dsaf_tbl_tcam_init - INT
1109 * @dsaf_id: dsa fabric id
1110 * @dsaf_mode
1111 */
1112 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1113 {
1114 u32 i;
1115 u32 o_dsaf_cfg;
1116 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
1117
1118 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1119 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1120 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1121 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1122 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1123 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1124 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1125
1126 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1127 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1128
1129 /* set 22 queue per tx ppe engine, only used in switch mode */
1130 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1131
1132 /* set promisc def queue id */
1133 hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1134
1135 /* set inner loopback queue id */
1136 hns_dsaf_inner_qid_cfg(dsaf_dev);
1137
1138 /* in non switch mode, set all port to access mode */
1139 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1140
1141 /*set dsaf pfc to 0 for parseing rx pause*/
1142 for (i = 0; i < DSAF_COMM_CHN; i++) {
1143 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
1144 hns_dsaf_set_pfc_pause(dsaf_dev, i, is_ver1, is_ver1);
1145 }
1146
1147 /*msk and clr exception irqs */
1148 for (i = 0; i < DSAF_COMM_CHN; i++) {
1149 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1150 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1151 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1152
1153 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1154 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1155 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1156 }
1157 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1158 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1159 }
1160
1161 /**
1162 * hns_dsaf_inode_init - INT
1163 * @dsaf_id: dsa fabric id
1164 */
1165 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1166 {
1167 u32 reg;
1168 u32 tc_cfg;
1169 u32 i;
1170
1171 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1172 tc_cfg = HNS_DSAF_I4TC_CFG;
1173 else
1174 tc_cfg = HNS_DSAF_I8TC_CFG;
1175
1176 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1177 for (i = 0; i < DSAF_INODE_NUM; i++) {
1178 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1179 dsaf_set_dev_field(dsaf_dev, reg,
1180 DSAF_INODE_IN_PORT_NUM_M,
1181 DSAF_INODE_IN_PORT_NUM_S,
1182 i % DSAF_XGE_NUM);
1183 }
1184 } else {
1185 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1186 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1187 dsaf_set_dev_field(dsaf_dev, reg,
1188 DSAF_INODE_IN_PORT_NUM_M,
1189 DSAF_INODE_IN_PORT_NUM_S, 0);
1190 dsaf_set_dev_field(dsaf_dev, reg,
1191 DSAFV2_INODE_IN_PORT1_NUM_M,
1192 DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1193 dsaf_set_dev_field(dsaf_dev, reg,
1194 DSAFV2_INODE_IN_PORT2_NUM_M,
1195 DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1196 dsaf_set_dev_field(dsaf_dev, reg,
1197 DSAFV2_INODE_IN_PORT3_NUM_M,
1198 DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1199 dsaf_set_dev_field(dsaf_dev, reg,
1200 DSAFV2_INODE_IN_PORT4_NUM_M,
1201 DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1202 dsaf_set_dev_field(dsaf_dev, reg,
1203 DSAFV2_INODE_IN_PORT5_NUM_M,
1204 DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1205 }
1206 }
1207 for (i = 0; i < DSAF_INODE_NUM; i++) {
1208 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1209 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1210 }
1211 }
1212
1213 /**
1214 * hns_dsaf_sbm_init - INT
1215 * @dsaf_id: dsa fabric id
1216 */
1217 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1218 {
1219 u32 flag;
1220 u32 finish_msk;
1221 u32 cnt = 0;
1222 int ret;
1223
1224 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1225 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1226 finish_msk = DSAF_SRAM_INIT_OVER_M;
1227 } else {
1228 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1229 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1230 }
1231
1232 /* enable sbm chanel, disable sbm chanel shcut function*/
1233 hns_dsaf_sbm_cfg(dsaf_dev);
1234
1235 /* enable sbm mib */
1236 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1237 if (ret) {
1238 dev_err(dsaf_dev->dev,
1239 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1240 dsaf_dev->ae_dev.name, ret);
1241 return ret;
1242 }
1243
1244 /* enable sbm initial link sram */
1245 hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1246
1247 do {
1248 usleep_range(200, 210);/*udelay(200);*/
1249 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1250 finish_msk, DSAF_SRAM_INIT_OVER_S);
1251 cnt++;
1252 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1253 cnt < DSAF_CFG_READ_CNT);
1254
1255 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
1256 dev_err(dsaf_dev->dev,
1257 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1258 dsaf_dev->ae_dev.name, flag, cnt);
1259 return -ENODEV;
1260 }
1261
1262 hns_dsaf_rocee_bp_en(dsaf_dev);
1263
1264 return 0;
1265 }
1266
1267 /**
1268 * hns_dsaf_tbl_init - INT
1269 * @dsaf_id: dsa fabric id
1270 */
1271 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1272 {
1273 hns_dsaf_tbl_stat_en(dsaf_dev);
1274
1275 hns_dsaf_tbl_tcam_init(dsaf_dev);
1276 hns_dsaf_tbl_line_init(dsaf_dev);
1277 }
1278
1279 /**
1280 * hns_dsaf_voq_init - INT
1281 * @dsaf_id: dsa fabric id
1282 */
1283 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1284 {
1285 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1286 }
1287
1288 /**
1289 * hns_dsaf_init_hw - init dsa fabric hardware
1290 * @dsaf_dev: dsa fabric device struct pointer
1291 */
1292 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1293 {
1294 int ret;
1295
1296 dev_dbg(dsaf_dev->dev,
1297 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1298
1299 hns_dsaf_rst(dsaf_dev, 0);
1300 mdelay(10);
1301 hns_dsaf_rst(dsaf_dev, 1);
1302
1303 hns_dsaf_comm_init(dsaf_dev);
1304
1305 /*init XBAR_INODE*/
1306 hns_dsaf_inode_init(dsaf_dev);
1307
1308 /*init SBM*/
1309 ret = hns_dsaf_sbm_init(dsaf_dev);
1310 if (ret)
1311 return ret;
1312
1313 /*init TBL*/
1314 hns_dsaf_tbl_init(dsaf_dev);
1315
1316 /*init VOQ*/
1317 hns_dsaf_voq_init(dsaf_dev);
1318
1319 return 0;
1320 }
1321
1322 /**
1323 * hns_dsaf_remove_hw - uninit dsa fabric hardware
1324 * @dsaf_dev: dsa fabric device struct pointer
1325 */
1326 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1327 {
1328 /*reset*/
1329 hns_dsaf_rst(dsaf_dev, 0);
1330 }
1331
1332 /**
1333 * hns_dsaf_init - init dsa fabric
1334 * @dsaf_dev: dsa fabric device struct pointer
1335 * retuen 0 - success , negative --fail
1336 */
1337 static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1338 {
1339 struct dsaf_drv_priv *priv =
1340 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1341 u32 i;
1342 int ret;
1343
1344 if (HNS_DSAF_IS_DEBUG(dsaf_dev))
1345 return 0;
1346
1347 ret = hns_dsaf_init_hw(dsaf_dev);
1348 if (ret)
1349 return ret;
1350
1351 /* malloc mem for tcam mac key(vlan+mac) */
1352 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1353 * DSAF_TCAM_SUM);
1354 if (!priv->soft_mac_tbl) {
1355 ret = -ENOMEM;
1356 goto remove_hw;
1357 }
1358
1359 /*all entry invall */
1360 for (i = 0; i < DSAF_TCAM_SUM; i++)
1361 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1362
1363 return 0;
1364
1365 remove_hw:
1366 hns_dsaf_remove_hw(dsaf_dev);
1367 return ret;
1368 }
1369
1370 /**
1371 * hns_dsaf_free - free dsa fabric
1372 * @dsaf_dev: dsa fabric device struct pointer
1373 */
1374 static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1375 {
1376 struct dsaf_drv_priv *priv =
1377 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1378
1379 hns_dsaf_remove_hw(dsaf_dev);
1380
1381 /* free all mac mem */
1382 vfree(priv->soft_mac_tbl);
1383 priv->soft_mac_tbl = NULL;
1384 }
1385
1386 /**
1387 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1388 * @dsaf_dev: dsa fabric device struct pointer
1389 * @mac_key: mac entry struct pointer
1390 */
1391 static u16 hns_dsaf_find_soft_mac_entry(
1392 struct dsaf_device *dsaf_dev,
1393 struct dsaf_drv_tbl_tcam_key *mac_key)
1394 {
1395 struct dsaf_drv_priv *priv =
1396 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1397 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1398 u32 i;
1399
1400 soft_mac_entry = priv->soft_mac_tbl;
1401 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1402 /* invall tab entry */
1403 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1404 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1405 (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1406 /* return find result --soft index */
1407 return soft_mac_entry->index;
1408
1409 soft_mac_entry++;
1410 }
1411 return DSAF_INVALID_ENTRY_IDX;
1412 }
1413
1414 /**
1415 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1416 * @dsaf_dev: dsa fabric device struct pointer
1417 */
1418 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1419 {
1420 struct dsaf_drv_priv *priv =
1421 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1422 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1423 u32 i;
1424
1425 soft_mac_entry = priv->soft_mac_tbl;
1426 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1427 /* inv all entry */
1428 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1429 /* return find result --soft index */
1430 return i;
1431
1432 soft_mac_entry++;
1433 }
1434 return DSAF_INVALID_ENTRY_IDX;
1435 }
1436
1437 /**
1438 * hns_dsaf_set_mac_key - set mac key
1439 * @dsaf_dev: dsa fabric device struct pointer
1440 * @mac_key: tcam key pointer
1441 * @vlan_id: vlan id
1442 * @in_port_num: input port num
1443 * @addr: mac addr
1444 */
1445 static void hns_dsaf_set_mac_key(
1446 struct dsaf_device *dsaf_dev,
1447 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1448 u8 *addr)
1449 {
1450 u8 port;
1451
1452 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1453 /*DSAF mode : in port id fixed 0*/
1454 port = 0;
1455 else
1456 /*non-dsaf mode*/
1457 port = in_port_num;
1458
1459 mac_key->high.bits.mac_0 = addr[0];
1460 mac_key->high.bits.mac_1 = addr[1];
1461 mac_key->high.bits.mac_2 = addr[2];
1462 mac_key->high.bits.mac_3 = addr[3];
1463 mac_key->low.bits.mac_4 = addr[4];
1464 mac_key->low.bits.mac_5 = addr[5];
1465 mac_key->low.bits.vlan = vlan_id;
1466 mac_key->low.bits.port = port;
1467 }
1468
1469 /**
1470 * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1471 * @dsaf_dev: dsa fabric device struct pointer
1472 * @mac_entry: uc-mac entry
1473 */
1474 int hns_dsaf_set_mac_uc_entry(
1475 struct dsaf_device *dsaf_dev,
1476 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1477 {
1478 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1479 struct dsaf_drv_tbl_tcam_key mac_key;
1480 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1481 struct dsaf_drv_priv *priv =
1482 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1483 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1484
1485 /* mac addr check */
1486 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1487 MAC_IS_BROADCAST(mac_entry->addr) ||
1488 MAC_IS_MULTICAST(mac_entry->addr)) {
1489 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1490 dsaf_dev->ae_dev.name, mac_entry->addr);
1491 return -EINVAL;
1492 }
1493
1494 /* config key */
1495 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1496 mac_entry->in_port_num, mac_entry->addr);
1497
1498 /* entry ie exist? */
1499 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1500 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1501 /*if has not inv entry,find a empty entry */
1502 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1503 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1504 /* has not empty,return error */
1505 dev_err(dsaf_dev->dev,
1506 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1507 dsaf_dev->ae_dev.name,
1508 mac_key.high.val, mac_key.low.val);
1509 return -EINVAL;
1510 }
1511 }
1512
1513 dev_dbg(dsaf_dev->dev,
1514 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1515 dsaf_dev->ae_dev.name, mac_key.high.val,
1516 mac_key.low.val, entry_index);
1517
1518 /* config hardware entry */
1519 mac_data.tbl_ucast_item_vld = 1;
1520 mac_data.tbl_ucast_mac_discard = 0;
1521 mac_data.tbl_ucast_old_en = 0;
1522 /* default config dvc to 0 */
1523 mac_data.tbl_ucast_dvc = 0;
1524 mac_data.tbl_ucast_out_port = mac_entry->port_num;
1525 hns_dsaf_tcam_uc_cfg(
1526 dsaf_dev, entry_index,
1527 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1528
1529 /* config software entry */
1530 soft_mac_entry += entry_index;
1531 soft_mac_entry->index = entry_index;
1532 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1533 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1534
1535 return 0;
1536 }
1537
1538 /**
1539 * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1540 * @dsaf_dev: dsa fabric device struct pointer
1541 * @mac_entry: mc-mac entry
1542 */
1543 int hns_dsaf_set_mac_mc_entry(
1544 struct dsaf_device *dsaf_dev,
1545 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1546 {
1547 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1548 struct dsaf_drv_tbl_tcam_key mac_key;
1549 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1550 struct dsaf_drv_priv *priv =
1551 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1552 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1553 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1554
1555 /* mac addr check */
1556 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1557 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1558 dsaf_dev->ae_dev.name, mac_entry->addr);
1559 return -EINVAL;
1560 }
1561
1562 /*config key */
1563 hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1564 mac_entry->in_vlan_id,
1565 mac_entry->in_port_num, mac_entry->addr);
1566
1567 /* entry ie exist? */
1568 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1569 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1570 /*if hasnot, find enpty entry*/
1571 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1572 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1573 /*if hasnot empty, error*/
1574 dev_err(dsaf_dev->dev,
1575 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1576 dsaf_dev->ae_dev.name,
1577 mac_key.high.val, mac_key.low.val);
1578 return -EINVAL;
1579 }
1580
1581 /* config hardware entry */
1582 memset(mac_data.tbl_mcast_port_msk,
1583 0, sizeof(mac_data.tbl_mcast_port_msk));
1584 } else {
1585 /* config hardware entry */
1586 hns_dsaf_tcam_mc_get(
1587 dsaf_dev, entry_index,
1588 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1589 }
1590 mac_data.tbl_mcast_old_en = 0;
1591 mac_data.tbl_mcast_item_vld = 1;
1592 dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1593 0x3F, 0, mac_entry->port_mask[0]);
1594
1595 dev_dbg(dsaf_dev->dev,
1596 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1597 dsaf_dev->ae_dev.name, mac_key.high.val,
1598 mac_key.low.val, entry_index);
1599
1600 hns_dsaf_tcam_mc_cfg(
1601 dsaf_dev, entry_index,
1602 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1603
1604 /* config software entry */
1605 soft_mac_entry += entry_index;
1606 soft_mac_entry->index = entry_index;
1607 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1608 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1609
1610 return 0;
1611 }
1612
1613 /**
1614 * hns_dsaf_add_mac_mc_port - add mac mc-port
1615 * @dsaf_dev: dsa fabric device struct pointer
1616 * @mac_entry: mc-mac entry
1617 */
1618 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1619 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1620 {
1621 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1622 struct dsaf_drv_tbl_tcam_key mac_key;
1623 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1624 struct dsaf_drv_priv *priv =
1625 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1626 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1627 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1628 int mskid;
1629
1630 /*chechk mac addr */
1631 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1632 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1633 mac_entry->addr);
1634 return -EINVAL;
1635 }
1636
1637 /*config key */
1638 hns_dsaf_set_mac_key(
1639 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1640 mac_entry->in_port_num, mac_entry->addr);
1641
1642 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1643
1644 /*check exist? */
1645 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1646 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1647 /*if hasnot , find a empty*/
1648 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1649 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1650 /*if hasnot empty, error*/
1651 dev_err(dsaf_dev->dev,
1652 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1653 dsaf_dev->ae_dev.name, mac_key.high.val,
1654 mac_key.low.val);
1655 return -EINVAL;
1656 }
1657 } else {
1658 /*if exist, add in */
1659 hns_dsaf_tcam_mc_get(
1660 dsaf_dev, entry_index,
1661 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1662 }
1663 /* config hardware entry */
1664 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1665 mskid = mac_entry->port_num;
1666 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1667 mskid = mac_entry->port_num -
1668 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1669 } else {
1670 dev_err(dsaf_dev->dev,
1671 "%s,pnum(%d)error,key(%#x:%#x)\n",
1672 dsaf_dev->ae_dev.name, mac_entry->port_num,
1673 mac_key.high.val, mac_key.low.val);
1674 return -EINVAL;
1675 }
1676 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1677 mac_data.tbl_mcast_old_en = 0;
1678 mac_data.tbl_mcast_item_vld = 1;
1679
1680 dev_dbg(dsaf_dev->dev,
1681 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1682 dsaf_dev->ae_dev.name, mac_key.high.val,
1683 mac_key.low.val, entry_index);
1684
1685 hns_dsaf_tcam_mc_cfg(
1686 dsaf_dev, entry_index,
1687 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1688
1689 /*config software entry */
1690 soft_mac_entry += entry_index;
1691 soft_mac_entry->index = entry_index;
1692 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1693 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1694
1695 return 0;
1696 }
1697
1698 /**
1699 * hns_dsaf_del_mac_entry - del mac mc-port
1700 * @dsaf_dev: dsa fabric device struct pointer
1701 * @vlan_id: vlian id
1702 * @in_port_num: input port num
1703 * @addr : mac addr
1704 */
1705 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1706 u8 in_port_num, u8 *addr)
1707 {
1708 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1709 struct dsaf_drv_tbl_tcam_key mac_key;
1710 struct dsaf_drv_priv *priv =
1711 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1712 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1713
1714 /*check mac addr */
1715 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
1716 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1717 addr);
1718 return -EINVAL;
1719 }
1720
1721 /*config key */
1722 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1723
1724 /*exist ?*/
1725 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1726 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1727 /*not exist, error */
1728 dev_err(dsaf_dev->dev,
1729 "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1730 dsaf_dev->ae_dev.name,
1731 mac_key.high.val, mac_key.low.val);
1732 return -EINVAL;
1733 }
1734 dev_dbg(dsaf_dev->dev,
1735 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1736 dsaf_dev->ae_dev.name, mac_key.high.val,
1737 mac_key.low.val, entry_index);
1738
1739 /*do del opt*/
1740 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1741
1742 /*del soft emtry */
1743 soft_mac_entry += entry_index;
1744 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1745
1746 return 0;
1747 }
1748
1749 /**
1750 * hns_dsaf_del_mac_mc_port - del mac mc- port
1751 * @dsaf_dev: dsa fabric device struct pointer
1752 * @mac_entry: mac entry
1753 */
1754 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1755 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1756 {
1757 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1758 struct dsaf_drv_tbl_tcam_key mac_key;
1759 struct dsaf_drv_priv *priv =
1760 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1761 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1762 u16 vlan_id;
1763 u8 in_port_num;
1764 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1765 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1766 int mskid;
1767 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1768
1769 if (!(void *)mac_entry) {
1770 dev_err(dsaf_dev->dev,
1771 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1772 return -EINVAL;
1773 }
1774
1775 /*get key info*/
1776 vlan_id = mac_entry->in_vlan_id;
1777 in_port_num = mac_entry->in_port_num;
1778
1779 /*check mac addr */
1780 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1781 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1782 mac_entry->addr);
1783 return -EINVAL;
1784 }
1785
1786 /*config key */
1787 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1788 mac_entry->addr);
1789
1790 /*check is exist? */
1791 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1792 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1793 /*find none */
1794 dev_err(dsaf_dev->dev,
1795 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1796 dsaf_dev->ae_dev.name,
1797 mac_key.high.val, mac_key.low.val);
1798 return -EINVAL;
1799 }
1800
1801 dev_dbg(dsaf_dev->dev,
1802 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1803 dsaf_dev->ae_dev.name, mac_key.high.val,
1804 mac_key.low.val, entry_index);
1805
1806 /*read entry*/
1807 hns_dsaf_tcam_mc_get(
1808 dsaf_dev, entry_index,
1809 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1810
1811 /*del the port*/
1812 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1813 mskid = mac_entry->port_num;
1814 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1815 mskid = mac_entry->port_num -
1816 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1817 } else {
1818 dev_err(dsaf_dev->dev,
1819 "%s,pnum(%d)error,key(%#x:%#x)\n",
1820 dsaf_dev->ae_dev.name, mac_entry->port_num,
1821 mac_key.high.val, mac_key.low.val);
1822 return -EINVAL;
1823 }
1824 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1825
1826 /*check non port, do del entry */
1827 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1828 sizeof(mac_data.tbl_mcast_port_msk))) {
1829 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1830
1831 /* del soft entry */
1832 soft_mac_entry += entry_index;
1833 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1834 } else { /* not zer, just del port, updata*/
1835 hns_dsaf_tcam_mc_cfg(
1836 dsaf_dev, entry_index,
1837 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1838 }
1839
1840 return 0;
1841 }
1842
1843 /**
1844 * hns_dsaf_get_mac_uc_entry - get mac uc entry
1845 * @dsaf_dev: dsa fabric device struct pointer
1846 * @mac_entry: mac entry
1847 */
1848 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1849 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1850 {
1851 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1852 struct dsaf_drv_tbl_tcam_key mac_key;
1853
1854 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1855
1856 /* check macaddr */
1857 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1858 MAC_IS_BROADCAST(mac_entry->addr)) {
1859 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1860 mac_entry->addr);
1861 return -EINVAL;
1862 }
1863
1864 /*config key */
1865 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1866 mac_entry->in_port_num, mac_entry->addr);
1867
1868 /*check exist? */
1869 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1870 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1871 /*find none, error */
1872 dev_err(dsaf_dev->dev,
1873 "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1874 dsaf_dev->ae_dev.name,
1875 mac_key.high.val, mac_key.low.val);
1876 return -EINVAL;
1877 }
1878 dev_dbg(dsaf_dev->dev,
1879 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1880 dsaf_dev->ae_dev.name, mac_key.high.val,
1881 mac_key.low.val, entry_index);
1882
1883 /*read entry*/
1884 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1885 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1886 mac_entry->port_num = mac_data.tbl_ucast_out_port;
1887
1888 return 0;
1889 }
1890
1891 /**
1892 * hns_dsaf_get_mac_mc_entry - get mac mc entry
1893 * @dsaf_dev: dsa fabric device struct pointer
1894 * @mac_entry: mac entry
1895 */
1896 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1897 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1898 {
1899 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1900 struct dsaf_drv_tbl_tcam_key mac_key;
1901
1902 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1903
1904 /*check mac addr */
1905 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1906 MAC_IS_BROADCAST(mac_entry->addr)) {
1907 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1908 mac_entry->addr);
1909 return -EINVAL;
1910 }
1911
1912 /*config key */
1913 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1914 mac_entry->in_port_num, mac_entry->addr);
1915
1916 /*check exist? */
1917 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1918 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1919 /* find none, error */
1920 dev_err(dsaf_dev->dev,
1921 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1922 dsaf_dev->ae_dev.name, mac_key.high.val,
1923 mac_key.low.val);
1924 return -EINVAL;
1925 }
1926 dev_dbg(dsaf_dev->dev,
1927 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1928 dsaf_dev->ae_dev.name, mac_key.high.val,
1929 mac_key.low.val, entry_index);
1930
1931 /*read entry */
1932 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1933 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1934
1935 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1936 return 0;
1937 }
1938
1939 /**
1940 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1941 * @dsaf_dev: dsa fabric device struct pointer
1942 * @entry_index: tab entry index
1943 * @mac_entry: mac entry
1944 */
1945 int hns_dsaf_get_mac_entry_by_index(
1946 struct dsaf_device *dsaf_dev,
1947 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1948 {
1949 struct dsaf_drv_tbl_tcam_key mac_key;
1950
1951 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1952 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1953 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1954
1955 if (entry_index >= DSAF_TCAM_SUM) {
1956 /* find none, del error */
1957 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1958 dsaf_dev->ae_dev.name);
1959 return -EINVAL;
1960 }
1961
1962 /* mc entry, do read opt */
1963 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1964 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1965
1966 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1967
1968 /***get mac addr*/
1969 mac_addr[0] = mac_key.high.bits.mac_0;
1970 mac_addr[1] = mac_key.high.bits.mac_1;
1971 mac_addr[2] = mac_key.high.bits.mac_2;
1972 mac_addr[3] = mac_key.high.bits.mac_3;
1973 mac_addr[4] = mac_key.low.bits.mac_4;
1974 mac_addr[5] = mac_key.low.bits.mac_5;
1975 /**is mc or uc*/
1976 if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
1977 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
1978 /**mc donot do*/
1979 } else {
1980 /*is not mc, just uc... */
1981 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1982 (struct dsaf_tbl_tcam_data *)&mac_key,
1983 &mac_uc_data);
1984 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
1985 }
1986
1987 return 0;
1988 }
1989
1990 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
1991 size_t sizeof_priv)
1992 {
1993 struct dsaf_device *dsaf_dev;
1994
1995 dsaf_dev = devm_kzalloc(dev,
1996 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
1997 if (unlikely(!dsaf_dev)) {
1998 dsaf_dev = ERR_PTR(-ENOMEM);
1999 } else {
2000 dsaf_dev->dev = dev;
2001 dev_set_drvdata(dev, dsaf_dev);
2002 }
2003
2004 return dsaf_dev;
2005 }
2006
2007 /**
2008 * hns_dsaf_free_dev - free dev mem
2009 * @dev: struct device pointer
2010 */
2011 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
2012 {
2013 (void)dev_set_drvdata(dsaf_dev->dev, NULL);
2014 }
2015
2016 /**
2017 * dsaf_pfc_unit_cnt - set pfc unit count
2018 * @dsaf_id: dsa fabric id
2019 * @pport_rate: value array
2020 * @pdsaf_pfc_unit_cnt: value array
2021 */
2022 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id,
2023 enum dsaf_port_rate_mode rate)
2024 {
2025 u32 unit_cnt;
2026
2027 switch (rate) {
2028 case DSAF_PORT_RATE_10000:
2029 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2030 break;
2031 case DSAF_PORT_RATE_1000:
2032 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2033 break;
2034 case DSAF_PORT_RATE_2500:
2035 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2036 break;
2037 default:
2038 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2039 }
2040
2041 dsaf_set_dev_field(dsaf_dev,
2042 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
2043 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
2044 unit_cnt);
2045 }
2046
2047 /**
2048 * dsaf_port_work_rate_cfg - fifo
2049 * @dsaf_id: dsa fabric id
2050 * @xge_ge_work_mode
2051 */
2052 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
2053 enum dsaf_port_rate_mode rate_mode)
2054 {
2055 u32 port_work_mode;
2056
2057 port_work_mode = dsaf_read_dev(
2058 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
2059
2060 if (rate_mode == DSAF_PORT_RATE_10000)
2061 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
2062 else
2063 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
2064
2065 dsaf_write_dev(dsaf_dev,
2066 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
2067 port_work_mode);
2068
2069 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
2070 }
2071
2072 /**
2073 * hns_dsaf_fix_mac_mode - dsaf modify mac mode
2074 * @mac_cb: mac contrl block
2075 */
2076 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
2077 {
2078 enum dsaf_port_rate_mode mode;
2079 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
2080 int mac_id = mac_cb->mac_id;
2081
2082 if (mac_cb->mac_type != HNAE_PORT_SERVICE)
2083 return;
2084 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
2085 mode = DSAF_PORT_RATE_10000;
2086 else
2087 mode = DSAF_PORT_RATE_1000;
2088
2089 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
2090 }
2091
2092 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
2093 {
2094 struct dsaf_hw_stats *hw_stats
2095 = &dsaf_dev->hw_stats[node_num];
2096 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2097 u32 reg_tmp;
2098
2099 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
2100 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2101 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
2102 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
2103 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
2104 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
2105 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
2106 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
2107
2108 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2109 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2110 hw_stats->rx_pause_frame +=
2111 dsaf_read_dev(dsaf_dev, reg_tmp + 0x80 * (u64)node_num);
2112
2113 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
2114 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
2115 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2116 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2117 hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2118 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2119 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2120 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2121 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2122 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2123 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2124 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2125
2126 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2127 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2128 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2129 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2130
2131 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2132 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2133 }
2134
2135 /**
2136 *hns_dsaf_get_regs - dump dsaf regs
2137 *@dsaf_dev: dsaf device
2138 *@data:data for value of regs
2139 */
2140 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2141 {
2142 u32 i = 0;
2143 u32 j;
2144 u32 *p = data;
2145 u32 reg_tmp;
2146 bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver);
2147
2148 /* dsaf common registers */
2149 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2150 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2151 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2152 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2153 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2154 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2155 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2156 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2157 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2158
2159 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2160 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2161 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2162 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2163 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2164 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2165 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2166 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2167 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2168 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2169 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2170 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2171 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2172 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2173 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2174
2175 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2176 p[24 + i] = dsaf_read_dev(ddev,
2177 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2178
2179 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2180
2181 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2182 p[33 + i] = dsaf_read_dev(ddev,
2183 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2184
2185 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2186 p[41 + i] = dsaf_read_dev(ddev,
2187 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2188
2189 /* dsaf inode registers */
2190 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2191
2192 p[171] = dsaf_read_dev(ddev,
2193 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2194
2195 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2196 j = i * DSAF_COMM_CHN + port;
2197 p[172 + i] = dsaf_read_dev(ddev,
2198 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2199 p[175 + i] = dsaf_read_dev(ddev,
2200 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2201 p[178 + i] = dsaf_read_dev(ddev,
2202 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2203 p[181 + i] = dsaf_read_dev(ddev,
2204 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2205 p[184 + i] = dsaf_read_dev(ddev,
2206 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2207 p[187 + i] = dsaf_read_dev(ddev,
2208 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2209 p[190 + i] = dsaf_read_dev(ddev,
2210 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
2211 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2212 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2213 p[193 + i] = dsaf_read_dev(ddev, reg_tmp + j * 0x80);
2214 p[196 + i] = dsaf_read_dev(ddev,
2215 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2216 p[199 + i] = dsaf_read_dev(ddev,
2217 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2218 p[202 + i] = dsaf_read_dev(ddev,
2219 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2220 p[205 + i] = dsaf_read_dev(ddev,
2221 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2222 p[208 + i] = dsaf_read_dev(ddev,
2223 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2224 p[211 + i] = dsaf_read_dev(ddev,
2225 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2226 p[214 + i] = dsaf_read_dev(ddev,
2227 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2228 p[217 + i] = dsaf_read_dev(ddev,
2229 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2230 p[220 + i] = dsaf_read_dev(ddev,
2231 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2232 p[223 + i] = dsaf_read_dev(ddev,
2233 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2234 p[224 + i] = dsaf_read_dev(ddev,
2235 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2236 }
2237
2238 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2239
2240 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2241 j = i * DSAF_COMM_CHN + port;
2242 p[228 + i] = dsaf_read_dev(ddev,
2243 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2244 }
2245
2246 p[231] = dsaf_read_dev(ddev,
2247 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2248
2249 /* dsaf inode registers */
2250 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
2251 j = i * DSAF_COMM_CHN + port;
2252 p[232 + i] = dsaf_read_dev(ddev,
2253 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2254 p[235 + i] = dsaf_read_dev(ddev,
2255 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2256 p[238 + i] = dsaf_read_dev(ddev,
2257 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2258 p[241 + i] = dsaf_read_dev(ddev,
2259 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2260 p[244 + i] = dsaf_read_dev(ddev,
2261 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2262 p[245 + i] = dsaf_read_dev(ddev,
2263 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2264 p[248 + i] = dsaf_read_dev(ddev,
2265 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2266 p[251 + i] = dsaf_read_dev(ddev,
2267 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2268 p[254 + i] = dsaf_read_dev(ddev,
2269 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2270 p[257 + i] = dsaf_read_dev(ddev,
2271 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2272 p[260 + i] = dsaf_read_dev(ddev,
2273 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2274 p[263 + i] = dsaf_read_dev(ddev,
2275 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2276 p[266 + i] = dsaf_read_dev(ddev,
2277 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2278 p[269 + i] = dsaf_read_dev(ddev,
2279 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2280 p[272 + i] = dsaf_read_dev(ddev,
2281 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2282 p[275 + i] = dsaf_read_dev(ddev,
2283 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2284 p[278 + i] = dsaf_read_dev(ddev,
2285 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2286 p[281 + i] = dsaf_read_dev(ddev,
2287 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2288 p[284 + i] = dsaf_read_dev(ddev,
2289 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2290 p[287 + i] = dsaf_read_dev(ddev,
2291 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2292 p[290 + i] = dsaf_read_dev(ddev,
2293 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2294 p[293 + i] = dsaf_read_dev(ddev,
2295 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2296 p[296 + i] = dsaf_read_dev(ddev,
2297 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2298 p[299 + i] = dsaf_read_dev(ddev,
2299 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2300 p[302 + i] = dsaf_read_dev(ddev,
2301 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2302 p[305 + i] = dsaf_read_dev(ddev,
2303 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2304 p[308 + i] = dsaf_read_dev(ddev,
2305 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2306 }
2307
2308 /* dsaf onode registers */
2309 for (i = 0; i < DSAF_XOD_NUM; i++) {
2310 p[311 + i] = dsaf_read_dev(ddev,
2311 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + i * 0x90);
2312 p[319 + i] = dsaf_read_dev(ddev,
2313 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + i * 0x90);
2314 p[327 + i] = dsaf_read_dev(ddev,
2315 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + i * 0x90);
2316 p[335 + i] = dsaf_read_dev(ddev,
2317 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + i * 0x90);
2318 p[343 + i] = dsaf_read_dev(ddev,
2319 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + i * 0x90);
2320 p[351 + i] = dsaf_read_dev(ddev,
2321 DSAF_XOD_ETS_TOKEN_CFG_0_REG + i * 0x90);
2322 }
2323
2324 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2325 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2326 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2327
2328 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2329 j = i * DSAF_COMM_CHN + port;
2330 p[362 + i] = dsaf_read_dev(ddev,
2331 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2332 p[365 + i] = dsaf_read_dev(ddev,
2333 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2334 p[368 + i] = dsaf_read_dev(ddev,
2335 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2336 p[371 + i] = dsaf_read_dev(ddev,
2337 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2338 p[374 + i] = dsaf_read_dev(ddev,
2339 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2340 p[377 + i] = dsaf_read_dev(ddev,
2341 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2342 p[380 + i] = dsaf_read_dev(ddev,
2343 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2344 p[383 + i] = dsaf_read_dev(ddev,
2345 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2346 p[386 + i] = dsaf_read_dev(ddev,
2347 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2348 p[389 + i] = dsaf_read_dev(ddev,
2349 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2350 }
2351
2352 p[392] = dsaf_read_dev(ddev,
2353 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2354 p[393] = dsaf_read_dev(ddev,
2355 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2356 p[394] = dsaf_read_dev(ddev,
2357 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2358 p[395] = dsaf_read_dev(ddev,
2359 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2360 p[396] = dsaf_read_dev(ddev,
2361 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2362 p[397] = dsaf_read_dev(ddev,
2363 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2364 p[398] = dsaf_read_dev(ddev,
2365 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2366 p[399] = dsaf_read_dev(ddev,
2367 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2368 p[400] = dsaf_read_dev(ddev,
2369 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2370 p[401] = dsaf_read_dev(ddev,
2371 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2372 p[402] = dsaf_read_dev(ddev,
2373 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2374 p[403] = dsaf_read_dev(ddev,
2375 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2376 p[404] = dsaf_read_dev(ddev,
2377 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2378
2379 /* dsaf voq registers */
2380 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2381 j = (i * DSAF_COMM_CHN + port) * 0x90;
2382 p[405 + i] = dsaf_read_dev(ddev,
2383 DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2384 p[408 + i] = dsaf_read_dev(ddev,
2385 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2386 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2387 p[414 + i] = dsaf_read_dev(ddev,
2388 DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2389 p[417 + i] = dsaf_read_dev(ddev,
2390 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2391 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2392 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2393 p[426 + i] = dsaf_read_dev(ddev,
2394 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2395 p[429 + i] = dsaf_read_dev(ddev,
2396 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2397 p[432 + i] = dsaf_read_dev(ddev,
2398 DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2399 p[435 + i] = dsaf_read_dev(ddev,
2400 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2401 p[438 + i] = dsaf_read_dev(ddev,
2402 DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2403 }
2404
2405 /* dsaf tbl registers */
2406 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2407 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2408 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2409 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2410 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2411 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2412 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2413 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2414 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2415 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2416 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2417 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2418 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2419 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2420 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2421 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2422 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2423 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2424 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2425 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2426 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2427 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2428 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2429
2430 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2431 j = i * 0x8;
2432 p[464 + 2 * i] = dsaf_read_dev(ddev,
2433 DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2434 p[465 + 2 * i] = dsaf_read_dev(ddev,
2435 DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2436 }
2437
2438 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2439 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2440 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2441 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2442 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2443 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2444 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2445 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2446 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2447 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2448 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2449 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2450
2451 /* dsaf other registers */
2452 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2453 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2454 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2455 p[495] = dsaf_read_dev(ddev,
2456 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2457 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2458 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2459
2460 if (!is_ver1)
2461 p[498] = dsaf_read_dev(ddev, DSAF_PAUSE_CFG_REG + port * 0x4);
2462
2463 /* mark end of dsaf regs */
2464 for (i = 499; i < 504; i++)
2465 p[i] = 0xdddddddd;
2466 }
2467
2468 static char *hns_dsaf_get_node_stats_strings(char *data, int node)
2469 {
2470 char *buff = data;
2471
2472 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2473 buff = buff + ETH_GSTRING_LEN;
2474 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2475 buff = buff + ETH_GSTRING_LEN;
2476 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2477 buff = buff + ETH_GSTRING_LEN;
2478 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2479 buff = buff + ETH_GSTRING_LEN;
2480 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2481 buff = buff + ETH_GSTRING_LEN;
2482 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2483 buff = buff + ETH_GSTRING_LEN;
2484 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2485 buff = buff + ETH_GSTRING_LEN;
2486 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2487 buff = buff + ETH_GSTRING_LEN;
2488 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2489 buff = buff + ETH_GSTRING_LEN;
2490 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2491 buff = buff + ETH_GSTRING_LEN;
2492 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2493 buff = buff + ETH_GSTRING_LEN;
2494 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2495 buff = buff + ETH_GSTRING_LEN;
2496 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2497 buff = buff + ETH_GSTRING_LEN;
2498 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2499 buff = buff + ETH_GSTRING_LEN;
2500
2501 return buff;
2502 }
2503
2504 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2505 int node_num)
2506 {
2507 u64 *p = data;
2508 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2509
2510 p[0] = hw_stats->pad_drop;
2511 p[1] = hw_stats->man_pkts;
2512 p[2] = hw_stats->rx_pkts;
2513 p[3] = hw_stats->rx_pkt_id;
2514 p[4] = hw_stats->rx_pause_frame;
2515 p[5] = hw_stats->release_buf_num;
2516 p[6] = hw_stats->sbm_drop;
2517 p[7] = hw_stats->crc_false;
2518 p[8] = hw_stats->bp_drop;
2519 p[9] = hw_stats->rslt_drop;
2520 p[10] = hw_stats->local_addr_false;
2521 p[11] = hw_stats->vlan_drop;
2522 p[12] = hw_stats->stp_drop;
2523 p[13] = hw_stats->tx_pkts;
2524
2525 return &p[14];
2526 }
2527
2528 /**
2529 *hns_dsaf_get_stats - get dsaf statistic
2530 *@ddev: dsaf device
2531 *@data:statistic value
2532 *@port: port num
2533 */
2534 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2535 {
2536 u64 *p = data;
2537 int node_num = port;
2538
2539 /* for ge/xge node info */
2540 p = hns_dsaf_get_node_stats(ddev, p, node_num);
2541
2542 /* for ppe node info */
2543 node_num = port + DSAF_PPE_INODE_BASE;
2544 (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2545 }
2546
2547 /**
2548 *hns_dsaf_get_sset_count - get dsaf string set count
2549 *@stringset: type of values in data
2550 *return dsaf string name count
2551 */
2552 int hns_dsaf_get_sset_count(int stringset)
2553 {
2554 if (stringset == ETH_SS_STATS)
2555 return DSAF_STATIC_NUM;
2556
2557 return 0;
2558 }
2559
2560 /**
2561 *hns_dsaf_get_strings - get dsaf string set
2562 *@stringset:srting set index
2563 *@data:strings name value
2564 *@port:port index
2565 */
2566 void hns_dsaf_get_strings(int stringset, u8 *data, int port)
2567 {
2568 char *buff = (char *)data;
2569 int node = port;
2570
2571 if (stringset != ETH_SS_STATS)
2572 return;
2573
2574 /* for ge/xge node info */
2575 buff = hns_dsaf_get_node_stats_strings(buff, node);
2576
2577 /* for ppe node info */
2578 node = port + DSAF_PPE_INODE_BASE;
2579 (void)hns_dsaf_get_node_stats_strings(buff, node);
2580 }
2581
2582 /**
2583 *hns_dsaf_get_sset_count - get dsaf regs count
2584 *return dsaf regs count
2585 */
2586 int hns_dsaf_get_regs_count(void)
2587 {
2588 return DSAF_DUMP_REGS_NUM;
2589 }
2590
2591 /**
2592 * dsaf_probe - probo dsaf dev
2593 * @pdev: dasf platform device
2594 * retuen 0 - success , negative --fail
2595 */
2596 static int hns_dsaf_probe(struct platform_device *pdev)
2597 {
2598 struct dsaf_device *dsaf_dev;
2599 int ret;
2600
2601 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2602 if (IS_ERR(dsaf_dev)) {
2603 ret = PTR_ERR(dsaf_dev);
2604 dev_err(&pdev->dev,
2605 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2606 return ret;
2607 }
2608
2609 ret = hns_dsaf_get_cfg(dsaf_dev);
2610 if (ret)
2611 goto free_dev;
2612
2613 ret = hns_dsaf_init(dsaf_dev);
2614 if (ret)
2615 goto free_cfg;
2616
2617 ret = hns_mac_init(dsaf_dev);
2618 if (ret)
2619 goto uninit_dsaf;
2620
2621 ret = hns_ppe_init(dsaf_dev);
2622 if (ret)
2623 goto uninit_mac;
2624
2625 ret = hns_dsaf_ae_init(dsaf_dev);
2626 if (ret)
2627 goto uninit_ppe;
2628
2629 return 0;
2630
2631 uninit_ppe:
2632 hns_ppe_uninit(dsaf_dev);
2633
2634 uninit_mac:
2635 hns_mac_uninit(dsaf_dev);
2636
2637 uninit_dsaf:
2638 hns_dsaf_free(dsaf_dev);
2639
2640 free_cfg:
2641 hns_dsaf_free_cfg(dsaf_dev);
2642
2643 free_dev:
2644 hns_dsaf_free_dev(dsaf_dev);
2645
2646 return ret;
2647 }
2648
2649 /**
2650 * dsaf_remove - remove dsaf dev
2651 * @pdev: dasf platform device
2652 */
2653 static int hns_dsaf_remove(struct platform_device *pdev)
2654 {
2655 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2656
2657 hns_dsaf_ae_uninit(dsaf_dev);
2658
2659 hns_ppe_uninit(dsaf_dev);
2660
2661 hns_mac_uninit(dsaf_dev);
2662
2663 hns_dsaf_free(dsaf_dev);
2664
2665 hns_dsaf_free_cfg(dsaf_dev);
2666
2667 hns_dsaf_free_dev(dsaf_dev);
2668
2669 return 0;
2670 }
2671
2672 static const struct of_device_id g_dsaf_match[] = {
2673 {.compatible = "hisilicon,hns-dsaf-v1"},
2674 {.compatible = "hisilicon,hns-dsaf-v2"},
2675 {}
2676 };
2677
2678 static struct platform_driver g_dsaf_driver = {
2679 .probe = hns_dsaf_probe,
2680 .remove = hns_dsaf_remove,
2681 .driver = {
2682 .name = DSAF_DRV_NAME,
2683 .of_match_table = g_dsaf_match,
2684 },
2685 };
2686
2687 module_platform_driver(g_dsaf_driver);
2688
2689 MODULE_LICENSE("GPL");
2690 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2691 MODULE_DESCRIPTION("HNS DSAF driver");
2692 MODULE_VERSION(DSAF_MOD_VERSION);
Linux kernel - Deliverables
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