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net: hns: bug fix of ge reset sequence
[deliverable/linux.git] / drivers / net / ethernet / hisilicon / hns / hns_dsaf_main.c
1 /*
2 * Copyright (c) 2014-2015 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10 #include <linux/acpi.h>
11 #include <linux/device.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/netdevice.h>
17 #include <linux/mfd/syscon.h>
18 #include <linux/of.h>
19 #include <linux/of_address.h>
20 #include <linux/of_irq.h>
21 #include <linux/platform_device.h>
22 #include <linux/vmalloc.h>
23
24 #include "hns_dsaf_mac.h"
25 #include "hns_dsaf_main.h"
26 #include "hns_dsaf_ppe.h"
27 #include "hns_dsaf_rcb.h"
28 #include "hns_dsaf_misc.h"
29
30 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
31 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
32 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
33 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
34 [DSAF_MODE_DISABLE_SP] = "single-port",
35 };
36
37 static const struct acpi_device_id hns_dsaf_acpi_match[] = {
38 { "HISI00B1", 0 },
39 { "HISI00B2", 0 },
40 { },
41 };
42 MODULE_DEVICE_TABLE(acpi, hns_dsaf_acpi_match);
43
44 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
45 {
46 int ret, i;
47 u32 desc_num;
48 u32 buf_size;
49 u32 reset_offset = 0;
50 u32 res_idx = 0;
51 const char *mode_str;
52 struct regmap *syscon;
53 struct resource *res;
54 struct device_node *np = dsaf_dev->dev->of_node;
55 struct platform_device *pdev = to_platform_device(dsaf_dev->dev);
56
57 if (dev_of_node(dsaf_dev->dev)) {
58 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
59 dsaf_dev->dsaf_ver = AE_VERSION_1;
60 else
61 dsaf_dev->dsaf_ver = AE_VERSION_2;
62 } else if (is_acpi_node(dsaf_dev->dev->fwnode)) {
63 if (acpi_dev_found(hns_dsaf_acpi_match[0].id))
64 dsaf_dev->dsaf_ver = AE_VERSION_1;
65 else if (acpi_dev_found(hns_dsaf_acpi_match[1].id))
66 dsaf_dev->dsaf_ver = AE_VERSION_2;
67 else
68 return -ENXIO;
69 } else {
70 dev_err(dsaf_dev->dev, "cannot get cfg data from of or acpi\n");
71 return -ENXIO;
72 }
73
74 ret = device_property_read_string(dsaf_dev->dev, "mode", &mode_str);
75 if (ret) {
76 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
77 return ret;
78 }
79 for (i = 0; i < DSAF_MODE_MAX; i++) {
80 if (g_dsaf_mode_match[i] &&
81 !strcmp(mode_str, g_dsaf_mode_match[i]))
82 break;
83 }
84 if (i >= DSAF_MODE_MAX ||
85 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
86 dev_err(dsaf_dev->dev,
87 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
88 return -EINVAL;
89 }
90 dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
91
92 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
93 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
94 else
95 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
96
97 if ((i == DSAF_MODE_ENABLE_16VM) ||
98 (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
99 (i == DSAF_MODE_DISABLE_6PORT_2VM))
100 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
101 else
102 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
103
104 if (dev_of_node(dsaf_dev->dev)) {
105 syscon = syscon_node_to_regmap(
106 of_parse_phandle(np, "subctrl-syscon", 0));
107 if (IS_ERR_OR_NULL(syscon)) {
108 res = platform_get_resource(pdev, IORESOURCE_MEM,
109 res_idx++);
110 if (!res) {
111 dev_err(dsaf_dev->dev, "subctrl info is needed!\n");
112 return -ENOMEM;
113 }
114
115 dsaf_dev->sc_base = devm_ioremap_resource(&pdev->dev,
116 res);
117 if (!dsaf_dev->sc_base) {
118 dev_err(dsaf_dev->dev, "subctrl can not map!\n");
119 return -ENOMEM;
120 }
121
122 res = platform_get_resource(pdev, IORESOURCE_MEM,
123 res_idx++);
124 if (!res) {
125 dev_err(dsaf_dev->dev, "serdes-ctrl info is needed!\n");
126 return -ENOMEM;
127 }
128
129 dsaf_dev->sds_base = devm_ioremap_resource(&pdev->dev,
130 res);
131 if (!dsaf_dev->sds_base) {
132 dev_err(dsaf_dev->dev, "serdes-ctrl can not map!\n");
133 return -ENOMEM;
134 }
135 } else {
136 dsaf_dev->sub_ctrl = syscon;
137 }
138 }
139
140 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ppe-base");
141 if (!res) {
142 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++);
143 if (!res) {
144 dev_err(dsaf_dev->dev, "ppe-base info is needed!\n");
145 return -ENOMEM;
146 }
147 }
148 dsaf_dev->ppe_base = devm_ioremap_resource(&pdev->dev, res);
149 if (!dsaf_dev->ppe_base) {
150 dev_err(dsaf_dev->dev, "ppe-base resource can not map!\n");
151 return -ENOMEM;
152 }
153 dsaf_dev->ppe_paddr = res->start;
154
155 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
156 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
157 "dsaf-base");
158 if (!res) {
159 res = platform_get_resource(pdev, IORESOURCE_MEM,
160 res_idx);
161 if (!res) {
162 dev_err(dsaf_dev->dev,
163 "dsaf-base info is needed!\n");
164 return -ENOMEM;
165 }
166 }
167 dsaf_dev->io_base = devm_ioremap_resource(&pdev->dev, res);
168 if (!dsaf_dev->io_base) {
169 dev_err(dsaf_dev->dev, "dsaf-base resource can not map!\n");
170 return -ENOMEM;
171 }
172 }
173
174 ret = device_property_read_u32(dsaf_dev->dev, "desc-num", &desc_num);
175 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
176 desc_num > HNS_DSAF_MAX_DESC_CNT) {
177 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
178 desc_num, ret);
179 goto unmap_base_addr;
180 }
181 dsaf_dev->desc_num = desc_num;
182
183 ret = device_property_read_u32(dsaf_dev->dev, "reset-field-offset",
184 &reset_offset);
185 if (ret < 0) {
186 dev_dbg(dsaf_dev->dev,
187 "get reset-field-offset fail, ret=%d!\r\n", ret);
188 }
189 dsaf_dev->reset_offset = reset_offset;
190
191 ret = device_property_read_u32(dsaf_dev->dev, "buf-size", &buf_size);
192 if (ret < 0) {
193 dev_err(dsaf_dev->dev,
194 "get buf-size fail, ret=%d!\r\n", ret);
195 goto unmap_base_addr;
196 }
197 dsaf_dev->buf_size = buf_size;
198
199 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
200 if (dsaf_dev->buf_size_type < 0) {
201 dev_err(dsaf_dev->dev,
202 "buf_size(%d) is wrong!\n", buf_size);
203 goto unmap_base_addr;
204 }
205
206 dsaf_dev->misc_op = hns_misc_op_get(dsaf_dev);
207 if (!dsaf_dev->misc_op)
208 return -ENOMEM;
209
210 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
211 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
212 else
213 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
214
215 return 0;
216
217 unmap_base_addr:
218 if (dsaf_dev->io_base)
219 iounmap(dsaf_dev->io_base);
220 if (dsaf_dev->ppe_base)
221 iounmap(dsaf_dev->ppe_base);
222 if (dsaf_dev->sds_base)
223 iounmap(dsaf_dev->sds_base);
224 if (dsaf_dev->sc_base)
225 iounmap(dsaf_dev->sc_base);
226 return ret;
227 }
228
229 static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev)
230 {
231 if (dsaf_dev->io_base)
232 iounmap(dsaf_dev->io_base);
233
234 if (dsaf_dev->ppe_base)
235 iounmap(dsaf_dev->ppe_base);
236
237 if (dsaf_dev->sds_base)
238 iounmap(dsaf_dev->sds_base);
239
240 if (dsaf_dev->sc_base)
241 iounmap(dsaf_dev->sc_base);
242 }
243
244 /**
245 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
246 * @dsaf_id: dsa fabric id
247 */
248 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
249 {
250 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
251 }
252
253 /**
254 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
255 * @dsaf_id: dsa fabric id
256 * @hns_dsaf_reg_cnt_clr_ce: config value
257 */
258 static void
259 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
260 {
261 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
262 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
263 }
264
265 /**
266 * hns_ppe_qid_cfg - config ppe qid
267 * @dsaf_id: dsa fabric id
268 * @pppe_qid_cfg: value array
269 */
270 static void
271 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
272 {
273 u32 i;
274
275 for (i = 0; i < DSAF_COMM_CHN; i++) {
276 dsaf_set_dev_field(dsaf_dev,
277 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
278 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
279 qid_cfg);
280 }
281 }
282
283 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
284 {
285 u16 max_q_per_vf, max_vfn;
286 u32 q_id, q_num_per_port;
287 u32 i;
288
289 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
290 q_num_per_port = max_vfn * max_q_per_vf;
291
292 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
293 dsaf_set_dev_field(dsaf_dev,
294 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
295 0xff, 0, q_id);
296 q_id += q_num_per_port;
297 }
298 }
299
300 static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev)
301 {
302 u16 max_q_per_vf, max_vfn;
303 u32 q_id, q_num_per_port;
304 u32 mac_id;
305
306 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
307 return;
308
309 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
310 q_num_per_port = max_vfn * max_q_per_vf;
311
312 for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) {
313 dsaf_set_dev_field(dsaf_dev,
314 DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
315 DSAFV2_SERDES_LBK_QID_M,
316 DSAFV2_SERDES_LBK_QID_S,
317 q_id);
318 q_id += q_num_per_port;
319 }
320 }
321
322 /**
323 * hns_dsaf_sw_port_type_cfg - cfg sw type
324 * @dsaf_id: dsa fabric id
325 * @psw_port_type: array
326 */
327 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
328 enum dsaf_sw_port_type port_type)
329 {
330 u32 i;
331
332 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
333 dsaf_set_dev_field(dsaf_dev,
334 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
335 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
336 port_type);
337 }
338 }
339
340 /**
341 * hns_dsaf_stp_port_type_cfg - cfg stp type
342 * @dsaf_id: dsa fabric id
343 * @pstp_port_type: array
344 */
345 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
346 enum dsaf_stp_port_type port_type)
347 {
348 u32 i;
349
350 for (i = 0; i < DSAF_COMM_CHN; i++) {
351 dsaf_set_dev_field(dsaf_dev,
352 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
353 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
354 port_type);
355 }
356 }
357
358 #define HNS_DSAF_SBM_NUM(dev) \
359 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
360 /**
361 * hns_dsaf_sbm_cfg - config sbm
362 * @dsaf_id: dsa fabric id
363 */
364 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
365 {
366 u32 o_sbm_cfg;
367 u32 i;
368
369 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
370 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
371 DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
372 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
373 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
374 dsaf_write_dev(dsaf_dev,
375 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
376 }
377 }
378
379 /**
380 * hns_dsaf_sbm_cfg_mib_en - config sbm
381 * @dsaf_id: dsa fabric id
382 */
383 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
384 {
385 u32 sbm_cfg_mib_en;
386 u32 i;
387 u32 reg;
388 u32 read_cnt;
389
390 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
391 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
392 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
393 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
394 }
395
396 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
397 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
398 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
399 }
400
401 /* waitint for all sbm enable finished */
402 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
403 read_cnt = 0;
404 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
405 do {
406 udelay(1);
407 sbm_cfg_mib_en = dsaf_get_dev_bit(
408 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
409 read_cnt++;
410 } while (sbm_cfg_mib_en == 0 &&
411 read_cnt < DSAF_CFG_READ_CNT);
412
413 if (sbm_cfg_mib_en == 0) {
414 dev_err(dsaf_dev->dev,
415 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
416 dsaf_dev->ae_dev.name, i);
417 return -ENODEV;
418 }
419 }
420
421 return 0;
422 }
423
424 /**
425 * hns_dsaf_sbm_bp_wl_cfg - config sbm
426 * @dsaf_id: dsa fabric id
427 */
428 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
429 {
430 u32 o_sbm_bp_cfg;
431 u32 reg;
432 u32 i;
433
434 /* XGE */
435 for (i = 0; i < DSAF_XGE_NUM; i++) {
436 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
437 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
438 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
439 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
440 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
441 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
442 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
443 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
444 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
445
446 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
447 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
448 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
449 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
450 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
451 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
452 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
453
454 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
455 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
456 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
457 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
458 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
459 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
460 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
461
462 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
463 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
464 dsaf_set_field(o_sbm_bp_cfg,
465 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
466 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
467 dsaf_set_field(o_sbm_bp_cfg,
468 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
469 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
470 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
471
472 /* for no enable pfc mode */
473 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
474 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
475 dsaf_set_field(o_sbm_bp_cfg,
476 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
477 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
478 dsaf_set_field(o_sbm_bp_cfg,
479 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
480 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
481 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
482 }
483
484 /* PPE */
485 for (i = 0; i < DSAF_COMM_CHN; i++) {
486 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
487 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
488 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
489 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
490 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
491 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
492 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
493 }
494
495 /* RoCEE */
496 for (i = 0; i < DSAF_COMM_CHN; i++) {
497 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
498 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
499 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
500 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
501 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
502 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
503 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
504 }
505 }
506
507 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
508 {
509 u32 o_sbm_bp_cfg;
510 u32 reg;
511 u32 i;
512
513 /* XGE */
514 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
515 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
516 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
517 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
518 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
519 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
520 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
521 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
522 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
523 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
524
525 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
526 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
527 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
528 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
529 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
530 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
531 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
532
533 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
534 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
535 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
536 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
537 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
538 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
539 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
540
541 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
542 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
543 dsaf_set_field(o_sbm_bp_cfg,
544 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
545 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
546 dsaf_set_field(o_sbm_bp_cfg,
547 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
548 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
549 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
550
551 /* for no enable pfc mode */
552 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
553 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
554 dsaf_set_field(o_sbm_bp_cfg,
555 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
556 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
557 dsaf_set_field(o_sbm_bp_cfg,
558 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
559 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
560 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
561 }
562
563 /* PPE */
564 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
565 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
566 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
567 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
568 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
569 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
570 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
571 /* RoCEE */
572 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
573 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
574 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
575 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
576 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
577 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
578 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
579 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
580 }
581 }
582
583 /**
584 * hns_dsaf_voq_bp_all_thrd_cfg - voq
585 * @dsaf_id: dsa fabric id
586 */
587 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
588 {
589 u32 voq_bp_all_thrd;
590 u32 i;
591
592 for (i = 0; i < DSAF_VOQ_NUM; i++) {
593 voq_bp_all_thrd = dsaf_read_dev(
594 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
595 if (i < DSAF_XGE_NUM) {
596 dsaf_set_field(voq_bp_all_thrd,
597 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
598 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
599 dsaf_set_field(voq_bp_all_thrd,
600 DSAF_VOQ_BP_ALL_UPTHRD_M,
601 DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
602 } else {
603 dsaf_set_field(voq_bp_all_thrd,
604 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
605 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
606 dsaf_set_field(voq_bp_all_thrd,
607 DSAF_VOQ_BP_ALL_UPTHRD_M,
608 DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
609 }
610 dsaf_write_dev(
611 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
612 voq_bp_all_thrd);
613 }
614 }
615
616 /**
617 * hns_dsaf_tbl_tcam_data_cfg - tbl
618 * @dsaf_id: dsa fabric id
619 * @ptbl_tcam_data: addr
620 */
621 static void hns_dsaf_tbl_tcam_data_cfg(
622 struct dsaf_device *dsaf_dev,
623 struct dsaf_tbl_tcam_data *ptbl_tcam_data)
624 {
625 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
626 ptbl_tcam_data->tbl_tcam_data_low);
627 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
628 ptbl_tcam_data->tbl_tcam_data_high);
629 }
630
631 /**
632 * dsaf_tbl_tcam_mcast_cfg - tbl
633 * @dsaf_id: dsa fabric id
634 * @ptbl_tcam_mcast: addr
635 */
636 static void hns_dsaf_tbl_tcam_mcast_cfg(
637 struct dsaf_device *dsaf_dev,
638 struct dsaf_tbl_tcam_mcast_cfg *mcast)
639 {
640 u32 mcast_cfg4;
641
642 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
643 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
644 mcast->tbl_mcast_item_vld);
645 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
646 mcast->tbl_mcast_old_en);
647 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
648 DSAF_TBL_MCAST_CFG4_VM128_112_S,
649 mcast->tbl_mcast_port_msk[4]);
650 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
651
652 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
653 mcast->tbl_mcast_port_msk[3]);
654
655 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
656 mcast->tbl_mcast_port_msk[2]);
657
658 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
659 mcast->tbl_mcast_port_msk[1]);
660
661 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
662 mcast->tbl_mcast_port_msk[0]);
663 }
664
665 /**
666 * hns_dsaf_tbl_tcam_ucast_cfg - tbl
667 * @dsaf_id: dsa fabric id
668 * @ptbl_tcam_ucast: addr
669 */
670 static void hns_dsaf_tbl_tcam_ucast_cfg(
671 struct dsaf_device *dsaf_dev,
672 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
673 {
674 u32 ucast_cfg1;
675
676 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
677 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
678 tbl_tcam_ucast->tbl_ucast_mac_discard);
679 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
680 tbl_tcam_ucast->tbl_ucast_item_vld);
681 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
682 tbl_tcam_ucast->tbl_ucast_old_en);
683 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
684 tbl_tcam_ucast->tbl_ucast_dvc);
685 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
686 DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
687 tbl_tcam_ucast->tbl_ucast_out_port);
688 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
689 }
690
691 /**
692 * hns_dsaf_tbl_line_cfg - tbl
693 * @dsaf_id: dsa fabric id
694 * @ptbl_lin: addr
695 */
696 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
697 struct dsaf_tbl_line_cfg *tbl_lin)
698 {
699 u32 tbl_line;
700
701 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
702 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
703 tbl_lin->tbl_line_mac_discard);
704 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
705 tbl_lin->tbl_line_dvc);
706 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
707 DSAF_TBL_LINE_CFG_OUT_PORT_S,
708 tbl_lin->tbl_line_out_port);
709 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
710 }
711
712 /**
713 * hns_dsaf_tbl_tcam_mcast_pul - tbl
714 * @dsaf_id: dsa fabric id
715 */
716 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
717 {
718 u32 o_tbl_pul;
719
720 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
721 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
722 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
723 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
724 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
725 }
726
727 /**
728 * hns_dsaf_tbl_line_pul - tbl
729 * @dsaf_id: dsa fabric id
730 */
731 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
732 {
733 u32 tbl_pul;
734
735 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
736 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
737 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
738 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
739 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
740 }
741
742 /**
743 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
744 * @dsaf_id: dsa fabric id
745 */
746 static void hns_dsaf_tbl_tcam_data_mcast_pul(
747 struct dsaf_device *dsaf_dev)
748 {
749 u32 o_tbl_pul;
750
751 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
752 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
753 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
754 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
755 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
756 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
757 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
758 }
759
760 /**
761 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
762 * @dsaf_id: dsa fabric id
763 */
764 static void hns_dsaf_tbl_tcam_data_ucast_pul(
765 struct dsaf_device *dsaf_dev)
766 {
767 u32 o_tbl_pul;
768
769 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
770 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
771 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
772 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
773 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
774 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
775 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
776 }
777
778 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
779 {
780 if (!HNS_DSAF_IS_DEBUG(dsaf_dev))
781 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG,
782 DSAF_CFG_MIX_MODE_S, !!en);
783 }
784
785 void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en)
786 {
787 if (AE_IS_VER1(dsaf_dev->dsaf_ver) ||
788 dsaf_dev->mac_cb[mac_id]->mac_type == HNAE_PORT_DEBUG)
789 return;
790
791 dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
792 DSAFV2_SERDES_LBK_EN_B, !!en);
793 }
794
795 /**
796 * hns_dsaf_tbl_stat_en - tbl
797 * @dsaf_id: dsa fabric id
798 * @ptbl_stat_en: addr
799 */
800 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
801 {
802 u32 o_tbl_ctrl;
803
804 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
805 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
806 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
807 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
808 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
809 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
810 }
811
812 /**
813 * hns_dsaf_rocee_bp_en - rocee back press enable
814 * @dsaf_id: dsa fabric id
815 */
816 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
817 {
818 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
819 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
820 DSAF_FC_XGE_TX_PAUSE_S, 1);
821 }
822
823 /* set msk for dsaf exception irq*/
824 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
825 u32 chnn_num, u32 mask_set)
826 {
827 dsaf_write_dev(dsaf_dev,
828 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
829 }
830
831 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
832 u32 chnn_num, u32 msk_set)
833 {
834 dsaf_write_dev(dsaf_dev,
835 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
836 }
837
838 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
839 u32 chnn, u32 msk_set)
840 {
841 dsaf_write_dev(dsaf_dev,
842 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
843 }
844
845 static void
846 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
847 {
848 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
849 }
850
851 /* clr dsaf exception irq*/
852 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
853 u32 chnn_num, u32 int_src)
854 {
855 dsaf_write_dev(dsaf_dev,
856 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
857 }
858
859 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
860 u32 chnn, u32 int_src)
861 {
862 dsaf_write_dev(dsaf_dev,
863 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
864 }
865
866 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
867 u32 chnn, u32 int_src)
868 {
869 dsaf_write_dev(dsaf_dev,
870 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
871 }
872
873 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
874 u32 int_src)
875 {
876 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
877 }
878
879 /**
880 * hns_dsaf_single_line_tbl_cfg - INT
881 * @dsaf_id: dsa fabric id
882 * @address:
883 * @ptbl_line:
884 */
885 static void hns_dsaf_single_line_tbl_cfg(
886 struct dsaf_device *dsaf_dev,
887 u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
888 {
889 /*Write Addr*/
890 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
891
892 /*Write Line*/
893 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
894
895 /*Write Plus*/
896 hns_dsaf_tbl_line_pul(dsaf_dev);
897 }
898
899 /**
900 * hns_dsaf_tcam_uc_cfg - INT
901 * @dsaf_id: dsa fabric id
902 * @address,
903 * @ptbl_tcam_data,
904 */
905 static void hns_dsaf_tcam_uc_cfg(
906 struct dsaf_device *dsaf_dev, u32 address,
907 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
908 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
909 {
910 /*Write Addr*/
911 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
912 /*Write Tcam Data*/
913 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
914 /*Write Tcam Ucast*/
915 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
916 /*Write Plus*/
917 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
918 }
919
920 /**
921 * hns_dsaf_tcam_mc_cfg - INT
922 * @dsaf_id: dsa fabric id
923 * @address,
924 * @ptbl_tcam_data,
925 * @ptbl_tcam_mcast,
926 */
927 static void hns_dsaf_tcam_mc_cfg(
928 struct dsaf_device *dsaf_dev, u32 address,
929 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
930 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
931 {
932 /*Write Addr*/
933 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
934 /*Write Tcam Data*/
935 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
936 /*Write Tcam Mcast*/
937 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
938 /*Write Plus*/
939 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
940 }
941
942 /**
943 * hns_dsaf_tcam_mc_invld - INT
944 * @dsaf_id: dsa fabric id
945 * @address
946 */
947 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
948 {
949 /*Write Addr*/
950 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
951
952 /*write tcam mcast*/
953 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
954 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
955 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
956 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
957 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
958
959 /*Write Plus*/
960 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
961 }
962
963 /**
964 * hns_dsaf_tcam_uc_get - INT
965 * @dsaf_id: dsa fabric id
966 * @address
967 * @ptbl_tcam_data
968 * @ptbl_tcam_ucast
969 */
970 static void hns_dsaf_tcam_uc_get(
971 struct dsaf_device *dsaf_dev, u32 address,
972 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
973 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
974 {
975 u32 tcam_read_data0;
976 u32 tcam_read_data4;
977
978 /*Write Addr*/
979 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
980
981 /*read tcam item puls*/
982 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
983
984 /*read tcam data*/
985 ptbl_tcam_data->tbl_tcam_data_high
986 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
987 ptbl_tcam_data->tbl_tcam_data_low
988 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
989
990 /*read tcam mcast*/
991 tcam_read_data0 = dsaf_read_dev(dsaf_dev,
992 DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
993 tcam_read_data4 = dsaf_read_dev(dsaf_dev,
994 DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
995
996 ptbl_tcam_ucast->tbl_ucast_item_vld
997 = dsaf_get_bit(tcam_read_data4,
998 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
999 ptbl_tcam_ucast->tbl_ucast_old_en
1000 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
1001 ptbl_tcam_ucast->tbl_ucast_mac_discard
1002 = dsaf_get_bit(tcam_read_data0,
1003 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
1004 ptbl_tcam_ucast->tbl_ucast_out_port
1005 = dsaf_get_field(tcam_read_data0,
1006 DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
1007 DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
1008 ptbl_tcam_ucast->tbl_ucast_dvc
1009 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
1010 }
1011
1012 /**
1013 * hns_dsaf_tcam_mc_get - INT
1014 * @dsaf_id: dsa fabric id
1015 * @address
1016 * @ptbl_tcam_data
1017 * @ptbl_tcam_ucast
1018 */
1019 static void hns_dsaf_tcam_mc_get(
1020 struct dsaf_device *dsaf_dev, u32 address,
1021 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
1022 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
1023 {
1024 u32 data_tmp;
1025
1026 /*Write Addr*/
1027 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
1028
1029 /*read tcam item puls*/
1030 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
1031
1032 /*read tcam data*/
1033 ptbl_tcam_data->tbl_tcam_data_high =
1034 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
1035 ptbl_tcam_data->tbl_tcam_data_low =
1036 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
1037
1038 /*read tcam mcast*/
1039 ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
1040 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
1041 ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
1042 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
1043 ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
1044 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
1045 ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
1046 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
1047
1048 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
1049 ptbl_tcam_mcast->tbl_mcast_item_vld =
1050 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
1051 ptbl_tcam_mcast->tbl_mcast_old_en =
1052 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
1053 ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
1054 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
1055 DSAF_TBL_MCAST_CFG4_VM128_112_S);
1056 }
1057
1058 /**
1059 * hns_dsaf_tbl_line_init - INT
1060 * @dsaf_id: dsa fabric id
1061 */
1062 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
1063 {
1064 u32 i;
1065 /* defaultly set all lineal mac table entry resulting discard */
1066 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
1067
1068 for (i = 0; i < DSAF_LINE_SUM; i++)
1069 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
1070 }
1071
1072 /**
1073 * hns_dsaf_tbl_tcam_init - INT
1074 * @dsaf_id: dsa fabric id
1075 */
1076 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
1077 {
1078 u32 i;
1079 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
1080 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
1081
1082 /*tcam tbl*/
1083 for (i = 0; i < DSAF_TCAM_SUM; i++)
1084 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
1085 }
1086
1087 /**
1088 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1089 * @mac_cb: mac contrl block
1090 */
1091 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
1092 int mac_id, int tc_en)
1093 {
1094 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, tc_en);
1095 }
1096
1097 static void hns_dsaf_set_pfc_pause(struct dsaf_device *dsaf_dev,
1098 int mac_id, int tx_en, int rx_en)
1099 {
1100 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1101 if (!tx_en || !rx_en)
1102 dev_err(dsaf_dev->dev, "dsaf v1 can not close pfc!\n");
1103
1104 return;
1105 }
1106
1107 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1108 DSAF_PFC_PAUSE_RX_EN_B, !!rx_en);
1109 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1110 DSAF_PFC_PAUSE_TX_EN_B, !!tx_en);
1111 }
1112
1113 int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1114 u32 en)
1115 {
1116 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1117 if (!en)
1118 dev_err(dsaf_dev->dev, "dsafv1 can't close rx_pause!\n");
1119
1120 return -EINVAL;
1121 }
1122
1123 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1124 DSAF_MAC_PAUSE_RX_EN_B, !!en);
1125
1126 return 0;
1127 }
1128
1129 void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1130 u32 *en)
1131 {
1132 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
1133 *en = 1;
1134 else
1135 *en = dsaf_get_dev_bit(dsaf_dev,
1136 DSAF_PAUSE_CFG_REG + mac_id * 4,
1137 DSAF_MAC_PAUSE_RX_EN_B);
1138 }
1139
1140 /**
1141 * hns_dsaf_tbl_tcam_init - INT
1142 * @dsaf_id: dsa fabric id
1143 * @dsaf_mode
1144 */
1145 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1146 {
1147 u32 i;
1148 u32 o_dsaf_cfg;
1149 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
1150
1151 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1152 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1153 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1154 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1155 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1156 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1157 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1158
1159 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1160 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1161
1162 /* set 22 queue per tx ppe engine, only used in switch mode */
1163 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1164
1165 /* set promisc def queue id */
1166 hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1167
1168 /* set inner loopback queue id */
1169 hns_dsaf_inner_qid_cfg(dsaf_dev);
1170
1171 /* in non switch mode, set all port to access mode */
1172 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1173
1174 /*set dsaf pfc to 0 for parseing rx pause*/
1175 for (i = 0; i < DSAF_COMM_CHN; i++) {
1176 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
1177 hns_dsaf_set_pfc_pause(dsaf_dev, i, is_ver1, is_ver1);
1178 }
1179
1180 /*msk and clr exception irqs */
1181 for (i = 0; i < DSAF_COMM_CHN; i++) {
1182 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1183 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1184 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1185
1186 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1187 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1188 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1189 }
1190 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1191 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1192 }
1193
1194 /**
1195 * hns_dsaf_inode_init - INT
1196 * @dsaf_id: dsa fabric id
1197 */
1198 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1199 {
1200 u32 reg;
1201 u32 tc_cfg;
1202 u32 i;
1203
1204 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1205 tc_cfg = HNS_DSAF_I4TC_CFG;
1206 else
1207 tc_cfg = HNS_DSAF_I8TC_CFG;
1208
1209 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1210 for (i = 0; i < DSAF_INODE_NUM; i++) {
1211 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1212 dsaf_set_dev_field(dsaf_dev, reg,
1213 DSAF_INODE_IN_PORT_NUM_M,
1214 DSAF_INODE_IN_PORT_NUM_S,
1215 i % DSAF_XGE_NUM);
1216 }
1217 } else {
1218 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1219 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1220 dsaf_set_dev_field(dsaf_dev, reg,
1221 DSAF_INODE_IN_PORT_NUM_M,
1222 DSAF_INODE_IN_PORT_NUM_S, 0);
1223 dsaf_set_dev_field(dsaf_dev, reg,
1224 DSAFV2_INODE_IN_PORT1_NUM_M,
1225 DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1226 dsaf_set_dev_field(dsaf_dev, reg,
1227 DSAFV2_INODE_IN_PORT2_NUM_M,
1228 DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1229 dsaf_set_dev_field(dsaf_dev, reg,
1230 DSAFV2_INODE_IN_PORT3_NUM_M,
1231 DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1232 dsaf_set_dev_field(dsaf_dev, reg,
1233 DSAFV2_INODE_IN_PORT4_NUM_M,
1234 DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1235 dsaf_set_dev_field(dsaf_dev, reg,
1236 DSAFV2_INODE_IN_PORT5_NUM_M,
1237 DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1238 }
1239 }
1240 for (i = 0; i < DSAF_INODE_NUM; i++) {
1241 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1242 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1243 }
1244 }
1245
1246 /**
1247 * hns_dsaf_sbm_init - INT
1248 * @dsaf_id: dsa fabric id
1249 */
1250 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1251 {
1252 u32 flag;
1253 u32 finish_msk;
1254 u32 cnt = 0;
1255 int ret;
1256
1257 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1258 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1259 finish_msk = DSAF_SRAM_INIT_OVER_M;
1260 } else {
1261 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1262 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1263 }
1264
1265 /* enable sbm chanel, disable sbm chanel shcut function*/
1266 hns_dsaf_sbm_cfg(dsaf_dev);
1267
1268 /* enable sbm mib */
1269 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1270 if (ret) {
1271 dev_err(dsaf_dev->dev,
1272 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1273 dsaf_dev->ae_dev.name, ret);
1274 return ret;
1275 }
1276
1277 /* enable sbm initial link sram */
1278 hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1279
1280 do {
1281 usleep_range(200, 210);/*udelay(200);*/
1282 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1283 finish_msk, DSAF_SRAM_INIT_OVER_S);
1284 cnt++;
1285 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1286 cnt < DSAF_CFG_READ_CNT);
1287
1288 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
1289 dev_err(dsaf_dev->dev,
1290 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1291 dsaf_dev->ae_dev.name, flag, cnt);
1292 return -ENODEV;
1293 }
1294
1295 hns_dsaf_rocee_bp_en(dsaf_dev);
1296
1297 return 0;
1298 }
1299
1300 /**
1301 * hns_dsaf_tbl_init - INT
1302 * @dsaf_id: dsa fabric id
1303 */
1304 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1305 {
1306 hns_dsaf_tbl_stat_en(dsaf_dev);
1307
1308 hns_dsaf_tbl_tcam_init(dsaf_dev);
1309 hns_dsaf_tbl_line_init(dsaf_dev);
1310 }
1311
1312 /**
1313 * hns_dsaf_voq_init - INT
1314 * @dsaf_id: dsa fabric id
1315 */
1316 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1317 {
1318 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1319 }
1320
1321 /**
1322 * hns_dsaf_init_hw - init dsa fabric hardware
1323 * @dsaf_dev: dsa fabric device struct pointer
1324 */
1325 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1326 {
1327 int ret;
1328
1329 dev_dbg(dsaf_dev->dev,
1330 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1331
1332 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 0);
1333 mdelay(10);
1334 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 1);
1335
1336 hns_dsaf_comm_init(dsaf_dev);
1337
1338 /*init XBAR_INODE*/
1339 hns_dsaf_inode_init(dsaf_dev);
1340
1341 /*init SBM*/
1342 ret = hns_dsaf_sbm_init(dsaf_dev);
1343 if (ret)
1344 return ret;
1345
1346 /*init TBL*/
1347 hns_dsaf_tbl_init(dsaf_dev);
1348
1349 /*init VOQ*/
1350 hns_dsaf_voq_init(dsaf_dev);
1351
1352 return 0;
1353 }
1354
1355 /**
1356 * hns_dsaf_remove_hw - uninit dsa fabric hardware
1357 * @dsaf_dev: dsa fabric device struct pointer
1358 */
1359 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1360 {
1361 /*reset*/
1362 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 0);
1363 }
1364
1365 /**
1366 * hns_dsaf_init - init dsa fabric
1367 * @dsaf_dev: dsa fabric device struct pointer
1368 * retuen 0 - success , negative --fail
1369 */
1370 static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1371 {
1372 struct dsaf_drv_priv *priv =
1373 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1374 u32 i;
1375 int ret;
1376
1377 if (HNS_DSAF_IS_DEBUG(dsaf_dev))
1378 return 0;
1379
1380 ret = hns_dsaf_init_hw(dsaf_dev);
1381 if (ret)
1382 return ret;
1383
1384 /* malloc mem for tcam mac key(vlan+mac) */
1385 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1386 * DSAF_TCAM_SUM);
1387 if (!priv->soft_mac_tbl) {
1388 ret = -ENOMEM;
1389 goto remove_hw;
1390 }
1391
1392 /*all entry invall */
1393 for (i = 0; i < DSAF_TCAM_SUM; i++)
1394 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1395
1396 return 0;
1397
1398 remove_hw:
1399 hns_dsaf_remove_hw(dsaf_dev);
1400 return ret;
1401 }
1402
1403 /**
1404 * hns_dsaf_free - free dsa fabric
1405 * @dsaf_dev: dsa fabric device struct pointer
1406 */
1407 static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1408 {
1409 struct dsaf_drv_priv *priv =
1410 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1411
1412 hns_dsaf_remove_hw(dsaf_dev);
1413
1414 /* free all mac mem */
1415 vfree(priv->soft_mac_tbl);
1416 priv->soft_mac_tbl = NULL;
1417 }
1418
1419 /**
1420 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1421 * @dsaf_dev: dsa fabric device struct pointer
1422 * @mac_key: mac entry struct pointer
1423 */
1424 static u16 hns_dsaf_find_soft_mac_entry(
1425 struct dsaf_device *dsaf_dev,
1426 struct dsaf_drv_tbl_tcam_key *mac_key)
1427 {
1428 struct dsaf_drv_priv *priv =
1429 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1430 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1431 u32 i;
1432
1433 soft_mac_entry = priv->soft_mac_tbl;
1434 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1435 /* invall tab entry */
1436 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1437 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1438 (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1439 /* return find result --soft index */
1440 return soft_mac_entry->index;
1441
1442 soft_mac_entry++;
1443 }
1444 return DSAF_INVALID_ENTRY_IDX;
1445 }
1446
1447 /**
1448 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1449 * @dsaf_dev: dsa fabric device struct pointer
1450 */
1451 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1452 {
1453 struct dsaf_drv_priv *priv =
1454 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1455 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1456 u32 i;
1457
1458 soft_mac_entry = priv->soft_mac_tbl;
1459 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1460 /* inv all entry */
1461 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1462 /* return find result --soft index */
1463 return i;
1464
1465 soft_mac_entry++;
1466 }
1467 return DSAF_INVALID_ENTRY_IDX;
1468 }
1469
1470 /**
1471 * hns_dsaf_set_mac_key - set mac key
1472 * @dsaf_dev: dsa fabric device struct pointer
1473 * @mac_key: tcam key pointer
1474 * @vlan_id: vlan id
1475 * @in_port_num: input port num
1476 * @addr: mac addr
1477 */
1478 static void hns_dsaf_set_mac_key(
1479 struct dsaf_device *dsaf_dev,
1480 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1481 u8 *addr)
1482 {
1483 u8 port;
1484
1485 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1486 /*DSAF mode : in port id fixed 0*/
1487 port = 0;
1488 else
1489 /*non-dsaf mode*/
1490 port = in_port_num;
1491
1492 mac_key->high.bits.mac_0 = addr[0];
1493 mac_key->high.bits.mac_1 = addr[1];
1494 mac_key->high.bits.mac_2 = addr[2];
1495 mac_key->high.bits.mac_3 = addr[3];
1496 mac_key->low.bits.mac_4 = addr[4];
1497 mac_key->low.bits.mac_5 = addr[5];
1498 mac_key->low.bits.vlan = vlan_id;
1499 mac_key->low.bits.port = port;
1500 }
1501
1502 /**
1503 * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1504 * @dsaf_dev: dsa fabric device struct pointer
1505 * @mac_entry: uc-mac entry
1506 */
1507 int hns_dsaf_set_mac_uc_entry(
1508 struct dsaf_device *dsaf_dev,
1509 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1510 {
1511 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1512 struct dsaf_drv_tbl_tcam_key mac_key;
1513 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1514 struct dsaf_drv_priv *priv =
1515 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1516 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1517
1518 /* mac addr check */
1519 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1520 MAC_IS_BROADCAST(mac_entry->addr) ||
1521 MAC_IS_MULTICAST(mac_entry->addr)) {
1522 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1523 dsaf_dev->ae_dev.name, mac_entry->addr);
1524 return -EINVAL;
1525 }
1526
1527 /* config key */
1528 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1529 mac_entry->in_port_num, mac_entry->addr);
1530
1531 /* entry ie exist? */
1532 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1533 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1534 /*if has not inv entry,find a empty entry */
1535 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1536 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1537 /* has not empty,return error */
1538 dev_err(dsaf_dev->dev,
1539 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1540 dsaf_dev->ae_dev.name,
1541 mac_key.high.val, mac_key.low.val);
1542 return -EINVAL;
1543 }
1544 }
1545
1546 dev_dbg(dsaf_dev->dev,
1547 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1548 dsaf_dev->ae_dev.name, mac_key.high.val,
1549 mac_key.low.val, entry_index);
1550
1551 /* config hardware entry */
1552 mac_data.tbl_ucast_item_vld = 1;
1553 mac_data.tbl_ucast_mac_discard = 0;
1554 mac_data.tbl_ucast_old_en = 0;
1555 /* default config dvc to 0 */
1556 mac_data.tbl_ucast_dvc = 0;
1557 mac_data.tbl_ucast_out_port = mac_entry->port_num;
1558 hns_dsaf_tcam_uc_cfg(
1559 dsaf_dev, entry_index,
1560 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1561
1562 /* config software entry */
1563 soft_mac_entry += entry_index;
1564 soft_mac_entry->index = entry_index;
1565 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1566 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1567
1568 return 0;
1569 }
1570
1571 /**
1572 * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1573 * @dsaf_dev: dsa fabric device struct pointer
1574 * @mac_entry: mc-mac entry
1575 */
1576 int hns_dsaf_set_mac_mc_entry(
1577 struct dsaf_device *dsaf_dev,
1578 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1579 {
1580 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1581 struct dsaf_drv_tbl_tcam_key mac_key;
1582 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1583 struct dsaf_drv_priv *priv =
1584 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1585 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1586 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1587
1588 /* mac addr check */
1589 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1590 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1591 dsaf_dev->ae_dev.name, mac_entry->addr);
1592 return -EINVAL;
1593 }
1594
1595 /*config key */
1596 hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1597 mac_entry->in_vlan_id,
1598 mac_entry->in_port_num, mac_entry->addr);
1599
1600 /* entry ie exist? */
1601 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1602 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1603 /*if hasnot, find enpty entry*/
1604 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1605 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1606 /*if hasnot empty, error*/
1607 dev_err(dsaf_dev->dev,
1608 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1609 dsaf_dev->ae_dev.name,
1610 mac_key.high.val, mac_key.low.val);
1611 return -EINVAL;
1612 }
1613
1614 /* config hardware entry */
1615 memset(mac_data.tbl_mcast_port_msk,
1616 0, sizeof(mac_data.tbl_mcast_port_msk));
1617 } else {
1618 /* config hardware entry */
1619 hns_dsaf_tcam_mc_get(
1620 dsaf_dev, entry_index,
1621 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1622 }
1623 mac_data.tbl_mcast_old_en = 0;
1624 mac_data.tbl_mcast_item_vld = 1;
1625 dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1626 0x3F, 0, mac_entry->port_mask[0]);
1627
1628 dev_dbg(dsaf_dev->dev,
1629 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1630 dsaf_dev->ae_dev.name, mac_key.high.val,
1631 mac_key.low.val, entry_index);
1632
1633 hns_dsaf_tcam_mc_cfg(
1634 dsaf_dev, entry_index,
1635 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1636
1637 /* config software entry */
1638 soft_mac_entry += entry_index;
1639 soft_mac_entry->index = entry_index;
1640 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1641 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1642
1643 return 0;
1644 }
1645
1646 /**
1647 * hns_dsaf_add_mac_mc_port - add mac mc-port
1648 * @dsaf_dev: dsa fabric device struct pointer
1649 * @mac_entry: mc-mac entry
1650 */
1651 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1652 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1653 {
1654 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1655 struct dsaf_drv_tbl_tcam_key mac_key;
1656 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1657 struct dsaf_drv_priv *priv =
1658 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1659 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1660 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1661 int mskid;
1662
1663 /*chechk mac addr */
1664 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1665 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1666 mac_entry->addr);
1667 return -EINVAL;
1668 }
1669
1670 /*config key */
1671 hns_dsaf_set_mac_key(
1672 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1673 mac_entry->in_port_num, mac_entry->addr);
1674
1675 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1676
1677 /*check exist? */
1678 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1679 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1680 /*if hasnot , find a empty*/
1681 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1682 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1683 /*if hasnot empty, error*/
1684 dev_err(dsaf_dev->dev,
1685 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1686 dsaf_dev->ae_dev.name, mac_key.high.val,
1687 mac_key.low.val);
1688 return -EINVAL;
1689 }
1690 } else {
1691 /*if exist, add in */
1692 hns_dsaf_tcam_mc_get(
1693 dsaf_dev, entry_index,
1694 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1695 }
1696 /* config hardware entry */
1697 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1698 mskid = mac_entry->port_num;
1699 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1700 mskid = mac_entry->port_num -
1701 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1702 } else {
1703 dev_err(dsaf_dev->dev,
1704 "%s,pnum(%d)error,key(%#x:%#x)\n",
1705 dsaf_dev->ae_dev.name, mac_entry->port_num,
1706 mac_key.high.val, mac_key.low.val);
1707 return -EINVAL;
1708 }
1709 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1710 mac_data.tbl_mcast_old_en = 0;
1711 mac_data.tbl_mcast_item_vld = 1;
1712
1713 dev_dbg(dsaf_dev->dev,
1714 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1715 dsaf_dev->ae_dev.name, mac_key.high.val,
1716 mac_key.low.val, entry_index);
1717
1718 hns_dsaf_tcam_mc_cfg(
1719 dsaf_dev, entry_index,
1720 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1721
1722 /*config software entry */
1723 soft_mac_entry += entry_index;
1724 soft_mac_entry->index = entry_index;
1725 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1726 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1727
1728 return 0;
1729 }
1730
1731 /**
1732 * hns_dsaf_del_mac_entry - del mac mc-port
1733 * @dsaf_dev: dsa fabric device struct pointer
1734 * @vlan_id: vlian id
1735 * @in_port_num: input port num
1736 * @addr : mac addr
1737 */
1738 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1739 u8 in_port_num, u8 *addr)
1740 {
1741 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1742 struct dsaf_drv_tbl_tcam_key mac_key;
1743 struct dsaf_drv_priv *priv =
1744 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1745 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1746
1747 /*check mac addr */
1748 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
1749 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1750 addr);
1751 return -EINVAL;
1752 }
1753
1754 /*config key */
1755 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1756
1757 /*exist ?*/
1758 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1759 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1760 /*not exist, error */
1761 dev_err(dsaf_dev->dev,
1762 "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1763 dsaf_dev->ae_dev.name,
1764 mac_key.high.val, mac_key.low.val);
1765 return -EINVAL;
1766 }
1767 dev_dbg(dsaf_dev->dev,
1768 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1769 dsaf_dev->ae_dev.name, mac_key.high.val,
1770 mac_key.low.val, entry_index);
1771
1772 /*do del opt*/
1773 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1774
1775 /*del soft emtry */
1776 soft_mac_entry += entry_index;
1777 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1778
1779 return 0;
1780 }
1781
1782 /**
1783 * hns_dsaf_del_mac_mc_port - del mac mc- port
1784 * @dsaf_dev: dsa fabric device struct pointer
1785 * @mac_entry: mac entry
1786 */
1787 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1788 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1789 {
1790 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1791 struct dsaf_drv_tbl_tcam_key mac_key;
1792 struct dsaf_drv_priv *priv =
1793 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1794 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1795 u16 vlan_id;
1796 u8 in_port_num;
1797 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1798 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1799 int mskid;
1800 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1801
1802 if (!(void *)mac_entry) {
1803 dev_err(dsaf_dev->dev,
1804 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1805 return -EINVAL;
1806 }
1807
1808 /*get key info*/
1809 vlan_id = mac_entry->in_vlan_id;
1810 in_port_num = mac_entry->in_port_num;
1811
1812 /*check mac addr */
1813 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1814 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1815 mac_entry->addr);
1816 return -EINVAL;
1817 }
1818
1819 /*config key */
1820 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1821 mac_entry->addr);
1822
1823 /*check is exist? */
1824 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1825 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1826 /*find none */
1827 dev_err(dsaf_dev->dev,
1828 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1829 dsaf_dev->ae_dev.name,
1830 mac_key.high.val, mac_key.low.val);
1831 return -EINVAL;
1832 }
1833
1834 dev_dbg(dsaf_dev->dev,
1835 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1836 dsaf_dev->ae_dev.name, mac_key.high.val,
1837 mac_key.low.val, entry_index);
1838
1839 /*read entry*/
1840 hns_dsaf_tcam_mc_get(
1841 dsaf_dev, entry_index,
1842 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1843
1844 /*del the port*/
1845 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1846 mskid = mac_entry->port_num;
1847 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1848 mskid = mac_entry->port_num -
1849 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1850 } else {
1851 dev_err(dsaf_dev->dev,
1852 "%s,pnum(%d)error,key(%#x:%#x)\n",
1853 dsaf_dev->ae_dev.name, mac_entry->port_num,
1854 mac_key.high.val, mac_key.low.val);
1855 return -EINVAL;
1856 }
1857 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1858
1859 /*check non port, do del entry */
1860 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1861 sizeof(mac_data.tbl_mcast_port_msk))) {
1862 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1863
1864 /* del soft entry */
1865 soft_mac_entry += entry_index;
1866 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1867 } else { /* not zer, just del port, updata*/
1868 hns_dsaf_tcam_mc_cfg(
1869 dsaf_dev, entry_index,
1870 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1871 }
1872
1873 return 0;
1874 }
1875
1876 /**
1877 * hns_dsaf_get_mac_uc_entry - get mac uc entry
1878 * @dsaf_dev: dsa fabric device struct pointer
1879 * @mac_entry: mac entry
1880 */
1881 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1882 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1883 {
1884 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1885 struct dsaf_drv_tbl_tcam_key mac_key;
1886
1887 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1888
1889 /* check macaddr */
1890 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1891 MAC_IS_BROADCAST(mac_entry->addr)) {
1892 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1893 mac_entry->addr);
1894 return -EINVAL;
1895 }
1896
1897 /*config key */
1898 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1899 mac_entry->in_port_num, mac_entry->addr);
1900
1901 /*check exist? */
1902 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1903 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1904 /*find none, error */
1905 dev_err(dsaf_dev->dev,
1906 "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1907 dsaf_dev->ae_dev.name,
1908 mac_key.high.val, mac_key.low.val);
1909 return -EINVAL;
1910 }
1911 dev_dbg(dsaf_dev->dev,
1912 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1913 dsaf_dev->ae_dev.name, mac_key.high.val,
1914 mac_key.low.val, entry_index);
1915
1916 /*read entry*/
1917 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1918 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1919 mac_entry->port_num = mac_data.tbl_ucast_out_port;
1920
1921 return 0;
1922 }
1923
1924 /**
1925 * hns_dsaf_get_mac_mc_entry - get mac mc entry
1926 * @dsaf_dev: dsa fabric device struct pointer
1927 * @mac_entry: mac entry
1928 */
1929 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1930 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1931 {
1932 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1933 struct dsaf_drv_tbl_tcam_key mac_key;
1934
1935 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1936
1937 /*check mac addr */
1938 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1939 MAC_IS_BROADCAST(mac_entry->addr)) {
1940 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1941 mac_entry->addr);
1942 return -EINVAL;
1943 }
1944
1945 /*config key */
1946 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1947 mac_entry->in_port_num, mac_entry->addr);
1948
1949 /*check exist? */
1950 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1951 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1952 /* find none, error */
1953 dev_err(dsaf_dev->dev,
1954 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1955 dsaf_dev->ae_dev.name, mac_key.high.val,
1956 mac_key.low.val);
1957 return -EINVAL;
1958 }
1959 dev_dbg(dsaf_dev->dev,
1960 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1961 dsaf_dev->ae_dev.name, mac_key.high.val,
1962 mac_key.low.val, entry_index);
1963
1964 /*read entry */
1965 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1966 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1967
1968 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1969 return 0;
1970 }
1971
1972 /**
1973 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1974 * @dsaf_dev: dsa fabric device struct pointer
1975 * @entry_index: tab entry index
1976 * @mac_entry: mac entry
1977 */
1978 int hns_dsaf_get_mac_entry_by_index(
1979 struct dsaf_device *dsaf_dev,
1980 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1981 {
1982 struct dsaf_drv_tbl_tcam_key mac_key;
1983
1984 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1985 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1986 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1987
1988 if (entry_index >= DSAF_TCAM_SUM) {
1989 /* find none, del error */
1990 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1991 dsaf_dev->ae_dev.name);
1992 return -EINVAL;
1993 }
1994
1995 /* mc entry, do read opt */
1996 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1997 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1998
1999 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
2000
2001 /***get mac addr*/
2002 mac_addr[0] = mac_key.high.bits.mac_0;
2003 mac_addr[1] = mac_key.high.bits.mac_1;
2004 mac_addr[2] = mac_key.high.bits.mac_2;
2005 mac_addr[3] = mac_key.high.bits.mac_3;
2006 mac_addr[4] = mac_key.low.bits.mac_4;
2007 mac_addr[5] = mac_key.low.bits.mac_5;
2008 /**is mc or uc*/
2009 if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
2010 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
2011 /**mc donot do*/
2012 } else {
2013 /*is not mc, just uc... */
2014 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
2015 (struct dsaf_tbl_tcam_data *)&mac_key,
2016 &mac_uc_data);
2017 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
2018 }
2019
2020 return 0;
2021 }
2022
2023 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
2024 size_t sizeof_priv)
2025 {
2026 struct dsaf_device *dsaf_dev;
2027
2028 dsaf_dev = devm_kzalloc(dev,
2029 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
2030 if (unlikely(!dsaf_dev)) {
2031 dsaf_dev = ERR_PTR(-ENOMEM);
2032 } else {
2033 dsaf_dev->dev = dev;
2034 dev_set_drvdata(dev, dsaf_dev);
2035 }
2036
2037 return dsaf_dev;
2038 }
2039
2040 /**
2041 * hns_dsaf_free_dev - free dev mem
2042 * @dev: struct device pointer
2043 */
2044 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
2045 {
2046 (void)dev_set_drvdata(dsaf_dev->dev, NULL);
2047 }
2048
2049 /**
2050 * dsaf_pfc_unit_cnt - set pfc unit count
2051 * @dsaf_id: dsa fabric id
2052 * @pport_rate: value array
2053 * @pdsaf_pfc_unit_cnt: value array
2054 */
2055 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id,
2056 enum dsaf_port_rate_mode rate)
2057 {
2058 u32 unit_cnt;
2059
2060 switch (rate) {
2061 case DSAF_PORT_RATE_10000:
2062 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2063 break;
2064 case DSAF_PORT_RATE_1000:
2065 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2066 break;
2067 case DSAF_PORT_RATE_2500:
2068 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2069 break;
2070 default:
2071 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2072 }
2073
2074 dsaf_set_dev_field(dsaf_dev,
2075 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
2076 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
2077 unit_cnt);
2078 }
2079
2080 /**
2081 * dsaf_port_work_rate_cfg - fifo
2082 * @dsaf_id: dsa fabric id
2083 * @xge_ge_work_mode
2084 */
2085 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
2086 enum dsaf_port_rate_mode rate_mode)
2087 {
2088 u32 port_work_mode;
2089
2090 port_work_mode = dsaf_read_dev(
2091 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
2092
2093 if (rate_mode == DSAF_PORT_RATE_10000)
2094 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
2095 else
2096 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
2097
2098 dsaf_write_dev(dsaf_dev,
2099 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
2100 port_work_mode);
2101
2102 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
2103 }
2104
2105 /**
2106 * hns_dsaf_fix_mac_mode - dsaf modify mac mode
2107 * @mac_cb: mac contrl block
2108 */
2109 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
2110 {
2111 enum dsaf_port_rate_mode mode;
2112 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
2113 int mac_id = mac_cb->mac_id;
2114
2115 if (mac_cb->mac_type != HNAE_PORT_SERVICE)
2116 return;
2117 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
2118 mode = DSAF_PORT_RATE_10000;
2119 else
2120 mode = DSAF_PORT_RATE_1000;
2121
2122 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
2123 }
2124
2125 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
2126 {
2127 struct dsaf_hw_stats *hw_stats
2128 = &dsaf_dev->hw_stats[node_num];
2129 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2130 u32 reg_tmp;
2131
2132 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
2133 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2134 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
2135 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
2136 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
2137 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
2138 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
2139 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
2140
2141 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2142 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2143 hw_stats->rx_pause_frame +=
2144 dsaf_read_dev(dsaf_dev, reg_tmp + 0x80 * (u64)node_num);
2145
2146 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
2147 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
2148 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2149 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2150 hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2151 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2152 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2153 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2154 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2155 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2156 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2157 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2158
2159 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2160 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2161 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2162 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2163
2164 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2165 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2166 }
2167
2168 /**
2169 *hns_dsaf_get_regs - dump dsaf regs
2170 *@dsaf_dev: dsaf device
2171 *@data:data for value of regs
2172 */
2173 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2174 {
2175 u32 i = 0;
2176 u32 j;
2177 u32 *p = data;
2178 u32 reg_tmp;
2179 bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver);
2180
2181 /* dsaf common registers */
2182 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2183 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2184 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2185 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2186 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2187 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2188 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2189 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2190 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2191
2192 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2193 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2194 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2195 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2196 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2197 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2198 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2199 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2200 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2201 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2202 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2203 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2204 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2205 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2206 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2207
2208 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2209 p[24 + i] = dsaf_read_dev(ddev,
2210 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2211
2212 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2213
2214 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2215 p[33 + i] = dsaf_read_dev(ddev,
2216 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2217
2218 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2219 p[41 + i] = dsaf_read_dev(ddev,
2220 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2221
2222 /* dsaf inode registers */
2223 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2224
2225 p[171] = dsaf_read_dev(ddev,
2226 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2227
2228 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2229 j = i * DSAF_COMM_CHN + port;
2230 p[172 + i] = dsaf_read_dev(ddev,
2231 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2232 p[175 + i] = dsaf_read_dev(ddev,
2233 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2234 p[178 + i] = dsaf_read_dev(ddev,
2235 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2236 p[181 + i] = dsaf_read_dev(ddev,
2237 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2238 p[184 + i] = dsaf_read_dev(ddev,
2239 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2240 p[187 + i] = dsaf_read_dev(ddev,
2241 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2242 p[190 + i] = dsaf_read_dev(ddev,
2243 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
2244 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2245 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2246 p[193 + i] = dsaf_read_dev(ddev, reg_tmp + j * 0x80);
2247 p[196 + i] = dsaf_read_dev(ddev,
2248 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2249 p[199 + i] = dsaf_read_dev(ddev,
2250 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2251 p[202 + i] = dsaf_read_dev(ddev,
2252 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2253 p[205 + i] = dsaf_read_dev(ddev,
2254 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2255 p[208 + i] = dsaf_read_dev(ddev,
2256 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2257 p[211 + i] = dsaf_read_dev(ddev,
2258 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2259 p[214 + i] = dsaf_read_dev(ddev,
2260 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2261 p[217 + i] = dsaf_read_dev(ddev,
2262 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2263 p[220 + i] = dsaf_read_dev(ddev,
2264 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2265 p[223 + i] = dsaf_read_dev(ddev,
2266 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2267 p[224 + i] = dsaf_read_dev(ddev,
2268 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2269 }
2270
2271 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2272
2273 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2274 j = i * DSAF_COMM_CHN + port;
2275 p[228 + i] = dsaf_read_dev(ddev,
2276 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2277 }
2278
2279 p[231] = dsaf_read_dev(ddev,
2280 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2281
2282 /* dsaf inode registers */
2283 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
2284 j = i * DSAF_COMM_CHN + port;
2285 p[232 + i] = dsaf_read_dev(ddev,
2286 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2287 p[235 + i] = dsaf_read_dev(ddev,
2288 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2289 p[238 + i] = dsaf_read_dev(ddev,
2290 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2291 p[241 + i] = dsaf_read_dev(ddev,
2292 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2293 p[244 + i] = dsaf_read_dev(ddev,
2294 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2295 p[245 + i] = dsaf_read_dev(ddev,
2296 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2297 p[248 + i] = dsaf_read_dev(ddev,
2298 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2299 p[251 + i] = dsaf_read_dev(ddev,
2300 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2301 p[254 + i] = dsaf_read_dev(ddev,
2302 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2303 p[257 + i] = dsaf_read_dev(ddev,
2304 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2305 p[260 + i] = dsaf_read_dev(ddev,
2306 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2307 p[263 + i] = dsaf_read_dev(ddev,
2308 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2309 p[266 + i] = dsaf_read_dev(ddev,
2310 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2311 p[269 + i] = dsaf_read_dev(ddev,
2312 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2313 p[272 + i] = dsaf_read_dev(ddev,
2314 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2315 p[275 + i] = dsaf_read_dev(ddev,
2316 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2317 p[278 + i] = dsaf_read_dev(ddev,
2318 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2319 p[281 + i] = dsaf_read_dev(ddev,
2320 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2321 p[284 + i] = dsaf_read_dev(ddev,
2322 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2323 p[287 + i] = dsaf_read_dev(ddev,
2324 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2325 p[290 + i] = dsaf_read_dev(ddev,
2326 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2327 p[293 + i] = dsaf_read_dev(ddev,
2328 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2329 p[296 + i] = dsaf_read_dev(ddev,
2330 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2331 p[299 + i] = dsaf_read_dev(ddev,
2332 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2333 p[302 + i] = dsaf_read_dev(ddev,
2334 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2335 p[305 + i] = dsaf_read_dev(ddev,
2336 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2337 p[308 + i] = dsaf_read_dev(ddev,
2338 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2339 }
2340
2341 /* dsaf onode registers */
2342 for (i = 0; i < DSAF_XOD_NUM; i++) {
2343 p[311 + i] = dsaf_read_dev(ddev,
2344 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + i * 0x90);
2345 p[319 + i] = dsaf_read_dev(ddev,
2346 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + i * 0x90);
2347 p[327 + i] = dsaf_read_dev(ddev,
2348 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + i * 0x90);
2349 p[335 + i] = dsaf_read_dev(ddev,
2350 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + i * 0x90);
2351 p[343 + i] = dsaf_read_dev(ddev,
2352 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + i * 0x90);
2353 p[351 + i] = dsaf_read_dev(ddev,
2354 DSAF_XOD_ETS_TOKEN_CFG_0_REG + i * 0x90);
2355 }
2356
2357 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2358 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2359 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2360
2361 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2362 j = i * DSAF_COMM_CHN + port;
2363 p[362 + i] = dsaf_read_dev(ddev,
2364 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2365 p[365 + i] = dsaf_read_dev(ddev,
2366 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2367 p[368 + i] = dsaf_read_dev(ddev,
2368 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2369 p[371 + i] = dsaf_read_dev(ddev,
2370 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2371 p[374 + i] = dsaf_read_dev(ddev,
2372 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2373 p[377 + i] = dsaf_read_dev(ddev,
2374 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2375 p[380 + i] = dsaf_read_dev(ddev,
2376 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2377 p[383 + i] = dsaf_read_dev(ddev,
2378 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2379 p[386 + i] = dsaf_read_dev(ddev,
2380 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2381 p[389 + i] = dsaf_read_dev(ddev,
2382 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2383 }
2384
2385 p[392] = dsaf_read_dev(ddev,
2386 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2387 p[393] = dsaf_read_dev(ddev,
2388 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2389 p[394] = dsaf_read_dev(ddev,
2390 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2391 p[395] = dsaf_read_dev(ddev,
2392 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2393 p[396] = dsaf_read_dev(ddev,
2394 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2395 p[397] = dsaf_read_dev(ddev,
2396 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2397 p[398] = dsaf_read_dev(ddev,
2398 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2399 p[399] = dsaf_read_dev(ddev,
2400 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2401 p[400] = dsaf_read_dev(ddev,
2402 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2403 p[401] = dsaf_read_dev(ddev,
2404 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2405 p[402] = dsaf_read_dev(ddev,
2406 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2407 p[403] = dsaf_read_dev(ddev,
2408 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2409 p[404] = dsaf_read_dev(ddev,
2410 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2411
2412 /* dsaf voq registers */
2413 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2414 j = (i * DSAF_COMM_CHN + port) * 0x90;
2415 p[405 + i] = dsaf_read_dev(ddev,
2416 DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2417 p[408 + i] = dsaf_read_dev(ddev,
2418 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2419 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2420 p[414 + i] = dsaf_read_dev(ddev,
2421 DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2422 p[417 + i] = dsaf_read_dev(ddev,
2423 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2424 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2425 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2426 p[426 + i] = dsaf_read_dev(ddev,
2427 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2428 p[429 + i] = dsaf_read_dev(ddev,
2429 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2430 p[432 + i] = dsaf_read_dev(ddev,
2431 DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2432 p[435 + i] = dsaf_read_dev(ddev,
2433 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2434 p[438 + i] = dsaf_read_dev(ddev,
2435 DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2436 }
2437
2438 /* dsaf tbl registers */
2439 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2440 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2441 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2442 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2443 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2444 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2445 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2446 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2447 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2448 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2449 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2450 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2451 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2452 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2453 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2454 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2455 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2456 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2457 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2458 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2459 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2460 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2461 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2462
2463 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2464 j = i * 0x8;
2465 p[464 + 2 * i] = dsaf_read_dev(ddev,
2466 DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2467 p[465 + 2 * i] = dsaf_read_dev(ddev,
2468 DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2469 }
2470
2471 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2472 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2473 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2474 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2475 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2476 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2477 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2478 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2479 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2480 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2481 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2482 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2483
2484 /* dsaf other registers */
2485 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2486 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2487 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2488 p[495] = dsaf_read_dev(ddev,
2489 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2490 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2491 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2492
2493 if (!is_ver1)
2494 p[498] = dsaf_read_dev(ddev, DSAF_PAUSE_CFG_REG + port * 0x4);
2495
2496 /* mark end of dsaf regs */
2497 for (i = 499; i < 504; i++)
2498 p[i] = 0xdddddddd;
2499 }
2500
2501 static char *hns_dsaf_get_node_stats_strings(char *data, int node)
2502 {
2503 char *buff = data;
2504
2505 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2506 buff = buff + ETH_GSTRING_LEN;
2507 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2508 buff = buff + ETH_GSTRING_LEN;
2509 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2510 buff = buff + ETH_GSTRING_LEN;
2511 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2512 buff = buff + ETH_GSTRING_LEN;
2513 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2514 buff = buff + ETH_GSTRING_LEN;
2515 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2516 buff = buff + ETH_GSTRING_LEN;
2517 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2518 buff = buff + ETH_GSTRING_LEN;
2519 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2520 buff = buff + ETH_GSTRING_LEN;
2521 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2522 buff = buff + ETH_GSTRING_LEN;
2523 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2524 buff = buff + ETH_GSTRING_LEN;
2525 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2526 buff = buff + ETH_GSTRING_LEN;
2527 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2528 buff = buff + ETH_GSTRING_LEN;
2529 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2530 buff = buff + ETH_GSTRING_LEN;
2531 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2532 buff = buff + ETH_GSTRING_LEN;
2533
2534 return buff;
2535 }
2536
2537 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2538 int node_num)
2539 {
2540 u64 *p = data;
2541 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2542
2543 p[0] = hw_stats->pad_drop;
2544 p[1] = hw_stats->man_pkts;
2545 p[2] = hw_stats->rx_pkts;
2546 p[3] = hw_stats->rx_pkt_id;
2547 p[4] = hw_stats->rx_pause_frame;
2548 p[5] = hw_stats->release_buf_num;
2549 p[6] = hw_stats->sbm_drop;
2550 p[7] = hw_stats->crc_false;
2551 p[8] = hw_stats->bp_drop;
2552 p[9] = hw_stats->rslt_drop;
2553 p[10] = hw_stats->local_addr_false;
2554 p[11] = hw_stats->vlan_drop;
2555 p[12] = hw_stats->stp_drop;
2556 p[13] = hw_stats->tx_pkts;
2557
2558 return &p[14];
2559 }
2560
2561 /**
2562 *hns_dsaf_get_stats - get dsaf statistic
2563 *@ddev: dsaf device
2564 *@data:statistic value
2565 *@port: port num
2566 */
2567 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2568 {
2569 u64 *p = data;
2570 int node_num = port;
2571
2572 /* for ge/xge node info */
2573 p = hns_dsaf_get_node_stats(ddev, p, node_num);
2574
2575 /* for ppe node info */
2576 node_num = port + DSAF_PPE_INODE_BASE;
2577 (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2578 }
2579
2580 /**
2581 *hns_dsaf_get_sset_count - get dsaf string set count
2582 *@stringset: type of values in data
2583 *return dsaf string name count
2584 */
2585 int hns_dsaf_get_sset_count(int stringset)
2586 {
2587 if (stringset == ETH_SS_STATS)
2588 return DSAF_STATIC_NUM;
2589
2590 return 0;
2591 }
2592
2593 /**
2594 *hns_dsaf_get_strings - get dsaf string set
2595 *@stringset:srting set index
2596 *@data:strings name value
2597 *@port:port index
2598 */
2599 void hns_dsaf_get_strings(int stringset, u8 *data, int port)
2600 {
2601 char *buff = (char *)data;
2602 int node = port;
2603
2604 if (stringset != ETH_SS_STATS)
2605 return;
2606
2607 /* for ge/xge node info */
2608 buff = hns_dsaf_get_node_stats_strings(buff, node);
2609
2610 /* for ppe node info */
2611 node = port + DSAF_PPE_INODE_BASE;
2612 (void)hns_dsaf_get_node_stats_strings(buff, node);
2613 }
2614
2615 /**
2616 *hns_dsaf_get_sset_count - get dsaf regs count
2617 *return dsaf regs count
2618 */
2619 int hns_dsaf_get_regs_count(void)
2620 {
2621 return DSAF_DUMP_REGS_NUM;
2622 }
2623
2624 /**
2625 * dsaf_probe - probo dsaf dev
2626 * @pdev: dasf platform device
2627 * retuen 0 - success , negative --fail
2628 */
2629 static int hns_dsaf_probe(struct platform_device *pdev)
2630 {
2631 struct dsaf_device *dsaf_dev;
2632 int ret;
2633
2634 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2635 if (IS_ERR(dsaf_dev)) {
2636 ret = PTR_ERR(dsaf_dev);
2637 dev_err(&pdev->dev,
2638 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2639 return ret;
2640 }
2641
2642 ret = hns_dsaf_get_cfg(dsaf_dev);
2643 if (ret)
2644 goto free_dev;
2645
2646 ret = hns_dsaf_init(dsaf_dev);
2647 if (ret)
2648 goto free_cfg;
2649
2650 ret = hns_mac_init(dsaf_dev);
2651 if (ret)
2652 goto uninit_dsaf;
2653
2654 ret = hns_ppe_init(dsaf_dev);
2655 if (ret)
2656 goto uninit_mac;
2657
2658 ret = hns_dsaf_ae_init(dsaf_dev);
2659 if (ret)
2660 goto uninit_ppe;
2661
2662 return 0;
2663
2664 uninit_ppe:
2665 hns_ppe_uninit(dsaf_dev);
2666
2667 uninit_mac:
2668 hns_mac_uninit(dsaf_dev);
2669
2670 uninit_dsaf:
2671 hns_dsaf_free(dsaf_dev);
2672
2673 free_cfg:
2674 hns_dsaf_free_cfg(dsaf_dev);
2675
2676 free_dev:
2677 hns_dsaf_free_dev(dsaf_dev);
2678
2679 return ret;
2680 }
2681
2682 /**
2683 * dsaf_remove - remove dsaf dev
2684 * @pdev: dasf platform device
2685 */
2686 static int hns_dsaf_remove(struct platform_device *pdev)
2687 {
2688 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2689
2690 hns_dsaf_ae_uninit(dsaf_dev);
2691
2692 hns_ppe_uninit(dsaf_dev);
2693
2694 hns_mac_uninit(dsaf_dev);
2695
2696 hns_dsaf_free(dsaf_dev);
2697
2698 hns_dsaf_free_cfg(dsaf_dev);
2699
2700 hns_dsaf_free_dev(dsaf_dev);
2701
2702 return 0;
2703 }
2704
2705 static const struct of_device_id g_dsaf_match[] = {
2706 {.compatible = "hisilicon,hns-dsaf-v1"},
2707 {.compatible = "hisilicon,hns-dsaf-v2"},
2708 {}
2709 };
2710
2711 static struct platform_driver g_dsaf_driver = {
2712 .probe = hns_dsaf_probe,
2713 .remove = hns_dsaf_remove,
2714 .driver = {
2715 .name = DSAF_DRV_NAME,
2716 .of_match_table = g_dsaf_match,
2717 .acpi_match_table = hns_dsaf_acpi_match,
2718 },
2719 };
2720
2721 module_platform_driver(g_dsaf_driver);
2722
2723 MODULE_LICENSE("GPL");
2724 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2725 MODULE_DESCRIPTION("HNS DSAF driver");
2726 MODULE_VERSION(DSAF_MOD_VERSION);
Linux kernel - Deliverables
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