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net: hns: add attribute reset-field-offset for dsaf node
[deliverable/linux.git] / drivers / net / ethernet / hisilicon / hns / hns_dsaf_main.c
1 /*
2 * Copyright (c) 2014-2015 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/netdevice.h>
15 #include <linux/platform_device.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/of_irq.h>
19 #include <linux/device.h>
20 #include <linux/vmalloc.h>
21
22 #include "hns_dsaf_main.h"
23 #include "hns_dsaf_rcb.h"
24 #include "hns_dsaf_ppe.h"
25 #include "hns_dsaf_mac.h"
26
27 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
28 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
29 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
30 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
31 [DSAF_MODE_DISABLE_SP] = "single-port",
32 };
33
34 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
35 {
36 int ret, i;
37 u32 desc_num;
38 u32 buf_size;
39 u32 reset_offset = 0;
40 const char *mode_str;
41 struct device_node *np = dsaf_dev->dev->of_node;
42
43 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
44 dsaf_dev->dsaf_ver = AE_VERSION_1;
45 else
46 dsaf_dev->dsaf_ver = AE_VERSION_2;
47
48 ret = of_property_read_string(np, "mode", &mode_str);
49 if (ret) {
50 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
51 return ret;
52 }
53 for (i = 0; i < DSAF_MODE_MAX; i++) {
54 if (g_dsaf_mode_match[i] &&
55 !strcmp(mode_str, g_dsaf_mode_match[i]))
56 break;
57 }
58 if (i >= DSAF_MODE_MAX ||
59 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
60 dev_err(dsaf_dev->dev,
61 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
62 return -EINVAL;
63 }
64 dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
65
66 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
67 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
68 else
69 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
70
71 if ((i == DSAF_MODE_ENABLE_16VM) ||
72 (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
73 (i == DSAF_MODE_DISABLE_6PORT_2VM))
74 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
75 else
76 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
77
78 dsaf_dev->sc_base = of_iomap(np, 0);
79 if (!dsaf_dev->sc_base) {
80 dev_err(dsaf_dev->dev,
81 "%s of_iomap 0 fail!\n", dsaf_dev->ae_dev.name);
82 ret = -ENOMEM;
83 goto unmap_base_addr;
84 }
85
86 dsaf_dev->sds_base = of_iomap(np, 1);
87 if (!dsaf_dev->sds_base) {
88 dev_err(dsaf_dev->dev,
89 "%s of_iomap 1 fail!\n", dsaf_dev->ae_dev.name);
90 ret = -ENOMEM;
91 goto unmap_base_addr;
92 }
93
94 dsaf_dev->ppe_base = of_iomap(np, 2);
95 if (!dsaf_dev->ppe_base) {
96 dev_err(dsaf_dev->dev,
97 "%s of_iomap 2 fail!\n", dsaf_dev->ae_dev.name);
98 ret = -ENOMEM;
99 goto unmap_base_addr;
100 }
101
102 dsaf_dev->io_base = of_iomap(np, 3);
103 if (!dsaf_dev->io_base) {
104 dev_err(dsaf_dev->dev,
105 "%s of_iomap 3 fail!\n", dsaf_dev->ae_dev.name);
106 ret = -ENOMEM;
107 goto unmap_base_addr;
108 }
109
110 dsaf_dev->cpld_base = of_iomap(np, 4);
111 if (!dsaf_dev->cpld_base)
112 dev_dbg(dsaf_dev->dev, "NO CPLD ADDR");
113
114 ret = of_property_read_u32(np, "desc-num", &desc_num);
115 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
116 desc_num > HNS_DSAF_MAX_DESC_CNT) {
117 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
118 desc_num, ret);
119 goto unmap_base_addr;
120 }
121 dsaf_dev->desc_num = desc_num;
122
123 ret = of_property_read_u32(np, "reset-field-offset", &reset_offset);
124 if (ret < 0) {
125 dev_dbg(dsaf_dev->dev,
126 "get reset-field-offset fail, ret=%d!\r\n", ret);
127 }
128 dsaf_dev->reset_offset = reset_offset;
129
130 ret = of_property_read_u32(np, "buf-size", &buf_size);
131 if (ret < 0) {
132 dev_err(dsaf_dev->dev,
133 "get buf-size fail, ret=%d!\r\n", ret);
134 goto unmap_base_addr;
135 }
136 dsaf_dev->buf_size = buf_size;
137
138 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
139 if (dsaf_dev->buf_size_type < 0) {
140 dev_err(dsaf_dev->dev,
141 "buf_size(%d) is wrong!\n", buf_size);
142 goto unmap_base_addr;
143 }
144
145 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
146 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
147 else
148 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
149
150 return 0;
151
152 unmap_base_addr:
153 if (dsaf_dev->io_base)
154 iounmap(dsaf_dev->io_base);
155 if (dsaf_dev->ppe_base)
156 iounmap(dsaf_dev->ppe_base);
157 if (dsaf_dev->sds_base)
158 iounmap(dsaf_dev->sds_base);
159 if (dsaf_dev->sc_base)
160 iounmap(dsaf_dev->sc_base);
161 if (dsaf_dev->cpld_base)
162 iounmap(dsaf_dev->cpld_base);
163 return ret;
164 }
165
166 static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev)
167 {
168 if (dsaf_dev->io_base)
169 iounmap(dsaf_dev->io_base);
170
171 if (dsaf_dev->ppe_base)
172 iounmap(dsaf_dev->ppe_base);
173
174 if (dsaf_dev->sds_base)
175 iounmap(dsaf_dev->sds_base);
176
177 if (dsaf_dev->sc_base)
178 iounmap(dsaf_dev->sc_base);
179
180 if (dsaf_dev->cpld_base)
181 iounmap(dsaf_dev->cpld_base);
182 }
183
184 /**
185 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
186 * @dsaf_id: dsa fabric id
187 */
188 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
189 {
190 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
191 }
192
193 /**
194 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
195 * @dsaf_id: dsa fabric id
196 * @hns_dsaf_reg_cnt_clr_ce: config value
197 */
198 static void
199 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
200 {
201 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
202 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
203 }
204
205 /**
206 * hns_ppe_qid_cfg - config ppe qid
207 * @dsaf_id: dsa fabric id
208 * @pppe_qid_cfg: value array
209 */
210 static void
211 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
212 {
213 u32 i;
214
215 for (i = 0; i < DSAF_COMM_CHN; i++) {
216 dsaf_set_dev_field(dsaf_dev,
217 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
218 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
219 qid_cfg);
220 }
221 }
222
223 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
224 {
225 u16 max_q_per_vf, max_vfn;
226 u32 q_id, q_num_per_port;
227 u32 i;
228
229 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
230 q_num_per_port = max_vfn * max_q_per_vf;
231
232 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
233 dsaf_set_dev_field(dsaf_dev,
234 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
235 0xff, 0, q_id);
236 q_id += q_num_per_port;
237 }
238 }
239
240 static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev)
241 {
242 u16 max_q_per_vf, max_vfn;
243 u32 q_id, q_num_per_port;
244 u32 mac_id;
245
246 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
247 return;
248
249 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
250 q_num_per_port = max_vfn * max_q_per_vf;
251
252 for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) {
253 dsaf_set_dev_field(dsaf_dev,
254 DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
255 DSAFV2_SERDES_LBK_QID_M,
256 DSAFV2_SERDES_LBK_QID_S,
257 q_id);
258 q_id += q_num_per_port;
259 }
260 }
261
262 /**
263 * hns_dsaf_sw_port_type_cfg - cfg sw type
264 * @dsaf_id: dsa fabric id
265 * @psw_port_type: array
266 */
267 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
268 enum dsaf_sw_port_type port_type)
269 {
270 u32 i;
271
272 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
273 dsaf_set_dev_field(dsaf_dev,
274 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
275 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
276 port_type);
277 }
278 }
279
280 /**
281 * hns_dsaf_stp_port_type_cfg - cfg stp type
282 * @dsaf_id: dsa fabric id
283 * @pstp_port_type: array
284 */
285 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
286 enum dsaf_stp_port_type port_type)
287 {
288 u32 i;
289
290 for (i = 0; i < DSAF_COMM_CHN; i++) {
291 dsaf_set_dev_field(dsaf_dev,
292 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
293 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
294 port_type);
295 }
296 }
297
298 #define HNS_DSAF_SBM_NUM(dev) \
299 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
300 /**
301 * hns_dsaf_sbm_cfg - config sbm
302 * @dsaf_id: dsa fabric id
303 */
304 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
305 {
306 u32 o_sbm_cfg;
307 u32 i;
308
309 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
310 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
311 DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
312 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
313 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
314 dsaf_write_dev(dsaf_dev,
315 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
316 }
317 }
318
319 /**
320 * hns_dsaf_sbm_cfg_mib_en - config sbm
321 * @dsaf_id: dsa fabric id
322 */
323 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
324 {
325 u32 sbm_cfg_mib_en;
326 u32 i;
327 u32 reg;
328 u32 read_cnt;
329
330 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
331 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
332 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
333 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
334 }
335
336 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
337 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
338 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
339 }
340
341 /* waitint for all sbm enable finished */
342 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
343 read_cnt = 0;
344 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
345 do {
346 udelay(1);
347 sbm_cfg_mib_en = dsaf_get_dev_bit(
348 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
349 read_cnt++;
350 } while (sbm_cfg_mib_en == 0 &&
351 read_cnt < DSAF_CFG_READ_CNT);
352
353 if (sbm_cfg_mib_en == 0) {
354 dev_err(dsaf_dev->dev,
355 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
356 dsaf_dev->ae_dev.name, i);
357 return -ENODEV;
358 }
359 }
360
361 return 0;
362 }
363
364 /**
365 * hns_dsaf_sbm_bp_wl_cfg - config sbm
366 * @dsaf_id: dsa fabric id
367 */
368 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
369 {
370 u32 o_sbm_bp_cfg;
371 u32 reg;
372 u32 i;
373
374 /* XGE */
375 for (i = 0; i < DSAF_XGE_NUM; i++) {
376 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
377 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
378 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
379 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
380 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
381 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
382 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
383 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
384 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
385
386 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
387 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
388 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
389 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
390 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
391 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
392 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
393
394 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
395 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
396 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
397 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
398 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
399 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
400 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
401
402 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
403 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
404 dsaf_set_field(o_sbm_bp_cfg,
405 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
406 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
407 dsaf_set_field(o_sbm_bp_cfg,
408 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
409 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
410 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
411
412 /* for no enable pfc mode */
413 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
414 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
415 dsaf_set_field(o_sbm_bp_cfg,
416 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
417 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
418 dsaf_set_field(o_sbm_bp_cfg,
419 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
420 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
421 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
422 }
423
424 /* PPE */
425 for (i = 0; i < DSAF_COMM_CHN; i++) {
426 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
427 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
428 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
429 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
430 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
431 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
432 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
433 }
434
435 /* RoCEE */
436 for (i = 0; i < DSAF_COMM_CHN; i++) {
437 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
438 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
439 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
440 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
441 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
442 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
443 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
444 }
445 }
446
447 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
448 {
449 u32 o_sbm_bp_cfg;
450 u32 reg;
451 u32 i;
452
453 /* XGE */
454 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
455 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
456 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
457 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
458 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
459 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
460 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
461 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
462 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
463 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
464
465 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
466 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
467 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
468 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
469 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
470 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
471 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
472
473 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
474 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
475 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
476 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
477 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
478 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
479 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
480
481 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
482 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
483 dsaf_set_field(o_sbm_bp_cfg,
484 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
485 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
486 dsaf_set_field(o_sbm_bp_cfg,
487 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
488 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
489 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
490
491 /* for no enable pfc mode */
492 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
493 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
494 dsaf_set_field(o_sbm_bp_cfg,
495 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
496 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
497 dsaf_set_field(o_sbm_bp_cfg,
498 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
499 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
500 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
501 }
502
503 /* PPE */
504 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
505 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
506 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
507 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
508 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
509 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
510 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511 /* RoCEE */
512 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
513 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
514 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
515 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
516 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
517 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
518 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
519 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
520 }
521 }
522
523 /**
524 * hns_dsaf_voq_bp_all_thrd_cfg - voq
525 * @dsaf_id: dsa fabric id
526 */
527 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
528 {
529 u32 voq_bp_all_thrd;
530 u32 i;
531
532 for (i = 0; i < DSAF_VOQ_NUM; i++) {
533 voq_bp_all_thrd = dsaf_read_dev(
534 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
535 if (i < DSAF_XGE_NUM) {
536 dsaf_set_field(voq_bp_all_thrd,
537 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
538 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
539 dsaf_set_field(voq_bp_all_thrd,
540 DSAF_VOQ_BP_ALL_UPTHRD_M,
541 DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
542 } else {
543 dsaf_set_field(voq_bp_all_thrd,
544 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
545 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
546 dsaf_set_field(voq_bp_all_thrd,
547 DSAF_VOQ_BP_ALL_UPTHRD_M,
548 DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
549 }
550 dsaf_write_dev(
551 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
552 voq_bp_all_thrd);
553 }
554 }
555
556 /**
557 * hns_dsaf_tbl_tcam_data_cfg - tbl
558 * @dsaf_id: dsa fabric id
559 * @ptbl_tcam_data: addr
560 */
561 static void hns_dsaf_tbl_tcam_data_cfg(
562 struct dsaf_device *dsaf_dev,
563 struct dsaf_tbl_tcam_data *ptbl_tcam_data)
564 {
565 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
566 ptbl_tcam_data->tbl_tcam_data_low);
567 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
568 ptbl_tcam_data->tbl_tcam_data_high);
569 }
570
571 /**
572 * dsaf_tbl_tcam_mcast_cfg - tbl
573 * @dsaf_id: dsa fabric id
574 * @ptbl_tcam_mcast: addr
575 */
576 static void hns_dsaf_tbl_tcam_mcast_cfg(
577 struct dsaf_device *dsaf_dev,
578 struct dsaf_tbl_tcam_mcast_cfg *mcast)
579 {
580 u32 mcast_cfg4;
581
582 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
583 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
584 mcast->tbl_mcast_item_vld);
585 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
586 mcast->tbl_mcast_old_en);
587 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
588 DSAF_TBL_MCAST_CFG4_VM128_112_S,
589 mcast->tbl_mcast_port_msk[4]);
590 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
591
592 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
593 mcast->tbl_mcast_port_msk[3]);
594
595 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
596 mcast->tbl_mcast_port_msk[2]);
597
598 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
599 mcast->tbl_mcast_port_msk[1]);
600
601 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
602 mcast->tbl_mcast_port_msk[0]);
603 }
604
605 /**
606 * hns_dsaf_tbl_tcam_ucast_cfg - tbl
607 * @dsaf_id: dsa fabric id
608 * @ptbl_tcam_ucast: addr
609 */
610 static void hns_dsaf_tbl_tcam_ucast_cfg(
611 struct dsaf_device *dsaf_dev,
612 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
613 {
614 u32 ucast_cfg1;
615
616 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
617 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
618 tbl_tcam_ucast->tbl_ucast_mac_discard);
619 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
620 tbl_tcam_ucast->tbl_ucast_item_vld);
621 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
622 tbl_tcam_ucast->tbl_ucast_old_en);
623 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
624 tbl_tcam_ucast->tbl_ucast_dvc);
625 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
626 DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
627 tbl_tcam_ucast->tbl_ucast_out_port);
628 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
629 }
630
631 /**
632 * hns_dsaf_tbl_line_cfg - tbl
633 * @dsaf_id: dsa fabric id
634 * @ptbl_lin: addr
635 */
636 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
637 struct dsaf_tbl_line_cfg *tbl_lin)
638 {
639 u32 tbl_line;
640
641 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
642 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
643 tbl_lin->tbl_line_mac_discard);
644 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
645 tbl_lin->tbl_line_dvc);
646 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
647 DSAF_TBL_LINE_CFG_OUT_PORT_S,
648 tbl_lin->tbl_line_out_port);
649 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
650 }
651
652 /**
653 * hns_dsaf_tbl_tcam_mcast_pul - tbl
654 * @dsaf_id: dsa fabric id
655 */
656 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
657 {
658 u32 o_tbl_pul;
659
660 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
661 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
662 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
663 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
664 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
665 }
666
667 /**
668 * hns_dsaf_tbl_line_pul - tbl
669 * @dsaf_id: dsa fabric id
670 */
671 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
672 {
673 u32 tbl_pul;
674
675 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
676 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
677 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
678 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
679 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
680 }
681
682 /**
683 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
684 * @dsaf_id: dsa fabric id
685 */
686 static void hns_dsaf_tbl_tcam_data_mcast_pul(
687 struct dsaf_device *dsaf_dev)
688 {
689 u32 o_tbl_pul;
690
691 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
692 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
693 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
694 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
695 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
696 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
697 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
698 }
699
700 /**
701 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
702 * @dsaf_id: dsa fabric id
703 */
704 static void hns_dsaf_tbl_tcam_data_ucast_pul(
705 struct dsaf_device *dsaf_dev)
706 {
707 u32 o_tbl_pul;
708
709 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
710 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
711 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
712 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
713 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
714 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
715 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
716 }
717
718 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
719 {
720 if (!HNS_DSAF_IS_DEBUG(dsaf_dev))
721 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG,
722 DSAF_CFG_MIX_MODE_S, !!en);
723 }
724
725 void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en)
726 {
727 if (AE_IS_VER1(dsaf_dev->dsaf_ver) ||
728 dsaf_dev->mac_cb[mac_id].mac_type == HNAE_PORT_DEBUG)
729 return;
730
731 dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
732 DSAFV2_SERDES_LBK_EN_B, !!en);
733 }
734
735 /**
736 * hns_dsaf_tbl_stat_en - tbl
737 * @dsaf_id: dsa fabric id
738 * @ptbl_stat_en: addr
739 */
740 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
741 {
742 u32 o_tbl_ctrl;
743
744 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
745 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
746 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
747 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
748 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
749 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
750 }
751
752 /**
753 * hns_dsaf_rocee_bp_en - rocee back press enable
754 * @dsaf_id: dsa fabric id
755 */
756 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
757 {
758 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
759 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
760 DSAF_FC_XGE_TX_PAUSE_S, 1);
761 }
762
763 /* set msk for dsaf exception irq*/
764 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
765 u32 chnn_num, u32 mask_set)
766 {
767 dsaf_write_dev(dsaf_dev,
768 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
769 }
770
771 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
772 u32 chnn_num, u32 msk_set)
773 {
774 dsaf_write_dev(dsaf_dev,
775 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
776 }
777
778 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
779 u32 chnn, u32 msk_set)
780 {
781 dsaf_write_dev(dsaf_dev,
782 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
783 }
784
785 static void
786 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
787 {
788 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
789 }
790
791 /* clr dsaf exception irq*/
792 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
793 u32 chnn_num, u32 int_src)
794 {
795 dsaf_write_dev(dsaf_dev,
796 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
797 }
798
799 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
800 u32 chnn, u32 int_src)
801 {
802 dsaf_write_dev(dsaf_dev,
803 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
804 }
805
806 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
807 u32 chnn, u32 int_src)
808 {
809 dsaf_write_dev(dsaf_dev,
810 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
811 }
812
813 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
814 u32 int_src)
815 {
816 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
817 }
818
819 /**
820 * hns_dsaf_single_line_tbl_cfg - INT
821 * @dsaf_id: dsa fabric id
822 * @address:
823 * @ptbl_line:
824 */
825 static void hns_dsaf_single_line_tbl_cfg(
826 struct dsaf_device *dsaf_dev,
827 u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
828 {
829 /*Write Addr*/
830 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
831
832 /*Write Line*/
833 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
834
835 /*Write Plus*/
836 hns_dsaf_tbl_line_pul(dsaf_dev);
837 }
838
839 /**
840 * hns_dsaf_tcam_uc_cfg - INT
841 * @dsaf_id: dsa fabric id
842 * @address,
843 * @ptbl_tcam_data,
844 */
845 static void hns_dsaf_tcam_uc_cfg(
846 struct dsaf_device *dsaf_dev, u32 address,
847 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
848 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
849 {
850 /*Write Addr*/
851 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
852 /*Write Tcam Data*/
853 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
854 /*Write Tcam Ucast*/
855 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
856 /*Write Plus*/
857 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
858 }
859
860 /**
861 * hns_dsaf_tcam_mc_cfg - INT
862 * @dsaf_id: dsa fabric id
863 * @address,
864 * @ptbl_tcam_data,
865 * @ptbl_tcam_mcast,
866 */
867 static void hns_dsaf_tcam_mc_cfg(
868 struct dsaf_device *dsaf_dev, u32 address,
869 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
870 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
871 {
872 /*Write Addr*/
873 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
874 /*Write Tcam Data*/
875 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
876 /*Write Tcam Mcast*/
877 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
878 /*Write Plus*/
879 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
880 }
881
882 /**
883 * hns_dsaf_tcam_mc_invld - INT
884 * @dsaf_id: dsa fabric id
885 * @address
886 */
887 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
888 {
889 /*Write Addr*/
890 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
891
892 /*write tcam mcast*/
893 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
894 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
895 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
896 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
897 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
898
899 /*Write Plus*/
900 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
901 }
902
903 /**
904 * hns_dsaf_tcam_uc_get - INT
905 * @dsaf_id: dsa fabric id
906 * @address
907 * @ptbl_tcam_data
908 * @ptbl_tcam_ucast
909 */
910 static void hns_dsaf_tcam_uc_get(
911 struct dsaf_device *dsaf_dev, u32 address,
912 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
913 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
914 {
915 u32 tcam_read_data0;
916 u32 tcam_read_data4;
917
918 /*Write Addr*/
919 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
920
921 /*read tcam item puls*/
922 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
923
924 /*read tcam data*/
925 ptbl_tcam_data->tbl_tcam_data_high
926 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
927 ptbl_tcam_data->tbl_tcam_data_low
928 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
929
930 /*read tcam mcast*/
931 tcam_read_data0 = dsaf_read_dev(dsaf_dev,
932 DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
933 tcam_read_data4 = dsaf_read_dev(dsaf_dev,
934 DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
935
936 ptbl_tcam_ucast->tbl_ucast_item_vld
937 = dsaf_get_bit(tcam_read_data4,
938 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
939 ptbl_tcam_ucast->tbl_ucast_old_en
940 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
941 ptbl_tcam_ucast->tbl_ucast_mac_discard
942 = dsaf_get_bit(tcam_read_data0,
943 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
944 ptbl_tcam_ucast->tbl_ucast_out_port
945 = dsaf_get_field(tcam_read_data0,
946 DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
947 DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
948 ptbl_tcam_ucast->tbl_ucast_dvc
949 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
950 }
951
952 /**
953 * hns_dsaf_tcam_mc_get - INT
954 * @dsaf_id: dsa fabric id
955 * @address
956 * @ptbl_tcam_data
957 * @ptbl_tcam_ucast
958 */
959 static void hns_dsaf_tcam_mc_get(
960 struct dsaf_device *dsaf_dev, u32 address,
961 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
962 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
963 {
964 u32 data_tmp;
965
966 /*Write Addr*/
967 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
968
969 /*read tcam item puls*/
970 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
971
972 /*read tcam data*/
973 ptbl_tcam_data->tbl_tcam_data_high =
974 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
975 ptbl_tcam_data->tbl_tcam_data_low =
976 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
977
978 /*read tcam mcast*/
979 ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
980 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
981 ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
982 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
983 ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
984 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
985 ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
986 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
987
988 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
989 ptbl_tcam_mcast->tbl_mcast_item_vld =
990 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
991 ptbl_tcam_mcast->tbl_mcast_old_en =
992 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
993 ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
994 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
995 DSAF_TBL_MCAST_CFG4_VM128_112_S);
996 }
997
998 /**
999 * hns_dsaf_tbl_line_init - INT
1000 * @dsaf_id: dsa fabric id
1001 */
1002 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
1003 {
1004 u32 i;
1005 /* defaultly set all lineal mac table entry resulting discard */
1006 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
1007
1008 for (i = 0; i < DSAF_LINE_SUM; i++)
1009 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
1010 }
1011
1012 /**
1013 * hns_dsaf_tbl_tcam_init - INT
1014 * @dsaf_id: dsa fabric id
1015 */
1016 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
1017 {
1018 u32 i;
1019 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
1020 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
1021
1022 /*tcam tbl*/
1023 for (i = 0; i < DSAF_TCAM_SUM; i++)
1024 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
1025 }
1026
1027 /**
1028 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1029 * @mac_cb: mac contrl block
1030 */
1031 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
1032 int mac_id, int tc_en)
1033 {
1034 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, tc_en);
1035 }
1036
1037 static void hns_dsaf_set_pfc_pause(struct dsaf_device *dsaf_dev,
1038 int mac_id, int tx_en, int rx_en)
1039 {
1040 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1041 if (!tx_en || !rx_en)
1042 dev_err(dsaf_dev->dev, "dsaf v1 can not close pfc!\n");
1043
1044 return;
1045 }
1046
1047 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1048 DSAF_PFC_PAUSE_RX_EN_B, !!rx_en);
1049 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1050 DSAF_PFC_PAUSE_TX_EN_B, !!tx_en);
1051 }
1052
1053 int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1054 u32 en)
1055 {
1056 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1057 if (!en)
1058 dev_err(dsaf_dev->dev, "dsafv1 can't close rx_pause!\n");
1059
1060 return -EINVAL;
1061 }
1062
1063 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1064 DSAF_MAC_PAUSE_RX_EN_B, !!en);
1065
1066 return 0;
1067 }
1068
1069 void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1070 u32 *en)
1071 {
1072 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
1073 *en = 1;
1074 else
1075 *en = dsaf_get_dev_bit(dsaf_dev,
1076 DSAF_PAUSE_CFG_REG + mac_id * 4,
1077 DSAF_MAC_PAUSE_RX_EN_B);
1078 }
1079
1080 /**
1081 * hns_dsaf_tbl_tcam_init - INT
1082 * @dsaf_id: dsa fabric id
1083 * @dsaf_mode
1084 */
1085 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1086 {
1087 u32 i;
1088 u32 o_dsaf_cfg;
1089 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
1090
1091 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1092 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1093 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1094 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1095 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1096 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1097 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1098
1099 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1100 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1101
1102 /* set 22 queue per tx ppe engine, only used in switch mode */
1103 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1104
1105 /* set promisc def queue id */
1106 hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1107
1108 /* set inner loopback queue id */
1109 hns_dsaf_inner_qid_cfg(dsaf_dev);
1110
1111 /* in non switch mode, set all port to access mode */
1112 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1113
1114 /*set dsaf pfc to 0 for parseing rx pause*/
1115 for (i = 0; i < DSAF_COMM_CHN; i++) {
1116 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
1117 hns_dsaf_set_pfc_pause(dsaf_dev, i, is_ver1, is_ver1);
1118 }
1119
1120 /*msk and clr exception irqs */
1121 for (i = 0; i < DSAF_COMM_CHN; i++) {
1122 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1123 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1124 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1125
1126 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1127 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1128 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1129 }
1130 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1131 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1132 }
1133
1134 /**
1135 * hns_dsaf_inode_init - INT
1136 * @dsaf_id: dsa fabric id
1137 */
1138 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1139 {
1140 u32 reg;
1141 u32 tc_cfg;
1142 u32 i;
1143
1144 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1145 tc_cfg = HNS_DSAF_I4TC_CFG;
1146 else
1147 tc_cfg = HNS_DSAF_I8TC_CFG;
1148
1149 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1150 for (i = 0; i < DSAF_INODE_NUM; i++) {
1151 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1152 dsaf_set_dev_field(dsaf_dev, reg,
1153 DSAF_INODE_IN_PORT_NUM_M,
1154 DSAF_INODE_IN_PORT_NUM_S,
1155 i % DSAF_XGE_NUM);
1156 }
1157 } else {
1158 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1159 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1160 dsaf_set_dev_field(dsaf_dev, reg,
1161 DSAF_INODE_IN_PORT_NUM_M,
1162 DSAF_INODE_IN_PORT_NUM_S, 0);
1163 dsaf_set_dev_field(dsaf_dev, reg,
1164 DSAFV2_INODE_IN_PORT1_NUM_M,
1165 DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1166 dsaf_set_dev_field(dsaf_dev, reg,
1167 DSAFV2_INODE_IN_PORT2_NUM_M,
1168 DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1169 dsaf_set_dev_field(dsaf_dev, reg,
1170 DSAFV2_INODE_IN_PORT3_NUM_M,
1171 DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1172 dsaf_set_dev_field(dsaf_dev, reg,
1173 DSAFV2_INODE_IN_PORT4_NUM_M,
1174 DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1175 dsaf_set_dev_field(dsaf_dev, reg,
1176 DSAFV2_INODE_IN_PORT5_NUM_M,
1177 DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1178 }
1179 }
1180 for (i = 0; i < DSAF_INODE_NUM; i++) {
1181 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1182 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1183 }
1184 }
1185
1186 /**
1187 * hns_dsaf_sbm_init - INT
1188 * @dsaf_id: dsa fabric id
1189 */
1190 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1191 {
1192 u32 flag;
1193 u32 finish_msk;
1194 u32 cnt = 0;
1195 int ret;
1196
1197 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1198 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1199 finish_msk = DSAF_SRAM_INIT_OVER_M;
1200 } else {
1201 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1202 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1203 }
1204
1205 /* enable sbm chanel, disable sbm chanel shcut function*/
1206 hns_dsaf_sbm_cfg(dsaf_dev);
1207
1208 /* enable sbm mib */
1209 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1210 if (ret) {
1211 dev_err(dsaf_dev->dev,
1212 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1213 dsaf_dev->ae_dev.name, ret);
1214 return ret;
1215 }
1216
1217 /* enable sbm initial link sram */
1218 hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1219
1220 do {
1221 usleep_range(200, 210);/*udelay(200);*/
1222 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1223 finish_msk, DSAF_SRAM_INIT_OVER_S);
1224 cnt++;
1225 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1226 cnt < DSAF_CFG_READ_CNT);
1227
1228 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
1229 dev_err(dsaf_dev->dev,
1230 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1231 dsaf_dev->ae_dev.name, flag, cnt);
1232 return -ENODEV;
1233 }
1234
1235 hns_dsaf_rocee_bp_en(dsaf_dev);
1236
1237 return 0;
1238 }
1239
1240 /**
1241 * hns_dsaf_tbl_init - INT
1242 * @dsaf_id: dsa fabric id
1243 */
1244 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1245 {
1246 hns_dsaf_tbl_stat_en(dsaf_dev);
1247
1248 hns_dsaf_tbl_tcam_init(dsaf_dev);
1249 hns_dsaf_tbl_line_init(dsaf_dev);
1250 }
1251
1252 /**
1253 * hns_dsaf_voq_init - INT
1254 * @dsaf_id: dsa fabric id
1255 */
1256 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1257 {
1258 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1259 }
1260
1261 /**
1262 * hns_dsaf_init_hw - init dsa fabric hardware
1263 * @dsaf_dev: dsa fabric device struct pointer
1264 */
1265 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1266 {
1267 int ret;
1268
1269 dev_dbg(dsaf_dev->dev,
1270 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1271
1272 hns_dsaf_rst(dsaf_dev, 0);
1273 mdelay(10);
1274 hns_dsaf_rst(dsaf_dev, 1);
1275
1276 hns_dsaf_comm_init(dsaf_dev);
1277
1278 /*init XBAR_INODE*/
1279 hns_dsaf_inode_init(dsaf_dev);
1280
1281 /*init SBM*/
1282 ret = hns_dsaf_sbm_init(dsaf_dev);
1283 if (ret)
1284 return ret;
1285
1286 /*init TBL*/
1287 hns_dsaf_tbl_init(dsaf_dev);
1288
1289 /*init VOQ*/
1290 hns_dsaf_voq_init(dsaf_dev);
1291
1292 return 0;
1293 }
1294
1295 /**
1296 * hns_dsaf_remove_hw - uninit dsa fabric hardware
1297 * @dsaf_dev: dsa fabric device struct pointer
1298 */
1299 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1300 {
1301 /*reset*/
1302 hns_dsaf_rst(dsaf_dev, 0);
1303 }
1304
1305 /**
1306 * hns_dsaf_init - init dsa fabric
1307 * @dsaf_dev: dsa fabric device struct pointer
1308 * retuen 0 - success , negative --fail
1309 */
1310 static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1311 {
1312 struct dsaf_drv_priv *priv =
1313 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1314 u32 i;
1315 int ret;
1316
1317 if (HNS_DSAF_IS_DEBUG(dsaf_dev))
1318 return 0;
1319
1320 ret = hns_dsaf_init_hw(dsaf_dev);
1321 if (ret)
1322 return ret;
1323
1324 /* malloc mem for tcam mac key(vlan+mac) */
1325 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1326 * DSAF_TCAM_SUM);
1327 if (!priv->soft_mac_tbl) {
1328 ret = -ENOMEM;
1329 goto remove_hw;
1330 }
1331
1332 /*all entry invall */
1333 for (i = 0; i < DSAF_TCAM_SUM; i++)
1334 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1335
1336 return 0;
1337
1338 remove_hw:
1339 hns_dsaf_remove_hw(dsaf_dev);
1340 return ret;
1341 }
1342
1343 /**
1344 * hns_dsaf_free - free dsa fabric
1345 * @dsaf_dev: dsa fabric device struct pointer
1346 */
1347 static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1348 {
1349 struct dsaf_drv_priv *priv =
1350 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1351
1352 hns_dsaf_remove_hw(dsaf_dev);
1353
1354 /* free all mac mem */
1355 vfree(priv->soft_mac_tbl);
1356 priv->soft_mac_tbl = NULL;
1357 }
1358
1359 /**
1360 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1361 * @dsaf_dev: dsa fabric device struct pointer
1362 * @mac_key: mac entry struct pointer
1363 */
1364 static u16 hns_dsaf_find_soft_mac_entry(
1365 struct dsaf_device *dsaf_dev,
1366 struct dsaf_drv_tbl_tcam_key *mac_key)
1367 {
1368 struct dsaf_drv_priv *priv =
1369 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1370 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1371 u32 i;
1372
1373 soft_mac_entry = priv->soft_mac_tbl;
1374 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1375 /* invall tab entry */
1376 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1377 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1378 (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1379 /* return find result --soft index */
1380 return soft_mac_entry->index;
1381
1382 soft_mac_entry++;
1383 }
1384 return DSAF_INVALID_ENTRY_IDX;
1385 }
1386
1387 /**
1388 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1389 * @dsaf_dev: dsa fabric device struct pointer
1390 */
1391 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1392 {
1393 struct dsaf_drv_priv *priv =
1394 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1395 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1396 u32 i;
1397
1398 soft_mac_entry = priv->soft_mac_tbl;
1399 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1400 /* inv all entry */
1401 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1402 /* return find result --soft index */
1403 return i;
1404
1405 soft_mac_entry++;
1406 }
1407 return DSAF_INVALID_ENTRY_IDX;
1408 }
1409
1410 /**
1411 * hns_dsaf_set_mac_key - set mac key
1412 * @dsaf_dev: dsa fabric device struct pointer
1413 * @mac_key: tcam key pointer
1414 * @vlan_id: vlan id
1415 * @in_port_num: input port num
1416 * @addr: mac addr
1417 */
1418 static void hns_dsaf_set_mac_key(
1419 struct dsaf_device *dsaf_dev,
1420 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1421 u8 *addr)
1422 {
1423 u8 port;
1424
1425 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1426 /*DSAF mode : in port id fixed 0*/
1427 port = 0;
1428 else
1429 /*non-dsaf mode*/
1430 port = in_port_num;
1431
1432 mac_key->high.bits.mac_0 = addr[0];
1433 mac_key->high.bits.mac_1 = addr[1];
1434 mac_key->high.bits.mac_2 = addr[2];
1435 mac_key->high.bits.mac_3 = addr[3];
1436 mac_key->low.bits.mac_4 = addr[4];
1437 mac_key->low.bits.mac_5 = addr[5];
1438 mac_key->low.bits.vlan = vlan_id;
1439 mac_key->low.bits.port = port;
1440 }
1441
1442 /**
1443 * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1444 * @dsaf_dev: dsa fabric device struct pointer
1445 * @mac_entry: uc-mac entry
1446 */
1447 int hns_dsaf_set_mac_uc_entry(
1448 struct dsaf_device *dsaf_dev,
1449 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1450 {
1451 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1452 struct dsaf_drv_tbl_tcam_key mac_key;
1453 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1454 struct dsaf_drv_priv *priv =
1455 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1456 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1457
1458 /* mac addr check */
1459 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1460 MAC_IS_BROADCAST(mac_entry->addr) ||
1461 MAC_IS_MULTICAST(mac_entry->addr)) {
1462 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1463 dsaf_dev->ae_dev.name, mac_entry->addr);
1464 return -EINVAL;
1465 }
1466
1467 /* config key */
1468 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1469 mac_entry->in_port_num, mac_entry->addr);
1470
1471 /* entry ie exist? */
1472 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1473 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1474 /*if has not inv entry,find a empty entry */
1475 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1476 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1477 /* has not empty,return error */
1478 dev_err(dsaf_dev->dev,
1479 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1480 dsaf_dev->ae_dev.name,
1481 mac_key.high.val, mac_key.low.val);
1482 return -EINVAL;
1483 }
1484 }
1485
1486 dev_dbg(dsaf_dev->dev,
1487 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1488 dsaf_dev->ae_dev.name, mac_key.high.val,
1489 mac_key.low.val, entry_index);
1490
1491 /* config hardware entry */
1492 mac_data.tbl_ucast_item_vld = 1;
1493 mac_data.tbl_ucast_mac_discard = 0;
1494 mac_data.tbl_ucast_old_en = 0;
1495 /* default config dvc to 0 */
1496 mac_data.tbl_ucast_dvc = 0;
1497 mac_data.tbl_ucast_out_port = mac_entry->port_num;
1498 hns_dsaf_tcam_uc_cfg(
1499 dsaf_dev, entry_index,
1500 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1501
1502 /* config software entry */
1503 soft_mac_entry += entry_index;
1504 soft_mac_entry->index = entry_index;
1505 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1506 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1507
1508 return 0;
1509 }
1510
1511 /**
1512 * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1513 * @dsaf_dev: dsa fabric device struct pointer
1514 * @mac_entry: mc-mac entry
1515 */
1516 int hns_dsaf_set_mac_mc_entry(
1517 struct dsaf_device *dsaf_dev,
1518 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1519 {
1520 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1521 struct dsaf_drv_tbl_tcam_key mac_key;
1522 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1523 struct dsaf_drv_priv *priv =
1524 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1525 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1526 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1527
1528 /* mac addr check */
1529 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1530 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1531 dsaf_dev->ae_dev.name, mac_entry->addr);
1532 return -EINVAL;
1533 }
1534
1535 /*config key */
1536 hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1537 mac_entry->in_vlan_id,
1538 mac_entry->in_port_num, mac_entry->addr);
1539
1540 /* entry ie exist? */
1541 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1542 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1543 /*if hasnot, find enpty entry*/
1544 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1545 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1546 /*if hasnot empty, error*/
1547 dev_err(dsaf_dev->dev,
1548 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1549 dsaf_dev->ae_dev.name,
1550 mac_key.high.val, mac_key.low.val);
1551 return -EINVAL;
1552 }
1553
1554 /* config hardware entry */
1555 memset(mac_data.tbl_mcast_port_msk,
1556 0, sizeof(mac_data.tbl_mcast_port_msk));
1557 } else {
1558 /* config hardware entry */
1559 hns_dsaf_tcam_mc_get(
1560 dsaf_dev, entry_index,
1561 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1562 }
1563 mac_data.tbl_mcast_old_en = 0;
1564 mac_data.tbl_mcast_item_vld = 1;
1565 dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1566 0x3F, 0, mac_entry->port_mask[0]);
1567
1568 dev_dbg(dsaf_dev->dev,
1569 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1570 dsaf_dev->ae_dev.name, mac_key.high.val,
1571 mac_key.low.val, entry_index);
1572
1573 hns_dsaf_tcam_mc_cfg(
1574 dsaf_dev, entry_index,
1575 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1576
1577 /* config software entry */
1578 soft_mac_entry += entry_index;
1579 soft_mac_entry->index = entry_index;
1580 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1581 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1582
1583 return 0;
1584 }
1585
1586 /**
1587 * hns_dsaf_add_mac_mc_port - add mac mc-port
1588 * @dsaf_dev: dsa fabric device struct pointer
1589 * @mac_entry: mc-mac entry
1590 */
1591 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1592 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1593 {
1594 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1595 struct dsaf_drv_tbl_tcam_key mac_key;
1596 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1597 struct dsaf_drv_priv *priv =
1598 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1599 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1600 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1601 int mskid;
1602
1603 /*chechk mac addr */
1604 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1605 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1606 mac_entry->addr);
1607 return -EINVAL;
1608 }
1609
1610 /*config key */
1611 hns_dsaf_set_mac_key(
1612 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1613 mac_entry->in_port_num, mac_entry->addr);
1614
1615 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1616
1617 /*check exist? */
1618 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1619 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1620 /*if hasnot , find a empty*/
1621 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1622 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1623 /*if hasnot empty, error*/
1624 dev_err(dsaf_dev->dev,
1625 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1626 dsaf_dev->ae_dev.name, mac_key.high.val,
1627 mac_key.low.val);
1628 return -EINVAL;
1629 }
1630 } else {
1631 /*if exist, add in */
1632 hns_dsaf_tcam_mc_get(
1633 dsaf_dev, entry_index,
1634 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1635 }
1636 /* config hardware entry */
1637 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1638 mskid = mac_entry->port_num;
1639 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1640 mskid = mac_entry->port_num -
1641 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1642 } else {
1643 dev_err(dsaf_dev->dev,
1644 "%s,pnum(%d)error,key(%#x:%#x)\n",
1645 dsaf_dev->ae_dev.name, mac_entry->port_num,
1646 mac_key.high.val, mac_key.low.val);
1647 return -EINVAL;
1648 }
1649 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1650 mac_data.tbl_mcast_old_en = 0;
1651 mac_data.tbl_mcast_item_vld = 1;
1652
1653 dev_dbg(dsaf_dev->dev,
1654 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1655 dsaf_dev->ae_dev.name, mac_key.high.val,
1656 mac_key.low.val, entry_index);
1657
1658 hns_dsaf_tcam_mc_cfg(
1659 dsaf_dev, entry_index,
1660 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1661
1662 /*config software entry */
1663 soft_mac_entry += entry_index;
1664 soft_mac_entry->index = entry_index;
1665 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1666 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1667
1668 return 0;
1669 }
1670
1671 /**
1672 * hns_dsaf_del_mac_entry - del mac mc-port
1673 * @dsaf_dev: dsa fabric device struct pointer
1674 * @vlan_id: vlian id
1675 * @in_port_num: input port num
1676 * @addr : mac addr
1677 */
1678 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1679 u8 in_port_num, u8 *addr)
1680 {
1681 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1682 struct dsaf_drv_tbl_tcam_key mac_key;
1683 struct dsaf_drv_priv *priv =
1684 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1685 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1686
1687 /*check mac addr */
1688 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
1689 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1690 addr);
1691 return -EINVAL;
1692 }
1693
1694 /*config key */
1695 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1696
1697 /*exist ?*/
1698 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1699 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1700 /*not exist, error */
1701 dev_err(dsaf_dev->dev,
1702 "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1703 dsaf_dev->ae_dev.name,
1704 mac_key.high.val, mac_key.low.val);
1705 return -EINVAL;
1706 }
1707 dev_dbg(dsaf_dev->dev,
1708 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1709 dsaf_dev->ae_dev.name, mac_key.high.val,
1710 mac_key.low.val, entry_index);
1711
1712 /*do del opt*/
1713 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1714
1715 /*del soft emtry */
1716 soft_mac_entry += entry_index;
1717 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1718
1719 return 0;
1720 }
1721
1722 /**
1723 * hns_dsaf_del_mac_mc_port - del mac mc- port
1724 * @dsaf_dev: dsa fabric device struct pointer
1725 * @mac_entry: mac entry
1726 */
1727 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1728 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1729 {
1730 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1731 struct dsaf_drv_tbl_tcam_key mac_key;
1732 struct dsaf_drv_priv *priv =
1733 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1734 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1735 u16 vlan_id;
1736 u8 in_port_num;
1737 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1738 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1739 int mskid;
1740 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1741
1742 if (!(void *)mac_entry) {
1743 dev_err(dsaf_dev->dev,
1744 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1745 return -EINVAL;
1746 }
1747
1748 /*get key info*/
1749 vlan_id = mac_entry->in_vlan_id;
1750 in_port_num = mac_entry->in_port_num;
1751
1752 /*check mac addr */
1753 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1754 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1755 mac_entry->addr);
1756 return -EINVAL;
1757 }
1758
1759 /*config key */
1760 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1761 mac_entry->addr);
1762
1763 /*check is exist? */
1764 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1765 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1766 /*find none */
1767 dev_err(dsaf_dev->dev,
1768 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1769 dsaf_dev->ae_dev.name,
1770 mac_key.high.val, mac_key.low.val);
1771 return -EINVAL;
1772 }
1773
1774 dev_dbg(dsaf_dev->dev,
1775 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1776 dsaf_dev->ae_dev.name, mac_key.high.val,
1777 mac_key.low.val, entry_index);
1778
1779 /*read entry*/
1780 hns_dsaf_tcam_mc_get(
1781 dsaf_dev, entry_index,
1782 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1783
1784 /*del the port*/
1785 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1786 mskid = mac_entry->port_num;
1787 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1788 mskid = mac_entry->port_num -
1789 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1790 } else {
1791 dev_err(dsaf_dev->dev,
1792 "%s,pnum(%d)error,key(%#x:%#x)\n",
1793 dsaf_dev->ae_dev.name, mac_entry->port_num,
1794 mac_key.high.val, mac_key.low.val);
1795 return -EINVAL;
1796 }
1797 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1798
1799 /*check non port, do del entry */
1800 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1801 sizeof(mac_data.tbl_mcast_port_msk))) {
1802 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1803
1804 /* del soft entry */
1805 soft_mac_entry += entry_index;
1806 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1807 } else { /* not zer, just del port, updata*/
1808 hns_dsaf_tcam_mc_cfg(
1809 dsaf_dev, entry_index,
1810 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1811 }
1812
1813 return 0;
1814 }
1815
1816 /**
1817 * hns_dsaf_get_mac_uc_entry - get mac uc entry
1818 * @dsaf_dev: dsa fabric device struct pointer
1819 * @mac_entry: mac entry
1820 */
1821 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1822 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1823 {
1824 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1825 struct dsaf_drv_tbl_tcam_key mac_key;
1826
1827 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1828
1829 /* check macaddr */
1830 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1831 MAC_IS_BROADCAST(mac_entry->addr)) {
1832 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1833 mac_entry->addr);
1834 return -EINVAL;
1835 }
1836
1837 /*config key */
1838 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1839 mac_entry->in_port_num, mac_entry->addr);
1840
1841 /*check exist? */
1842 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1843 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1844 /*find none, error */
1845 dev_err(dsaf_dev->dev,
1846 "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1847 dsaf_dev->ae_dev.name,
1848 mac_key.high.val, mac_key.low.val);
1849 return -EINVAL;
1850 }
1851 dev_dbg(dsaf_dev->dev,
1852 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1853 dsaf_dev->ae_dev.name, mac_key.high.val,
1854 mac_key.low.val, entry_index);
1855
1856 /*read entry*/
1857 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1858 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1859 mac_entry->port_num = mac_data.tbl_ucast_out_port;
1860
1861 return 0;
1862 }
1863
1864 /**
1865 * hns_dsaf_get_mac_mc_entry - get mac mc entry
1866 * @dsaf_dev: dsa fabric device struct pointer
1867 * @mac_entry: mac entry
1868 */
1869 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1870 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1871 {
1872 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1873 struct dsaf_drv_tbl_tcam_key mac_key;
1874
1875 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1876
1877 /*check mac addr */
1878 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1879 MAC_IS_BROADCAST(mac_entry->addr)) {
1880 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1881 mac_entry->addr);
1882 return -EINVAL;
1883 }
1884
1885 /*config key */
1886 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1887 mac_entry->in_port_num, mac_entry->addr);
1888
1889 /*check exist? */
1890 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1891 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1892 /* find none, error */
1893 dev_err(dsaf_dev->dev,
1894 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1895 dsaf_dev->ae_dev.name, mac_key.high.val,
1896 mac_key.low.val);
1897 return -EINVAL;
1898 }
1899 dev_dbg(dsaf_dev->dev,
1900 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1901 dsaf_dev->ae_dev.name, mac_key.high.val,
1902 mac_key.low.val, entry_index);
1903
1904 /*read entry */
1905 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1906 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1907
1908 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1909 return 0;
1910 }
1911
1912 /**
1913 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1914 * @dsaf_dev: dsa fabric device struct pointer
1915 * @entry_index: tab entry index
1916 * @mac_entry: mac entry
1917 */
1918 int hns_dsaf_get_mac_entry_by_index(
1919 struct dsaf_device *dsaf_dev,
1920 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1921 {
1922 struct dsaf_drv_tbl_tcam_key mac_key;
1923
1924 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1925 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1926 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1927
1928 if (entry_index >= DSAF_TCAM_SUM) {
1929 /* find none, del error */
1930 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1931 dsaf_dev->ae_dev.name);
1932 return -EINVAL;
1933 }
1934
1935 /* mc entry, do read opt */
1936 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1937 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1938
1939 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1940
1941 /***get mac addr*/
1942 mac_addr[0] = mac_key.high.bits.mac_0;
1943 mac_addr[1] = mac_key.high.bits.mac_1;
1944 mac_addr[2] = mac_key.high.bits.mac_2;
1945 mac_addr[3] = mac_key.high.bits.mac_3;
1946 mac_addr[4] = mac_key.low.bits.mac_4;
1947 mac_addr[5] = mac_key.low.bits.mac_5;
1948 /**is mc or uc*/
1949 if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
1950 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
1951 /**mc donot do*/
1952 } else {
1953 /*is not mc, just uc... */
1954 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1955 (struct dsaf_tbl_tcam_data *)&mac_key,
1956 &mac_uc_data);
1957 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
1958 }
1959
1960 return 0;
1961 }
1962
1963 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
1964 size_t sizeof_priv)
1965 {
1966 struct dsaf_device *dsaf_dev;
1967
1968 dsaf_dev = devm_kzalloc(dev,
1969 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
1970 if (unlikely(!dsaf_dev)) {
1971 dsaf_dev = ERR_PTR(-ENOMEM);
1972 } else {
1973 dsaf_dev->dev = dev;
1974 dev_set_drvdata(dev, dsaf_dev);
1975 }
1976
1977 return dsaf_dev;
1978 }
1979
1980 /**
1981 * hns_dsaf_free_dev - free dev mem
1982 * @dev: struct device pointer
1983 */
1984 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
1985 {
1986 (void)dev_set_drvdata(dsaf_dev->dev, NULL);
1987 }
1988
1989 /**
1990 * dsaf_pfc_unit_cnt - set pfc unit count
1991 * @dsaf_id: dsa fabric id
1992 * @pport_rate: value array
1993 * @pdsaf_pfc_unit_cnt: value array
1994 */
1995 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id,
1996 enum dsaf_port_rate_mode rate)
1997 {
1998 u32 unit_cnt;
1999
2000 switch (rate) {
2001 case DSAF_PORT_RATE_10000:
2002 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2003 break;
2004 case DSAF_PORT_RATE_1000:
2005 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2006 break;
2007 case DSAF_PORT_RATE_2500:
2008 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2009 break;
2010 default:
2011 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2012 }
2013
2014 dsaf_set_dev_field(dsaf_dev,
2015 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
2016 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
2017 unit_cnt);
2018 }
2019
2020 /**
2021 * dsaf_port_work_rate_cfg - fifo
2022 * @dsaf_id: dsa fabric id
2023 * @xge_ge_work_mode
2024 */
2025 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
2026 enum dsaf_port_rate_mode rate_mode)
2027 {
2028 u32 port_work_mode;
2029
2030 port_work_mode = dsaf_read_dev(
2031 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
2032
2033 if (rate_mode == DSAF_PORT_RATE_10000)
2034 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
2035 else
2036 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
2037
2038 dsaf_write_dev(dsaf_dev,
2039 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
2040 port_work_mode);
2041
2042 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
2043 }
2044
2045 /**
2046 * hns_dsaf_fix_mac_mode - dsaf modify mac mode
2047 * @mac_cb: mac contrl block
2048 */
2049 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
2050 {
2051 enum dsaf_port_rate_mode mode;
2052 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
2053 int mac_id = mac_cb->mac_id;
2054
2055 if (mac_cb->mac_type != HNAE_PORT_SERVICE)
2056 return;
2057 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
2058 mode = DSAF_PORT_RATE_10000;
2059 else
2060 mode = DSAF_PORT_RATE_1000;
2061
2062 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
2063 }
2064
2065 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
2066 {
2067 struct dsaf_hw_stats *hw_stats
2068 = &dsaf_dev->hw_stats[node_num];
2069 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2070 u32 reg_tmp;
2071
2072 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
2073 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2074 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
2075 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
2076 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
2077 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
2078 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
2079 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
2080
2081 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2082 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2083 hw_stats->rx_pause_frame +=
2084 dsaf_read_dev(dsaf_dev, reg_tmp + 0x80 * (u64)node_num);
2085
2086 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
2087 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
2088 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2089 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2090 hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2091 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2092 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2093 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2094 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2095 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2096 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2097 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2098
2099 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2100 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2101 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2102 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2103
2104 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2105 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2106 }
2107
2108 /**
2109 *hns_dsaf_get_regs - dump dsaf regs
2110 *@dsaf_dev: dsaf device
2111 *@data:data for value of regs
2112 */
2113 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2114 {
2115 u32 i = 0;
2116 u32 j;
2117 u32 *p = data;
2118 u32 reg_tmp;
2119 bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver);
2120
2121 /* dsaf common registers */
2122 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2123 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2124 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2125 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2126 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2127 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2128 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2129 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2130 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2131
2132 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2133 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2134 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2135 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2136 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2137 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2138 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2139 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2140 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2141 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2142 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2143 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2144 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2145 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2146 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2147
2148 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2149 p[24 + i] = dsaf_read_dev(ddev,
2150 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2151
2152 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2153
2154 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2155 p[33 + i] = dsaf_read_dev(ddev,
2156 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2157
2158 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2159 p[41 + i] = dsaf_read_dev(ddev,
2160 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2161
2162 /* dsaf inode registers */
2163 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2164
2165 p[171] = dsaf_read_dev(ddev,
2166 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2167
2168 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2169 j = i * DSAF_COMM_CHN + port;
2170 p[172 + i] = dsaf_read_dev(ddev,
2171 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2172 p[175 + i] = dsaf_read_dev(ddev,
2173 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2174 p[178 + i] = dsaf_read_dev(ddev,
2175 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2176 p[181 + i] = dsaf_read_dev(ddev,
2177 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2178 p[184 + i] = dsaf_read_dev(ddev,
2179 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2180 p[187 + i] = dsaf_read_dev(ddev,
2181 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2182 p[190 + i] = dsaf_read_dev(ddev,
2183 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
2184 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2185 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2186 p[193 + i] = dsaf_read_dev(ddev, reg_tmp + j * 0x80);
2187 p[196 + i] = dsaf_read_dev(ddev,
2188 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2189 p[199 + i] = dsaf_read_dev(ddev,
2190 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2191 p[202 + i] = dsaf_read_dev(ddev,
2192 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2193 p[205 + i] = dsaf_read_dev(ddev,
2194 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2195 p[208 + i] = dsaf_read_dev(ddev,
2196 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2197 p[211 + i] = dsaf_read_dev(ddev,
2198 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2199 p[214 + i] = dsaf_read_dev(ddev,
2200 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2201 p[217 + i] = dsaf_read_dev(ddev,
2202 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2203 p[220 + i] = dsaf_read_dev(ddev,
2204 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2205 p[223 + i] = dsaf_read_dev(ddev,
2206 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2207 p[224 + i] = dsaf_read_dev(ddev,
2208 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2209 }
2210
2211 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2212
2213 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2214 j = i * DSAF_COMM_CHN + port;
2215 p[228 + i] = dsaf_read_dev(ddev,
2216 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2217 }
2218
2219 p[231] = dsaf_read_dev(ddev,
2220 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2221
2222 /* dsaf inode registers */
2223 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
2224 j = i * DSAF_COMM_CHN + port;
2225 p[232 + i] = dsaf_read_dev(ddev,
2226 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2227 p[235 + i] = dsaf_read_dev(ddev,
2228 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2229 p[238 + i] = dsaf_read_dev(ddev,
2230 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2231 p[241 + i] = dsaf_read_dev(ddev,
2232 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2233 p[244 + i] = dsaf_read_dev(ddev,
2234 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2235 p[245 + i] = dsaf_read_dev(ddev,
2236 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2237 p[248 + i] = dsaf_read_dev(ddev,
2238 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2239 p[251 + i] = dsaf_read_dev(ddev,
2240 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2241 p[254 + i] = dsaf_read_dev(ddev,
2242 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2243 p[257 + i] = dsaf_read_dev(ddev,
2244 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2245 p[260 + i] = dsaf_read_dev(ddev,
2246 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2247 p[263 + i] = dsaf_read_dev(ddev,
2248 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2249 p[266 + i] = dsaf_read_dev(ddev,
2250 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2251 p[269 + i] = dsaf_read_dev(ddev,
2252 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2253 p[272 + i] = dsaf_read_dev(ddev,
2254 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2255 p[275 + i] = dsaf_read_dev(ddev,
2256 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2257 p[278 + i] = dsaf_read_dev(ddev,
2258 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2259 p[281 + i] = dsaf_read_dev(ddev,
2260 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2261 p[284 + i] = dsaf_read_dev(ddev,
2262 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2263 p[287 + i] = dsaf_read_dev(ddev,
2264 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2265 p[290 + i] = dsaf_read_dev(ddev,
2266 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2267 p[293 + i] = dsaf_read_dev(ddev,
2268 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2269 p[296 + i] = dsaf_read_dev(ddev,
2270 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2271 p[299 + i] = dsaf_read_dev(ddev,
2272 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2273 p[302 + i] = dsaf_read_dev(ddev,
2274 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2275 p[305 + i] = dsaf_read_dev(ddev,
2276 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2277 p[308 + i] = dsaf_read_dev(ddev,
2278 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2279 }
2280
2281 /* dsaf onode registers */
2282 for (i = 0; i < DSAF_XOD_NUM; i++) {
2283 p[311 + i] = dsaf_read_dev(ddev,
2284 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + i * 0x90);
2285 p[319 + i] = dsaf_read_dev(ddev,
2286 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + i * 0x90);
2287 p[327 + i] = dsaf_read_dev(ddev,
2288 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + i * 0x90);
2289 p[335 + i] = dsaf_read_dev(ddev,
2290 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + i * 0x90);
2291 p[343 + i] = dsaf_read_dev(ddev,
2292 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + i * 0x90);
2293 p[351 + i] = dsaf_read_dev(ddev,
2294 DSAF_XOD_ETS_TOKEN_CFG_0_REG + i * 0x90);
2295 }
2296
2297 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2298 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2299 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2300
2301 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2302 j = i * DSAF_COMM_CHN + port;
2303 p[362 + i] = dsaf_read_dev(ddev,
2304 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2305 p[365 + i] = dsaf_read_dev(ddev,
2306 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2307 p[368 + i] = dsaf_read_dev(ddev,
2308 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2309 p[371 + i] = dsaf_read_dev(ddev,
2310 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2311 p[374 + i] = dsaf_read_dev(ddev,
2312 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2313 p[377 + i] = dsaf_read_dev(ddev,
2314 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2315 p[380 + i] = dsaf_read_dev(ddev,
2316 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2317 p[383 + i] = dsaf_read_dev(ddev,
2318 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2319 p[386 + i] = dsaf_read_dev(ddev,
2320 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2321 p[389 + i] = dsaf_read_dev(ddev,
2322 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2323 }
2324
2325 p[392] = dsaf_read_dev(ddev,
2326 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2327 p[393] = dsaf_read_dev(ddev,
2328 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2329 p[394] = dsaf_read_dev(ddev,
2330 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2331 p[395] = dsaf_read_dev(ddev,
2332 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2333 p[396] = dsaf_read_dev(ddev,
2334 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2335 p[397] = dsaf_read_dev(ddev,
2336 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2337 p[398] = dsaf_read_dev(ddev,
2338 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2339 p[399] = dsaf_read_dev(ddev,
2340 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2341 p[400] = dsaf_read_dev(ddev,
2342 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2343 p[401] = dsaf_read_dev(ddev,
2344 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2345 p[402] = dsaf_read_dev(ddev,
2346 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2347 p[403] = dsaf_read_dev(ddev,
2348 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2349 p[404] = dsaf_read_dev(ddev,
2350 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2351
2352 /* dsaf voq registers */
2353 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2354 j = (i * DSAF_COMM_CHN + port) * 0x90;
2355 p[405 + i] = dsaf_read_dev(ddev,
2356 DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2357 p[408 + i] = dsaf_read_dev(ddev,
2358 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2359 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2360 p[414 + i] = dsaf_read_dev(ddev,
2361 DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2362 p[417 + i] = dsaf_read_dev(ddev,
2363 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2364 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2365 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2366 p[426 + i] = dsaf_read_dev(ddev,
2367 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2368 p[429 + i] = dsaf_read_dev(ddev,
2369 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2370 p[432 + i] = dsaf_read_dev(ddev,
2371 DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2372 p[435 + i] = dsaf_read_dev(ddev,
2373 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2374 p[438 + i] = dsaf_read_dev(ddev,
2375 DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2376 }
2377
2378 /* dsaf tbl registers */
2379 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2380 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2381 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2382 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2383 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2384 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2385 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2386 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2387 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2388 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2389 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2390 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2391 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2392 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2393 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2394 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2395 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2396 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2397 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2398 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2399 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2400 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2401 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2402
2403 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2404 j = i * 0x8;
2405 p[464 + 2 * i] = dsaf_read_dev(ddev,
2406 DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2407 p[465 + 2 * i] = dsaf_read_dev(ddev,
2408 DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2409 }
2410
2411 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2412 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2413 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2414 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2415 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2416 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2417 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2418 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2419 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2420 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2421 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2422 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2423
2424 /* dsaf other registers */
2425 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2426 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2427 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2428 p[495] = dsaf_read_dev(ddev,
2429 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2430 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2431 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2432
2433 if (!is_ver1)
2434 p[498] = dsaf_read_dev(ddev, DSAF_PAUSE_CFG_REG + port * 0x4);
2435
2436 /* mark end of dsaf regs */
2437 for (i = 499; i < 504; i++)
2438 p[i] = 0xdddddddd;
2439 }
2440
2441 static char *hns_dsaf_get_node_stats_strings(char *data, int node)
2442 {
2443 char *buff = data;
2444
2445 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2446 buff = buff + ETH_GSTRING_LEN;
2447 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2448 buff = buff + ETH_GSTRING_LEN;
2449 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2450 buff = buff + ETH_GSTRING_LEN;
2451 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2452 buff = buff + ETH_GSTRING_LEN;
2453 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2454 buff = buff + ETH_GSTRING_LEN;
2455 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2456 buff = buff + ETH_GSTRING_LEN;
2457 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2458 buff = buff + ETH_GSTRING_LEN;
2459 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2460 buff = buff + ETH_GSTRING_LEN;
2461 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2462 buff = buff + ETH_GSTRING_LEN;
2463 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2464 buff = buff + ETH_GSTRING_LEN;
2465 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2466 buff = buff + ETH_GSTRING_LEN;
2467 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2468 buff = buff + ETH_GSTRING_LEN;
2469 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2470 buff = buff + ETH_GSTRING_LEN;
2471 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2472 buff = buff + ETH_GSTRING_LEN;
2473
2474 return buff;
2475 }
2476
2477 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2478 int node_num)
2479 {
2480 u64 *p = data;
2481 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2482
2483 p[0] = hw_stats->pad_drop;
2484 p[1] = hw_stats->man_pkts;
2485 p[2] = hw_stats->rx_pkts;
2486 p[3] = hw_stats->rx_pkt_id;
2487 p[4] = hw_stats->rx_pause_frame;
2488 p[5] = hw_stats->release_buf_num;
2489 p[6] = hw_stats->sbm_drop;
2490 p[7] = hw_stats->crc_false;
2491 p[8] = hw_stats->bp_drop;
2492 p[9] = hw_stats->rslt_drop;
2493 p[10] = hw_stats->local_addr_false;
2494 p[11] = hw_stats->vlan_drop;
2495 p[12] = hw_stats->stp_drop;
2496 p[13] = hw_stats->tx_pkts;
2497
2498 return &p[14];
2499 }
2500
2501 /**
2502 *hns_dsaf_get_stats - get dsaf statistic
2503 *@ddev: dsaf device
2504 *@data:statistic value
2505 *@port: port num
2506 */
2507 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2508 {
2509 u64 *p = data;
2510 int node_num = port;
2511
2512 /* for ge/xge node info */
2513 p = hns_dsaf_get_node_stats(ddev, p, node_num);
2514
2515 /* for ppe node info */
2516 node_num = port + DSAF_PPE_INODE_BASE;
2517 (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2518 }
2519
2520 /**
2521 *hns_dsaf_get_sset_count - get dsaf string set count
2522 *@stringset: type of values in data
2523 *return dsaf string name count
2524 */
2525 int hns_dsaf_get_sset_count(int stringset)
2526 {
2527 if (stringset == ETH_SS_STATS)
2528 return DSAF_STATIC_NUM;
2529
2530 return 0;
2531 }
2532
2533 /**
2534 *hns_dsaf_get_strings - get dsaf string set
2535 *@stringset:srting set index
2536 *@data:strings name value
2537 *@port:port index
2538 */
2539 void hns_dsaf_get_strings(int stringset, u8 *data, int port)
2540 {
2541 char *buff = (char *)data;
2542 int node = port;
2543
2544 if (stringset != ETH_SS_STATS)
2545 return;
2546
2547 /* for ge/xge node info */
2548 buff = hns_dsaf_get_node_stats_strings(buff, node);
2549
2550 /* for ppe node info */
2551 node = port + DSAF_PPE_INODE_BASE;
2552 (void)hns_dsaf_get_node_stats_strings(buff, node);
2553 }
2554
2555 /**
2556 *hns_dsaf_get_sset_count - get dsaf regs count
2557 *return dsaf regs count
2558 */
2559 int hns_dsaf_get_regs_count(void)
2560 {
2561 return DSAF_DUMP_REGS_NUM;
2562 }
2563
2564 /**
2565 * dsaf_probe - probo dsaf dev
2566 * @pdev: dasf platform device
2567 * retuen 0 - success , negative --fail
2568 */
2569 static int hns_dsaf_probe(struct platform_device *pdev)
2570 {
2571 struct dsaf_device *dsaf_dev;
2572 int ret;
2573
2574 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2575 if (IS_ERR(dsaf_dev)) {
2576 ret = PTR_ERR(dsaf_dev);
2577 dev_err(&pdev->dev,
2578 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2579 return ret;
2580 }
2581
2582 ret = hns_dsaf_get_cfg(dsaf_dev);
2583 if (ret)
2584 goto free_dev;
2585
2586 ret = hns_dsaf_init(dsaf_dev);
2587 if (ret)
2588 goto free_cfg;
2589
2590 ret = hns_mac_init(dsaf_dev);
2591 if (ret)
2592 goto uninit_dsaf;
2593
2594 ret = hns_ppe_init(dsaf_dev);
2595 if (ret)
2596 goto uninit_mac;
2597
2598 ret = hns_dsaf_ae_init(dsaf_dev);
2599 if (ret)
2600 goto uninit_ppe;
2601
2602 return 0;
2603
2604 uninit_ppe:
2605 hns_ppe_uninit(dsaf_dev);
2606
2607 uninit_mac:
2608 hns_mac_uninit(dsaf_dev);
2609
2610 uninit_dsaf:
2611 hns_dsaf_free(dsaf_dev);
2612
2613 free_cfg:
2614 hns_dsaf_free_cfg(dsaf_dev);
2615
2616 free_dev:
2617 hns_dsaf_free_dev(dsaf_dev);
2618
2619 return ret;
2620 }
2621
2622 /**
2623 * dsaf_remove - remove dsaf dev
2624 * @pdev: dasf platform device
2625 */
2626 static int hns_dsaf_remove(struct platform_device *pdev)
2627 {
2628 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2629
2630 hns_dsaf_ae_uninit(dsaf_dev);
2631
2632 hns_ppe_uninit(dsaf_dev);
2633
2634 hns_mac_uninit(dsaf_dev);
2635
2636 hns_dsaf_free(dsaf_dev);
2637
2638 hns_dsaf_free_cfg(dsaf_dev);
2639
2640 hns_dsaf_free_dev(dsaf_dev);
2641
2642 return 0;
2643 }
2644
2645 static const struct of_device_id g_dsaf_match[] = {
2646 {.compatible = "hisilicon,hns-dsaf-v1"},
2647 {.compatible = "hisilicon,hns-dsaf-v2"},
2648 {}
2649 };
2650
2651 static struct platform_driver g_dsaf_driver = {
2652 .probe = hns_dsaf_probe,
2653 .remove = hns_dsaf_remove,
2654 .driver = {
2655 .name = DSAF_DRV_NAME,
2656 .of_match_table = g_dsaf_match,
2657 },
2658 };
2659
2660 module_platform_driver(g_dsaf_driver);
2661
2662 MODULE_LICENSE("GPL");
2663 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2664 MODULE_DESCRIPTION("HNS DSAF driver");
2665 MODULE_VERSION(DSAF_MOD_VERSION);
Linux kernel - Deliverables
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