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Merge tag 'md/4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shli/md
[deliverable/linux.git] / drivers / net / ethernet / hisilicon / hns / hns_dsaf_main.c
1 /*
2 * Copyright (c) 2014-2015 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/netdevice.h>
15 #include <linux/platform_device.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/of_irq.h>
19 #include <linux/device.h>
20 #include <linux/vmalloc.h>
21
22 #include "hns_dsaf_main.h"
23 #include "hns_dsaf_rcb.h"
24 #include "hns_dsaf_ppe.h"
25 #include "hns_dsaf_mac.h"
26
27 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
28 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
29 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
30 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
31 };
32
33 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
34 {
35 int ret, i;
36 u32 desc_num;
37 u32 buf_size;
38 const char *mode_str;
39 struct device_node *np = dsaf_dev->dev->of_node;
40
41 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
42 dsaf_dev->dsaf_ver = AE_VERSION_1;
43 else
44 dsaf_dev->dsaf_ver = AE_VERSION_2;
45
46 ret = of_property_read_string(np, "mode", &mode_str);
47 if (ret) {
48 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
49 return ret;
50 }
51 for (i = 0; i < DSAF_MODE_MAX; i++) {
52 if (g_dsaf_mode_match[i] &&
53 !strcmp(mode_str, g_dsaf_mode_match[i]))
54 break;
55 }
56 if (i >= DSAF_MODE_MAX ||
57 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
58 dev_err(dsaf_dev->dev,
59 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
60 return -EINVAL;
61 }
62 dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
63
64 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
65 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
66 else
67 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
68
69 if ((i == DSAF_MODE_ENABLE_16VM) ||
70 (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
71 (i == DSAF_MODE_DISABLE_6PORT_2VM))
72 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
73 else
74 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
75
76 dsaf_dev->sc_base = of_iomap(np, 0);
77 if (!dsaf_dev->sc_base) {
78 dev_err(dsaf_dev->dev,
79 "%s of_iomap 0 fail!\n", dsaf_dev->ae_dev.name);
80 ret = -ENOMEM;
81 goto unmap_base_addr;
82 }
83
84 dsaf_dev->sds_base = of_iomap(np, 1);
85 if (!dsaf_dev->sds_base) {
86 dev_err(dsaf_dev->dev,
87 "%s of_iomap 1 fail!\n", dsaf_dev->ae_dev.name);
88 ret = -ENOMEM;
89 goto unmap_base_addr;
90 }
91
92 dsaf_dev->ppe_base = of_iomap(np, 2);
93 if (!dsaf_dev->ppe_base) {
94 dev_err(dsaf_dev->dev,
95 "%s of_iomap 2 fail!\n", dsaf_dev->ae_dev.name);
96 ret = -ENOMEM;
97 goto unmap_base_addr;
98 }
99
100 dsaf_dev->io_base = of_iomap(np, 3);
101 if (!dsaf_dev->io_base) {
102 dev_err(dsaf_dev->dev,
103 "%s of_iomap 3 fail!\n", dsaf_dev->ae_dev.name);
104 ret = -ENOMEM;
105 goto unmap_base_addr;
106 }
107
108 dsaf_dev->cpld_base = of_iomap(np, 4);
109 if (!dsaf_dev->cpld_base)
110 dev_dbg(dsaf_dev->dev, "NO CPLD ADDR");
111
112 ret = of_property_read_u32(np, "desc-num", &desc_num);
113 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
114 desc_num > HNS_DSAF_MAX_DESC_CNT) {
115 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
116 desc_num, ret);
117 goto unmap_base_addr;
118 }
119 dsaf_dev->desc_num = desc_num;
120
121 ret = of_property_read_u32(np, "buf-size", &buf_size);
122 if (ret < 0) {
123 dev_err(dsaf_dev->dev,
124 "get buf-size fail, ret=%d!\r\n", ret);
125 goto unmap_base_addr;
126 }
127 dsaf_dev->buf_size = buf_size;
128
129 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
130 if (dsaf_dev->buf_size_type < 0) {
131 dev_err(dsaf_dev->dev,
132 "buf_size(%d) is wrong!\n", buf_size);
133 goto unmap_base_addr;
134 }
135
136 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
137 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
138 else
139 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
140
141 return 0;
142
143 unmap_base_addr:
144 if (dsaf_dev->io_base)
145 iounmap(dsaf_dev->io_base);
146 if (dsaf_dev->ppe_base)
147 iounmap(dsaf_dev->ppe_base);
148 if (dsaf_dev->sds_base)
149 iounmap(dsaf_dev->sds_base);
150 if (dsaf_dev->sc_base)
151 iounmap(dsaf_dev->sc_base);
152 if (dsaf_dev->cpld_base)
153 iounmap(dsaf_dev->cpld_base);
154 return ret;
155 }
156
157 static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev)
158 {
159 if (dsaf_dev->io_base)
160 iounmap(dsaf_dev->io_base);
161
162 if (dsaf_dev->ppe_base)
163 iounmap(dsaf_dev->ppe_base);
164
165 if (dsaf_dev->sds_base)
166 iounmap(dsaf_dev->sds_base);
167
168 if (dsaf_dev->sc_base)
169 iounmap(dsaf_dev->sc_base);
170
171 if (dsaf_dev->cpld_base)
172 iounmap(dsaf_dev->cpld_base);
173 }
174
175 /**
176 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
177 * @dsaf_id: dsa fabric id
178 */
179 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
180 {
181 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
182 }
183
184 /**
185 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
186 * @dsaf_id: dsa fabric id
187 * @hns_dsaf_reg_cnt_clr_ce: config value
188 */
189 static void
190 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
191 {
192 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
193 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
194 }
195
196 /**
197 * hns_ppe_qid_cfg - config ppe qid
198 * @dsaf_id: dsa fabric id
199 * @pppe_qid_cfg: value array
200 */
201 static void
202 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
203 {
204 u32 i;
205
206 for (i = 0; i < DSAF_COMM_CHN; i++) {
207 dsaf_set_dev_field(dsaf_dev,
208 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
209 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
210 qid_cfg);
211 }
212 }
213
214 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
215 {
216 u16 max_q_per_vf, max_vfn;
217 u32 q_id, q_num_per_port;
218 u32 i;
219
220 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode,
221 HNS_DSAF_COMM_SERVICE_NW_IDX,
222 &max_vfn, &max_q_per_vf);
223 q_num_per_port = max_vfn * max_q_per_vf;
224
225 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
226 dsaf_set_dev_field(dsaf_dev,
227 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
228 0xff, 0, q_id);
229 q_id += q_num_per_port;
230 }
231 }
232
233 static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev)
234 {
235 u16 max_q_per_vf, max_vfn;
236 u32 q_id, q_num_per_port;
237 u32 mac_id;
238
239 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
240 return;
241
242 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode,
243 HNS_DSAF_COMM_SERVICE_NW_IDX,
244 &max_vfn, &max_q_per_vf);
245 q_num_per_port = max_vfn * max_q_per_vf;
246
247 for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) {
248 dsaf_set_dev_field(dsaf_dev,
249 DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
250 DSAFV2_SERDES_LBK_QID_M,
251 DSAFV2_SERDES_LBK_QID_S,
252 q_id);
253 q_id += q_num_per_port;
254 }
255 }
256
257 /**
258 * hns_dsaf_sw_port_type_cfg - cfg sw type
259 * @dsaf_id: dsa fabric id
260 * @psw_port_type: array
261 */
262 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
263 enum dsaf_sw_port_type port_type)
264 {
265 u32 i;
266
267 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
268 dsaf_set_dev_field(dsaf_dev,
269 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
270 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
271 port_type);
272 }
273 }
274
275 /**
276 * hns_dsaf_stp_port_type_cfg - cfg stp type
277 * @dsaf_id: dsa fabric id
278 * @pstp_port_type: array
279 */
280 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
281 enum dsaf_stp_port_type port_type)
282 {
283 u32 i;
284
285 for (i = 0; i < DSAF_COMM_CHN; i++) {
286 dsaf_set_dev_field(dsaf_dev,
287 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
288 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
289 port_type);
290 }
291 }
292
293 #define HNS_DSAF_SBM_NUM(dev) \
294 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
295 /**
296 * hns_dsaf_sbm_cfg - config sbm
297 * @dsaf_id: dsa fabric id
298 */
299 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
300 {
301 u32 o_sbm_cfg;
302 u32 i;
303
304 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
305 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
306 DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
307 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
308 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
309 dsaf_write_dev(dsaf_dev,
310 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
311 }
312 }
313
314 /**
315 * hns_dsaf_sbm_cfg_mib_en - config sbm
316 * @dsaf_id: dsa fabric id
317 */
318 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
319 {
320 u32 sbm_cfg_mib_en;
321 u32 i;
322 u32 reg;
323 u32 read_cnt;
324
325 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
326 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
327 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
328 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
329 }
330
331 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
332 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
333 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
334 }
335
336 /* waitint for all sbm enable finished */
337 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
338 read_cnt = 0;
339 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
340 do {
341 udelay(1);
342 sbm_cfg_mib_en = dsaf_get_dev_bit(
343 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
344 read_cnt++;
345 } while (sbm_cfg_mib_en == 0 &&
346 read_cnt < DSAF_CFG_READ_CNT);
347
348 if (sbm_cfg_mib_en == 0) {
349 dev_err(dsaf_dev->dev,
350 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
351 dsaf_dev->ae_dev.name, i);
352 return -ENODEV;
353 }
354 }
355
356 return 0;
357 }
358
359 /**
360 * hns_dsaf_sbm_bp_wl_cfg - config sbm
361 * @dsaf_id: dsa fabric id
362 */
363 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
364 {
365 u32 o_sbm_bp_cfg;
366 u32 reg;
367 u32 i;
368
369 /* XGE */
370 for (i = 0; i < DSAF_XGE_NUM; i++) {
371 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
372 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
373 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
374 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
375 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
376 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
377 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
378 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
379 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
380
381 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
382 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
383 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
384 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
385 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
386 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
387 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
388
389 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
390 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
391 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
392 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
393 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
394 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
395 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
396
397 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
398 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
399 dsaf_set_field(o_sbm_bp_cfg,
400 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
401 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
402 dsaf_set_field(o_sbm_bp_cfg,
403 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
404 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
405 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
406
407 /* for no enable pfc mode */
408 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
409 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
410 dsaf_set_field(o_sbm_bp_cfg,
411 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
412 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
413 dsaf_set_field(o_sbm_bp_cfg,
414 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
415 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
416 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
417 }
418
419 /* PPE */
420 for (i = 0; i < DSAF_COMM_CHN; i++) {
421 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
422 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
423 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
424 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
425 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
426 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
427 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
428 }
429
430 /* RoCEE */
431 for (i = 0; i < DSAF_COMM_CHN; i++) {
432 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
433 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
434 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
435 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
436 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
437 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
438 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
439 }
440 }
441
442 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
443 {
444 u32 o_sbm_bp_cfg;
445 u32 reg;
446 u32 i;
447
448 /* XGE */
449 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
450 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
451 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
452 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
453 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
454 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
455 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
456 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
457 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
458 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
459
460 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
461 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
462 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
463 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
464 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
465 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
466 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
467
468 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
469 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
470 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
471 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
472 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
473 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
474 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
475
476 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
477 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
478 dsaf_set_field(o_sbm_bp_cfg,
479 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
480 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
481 dsaf_set_field(o_sbm_bp_cfg,
482 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
483 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
484 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
485
486 /* for no enable pfc mode */
487 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
488 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
489 dsaf_set_field(o_sbm_bp_cfg,
490 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
491 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
492 dsaf_set_field(o_sbm_bp_cfg,
493 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
494 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
495 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
496 }
497
498 /* PPE */
499 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
500 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
501 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
502 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
503 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
504 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
505 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
506 /* RoCEE */
507 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
508 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
509 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
510 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
511 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
512 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
513 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
514 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
515 }
516 }
517
518 /**
519 * hns_dsaf_voq_bp_all_thrd_cfg - voq
520 * @dsaf_id: dsa fabric id
521 */
522 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
523 {
524 u32 voq_bp_all_thrd;
525 u32 i;
526
527 for (i = 0; i < DSAF_VOQ_NUM; i++) {
528 voq_bp_all_thrd = dsaf_read_dev(
529 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
530 if (i < DSAF_XGE_NUM) {
531 dsaf_set_field(voq_bp_all_thrd,
532 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
533 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
534 dsaf_set_field(voq_bp_all_thrd,
535 DSAF_VOQ_BP_ALL_UPTHRD_M,
536 DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
537 } else {
538 dsaf_set_field(voq_bp_all_thrd,
539 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
540 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
541 dsaf_set_field(voq_bp_all_thrd,
542 DSAF_VOQ_BP_ALL_UPTHRD_M,
543 DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
544 }
545 dsaf_write_dev(
546 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
547 voq_bp_all_thrd);
548 }
549 }
550
551 /**
552 * hns_dsaf_tbl_tcam_data_cfg - tbl
553 * @dsaf_id: dsa fabric id
554 * @ptbl_tcam_data: addr
555 */
556 static void hns_dsaf_tbl_tcam_data_cfg(
557 struct dsaf_device *dsaf_dev,
558 struct dsaf_tbl_tcam_data *ptbl_tcam_data)
559 {
560 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
561 ptbl_tcam_data->tbl_tcam_data_low);
562 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
563 ptbl_tcam_data->tbl_tcam_data_high);
564 }
565
566 /**
567 * dsaf_tbl_tcam_mcast_cfg - tbl
568 * @dsaf_id: dsa fabric id
569 * @ptbl_tcam_mcast: addr
570 */
571 static void hns_dsaf_tbl_tcam_mcast_cfg(
572 struct dsaf_device *dsaf_dev,
573 struct dsaf_tbl_tcam_mcast_cfg *mcast)
574 {
575 u32 mcast_cfg4;
576
577 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
578 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
579 mcast->tbl_mcast_item_vld);
580 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
581 mcast->tbl_mcast_old_en);
582 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
583 DSAF_TBL_MCAST_CFG4_VM128_112_S,
584 mcast->tbl_mcast_port_msk[4]);
585 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
586
587 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
588 mcast->tbl_mcast_port_msk[3]);
589
590 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
591 mcast->tbl_mcast_port_msk[2]);
592
593 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
594 mcast->tbl_mcast_port_msk[1]);
595
596 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
597 mcast->tbl_mcast_port_msk[0]);
598 }
599
600 /**
601 * hns_dsaf_tbl_tcam_ucast_cfg - tbl
602 * @dsaf_id: dsa fabric id
603 * @ptbl_tcam_ucast: addr
604 */
605 static void hns_dsaf_tbl_tcam_ucast_cfg(
606 struct dsaf_device *dsaf_dev,
607 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
608 {
609 u32 ucast_cfg1;
610
611 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
612 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
613 tbl_tcam_ucast->tbl_ucast_mac_discard);
614 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
615 tbl_tcam_ucast->tbl_ucast_item_vld);
616 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
617 tbl_tcam_ucast->tbl_ucast_old_en);
618 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
619 tbl_tcam_ucast->tbl_ucast_dvc);
620 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
621 DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
622 tbl_tcam_ucast->tbl_ucast_out_port);
623 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
624 }
625
626 /**
627 * hns_dsaf_tbl_line_cfg - tbl
628 * @dsaf_id: dsa fabric id
629 * @ptbl_lin: addr
630 */
631 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
632 struct dsaf_tbl_line_cfg *tbl_lin)
633 {
634 u32 tbl_line;
635
636 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
637 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
638 tbl_lin->tbl_line_mac_discard);
639 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
640 tbl_lin->tbl_line_dvc);
641 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
642 DSAF_TBL_LINE_CFG_OUT_PORT_S,
643 tbl_lin->tbl_line_out_port);
644 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
645 }
646
647 /**
648 * hns_dsaf_tbl_tcam_mcast_pul - tbl
649 * @dsaf_id: dsa fabric id
650 */
651 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
652 {
653 u32 o_tbl_pul;
654
655 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
656 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
657 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
658 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
659 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
660 }
661
662 /**
663 * hns_dsaf_tbl_line_pul - tbl
664 * @dsaf_id: dsa fabric id
665 */
666 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
667 {
668 u32 tbl_pul;
669
670 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
671 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
672 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
673 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
674 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
675 }
676
677 /**
678 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
679 * @dsaf_id: dsa fabric id
680 */
681 static void hns_dsaf_tbl_tcam_data_mcast_pul(
682 struct dsaf_device *dsaf_dev)
683 {
684 u32 o_tbl_pul;
685
686 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
687 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
688 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
689 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
690 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
691 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
692 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
693 }
694
695 /**
696 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
697 * @dsaf_id: dsa fabric id
698 */
699 static void hns_dsaf_tbl_tcam_data_ucast_pul(
700 struct dsaf_device *dsaf_dev)
701 {
702 u32 o_tbl_pul;
703
704 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
705 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
706 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
707 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
708 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
709 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
710 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
711 }
712
713 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
714 {
715 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_MIX_MODE_S, !!en);
716 }
717
718 void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en)
719 {
720 if (AE_IS_VER1(dsaf_dev->dsaf_ver) ||
721 dsaf_dev->mac_cb[mac_id].mac_type == HNAE_PORT_DEBUG)
722 return;
723
724 dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
725 DSAFV2_SERDES_LBK_EN_B, !!en);
726 }
727
728 /**
729 * hns_dsaf_tbl_stat_en - tbl
730 * @dsaf_id: dsa fabric id
731 * @ptbl_stat_en: addr
732 */
733 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
734 {
735 u32 o_tbl_ctrl;
736
737 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
738 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
739 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
740 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
741 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
742 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
743 }
744
745 /**
746 * hns_dsaf_rocee_bp_en - rocee back press enable
747 * @dsaf_id: dsa fabric id
748 */
749 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
750 {
751 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
752 DSAF_FC_XGE_TX_PAUSE_S, 1);
753 }
754
755 /* set msk for dsaf exception irq*/
756 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
757 u32 chnn_num, u32 mask_set)
758 {
759 dsaf_write_dev(dsaf_dev,
760 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
761 }
762
763 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
764 u32 chnn_num, u32 msk_set)
765 {
766 dsaf_write_dev(dsaf_dev,
767 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
768 }
769
770 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
771 u32 chnn, u32 msk_set)
772 {
773 dsaf_write_dev(dsaf_dev,
774 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
775 }
776
777 static void
778 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
779 {
780 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
781 }
782
783 /* clr dsaf exception irq*/
784 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
785 u32 chnn_num, u32 int_src)
786 {
787 dsaf_write_dev(dsaf_dev,
788 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
789 }
790
791 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
792 u32 chnn, u32 int_src)
793 {
794 dsaf_write_dev(dsaf_dev,
795 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
796 }
797
798 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
799 u32 chnn, u32 int_src)
800 {
801 dsaf_write_dev(dsaf_dev,
802 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
803 }
804
805 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
806 u32 int_src)
807 {
808 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
809 }
810
811 /**
812 * hns_dsaf_single_line_tbl_cfg - INT
813 * @dsaf_id: dsa fabric id
814 * @address:
815 * @ptbl_line:
816 */
817 static void hns_dsaf_single_line_tbl_cfg(
818 struct dsaf_device *dsaf_dev,
819 u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
820 {
821 /*Write Addr*/
822 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
823
824 /*Write Line*/
825 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
826
827 /*Write Plus*/
828 hns_dsaf_tbl_line_pul(dsaf_dev);
829 }
830
831 /**
832 * hns_dsaf_tcam_uc_cfg - INT
833 * @dsaf_id: dsa fabric id
834 * @address,
835 * @ptbl_tcam_data,
836 */
837 static void hns_dsaf_tcam_uc_cfg(
838 struct dsaf_device *dsaf_dev, u32 address,
839 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
840 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
841 {
842 /*Write Addr*/
843 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
844 /*Write Tcam Data*/
845 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
846 /*Write Tcam Ucast*/
847 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
848 /*Write Plus*/
849 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
850 }
851
852 /**
853 * hns_dsaf_tcam_mc_cfg - INT
854 * @dsaf_id: dsa fabric id
855 * @address,
856 * @ptbl_tcam_data,
857 * @ptbl_tcam_mcast,
858 */
859 static void hns_dsaf_tcam_mc_cfg(
860 struct dsaf_device *dsaf_dev, u32 address,
861 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
862 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
863 {
864 /*Write Addr*/
865 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
866 /*Write Tcam Data*/
867 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
868 /*Write Tcam Mcast*/
869 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
870 /*Write Plus*/
871 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
872 }
873
874 /**
875 * hns_dsaf_tcam_mc_invld - INT
876 * @dsaf_id: dsa fabric id
877 * @address
878 */
879 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
880 {
881 /*Write Addr*/
882 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
883
884 /*write tcam mcast*/
885 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
886 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
887 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
888 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
889 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
890
891 /*Write Plus*/
892 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
893 }
894
895 /**
896 * hns_dsaf_tcam_uc_get - INT
897 * @dsaf_id: dsa fabric id
898 * @address
899 * @ptbl_tcam_data
900 * @ptbl_tcam_ucast
901 */
902 static void hns_dsaf_tcam_uc_get(
903 struct dsaf_device *dsaf_dev, u32 address,
904 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
905 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
906 {
907 u32 tcam_read_data0;
908 u32 tcam_read_data4;
909
910 /*Write Addr*/
911 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
912
913 /*read tcam item puls*/
914 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
915
916 /*read tcam data*/
917 ptbl_tcam_data->tbl_tcam_data_high
918 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
919 ptbl_tcam_data->tbl_tcam_data_low
920 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
921
922 /*read tcam mcast*/
923 tcam_read_data0 = dsaf_read_dev(dsaf_dev,
924 DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
925 tcam_read_data4 = dsaf_read_dev(dsaf_dev,
926 DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
927
928 ptbl_tcam_ucast->tbl_ucast_item_vld
929 = dsaf_get_bit(tcam_read_data4,
930 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
931 ptbl_tcam_ucast->tbl_ucast_old_en
932 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
933 ptbl_tcam_ucast->tbl_ucast_mac_discard
934 = dsaf_get_bit(tcam_read_data0,
935 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
936 ptbl_tcam_ucast->tbl_ucast_out_port
937 = dsaf_get_field(tcam_read_data0,
938 DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
939 DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
940 ptbl_tcam_ucast->tbl_ucast_dvc
941 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
942 }
943
944 /**
945 * hns_dsaf_tcam_mc_get - INT
946 * @dsaf_id: dsa fabric id
947 * @address
948 * @ptbl_tcam_data
949 * @ptbl_tcam_ucast
950 */
951 static void hns_dsaf_tcam_mc_get(
952 struct dsaf_device *dsaf_dev, u32 address,
953 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
954 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
955 {
956 u32 data_tmp;
957
958 /*Write Addr*/
959 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
960
961 /*read tcam item puls*/
962 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
963
964 /*read tcam data*/
965 ptbl_tcam_data->tbl_tcam_data_high =
966 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
967 ptbl_tcam_data->tbl_tcam_data_low =
968 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
969
970 /*read tcam mcast*/
971 ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
972 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
973 ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
974 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
975 ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
976 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
977 ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
978 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
979
980 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
981 ptbl_tcam_mcast->tbl_mcast_item_vld =
982 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
983 ptbl_tcam_mcast->tbl_mcast_old_en =
984 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
985 ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
986 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
987 DSAF_TBL_MCAST_CFG4_VM128_112_S);
988 }
989
990 /**
991 * hns_dsaf_tbl_line_init - INT
992 * @dsaf_id: dsa fabric id
993 */
994 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
995 {
996 u32 i;
997 /* defaultly set all lineal mac table entry resulting discard */
998 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
999
1000 for (i = 0; i < DSAF_LINE_SUM; i++)
1001 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
1002 }
1003
1004 /**
1005 * hns_dsaf_tbl_tcam_init - INT
1006 * @dsaf_id: dsa fabric id
1007 */
1008 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
1009 {
1010 u32 i;
1011 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
1012 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
1013
1014 /*tcam tbl*/
1015 for (i = 0; i < DSAF_TCAM_SUM; i++)
1016 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
1017 }
1018
1019 /**
1020 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1021 * @mac_cb: mac contrl block
1022 */
1023 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
1024 int mac_id, int en)
1025 {
1026 if (!en)
1027 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, 0);
1028 else
1029 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, 0xff);
1030 }
1031
1032 /**
1033 * hns_dsaf_tbl_tcam_init - INT
1034 * @dsaf_id: dsa fabric id
1035 * @dsaf_mode
1036 */
1037 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1038 {
1039 u32 i;
1040 u32 o_dsaf_cfg;
1041
1042 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1043 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1044 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1045 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1046 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1047 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1048 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1049
1050 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1051 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1052
1053 /* set 22 queue per tx ppe engine, only used in switch mode */
1054 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1055
1056 /* set promisc def queue id */
1057 hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1058
1059 /* set inner loopback queue id */
1060 hns_dsaf_inner_qid_cfg(dsaf_dev);
1061
1062 /* in non switch mode, set all port to access mode */
1063 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1064
1065 /*set dsaf pfc to 0 for parseing rx pause*/
1066 for (i = 0; i < DSAF_COMM_CHN; i++)
1067 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
1068
1069 /*msk and clr exception irqs */
1070 for (i = 0; i < DSAF_COMM_CHN; i++) {
1071 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1072 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1073 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1074
1075 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1076 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1077 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1078 }
1079 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1080 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1081 }
1082
1083 /**
1084 * hns_dsaf_inode_init - INT
1085 * @dsaf_id: dsa fabric id
1086 */
1087 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1088 {
1089 u32 reg;
1090 u32 tc_cfg;
1091 u32 i;
1092
1093 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1094 tc_cfg = HNS_DSAF_I4TC_CFG;
1095 else
1096 tc_cfg = HNS_DSAF_I8TC_CFG;
1097
1098 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1099 for (i = 0; i < DSAF_INODE_NUM; i++) {
1100 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1101 dsaf_set_dev_field(dsaf_dev, reg,
1102 DSAF_INODE_IN_PORT_NUM_M,
1103 DSAF_INODE_IN_PORT_NUM_S,
1104 i % DSAF_XGE_NUM);
1105 }
1106 } else {
1107 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1108 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1109 dsaf_set_dev_field(dsaf_dev, reg,
1110 DSAF_INODE_IN_PORT_NUM_M,
1111 DSAF_INODE_IN_PORT_NUM_S, 0);
1112 dsaf_set_dev_field(dsaf_dev, reg,
1113 DSAFV2_INODE_IN_PORT1_NUM_M,
1114 DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1115 dsaf_set_dev_field(dsaf_dev, reg,
1116 DSAFV2_INODE_IN_PORT2_NUM_M,
1117 DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1118 dsaf_set_dev_field(dsaf_dev, reg,
1119 DSAFV2_INODE_IN_PORT3_NUM_M,
1120 DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1121 dsaf_set_dev_field(dsaf_dev, reg,
1122 DSAFV2_INODE_IN_PORT4_NUM_M,
1123 DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1124 dsaf_set_dev_field(dsaf_dev, reg,
1125 DSAFV2_INODE_IN_PORT5_NUM_M,
1126 DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1127 }
1128 }
1129 for (i = 0; i < DSAF_INODE_NUM; i++) {
1130 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1131 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1132 }
1133 }
1134
1135 /**
1136 * hns_dsaf_sbm_init - INT
1137 * @dsaf_id: dsa fabric id
1138 */
1139 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1140 {
1141 u32 flag;
1142 u32 finish_msk;
1143 u32 cnt = 0;
1144 int ret;
1145
1146 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1147 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1148 finish_msk = DSAF_SRAM_INIT_OVER_M;
1149 } else {
1150 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1151 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1152 }
1153
1154 /* enable sbm chanel, disable sbm chanel shcut function*/
1155 hns_dsaf_sbm_cfg(dsaf_dev);
1156
1157 /* enable sbm mib */
1158 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1159 if (ret) {
1160 dev_err(dsaf_dev->dev,
1161 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1162 dsaf_dev->ae_dev.name, ret);
1163 return ret;
1164 }
1165
1166 /* enable sbm initial link sram */
1167 hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1168
1169 do {
1170 usleep_range(200, 210);/*udelay(200);*/
1171 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1172 finish_msk, DSAF_SRAM_INIT_OVER_S);
1173 cnt++;
1174 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1175 cnt < DSAF_CFG_READ_CNT);
1176
1177 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
1178 dev_err(dsaf_dev->dev,
1179 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1180 dsaf_dev->ae_dev.name, flag, cnt);
1181 return -ENODEV;
1182 }
1183
1184 hns_dsaf_rocee_bp_en(dsaf_dev);
1185
1186 return 0;
1187 }
1188
1189 /**
1190 * hns_dsaf_tbl_init - INT
1191 * @dsaf_id: dsa fabric id
1192 */
1193 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1194 {
1195 hns_dsaf_tbl_stat_en(dsaf_dev);
1196
1197 hns_dsaf_tbl_tcam_init(dsaf_dev);
1198 hns_dsaf_tbl_line_init(dsaf_dev);
1199 }
1200
1201 /**
1202 * hns_dsaf_voq_init - INT
1203 * @dsaf_id: dsa fabric id
1204 */
1205 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1206 {
1207 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1208 }
1209
1210 /**
1211 * hns_dsaf_init_hw - init dsa fabric hardware
1212 * @dsaf_dev: dsa fabric device struct pointer
1213 */
1214 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1215 {
1216 int ret;
1217
1218 dev_dbg(dsaf_dev->dev,
1219 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1220
1221 hns_dsaf_rst(dsaf_dev, 0);
1222 mdelay(10);
1223 hns_dsaf_rst(dsaf_dev, 1);
1224
1225 hns_dsaf_comm_init(dsaf_dev);
1226
1227 /*init XBAR_INODE*/
1228 hns_dsaf_inode_init(dsaf_dev);
1229
1230 /*init SBM*/
1231 ret = hns_dsaf_sbm_init(dsaf_dev);
1232 if (ret)
1233 return ret;
1234
1235 /*init TBL*/
1236 hns_dsaf_tbl_init(dsaf_dev);
1237
1238 /*init VOQ*/
1239 hns_dsaf_voq_init(dsaf_dev);
1240
1241 return 0;
1242 }
1243
1244 /**
1245 * hns_dsaf_remove_hw - uninit dsa fabric hardware
1246 * @dsaf_dev: dsa fabric device struct pointer
1247 */
1248 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1249 {
1250 /*reset*/
1251 hns_dsaf_rst(dsaf_dev, 0);
1252 }
1253
1254 /**
1255 * hns_dsaf_init - init dsa fabric
1256 * @dsaf_dev: dsa fabric device struct pointer
1257 * retuen 0 - success , negative --fail
1258 */
1259 static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1260 {
1261 struct dsaf_drv_priv *priv =
1262 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1263 u32 i;
1264 int ret;
1265
1266 ret = hns_dsaf_init_hw(dsaf_dev);
1267 if (ret)
1268 return ret;
1269
1270 /* malloc mem for tcam mac key(vlan+mac) */
1271 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1272 * DSAF_TCAM_SUM);
1273 if (!priv->soft_mac_tbl) {
1274 ret = -ENOMEM;
1275 goto remove_hw;
1276 }
1277
1278 /*all entry invall */
1279 for (i = 0; i < DSAF_TCAM_SUM; i++)
1280 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1281
1282 return 0;
1283
1284 remove_hw:
1285 hns_dsaf_remove_hw(dsaf_dev);
1286 return ret;
1287 }
1288
1289 /**
1290 * hns_dsaf_free - free dsa fabric
1291 * @dsaf_dev: dsa fabric device struct pointer
1292 */
1293 static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1294 {
1295 struct dsaf_drv_priv *priv =
1296 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1297
1298 hns_dsaf_remove_hw(dsaf_dev);
1299
1300 /* free all mac mem */
1301 vfree(priv->soft_mac_tbl);
1302 priv->soft_mac_tbl = NULL;
1303 }
1304
1305 /**
1306 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1307 * @dsaf_dev: dsa fabric device struct pointer
1308 * @mac_key: mac entry struct pointer
1309 */
1310 static u16 hns_dsaf_find_soft_mac_entry(
1311 struct dsaf_device *dsaf_dev,
1312 struct dsaf_drv_tbl_tcam_key *mac_key)
1313 {
1314 struct dsaf_drv_priv *priv =
1315 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1316 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1317 u32 i;
1318
1319 soft_mac_entry = priv->soft_mac_tbl;
1320 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1321 /* invall tab entry */
1322 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1323 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1324 (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1325 /* return find result --soft index */
1326 return soft_mac_entry->index;
1327
1328 soft_mac_entry++;
1329 }
1330 return DSAF_INVALID_ENTRY_IDX;
1331 }
1332
1333 /**
1334 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1335 * @dsaf_dev: dsa fabric device struct pointer
1336 */
1337 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1338 {
1339 struct dsaf_drv_priv *priv =
1340 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1341 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1342 u32 i;
1343
1344 soft_mac_entry = priv->soft_mac_tbl;
1345 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1346 /* inv all entry */
1347 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1348 /* return find result --soft index */
1349 return i;
1350
1351 soft_mac_entry++;
1352 }
1353 return DSAF_INVALID_ENTRY_IDX;
1354 }
1355
1356 /**
1357 * hns_dsaf_set_mac_key - set mac key
1358 * @dsaf_dev: dsa fabric device struct pointer
1359 * @mac_key: tcam key pointer
1360 * @vlan_id: vlan id
1361 * @in_port_num: input port num
1362 * @addr: mac addr
1363 */
1364 static void hns_dsaf_set_mac_key(
1365 struct dsaf_device *dsaf_dev,
1366 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1367 u8 *addr)
1368 {
1369 u8 port;
1370
1371 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1372 /*DSAF mode : in port id fixed 0*/
1373 port = 0;
1374 else
1375 /*non-dsaf mode*/
1376 port = in_port_num;
1377
1378 mac_key->high.bits.mac_0 = addr[0];
1379 mac_key->high.bits.mac_1 = addr[1];
1380 mac_key->high.bits.mac_2 = addr[2];
1381 mac_key->high.bits.mac_3 = addr[3];
1382 mac_key->low.bits.mac_4 = addr[4];
1383 mac_key->low.bits.mac_5 = addr[5];
1384 mac_key->low.bits.vlan = vlan_id;
1385 mac_key->low.bits.port = port;
1386 }
1387
1388 /**
1389 * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1390 * @dsaf_dev: dsa fabric device struct pointer
1391 * @mac_entry: uc-mac entry
1392 */
1393 int hns_dsaf_set_mac_uc_entry(
1394 struct dsaf_device *dsaf_dev,
1395 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1396 {
1397 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1398 struct dsaf_drv_tbl_tcam_key mac_key;
1399 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1400 struct dsaf_drv_priv *priv =
1401 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1402 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1403
1404 /* mac addr check */
1405 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1406 MAC_IS_BROADCAST(mac_entry->addr) ||
1407 MAC_IS_MULTICAST(mac_entry->addr)) {
1408 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1409 dsaf_dev->ae_dev.name, mac_entry->addr);
1410 return -EINVAL;
1411 }
1412
1413 /* config key */
1414 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1415 mac_entry->in_port_num, mac_entry->addr);
1416
1417 /* entry ie exist? */
1418 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1419 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1420 /*if has not inv entry,find a empty entry */
1421 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1422 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1423 /* has not empty,return error */
1424 dev_err(dsaf_dev->dev,
1425 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1426 dsaf_dev->ae_dev.name,
1427 mac_key.high.val, mac_key.low.val);
1428 return -EINVAL;
1429 }
1430 }
1431
1432 dev_dbg(dsaf_dev->dev,
1433 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1434 dsaf_dev->ae_dev.name, mac_key.high.val,
1435 mac_key.low.val, entry_index);
1436
1437 /* config hardware entry */
1438 mac_data.tbl_ucast_item_vld = 1;
1439 mac_data.tbl_ucast_mac_discard = 0;
1440 mac_data.tbl_ucast_old_en = 0;
1441 /* default config dvc to 0 */
1442 mac_data.tbl_ucast_dvc = 0;
1443 mac_data.tbl_ucast_out_port = mac_entry->port_num;
1444 hns_dsaf_tcam_uc_cfg(
1445 dsaf_dev, entry_index,
1446 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1447
1448 /* config software entry */
1449 soft_mac_entry += entry_index;
1450 soft_mac_entry->index = entry_index;
1451 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1452 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1453
1454 return 0;
1455 }
1456
1457 /**
1458 * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1459 * @dsaf_dev: dsa fabric device struct pointer
1460 * @mac_entry: mc-mac entry
1461 */
1462 int hns_dsaf_set_mac_mc_entry(
1463 struct dsaf_device *dsaf_dev,
1464 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1465 {
1466 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1467 struct dsaf_drv_tbl_tcam_key mac_key;
1468 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1469 struct dsaf_drv_priv *priv =
1470 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1471 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1472 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1473
1474 /* mac addr check */
1475 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1476 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1477 dsaf_dev->ae_dev.name, mac_entry->addr);
1478 return -EINVAL;
1479 }
1480
1481 /*config key */
1482 hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1483 mac_entry->in_vlan_id,
1484 mac_entry->in_port_num, mac_entry->addr);
1485
1486 /* entry ie exist? */
1487 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1488 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1489 /*if hasnot, find enpty entry*/
1490 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1491 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1492 /*if hasnot empty, error*/
1493 dev_err(dsaf_dev->dev,
1494 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1495 dsaf_dev->ae_dev.name,
1496 mac_key.high.val, mac_key.low.val);
1497 return -EINVAL;
1498 }
1499
1500 /* config hardware entry */
1501 memset(mac_data.tbl_mcast_port_msk,
1502 0, sizeof(mac_data.tbl_mcast_port_msk));
1503 } else {
1504 /* config hardware entry */
1505 hns_dsaf_tcam_mc_get(
1506 dsaf_dev, entry_index,
1507 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1508 }
1509 mac_data.tbl_mcast_old_en = 0;
1510 mac_data.tbl_mcast_item_vld = 1;
1511 dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1512 0x3F, 0, mac_entry->port_mask[0]);
1513
1514 dev_dbg(dsaf_dev->dev,
1515 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1516 dsaf_dev->ae_dev.name, mac_key.high.val,
1517 mac_key.low.val, entry_index);
1518
1519 hns_dsaf_tcam_mc_cfg(
1520 dsaf_dev, entry_index,
1521 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1522
1523 /* config software entry */
1524 soft_mac_entry += entry_index;
1525 soft_mac_entry->index = entry_index;
1526 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1527 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1528
1529 return 0;
1530 }
1531
1532 /**
1533 * hns_dsaf_add_mac_mc_port - add mac mc-port
1534 * @dsaf_dev: dsa fabric device struct pointer
1535 * @mac_entry: mc-mac entry
1536 */
1537 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1538 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1539 {
1540 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1541 struct dsaf_drv_tbl_tcam_key mac_key;
1542 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1543 struct dsaf_drv_priv *priv =
1544 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1545 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1546 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1547 int mskid;
1548
1549 /*chechk mac addr */
1550 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1551 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1552 mac_entry->addr);
1553 return -EINVAL;
1554 }
1555
1556 /*config key */
1557 hns_dsaf_set_mac_key(
1558 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1559 mac_entry->in_port_num, mac_entry->addr);
1560
1561 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1562
1563 /*check exist? */
1564 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1565 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1566 /*if hasnot , find a empty*/
1567 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1568 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1569 /*if hasnot empty, error*/
1570 dev_err(dsaf_dev->dev,
1571 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1572 dsaf_dev->ae_dev.name, mac_key.high.val,
1573 mac_key.low.val);
1574 return -EINVAL;
1575 }
1576 } else {
1577 /*if exist, add in */
1578 hns_dsaf_tcam_mc_get(
1579 dsaf_dev, entry_index,
1580 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1581 }
1582 /* config hardware entry */
1583 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1584 mskid = mac_entry->port_num;
1585 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1586 mskid = mac_entry->port_num -
1587 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1588 } else {
1589 dev_err(dsaf_dev->dev,
1590 "%s,pnum(%d)error,key(%#x:%#x)\n",
1591 dsaf_dev->ae_dev.name, mac_entry->port_num,
1592 mac_key.high.val, mac_key.low.val);
1593 return -EINVAL;
1594 }
1595 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1596 mac_data.tbl_mcast_old_en = 0;
1597 mac_data.tbl_mcast_item_vld = 1;
1598
1599 dev_dbg(dsaf_dev->dev,
1600 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1601 dsaf_dev->ae_dev.name, mac_key.high.val,
1602 mac_key.low.val, entry_index);
1603
1604 hns_dsaf_tcam_mc_cfg(
1605 dsaf_dev, entry_index,
1606 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1607
1608 /*config software entry */
1609 soft_mac_entry += entry_index;
1610 soft_mac_entry->index = entry_index;
1611 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1612 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1613
1614 return 0;
1615 }
1616
1617 /**
1618 * hns_dsaf_del_mac_entry - del mac mc-port
1619 * @dsaf_dev: dsa fabric device struct pointer
1620 * @vlan_id: vlian id
1621 * @in_port_num: input port num
1622 * @addr : mac addr
1623 */
1624 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1625 u8 in_port_num, u8 *addr)
1626 {
1627 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1628 struct dsaf_drv_tbl_tcam_key mac_key;
1629 struct dsaf_drv_priv *priv =
1630 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1631 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1632
1633 /*check mac addr */
1634 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
1635 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1636 addr);
1637 return -EINVAL;
1638 }
1639
1640 /*config key */
1641 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1642
1643 /*exist ?*/
1644 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1645 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1646 /*not exist, error */
1647 dev_err(dsaf_dev->dev,
1648 "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1649 dsaf_dev->ae_dev.name,
1650 mac_key.high.val, mac_key.low.val);
1651 return -EINVAL;
1652 }
1653 dev_dbg(dsaf_dev->dev,
1654 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1655 dsaf_dev->ae_dev.name, mac_key.high.val,
1656 mac_key.low.val, entry_index);
1657
1658 /*do del opt*/
1659 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1660
1661 /*del soft emtry */
1662 soft_mac_entry += entry_index;
1663 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1664
1665 return 0;
1666 }
1667
1668 /**
1669 * hns_dsaf_del_mac_mc_port - del mac mc- port
1670 * @dsaf_dev: dsa fabric device struct pointer
1671 * @mac_entry: mac entry
1672 */
1673 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1674 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1675 {
1676 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1677 struct dsaf_drv_tbl_tcam_key mac_key;
1678 struct dsaf_drv_priv *priv =
1679 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1680 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1681 u16 vlan_id;
1682 u8 in_port_num;
1683 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1684 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1685 int mskid;
1686 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1687
1688 if (!(void *)mac_entry) {
1689 dev_err(dsaf_dev->dev,
1690 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1691 return -EINVAL;
1692 }
1693
1694 /*get key info*/
1695 vlan_id = mac_entry->in_vlan_id;
1696 in_port_num = mac_entry->in_port_num;
1697
1698 /*check mac addr */
1699 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1700 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1701 mac_entry->addr);
1702 return -EINVAL;
1703 }
1704
1705 /*config key */
1706 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1707 mac_entry->addr);
1708
1709 /*check is exist? */
1710 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1711 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1712 /*find none */
1713 dev_err(dsaf_dev->dev,
1714 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1715 dsaf_dev->ae_dev.name,
1716 mac_key.high.val, mac_key.low.val);
1717 return -EINVAL;
1718 }
1719
1720 dev_dbg(dsaf_dev->dev,
1721 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1722 dsaf_dev->ae_dev.name, mac_key.high.val,
1723 mac_key.low.val, entry_index);
1724
1725 /*read entry*/
1726 hns_dsaf_tcam_mc_get(
1727 dsaf_dev, entry_index,
1728 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1729
1730 /*del the port*/
1731 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1732 mskid = mac_entry->port_num;
1733 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1734 mskid = mac_entry->port_num -
1735 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1736 } else {
1737 dev_err(dsaf_dev->dev,
1738 "%s,pnum(%d)error,key(%#x:%#x)\n",
1739 dsaf_dev->ae_dev.name, mac_entry->port_num,
1740 mac_key.high.val, mac_key.low.val);
1741 return -EINVAL;
1742 }
1743 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1744
1745 /*check non port, do del entry */
1746 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1747 sizeof(mac_data.tbl_mcast_port_msk))) {
1748 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1749
1750 /* del soft entry */
1751 soft_mac_entry += entry_index;
1752 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1753 } else { /* not zer, just del port, updata*/
1754 hns_dsaf_tcam_mc_cfg(
1755 dsaf_dev, entry_index,
1756 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1757 }
1758
1759 return 0;
1760 }
1761
1762 /**
1763 * hns_dsaf_get_mac_uc_entry - get mac uc entry
1764 * @dsaf_dev: dsa fabric device struct pointer
1765 * @mac_entry: mac entry
1766 */
1767 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1768 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1769 {
1770 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1771 struct dsaf_drv_tbl_tcam_key mac_key;
1772
1773 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1774
1775 /* check macaddr */
1776 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1777 MAC_IS_BROADCAST(mac_entry->addr)) {
1778 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1779 mac_entry->addr);
1780 return -EINVAL;
1781 }
1782
1783 /*config key */
1784 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1785 mac_entry->in_port_num, mac_entry->addr);
1786
1787 /*check exist? */
1788 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1789 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1790 /*find none, error */
1791 dev_err(dsaf_dev->dev,
1792 "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1793 dsaf_dev->ae_dev.name,
1794 mac_key.high.val, mac_key.low.val);
1795 return -EINVAL;
1796 }
1797 dev_dbg(dsaf_dev->dev,
1798 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1799 dsaf_dev->ae_dev.name, mac_key.high.val,
1800 mac_key.low.val, entry_index);
1801
1802 /*read entry*/
1803 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1804 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1805 mac_entry->port_num = mac_data.tbl_ucast_out_port;
1806
1807 return 0;
1808 }
1809
1810 /**
1811 * hns_dsaf_get_mac_mc_entry - get mac mc entry
1812 * @dsaf_dev: dsa fabric device struct pointer
1813 * @mac_entry: mac entry
1814 */
1815 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1816 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1817 {
1818 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1819 struct dsaf_drv_tbl_tcam_key mac_key;
1820
1821 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1822
1823 /*check mac addr */
1824 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1825 MAC_IS_BROADCAST(mac_entry->addr)) {
1826 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1827 mac_entry->addr);
1828 return -EINVAL;
1829 }
1830
1831 /*config key */
1832 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1833 mac_entry->in_port_num, mac_entry->addr);
1834
1835 /*check exist? */
1836 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1837 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1838 /* find none, error */
1839 dev_err(dsaf_dev->dev,
1840 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1841 dsaf_dev->ae_dev.name, mac_key.high.val,
1842 mac_key.low.val);
1843 return -EINVAL;
1844 }
1845 dev_dbg(dsaf_dev->dev,
1846 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1847 dsaf_dev->ae_dev.name, mac_key.high.val,
1848 mac_key.low.val, entry_index);
1849
1850 /*read entry */
1851 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1852 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1853
1854 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1855 return 0;
1856 }
1857
1858 /**
1859 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1860 * @dsaf_dev: dsa fabric device struct pointer
1861 * @entry_index: tab entry index
1862 * @mac_entry: mac entry
1863 */
1864 int hns_dsaf_get_mac_entry_by_index(
1865 struct dsaf_device *dsaf_dev,
1866 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1867 {
1868 struct dsaf_drv_tbl_tcam_key mac_key;
1869
1870 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1871 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1872 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1873
1874 if (entry_index >= DSAF_TCAM_SUM) {
1875 /* find none, del error */
1876 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1877 dsaf_dev->ae_dev.name);
1878 return -EINVAL;
1879 }
1880
1881 /* mc entry, do read opt */
1882 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1883 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1884
1885 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1886
1887 /***get mac addr*/
1888 mac_addr[0] = mac_key.high.bits.mac_0;
1889 mac_addr[1] = mac_key.high.bits.mac_1;
1890 mac_addr[2] = mac_key.high.bits.mac_2;
1891 mac_addr[3] = mac_key.high.bits.mac_3;
1892 mac_addr[4] = mac_key.low.bits.mac_4;
1893 mac_addr[5] = mac_key.low.bits.mac_5;
1894 /**is mc or uc*/
1895 if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
1896 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
1897 /**mc donot do*/
1898 } else {
1899 /*is not mc, just uc... */
1900 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1901 (struct dsaf_tbl_tcam_data *)&mac_key,
1902 &mac_uc_data);
1903 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
1904 }
1905
1906 return 0;
1907 }
1908
1909 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
1910 size_t sizeof_priv)
1911 {
1912 struct dsaf_device *dsaf_dev;
1913
1914 dsaf_dev = devm_kzalloc(dev,
1915 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
1916 if (unlikely(!dsaf_dev)) {
1917 dsaf_dev = ERR_PTR(-ENOMEM);
1918 } else {
1919 dsaf_dev->dev = dev;
1920 dev_set_drvdata(dev, dsaf_dev);
1921 }
1922
1923 return dsaf_dev;
1924 }
1925
1926 /**
1927 * hns_dsaf_free_dev - free dev mem
1928 * @dev: struct device pointer
1929 */
1930 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
1931 {
1932 (void)dev_set_drvdata(dsaf_dev->dev, NULL);
1933 }
1934
1935 /**
1936 * dsaf_pfc_unit_cnt - set pfc unit count
1937 * @dsaf_id: dsa fabric id
1938 * @pport_rate: value array
1939 * @pdsaf_pfc_unit_cnt: value array
1940 */
1941 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id,
1942 enum dsaf_port_rate_mode rate)
1943 {
1944 u32 unit_cnt;
1945
1946 switch (rate) {
1947 case DSAF_PORT_RATE_10000:
1948 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
1949 break;
1950 case DSAF_PORT_RATE_1000:
1951 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
1952 break;
1953 case DSAF_PORT_RATE_2500:
1954 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
1955 break;
1956 default:
1957 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
1958 }
1959
1960 dsaf_set_dev_field(dsaf_dev,
1961 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
1962 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
1963 unit_cnt);
1964 }
1965
1966 /**
1967 * dsaf_port_work_rate_cfg - fifo
1968 * @dsaf_id: dsa fabric id
1969 * @xge_ge_work_mode
1970 */
1971 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
1972 enum dsaf_port_rate_mode rate_mode)
1973 {
1974 u32 port_work_mode;
1975
1976 port_work_mode = dsaf_read_dev(
1977 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
1978
1979 if (rate_mode == DSAF_PORT_RATE_10000)
1980 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
1981 else
1982 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
1983
1984 dsaf_write_dev(dsaf_dev,
1985 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
1986 port_work_mode);
1987
1988 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
1989 }
1990
1991 /**
1992 * hns_dsaf_fix_mac_mode - dsaf modify mac mode
1993 * @mac_cb: mac contrl block
1994 */
1995 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
1996 {
1997 enum dsaf_port_rate_mode mode;
1998 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
1999 int mac_id = mac_cb->mac_id;
2000
2001 if (mac_cb->mac_type != HNAE_PORT_SERVICE)
2002 return;
2003 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
2004 mode = DSAF_PORT_RATE_10000;
2005 else
2006 mode = DSAF_PORT_RATE_1000;
2007
2008 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
2009 }
2010
2011 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
2012 {
2013 struct dsaf_hw_stats *hw_stats
2014 = &dsaf_dev->hw_stats[node_num];
2015
2016 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
2017 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2018 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
2019 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
2020 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
2021 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
2022 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
2023 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
2024 hw_stats->rx_pause_frame += dsaf_read_dev(dsaf_dev,
2025 DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG + 0x80 * (u64)node_num);
2026 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
2027 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
2028 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2029 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2030 hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2031 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2032 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2033 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2034 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2035 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2036 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2037 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2038
2039 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2040 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2041 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2042 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2043
2044 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2045 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2046 }
2047
2048 /**
2049 *hns_dsaf_get_regs - dump dsaf regs
2050 *@dsaf_dev: dsaf device
2051 *@data:data for value of regs
2052 */
2053 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2054 {
2055 u32 i = 0;
2056 u32 j;
2057 u32 *p = data;
2058
2059 /* dsaf common registers */
2060 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2061 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2062 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2063 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2064 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2065 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2066 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2067 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2068 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2069
2070 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2071 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2072 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2073 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2074 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2075 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2076 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2077 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2078 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2079 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2080 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2081 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2082 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2083 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2084 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2085
2086 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2087 p[24 + i] = dsaf_read_dev(ddev,
2088 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2089
2090 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2091
2092 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2093 p[33 + i] = dsaf_read_dev(ddev,
2094 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2095
2096 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2097 p[41 + i] = dsaf_read_dev(ddev,
2098 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2099
2100 /* dsaf inode registers */
2101 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2102
2103 p[171] = dsaf_read_dev(ddev,
2104 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2105
2106 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2107 j = i * DSAF_COMM_CHN + port;
2108 p[172 + i] = dsaf_read_dev(ddev,
2109 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2110 p[175 + i] = dsaf_read_dev(ddev,
2111 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2112 p[178 + i] = dsaf_read_dev(ddev,
2113 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2114 p[181 + i] = dsaf_read_dev(ddev,
2115 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2116 p[184 + i] = dsaf_read_dev(ddev,
2117 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2118 p[187 + i] = dsaf_read_dev(ddev,
2119 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2120 p[190 + i] = dsaf_read_dev(ddev,
2121 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
2122 p[193 + i] = dsaf_read_dev(ddev,
2123 DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG + j * 0x80);
2124 p[196 + i] = dsaf_read_dev(ddev,
2125 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2126 p[199 + i] = dsaf_read_dev(ddev,
2127 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2128 p[202 + i] = dsaf_read_dev(ddev,
2129 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2130 p[205 + i] = dsaf_read_dev(ddev,
2131 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2132 p[208 + i] = dsaf_read_dev(ddev,
2133 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2134 p[211 + i] = dsaf_read_dev(ddev,
2135 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2136 p[214 + i] = dsaf_read_dev(ddev,
2137 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2138 p[217 + i] = dsaf_read_dev(ddev,
2139 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2140 p[220 + i] = dsaf_read_dev(ddev,
2141 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2142 p[223 + i] = dsaf_read_dev(ddev,
2143 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2144 p[224 + i] = dsaf_read_dev(ddev,
2145 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2146 }
2147
2148 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2149
2150 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2151 j = i * DSAF_COMM_CHN + port;
2152 p[228 + i] = dsaf_read_dev(ddev,
2153 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2154 }
2155
2156 p[231] = dsaf_read_dev(ddev,
2157 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2158
2159 /* dsaf inode registers */
2160 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
2161 j = i * DSAF_COMM_CHN + port;
2162 p[232 + i] = dsaf_read_dev(ddev,
2163 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2164 p[235 + i] = dsaf_read_dev(ddev,
2165 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2166 p[238 + i] = dsaf_read_dev(ddev,
2167 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2168 p[241 + i] = dsaf_read_dev(ddev,
2169 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2170 p[244 + i] = dsaf_read_dev(ddev,
2171 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2172 p[245 + i] = dsaf_read_dev(ddev,
2173 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2174 p[248 + i] = dsaf_read_dev(ddev,
2175 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2176 p[251 + i] = dsaf_read_dev(ddev,
2177 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2178 p[254 + i] = dsaf_read_dev(ddev,
2179 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2180 p[257 + i] = dsaf_read_dev(ddev,
2181 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2182 p[260 + i] = dsaf_read_dev(ddev,
2183 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2184 p[263 + i] = dsaf_read_dev(ddev,
2185 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2186 p[266 + i] = dsaf_read_dev(ddev,
2187 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2188 p[269 + i] = dsaf_read_dev(ddev,
2189 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2190 p[272 + i] = dsaf_read_dev(ddev,
2191 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2192 p[275 + i] = dsaf_read_dev(ddev,
2193 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2194 p[278 + i] = dsaf_read_dev(ddev,
2195 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2196 p[281 + i] = dsaf_read_dev(ddev,
2197 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2198 p[284 + i] = dsaf_read_dev(ddev,
2199 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2200 p[287 + i] = dsaf_read_dev(ddev,
2201 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2202 p[290 + i] = dsaf_read_dev(ddev,
2203 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2204 p[293 + i] = dsaf_read_dev(ddev,
2205 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2206 p[296 + i] = dsaf_read_dev(ddev,
2207 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2208 p[299 + i] = dsaf_read_dev(ddev,
2209 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2210 p[302 + i] = dsaf_read_dev(ddev,
2211 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2212 p[305 + i] = dsaf_read_dev(ddev,
2213 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2214 p[308 + i] = dsaf_read_dev(ddev,
2215 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2216 }
2217
2218 /* dsaf onode registers */
2219 for (i = 0; i < DSAF_XOD_NUM; i++) {
2220 p[311 + i] = dsaf_read_dev(ddev,
2221 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + j * 0x90);
2222 p[319 + i] = dsaf_read_dev(ddev,
2223 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + j * 0x90);
2224 p[327 + i] = dsaf_read_dev(ddev,
2225 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + j * 0x90);
2226 p[335 + i] = dsaf_read_dev(ddev,
2227 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + j * 0x90);
2228 p[343 + i] = dsaf_read_dev(ddev,
2229 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + j * 0x90);
2230 p[351 + i] = dsaf_read_dev(ddev,
2231 DSAF_XOD_ETS_TOKEN_CFG_0_REG + j * 0x90);
2232 }
2233
2234 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2235 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2236 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2237
2238 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2239 j = i * DSAF_COMM_CHN + port;
2240 p[362 + i] = dsaf_read_dev(ddev,
2241 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2242 p[365 + i] = dsaf_read_dev(ddev,
2243 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2244 p[368 + i] = dsaf_read_dev(ddev,
2245 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2246 p[371 + i] = dsaf_read_dev(ddev,
2247 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2248 p[374 + i] = dsaf_read_dev(ddev,
2249 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2250 p[377 + i] = dsaf_read_dev(ddev,
2251 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2252 p[380 + i] = dsaf_read_dev(ddev,
2253 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2254 p[383 + i] = dsaf_read_dev(ddev,
2255 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2256 p[386 + i] = dsaf_read_dev(ddev,
2257 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2258 p[389 + i] = dsaf_read_dev(ddev,
2259 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2260 }
2261
2262 p[392] = dsaf_read_dev(ddev,
2263 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2264 p[393] = dsaf_read_dev(ddev,
2265 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2266 p[394] = dsaf_read_dev(ddev,
2267 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2268 p[395] = dsaf_read_dev(ddev,
2269 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2270 p[396] = dsaf_read_dev(ddev,
2271 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2272 p[397] = dsaf_read_dev(ddev,
2273 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2274 p[398] = dsaf_read_dev(ddev,
2275 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2276 p[399] = dsaf_read_dev(ddev,
2277 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2278 p[400] = dsaf_read_dev(ddev,
2279 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2280 p[401] = dsaf_read_dev(ddev,
2281 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2282 p[402] = dsaf_read_dev(ddev,
2283 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2284 p[403] = dsaf_read_dev(ddev,
2285 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2286 p[404] = dsaf_read_dev(ddev,
2287 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2288
2289 /* dsaf voq registers */
2290 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2291 j = (i * DSAF_COMM_CHN + port) * 0x90;
2292 p[405 + i] = dsaf_read_dev(ddev,
2293 DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2294 p[408 + i] = dsaf_read_dev(ddev,
2295 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2296 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2297 p[414 + i] = dsaf_read_dev(ddev,
2298 DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2299 p[417 + i] = dsaf_read_dev(ddev,
2300 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2301 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2302 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2303 p[426 + i] = dsaf_read_dev(ddev,
2304 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2305 p[429 + i] = dsaf_read_dev(ddev,
2306 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2307 p[432 + i] = dsaf_read_dev(ddev,
2308 DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2309 p[435 + i] = dsaf_read_dev(ddev,
2310 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2311 p[438 + i] = dsaf_read_dev(ddev,
2312 DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2313 }
2314
2315 /* dsaf tbl registers */
2316 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2317 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2318 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2319 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2320 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2321 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2322 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2323 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2324 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2325 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2326 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2327 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2328 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2329 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2330 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2331 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2332 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2333 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2334 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2335 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2336 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2337 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2338 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2339
2340 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2341 j = i * 0x8;
2342 p[464 + 2 * i] = dsaf_read_dev(ddev,
2343 DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2344 p[465 + 2 * i] = dsaf_read_dev(ddev,
2345 DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2346 }
2347
2348 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2349 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2350 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2351 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2352 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2353 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2354 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2355 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2356 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2357 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2358 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2359 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2360
2361 /* dsaf other registers */
2362 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2363 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2364 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2365 p[495] = dsaf_read_dev(ddev,
2366 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2367 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2368 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2369
2370 /* mark end of dsaf regs */
2371 for (i = 498; i < 504; i++)
2372 p[i] = 0xdddddddd;
2373 }
2374
2375 static char *hns_dsaf_get_node_stats_strings(char *data, int node)
2376 {
2377 char *buff = data;
2378
2379 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2380 buff = buff + ETH_GSTRING_LEN;
2381 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2382 buff = buff + ETH_GSTRING_LEN;
2383 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2384 buff = buff + ETH_GSTRING_LEN;
2385 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2386 buff = buff + ETH_GSTRING_LEN;
2387 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2388 buff = buff + ETH_GSTRING_LEN;
2389 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2390 buff = buff + ETH_GSTRING_LEN;
2391 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2392 buff = buff + ETH_GSTRING_LEN;
2393 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2394 buff = buff + ETH_GSTRING_LEN;
2395 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2396 buff = buff + ETH_GSTRING_LEN;
2397 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2398 buff = buff + ETH_GSTRING_LEN;
2399 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2400 buff = buff + ETH_GSTRING_LEN;
2401 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2402 buff = buff + ETH_GSTRING_LEN;
2403 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2404 buff = buff + ETH_GSTRING_LEN;
2405 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2406 buff = buff + ETH_GSTRING_LEN;
2407
2408 return buff;
2409 }
2410
2411 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2412 int node_num)
2413 {
2414 u64 *p = data;
2415 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2416
2417 p[0] = hw_stats->pad_drop;
2418 p[1] = hw_stats->man_pkts;
2419 p[2] = hw_stats->rx_pkts;
2420 p[3] = hw_stats->rx_pkt_id;
2421 p[4] = hw_stats->rx_pause_frame;
2422 p[5] = hw_stats->release_buf_num;
2423 p[6] = hw_stats->sbm_drop;
2424 p[7] = hw_stats->crc_false;
2425 p[8] = hw_stats->bp_drop;
2426 p[9] = hw_stats->rslt_drop;
2427 p[10] = hw_stats->local_addr_false;
2428 p[11] = hw_stats->vlan_drop;
2429 p[12] = hw_stats->stp_drop;
2430 p[13] = hw_stats->tx_pkts;
2431
2432 return &p[14];
2433 }
2434
2435 /**
2436 *hns_dsaf_get_stats - get dsaf statistic
2437 *@ddev: dsaf device
2438 *@data:statistic value
2439 *@port: port num
2440 */
2441 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2442 {
2443 u64 *p = data;
2444 int node_num = port;
2445
2446 /* for ge/xge node info */
2447 p = hns_dsaf_get_node_stats(ddev, p, node_num);
2448
2449 /* for ppe node info */
2450 node_num = port + DSAF_PPE_INODE_BASE;
2451 (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2452 }
2453
2454 /**
2455 *hns_dsaf_get_sset_count - get dsaf string set count
2456 *@stringset: type of values in data
2457 *return dsaf string name count
2458 */
2459 int hns_dsaf_get_sset_count(int stringset)
2460 {
2461 if (stringset == ETH_SS_STATS)
2462 return DSAF_STATIC_NUM;
2463
2464 return 0;
2465 }
2466
2467 /**
2468 *hns_dsaf_get_strings - get dsaf string set
2469 *@stringset:srting set index
2470 *@data:strings name value
2471 *@port:port index
2472 */
2473 void hns_dsaf_get_strings(int stringset, u8 *data, int port)
2474 {
2475 char *buff = (char *)data;
2476 int node = port;
2477
2478 if (stringset != ETH_SS_STATS)
2479 return;
2480
2481 /* for ge/xge node info */
2482 buff = hns_dsaf_get_node_stats_strings(buff, node);
2483
2484 /* for ppe node info */
2485 node = port + DSAF_PPE_INODE_BASE;
2486 (void)hns_dsaf_get_node_stats_strings(buff, node);
2487 }
2488
2489 /**
2490 *hns_dsaf_get_sset_count - get dsaf regs count
2491 *return dsaf regs count
2492 */
2493 int hns_dsaf_get_regs_count(void)
2494 {
2495 return DSAF_DUMP_REGS_NUM;
2496 }
2497
2498 /**
2499 * dsaf_probe - probo dsaf dev
2500 * @pdev: dasf platform device
2501 * retuen 0 - success , negative --fail
2502 */
2503 static int hns_dsaf_probe(struct platform_device *pdev)
2504 {
2505 struct dsaf_device *dsaf_dev;
2506 int ret;
2507
2508 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2509 if (IS_ERR(dsaf_dev)) {
2510 ret = PTR_ERR(dsaf_dev);
2511 dev_err(&pdev->dev,
2512 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2513 return ret;
2514 }
2515
2516 ret = hns_dsaf_get_cfg(dsaf_dev);
2517 if (ret)
2518 goto free_dev;
2519
2520 ret = hns_dsaf_init(dsaf_dev);
2521 if (ret)
2522 goto free_cfg;
2523
2524 ret = hns_mac_init(dsaf_dev);
2525 if (ret)
2526 goto uninit_dsaf;
2527
2528 ret = hns_ppe_init(dsaf_dev);
2529 if (ret)
2530 goto uninit_mac;
2531
2532 ret = hns_dsaf_ae_init(dsaf_dev);
2533 if (ret)
2534 goto uninit_ppe;
2535
2536 return 0;
2537
2538 uninit_ppe:
2539 hns_ppe_uninit(dsaf_dev);
2540
2541 uninit_mac:
2542 hns_mac_uninit(dsaf_dev);
2543
2544 uninit_dsaf:
2545 hns_dsaf_free(dsaf_dev);
2546
2547 free_cfg:
2548 hns_dsaf_free_cfg(dsaf_dev);
2549
2550 free_dev:
2551 hns_dsaf_free_dev(dsaf_dev);
2552
2553 return ret;
2554 }
2555
2556 /**
2557 * dsaf_remove - remove dsaf dev
2558 * @pdev: dasf platform device
2559 */
2560 static int hns_dsaf_remove(struct platform_device *pdev)
2561 {
2562 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2563
2564 hns_dsaf_ae_uninit(dsaf_dev);
2565
2566 hns_ppe_uninit(dsaf_dev);
2567
2568 hns_mac_uninit(dsaf_dev);
2569
2570 hns_dsaf_free(dsaf_dev);
2571
2572 hns_dsaf_free_cfg(dsaf_dev);
2573
2574 hns_dsaf_free_dev(dsaf_dev);
2575
2576 return 0;
2577 }
2578
2579 static const struct of_device_id g_dsaf_match[] = {
2580 {.compatible = "hisilicon,hns-dsaf-v1"},
2581 {.compatible = "hisilicon,hns-dsaf-v2"},
2582 {}
2583 };
2584
2585 static struct platform_driver g_dsaf_driver = {
2586 .probe = hns_dsaf_probe,
2587 .remove = hns_dsaf_remove,
2588 .driver = {
2589 .name = DSAF_DRV_NAME,
2590 .of_match_table = g_dsaf_match,
2591 },
2592 };
2593
2594 module_platform_driver(g_dsaf_driver);
2595
2596 MODULE_LICENSE("GPL");
2597 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2598 MODULE_DESCRIPTION("HNS DSAF driver");
2599 MODULE_VERSION(DSAF_MOD_VERSION);
Linux kernel - Deliverables
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