drivers/net/ethernet/intel/fm10k/fm10k.h

   1 /* Intel Ethernet Switch Host Interface Driver
   2  * Copyright(c) 2013 - 2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  *
  16  * Contact Information:
  17  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  18  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19  */
  20
  21 #ifndef _FM10K_H_
  22 #define _FM10K_H_
  23
  24 #include <linux/types.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/rtnetlink.h>
  27 #include <linux/if_vlan.h>
  28 #include <linux/pci.h>
  29 #include <linux/net_tstamp.h>
  30 #include <linux/clocksource.h>
  31 #include <linux/ptp_clock_kernel.h>
  32
  33 #include "fm10k_pf.h"
  34 #include "fm10k_vf.h"
  35
  36 #define FM10K_MAX_JUMBO_FRAME_SIZE      15358   /* Maximum supported size 15K */
  37
  38 #define MAX_QUEUES      FM10K_MAX_QUEUES_PF
  39
  40 #define FM10K_MIN_RXD            128
  41 #define FM10K_MAX_RXD           4096
  42 #define FM10K_DEFAULT_RXD        256
  43
  44 #define FM10K_MIN_TXD            128
  45 #define FM10K_MAX_TXD           4096
  46 #define FM10K_DEFAULT_TXD        256
  47 #define FM10K_DEFAULT_TX_WORK    256
  48
  49 #define FM10K_RXBUFFER_256        256
  50 #define FM10K_RX_HDR_LEN        FM10K_RXBUFFER_256
  51 #define FM10K_RXBUFFER_2048      2048
  52 #define FM10K_RX_BUFSZ          FM10K_RXBUFFER_2048
  53
  54 /* How many Rx Buffers do we bundle into one write to the hardware ? */
  55 #define FM10K_RX_BUFFER_WRITE   16      /* Must be power of 2 */
  56
  57 #define FM10K_MAX_STATIONS      63
  58 struct fm10k_l2_accel {
  59         int size;
  60         u16 count;
  61         u16 dglort;
  62         struct rcu_head rcu;
  63         struct net_device *macvlan[0];
  64 };
  65
  66 enum fm10k_ring_state_t {
  67         __FM10K_TX_DETECT_HANG,
  68         __FM10K_HANG_CHECK_ARMED,
  69 };
  70
  71 #define check_for_tx_hang(ring) \
  72         test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
  73 #define set_check_for_tx_hang(ring) \
  74         set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
  75 #define clear_check_for_tx_hang(ring) \
  76         clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
  77
  78 struct fm10k_tx_buffer {
  79         struct fm10k_tx_desc *next_to_watch;
  80         struct sk_buff *skb;
  81         unsigned int bytecount;
  82         u16 gso_segs;
  83         u16 tx_flags;
  84         DEFINE_DMA_UNMAP_ADDR(dma);
  85         DEFINE_DMA_UNMAP_LEN(len);
  86 };
  87
  88 struct fm10k_rx_buffer {
  89         dma_addr_t dma;
  90         struct page *page;
  91         u32 page_offset;
  92 };
  93
  94 struct fm10k_queue_stats {
  95         u64 packets;
  96         u64 bytes;
  97 };
  98
  99 struct fm10k_tx_queue_stats {
 100         u64 restart_queue;
 101         u64 csum_err;
 102         u64 tx_busy;
 103         u64 tx_done_old;
 104 };
 105
 106 struct fm10k_rx_queue_stats {
 107         u64 alloc_failed;
 108         u64 csum_err;
 109         u64 errors;
 110 };
 111
 112 struct fm10k_ring {
 113         struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
 114         struct net_device *netdev;      /* netdev ring belongs to */
 115         struct device *dev;             /* device for DMA mapping */
 116         struct fm10k_l2_accel __rcu *l2_accel;  /* L2 acceleration list */
 117         void *desc;                     /* descriptor ring memory */
 118         union {
 119                 struct fm10k_tx_buffer *tx_buffer;
 120                 struct fm10k_rx_buffer *rx_buffer;
 121         };
 122         u32 __iomem *tail;
 123         unsigned long state;
 124         dma_addr_t dma;                 /* phys. address of descriptor ring */
 125         unsigned int size;              /* length in bytes */
 126
 127         u8 queue_index;                 /* needed for queue management */
 128         u8 reg_idx;                     /* holds the special value that gets
 129                                          * the hardware register offset
 130                                          * associated with this ring, which is
 131                                          * different for DCB and RSS modes
 132                                          */
 133         u8 qos_pc;                      /* priority class of queue */
 134         u16 vid;                        /* default vlan ID of queue */
 135         u16 count;                      /* amount of descriptors */
 136
 137         u16 next_to_alloc;
 138         u16 next_to_use;
 139         u16 next_to_clean;
 140
 141         struct fm10k_queue_stats stats;
 142         struct u64_stats_sync syncp;
 143         union {
 144                 /* Tx */
 145                 struct fm10k_tx_queue_stats tx_stats;
 146                 /* Rx */
 147                 struct {
 148                         struct fm10k_rx_queue_stats rx_stats;
 149                         struct sk_buff *skb;
 150                 };
 151         };
 152 } ____cacheline_internodealigned_in_smp;
 153
 154 struct fm10k_ring_container {
 155         struct fm10k_ring *ring;        /* pointer to linked list of rings */
 156         unsigned int total_bytes;       /* total bytes processed this int */
 157         unsigned int total_packets;     /* total packets processed this int */
 158         u16 work_limit;                 /* total work allowed per interrupt */
 159         u16 itr;                        /* interrupt throttle rate value */
 160         u8 count;                       /* total number of rings in vector */
 161 };
 162
 163 #define FM10K_ITR_MAX           0x0FFF  /* maximum value for ITR */
 164 #define FM10K_ITR_10K           100     /* 100us */
 165 #define FM10K_ITR_20K           50      /* 50us */
 166 #define FM10K_ITR_ADAPTIVE      0x8000  /* adaptive interrupt moderation flag */
 167
 168 #define FM10K_ITR_ENABLE        (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
 169
 170 static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
 171 {
 172         return &ring->netdev->_tx[ring->queue_index];
 173 }
 174
 175 /* iterator for handling rings in ring container */
 176 #define fm10k_for_each_ring(pos, head) \
 177         for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
 178
 179 #define MAX_Q_VECTORS 256
 180 #define MIN_Q_VECTORS   1
 181 enum fm10k_non_q_vectors {
 182         FM10K_MBX_VECTOR,
 183 #define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
 184         NON_Q_VECTORS_PF
 185 };
 186
 187 #define NON_Q_VECTORS(hw)       (((hw)->mac.type == fm10k_mac_pf) ? \
 188                                                 NON_Q_VECTORS_PF : \
 189                                                 NON_Q_VECTORS_VF)
 190 #define MIN_MSIX_COUNT(hw)      (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
 191
 192 struct fm10k_q_vector {
 193         struct fm10k_intfc *interface;
 194         u32 __iomem *itr;       /* pointer to ITR register for this vector */
 195         u16 v_idx;              /* index of q_vector within interface array */
 196         struct fm10k_ring_container rx, tx;
 197
 198         struct napi_struct napi;
 199         char name[IFNAMSIZ + 9];
 200
 201 #ifdef CONFIG_DEBUG_FS
 202         struct dentry *dbg_q_vector;
 203 #endif /* CONFIG_DEBUG_FS */
 204         struct rcu_head rcu;    /* to avoid race with update stats on free */
 205
 206         /* for dynamic allocation of rings associated with this q_vector */
 207         struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
 208 };
 209
 210 enum fm10k_ring_f_enum {
 211         RING_F_RSS,
 212         RING_F_QOS,
 213         RING_F_ARRAY_SIZE  /* must be last in enum set */
 214 };
 215
 216 struct fm10k_ring_feature {
 217         u16 limit;      /* upper limit on feature indices */
 218         u16 indices;    /* current value of indices */
 219         u16 mask;       /* Mask used for feature to ring mapping */
 220         u16 offset;     /* offset to start of feature */
 221 };
 222
 223 struct fm10k_iov_data {
 224         unsigned int            num_vfs;
 225         unsigned int            next_vf_mbx;
 226         struct rcu_head         rcu;
 227         struct fm10k_vf_info    vf_info[0];
 228 };
 229
 230 #define fm10k_vxlan_port_for_each(vp, intfc) \
 231         list_for_each_entry(vp, &(intfc)->vxlan_port, list)
 232 struct fm10k_vxlan_port {
 233         struct list_head        list;
 234         sa_family_t             sa_family;
 235         __be16                  port;
 236 };
 237
 238 struct fm10k_intfc {
 239         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 240         struct net_device *netdev;
 241         struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
 242         struct pci_dev *pdev;
 243         unsigned long state;
 244
 245         u32 flags;
 246 #define FM10K_FLAG_RESET_REQUESTED              (u32)(1 << 0)
 247 #define FM10K_FLAG_RSS_FIELD_IPV4_UDP           (u32)(1 << 1)
 248 #define FM10K_FLAG_RSS_FIELD_IPV6_UDP           (u32)(1 << 2)
 249 #define FM10K_FLAG_RX_TS_ENABLED                (u32)(1 << 3)
 250 #define FM10K_FLAG_SWPRI_CONFIG                 (u32)(1 << 4)
 251         int xcast_mode;
 252
 253         /* Tx fast path data */
 254         int num_tx_queues;
 255         u16 tx_itr;
 256
 257         /* Rx fast path data */
 258         int num_rx_queues;
 259         u16 rx_itr;
 260
 261         /* TX */
 262         struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
 263
 264         u64 restart_queue;
 265         u64 tx_busy;
 266         u64 tx_csum_errors;
 267         u64 alloc_failed;
 268         u64 rx_csum_errors;
 269         u64 rx_errors;
 270
 271         u64 tx_bytes_nic;
 272         u64 tx_packets_nic;
 273         u64 rx_bytes_nic;
 274         u64 rx_packets_nic;
 275         u64 rx_drops_nic;
 276         u64 rx_overrun_pf;
 277         u64 rx_overrun_vf;
 278         u32 tx_timeout_count;
 279
 280         /* RX */
 281         struct fm10k_ring *rx_ring[MAX_QUEUES];
 282
 283         /* Queueing vectors */
 284         struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
 285         struct msix_entry *msix_entries;
 286         int num_q_vectors;      /* current number of q_vectors for device */
 287         struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
 288
 289         /* SR-IOV information management structure */
 290         struct fm10k_iov_data *iov_data;
 291
 292         struct fm10k_hw_stats stats;
 293         struct fm10k_hw hw;
 294         u32 __iomem *uc_addr;
 295         u32 __iomem *sw_addr;
 296         u16 msg_enable;
 297         u16 tx_ring_count;
 298         u16 rx_ring_count;
 299         struct timer_list service_timer;
 300         struct work_struct service_task;
 301         unsigned long next_stats_update;
 302         unsigned long next_tx_hang_check;
 303         unsigned long last_reset;
 304         unsigned long link_down_event;
 305         bool host_ready;
 306
 307         u32 reta[FM10K_RETA_SIZE];
 308         u32 rssrk[FM10K_RSSRK_SIZE];
 309
 310         /* VXLAN port tracking information */
 311         struct list_head vxlan_port;
 312
 313 #ifdef CONFIG_DEBUG_FS
 314         struct dentry *dbg_intfc;
 315
 316 #endif /* CONFIG_DEBUG_FS */
 317         struct ptp_clock_info ptp_caps;
 318         struct ptp_clock *ptp_clock;
 319
 320         struct sk_buff_head ts_tx_skb_queue;
 321         u32 tx_hwtstamp_timeouts;
 322
 323         struct hwtstamp_config ts_config;
 324         /* We are unable to actually adjust the clock beyond the frequency
 325          * value.  Once the clock is started there is no resetting it.  As
 326          * such we maintain a separate offset from the actual hardware clock
 327          * to allow for offset adjustment.
 328          */
 329         s64 ptp_adjust;
 330         rwlock_t systime_lock;
 331 #ifdef CONFIG_DCB
 332         u8 pfc_en;
 333 #endif
 334         u8 rx_pause;
 335
 336         /* GLORT resources in use by PF */
 337         u16 glort;
 338         u16 glort_count;
 339
 340         /* VLAN ID for updating multicast/unicast lists */
 341         u16 vid;
 342 };
 343
 344 enum fm10k_state_t {
 345         __FM10K_RESETTING,
 346         __FM10K_DOWN,
 347         __FM10K_SERVICE_SCHED,
 348         __FM10K_SERVICE_DISABLE,
 349         __FM10K_MBX_LOCK,
 350         __FM10K_LINK_DOWN,
 351 };
 352
 353 static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
 354 {
 355         /* busy loop if we cannot obtain the lock as some calls
 356          * such as ndo_set_rx_mode may be made in atomic context
 357          */
 358         while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state))
 359                 udelay(20);
 360 }
 361
 362 static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
 363 {
 364         /* flush memory to make sure state is correct */
 365         smp_mb__before_atomic();
 366         clear_bit(__FM10K_MBX_LOCK, &interface->state);
 367 }
 368
 369 static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
 370 {
 371         return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state);
 372 }
 373
 374 /* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
 375 static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
 376                                         const u32 stat_err_bits)
 377 {
 378         return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
 379 }
 380
 381 /* fm10k_desc_unused - calculate if we have unused descriptors */
 382 static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
 383 {
 384         s16 unused = ring->next_to_clean - ring->next_to_use - 1;
 385
 386         return likely(unused < 0) ? unused + ring->count : unused;
 387 }
 388
 389 #define FM10K_TX_DESC(R, i)     \
 390         (&(((struct fm10k_tx_desc *)((R)->desc))[i]))
 391 #define FM10K_RX_DESC(R, i)     \
 392          (&(((union fm10k_rx_desc *)((R)->desc))[i]))
 393
 394 #define FM10K_MAX_TXD_PWR       14
 395 #define FM10K_MAX_DATA_PER_TXD  (1 << FM10K_MAX_TXD_PWR)
 396
 397 /* Tx Descriptors needed, worst case */
 398 #define TXD_USE_COUNT(S)        DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
 399 #define DESC_NEEDED     (MAX_SKB_FRAGS + 4)
 400
 401 enum fm10k_tx_flags {
 402         /* Tx offload flags */
 403         FM10K_TX_FLAGS_CSUM     = 0x01,
 404 };
 405
 406 /* This structure is stored as little endian values as that is the native
 407  * format of the Rx descriptor.  The ordering of these fields is reversed
 408  * from the actual ftag header to allow for a single bswap to take care
 409  * of placing all of the values in network order
 410  */
 411 union fm10k_ftag_info {
 412         __le64 ftag;
 413         struct {
 414                 /* dglort and sglort combined into a single 32bit desc read */
 415                 __le32 glort;
 416                 /* upper 16 bits of vlan are reserved 0 for swpri_type_user */
 417                 __le32 vlan;
 418         } d;
 419         struct {
 420                 __le16 dglort;
 421                 __le16 sglort;
 422                 __le16 vlan;
 423                 __le16 swpri_type_user;
 424         } w;
 425 };
 426
 427 struct fm10k_cb {
 428         union {
 429                 __le64 tstamp;
 430                 unsigned long ts_tx_timeout;
 431         };
 432         union fm10k_ftag_info fi;
 433 };
 434
 435 #define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
 436
 437 /* main */
 438 extern char fm10k_driver_name[];
 439 extern const char fm10k_driver_version[];
 440 int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
 441 void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
 442 __be16 fm10k_tx_encap_offload(struct sk_buff *skb);
 443 netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
 444                                   struct fm10k_ring *tx_ring);
 445 void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
 446 bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
 447 void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
 448
 449 /* PCI */
 450 void fm10k_mbx_free_irq(struct fm10k_intfc *);
 451 int fm10k_mbx_request_irq(struct fm10k_intfc *);
 452 void fm10k_qv_free_irq(struct fm10k_intfc *interface);
 453 int fm10k_qv_request_irq(struct fm10k_intfc *interface);
 454 int fm10k_register_pci_driver(void);
 455 void fm10k_unregister_pci_driver(void);
 456 void fm10k_up(struct fm10k_intfc *interface);
 457 void fm10k_down(struct fm10k_intfc *interface);
 458 void fm10k_update_stats(struct fm10k_intfc *interface);
 459 void fm10k_service_event_schedule(struct fm10k_intfc *interface);
 460 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
 461
 462 /* Netdev */
 463 struct net_device *fm10k_alloc_netdev(void);
 464 int fm10k_setup_rx_resources(struct fm10k_ring *);
 465 int fm10k_setup_tx_resources(struct fm10k_ring *);
 466 void fm10k_free_rx_resources(struct fm10k_ring *);
 467 void fm10k_free_tx_resources(struct fm10k_ring *);
 468 void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
 469 void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
 470 void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
 471                                       struct fm10k_tx_buffer *);
 472 void fm10k_restore_rx_state(struct fm10k_intfc *);
 473 void fm10k_reset_rx_state(struct fm10k_intfc *);
 474 int fm10k_setup_tc(struct net_device *dev, u8 tc);
 475 int fm10k_open(struct net_device *netdev);
 476 int fm10k_close(struct net_device *netdev);
 477
 478 /* Ethtool */
 479 void fm10k_set_ethtool_ops(struct net_device *dev);
 480
 481 /* IOV */
 482 s32 fm10k_iov_event(struct fm10k_intfc *interface);
 483 s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
 484 void fm10k_iov_suspend(struct pci_dev *pdev);
 485 int fm10k_iov_resume(struct pci_dev *pdev);
 486 void fm10k_iov_disable(struct pci_dev *pdev);
 487 int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
 488 s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
 489 int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac);
 490 int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
 491                           int vf_idx, u16 vid, u8 qos);
 492 int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate,
 493                         int unused);
 494 int fm10k_ndo_get_vf_config(struct net_device *netdev,
 495                             int vf_idx, struct ifla_vf_info *ivi);
 496
 497 /* DebugFS */
 498 #ifdef CONFIG_DEBUG_FS
 499 void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector);
 500 void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector);
 501 void fm10k_dbg_intfc_init(struct fm10k_intfc *interface);
 502 void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface);
 503 void fm10k_dbg_init(void);
 504 void fm10k_dbg_exit(void);
 505 #else
 506 static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {}
 507 static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {}
 508 static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {}
 509 static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {}
 510 static inline void fm10k_dbg_init(void) {}
 511 static inline void fm10k_dbg_exit(void) {}
 512 #endif /* CONFIG_DEBUG_FS */
 513
 514 /* Time Stamping */
 515 void fm10k_systime_to_hwtstamp(struct fm10k_intfc *interface,
 516                                struct skb_shared_hwtstamps *hwtstamp,
 517                                u64 systime);
 518 void fm10k_ts_tx_enqueue(struct fm10k_intfc *interface, struct sk_buff *skb);
 519 void fm10k_ts_tx_hwtstamp(struct fm10k_intfc *interface, __le16 dglort,
 520                           u64 systime);
 521 void fm10k_ts_reset(struct fm10k_intfc *interface);
 522 void fm10k_ts_init(struct fm10k_intfc *interface);
 523 void fm10k_ts_tx_subtask(struct fm10k_intfc *interface);
 524 void fm10k_ptp_register(struct fm10k_intfc *interface);
 525 void fm10k_ptp_unregister(struct fm10k_intfc *interface);
 526 int fm10k_get_ts_config(struct net_device *netdev, struct ifreq *ifr);
 527 int fm10k_set_ts_config(struct net_device *netdev, struct ifreq *ifr);
 528
 529 /* DCB */
 530 void fm10k_dcbnl_set_ops(struct net_device *dev);
 531 #endif /* _FM10K_H_ */