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fm10k: avoid possible null pointer dereference in fm10k_update_stats
[deliverable/linux.git] / drivers / net / ethernet / intel / fm10k / fm10k_pci.c
1 /* Intel(R) Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2016 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21 #include <linux/module.h>
22 #include <linux/aer.h>
23
24 #include "fm10k.h"
25
26 static const struct fm10k_info *fm10k_info_tbl[] = {
27 [fm10k_device_pf] = &fm10k_pf_info,
28 [fm10k_device_vf] = &fm10k_vf_info,
29 };
30
31 /**
32 * fm10k_pci_tbl - PCI Device ID Table
33 *
34 * Wildcard entries (PCI_ANY_ID) should come last
35 * Last entry must be all 0s
36 *
37 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
38 * Class, Class Mask, private data (not used) }
39 */
40 static const struct pci_device_id fm10k_pci_tbl[] = {
41 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_PF), fm10k_device_pf },
42 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_VF), fm10k_device_vf },
43 /* required last entry */
44 { 0, }
45 };
46 MODULE_DEVICE_TABLE(pci, fm10k_pci_tbl);
47
48 u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg)
49 {
50 struct fm10k_intfc *interface = hw->back;
51 u16 value = 0;
52
53 if (FM10K_REMOVED(hw->hw_addr))
54 return ~value;
55
56 pci_read_config_word(interface->pdev, reg, &value);
57 if (value == 0xFFFF)
58 fm10k_write_flush(hw);
59
60 return value;
61 }
62
63 u32 fm10k_read_reg(struct fm10k_hw *hw, int reg)
64 {
65 u32 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
66 u32 value = 0;
67
68 if (FM10K_REMOVED(hw_addr))
69 return ~value;
70
71 value = readl(&hw_addr[reg]);
72 if (!(~value) && (!reg || !(~readl(hw_addr)))) {
73 struct fm10k_intfc *interface = hw->back;
74 struct net_device *netdev = interface->netdev;
75
76 hw->hw_addr = NULL;
77 netif_device_detach(netdev);
78 netdev_err(netdev, "PCIe link lost, device now detached\n");
79 }
80
81 return value;
82 }
83
84 static int fm10k_hw_ready(struct fm10k_intfc *interface)
85 {
86 struct fm10k_hw *hw = &interface->hw;
87
88 fm10k_write_flush(hw);
89
90 return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0;
91 }
92
93 void fm10k_service_event_schedule(struct fm10k_intfc *interface)
94 {
95 if (!test_bit(__FM10K_SERVICE_DISABLE, &interface->state) &&
96 !test_and_set_bit(__FM10K_SERVICE_SCHED, &interface->state))
97 queue_work(fm10k_workqueue, &interface->service_task);
98 }
99
100 static void fm10k_service_event_complete(struct fm10k_intfc *interface)
101 {
102 WARN_ON(!test_bit(__FM10K_SERVICE_SCHED, &interface->state));
103
104 /* flush memory to make sure state is correct before next watchog */
105 smp_mb__before_atomic();
106 clear_bit(__FM10K_SERVICE_SCHED, &interface->state);
107 }
108
109 /**
110 * fm10k_service_timer - Timer Call-back
111 * @data: pointer to interface cast into an unsigned long
112 **/
113 static void fm10k_service_timer(unsigned long data)
114 {
115 struct fm10k_intfc *interface = (struct fm10k_intfc *)data;
116
117 /* Reset the timer */
118 mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
119
120 fm10k_service_event_schedule(interface);
121 }
122
123 static void fm10k_detach_subtask(struct fm10k_intfc *interface)
124 {
125 struct net_device *netdev = interface->netdev;
126
127 /* do nothing if device is still present or hw_addr is set */
128 if (netif_device_present(netdev) || interface->hw.hw_addr)
129 return;
130
131 rtnl_lock();
132
133 if (netif_running(netdev))
134 dev_close(netdev);
135
136 rtnl_unlock();
137 }
138
139 static void fm10k_reinit(struct fm10k_intfc *interface)
140 {
141 struct net_device *netdev = interface->netdev;
142 struct fm10k_hw *hw = &interface->hw;
143 int err;
144
145 WARN_ON(in_interrupt());
146
147 /* put off any impending NetWatchDogTimeout */
148 netif_trans_update(netdev);
149
150 while (test_and_set_bit(__FM10K_RESETTING, &interface->state))
151 usleep_range(1000, 2000);
152
153 rtnl_lock();
154
155 fm10k_iov_suspend(interface->pdev);
156
157 if (netif_running(netdev))
158 fm10k_close(netdev);
159
160 fm10k_mbx_free_irq(interface);
161
162 /* free interrupts */
163 fm10k_clear_queueing_scheme(interface);
164
165 /* delay any future reset requests */
166 interface->last_reset = jiffies + (10 * HZ);
167
168 /* reset and initialize the hardware so it is in a known state */
169 err = hw->mac.ops.reset_hw(hw);
170 if (err) {
171 dev_err(&interface->pdev->dev, "reset_hw failed: %d\n", err);
172 goto reinit_err;
173 }
174
175 err = hw->mac.ops.init_hw(hw);
176 if (err) {
177 dev_err(&interface->pdev->dev, "init_hw failed: %d\n", err);
178 goto reinit_err;
179 }
180
181 err = fm10k_init_queueing_scheme(interface);
182 if (err) {
183 dev_err(&interface->pdev->dev,
184 "init_queueing_scheme failed: %d\n", err);
185 goto reinit_err;
186 }
187
188 /* reassociate interrupts */
189 err = fm10k_mbx_request_irq(interface);
190 if (err)
191 goto err_mbx_irq;
192
193 err = fm10k_hw_ready(interface);
194 if (err)
195 goto err_open;
196
197 /* update hardware address for VFs if perm_addr has changed */
198 if (hw->mac.type == fm10k_mac_vf) {
199 if (is_valid_ether_addr(hw->mac.perm_addr)) {
200 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
201 ether_addr_copy(netdev->perm_addr, hw->mac.perm_addr);
202 ether_addr_copy(netdev->dev_addr, hw->mac.perm_addr);
203 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
204 }
205
206 if (hw->mac.vlan_override)
207 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
208 else
209 netdev->features |= NETIF_F_HW_VLAN_CTAG_RX;
210 }
211
212 err = netif_running(netdev) ? fm10k_open(netdev) : 0;
213 if (err)
214 goto err_open;
215
216 fm10k_iov_resume(interface->pdev);
217
218 rtnl_unlock();
219
220 clear_bit(__FM10K_RESETTING, &interface->state);
221
222 return;
223 err_open:
224 fm10k_mbx_free_irq(interface);
225 err_mbx_irq:
226 fm10k_clear_queueing_scheme(interface);
227 reinit_err:
228 netif_device_detach(netdev);
229
230 rtnl_unlock();
231
232 clear_bit(__FM10K_RESETTING, &interface->state);
233 }
234
235 static void fm10k_reset_subtask(struct fm10k_intfc *interface)
236 {
237 if (!(interface->flags & FM10K_FLAG_RESET_REQUESTED))
238 return;
239
240 interface->flags &= ~FM10K_FLAG_RESET_REQUESTED;
241
242 netdev_err(interface->netdev, "Reset interface\n");
243
244 fm10k_reinit(interface);
245 }
246
247 /**
248 * fm10k_configure_swpri_map - Configure Receive SWPRI to PC mapping
249 * @interface: board private structure
250 *
251 * Configure the SWPRI to PC mapping for the port.
252 **/
253 static void fm10k_configure_swpri_map(struct fm10k_intfc *interface)
254 {
255 struct net_device *netdev = interface->netdev;
256 struct fm10k_hw *hw = &interface->hw;
257 int i;
258
259 /* clear flag indicating update is needed */
260 interface->flags &= ~FM10K_FLAG_SWPRI_CONFIG;
261
262 /* these registers are only available on the PF */
263 if (hw->mac.type != fm10k_mac_pf)
264 return;
265
266 /* configure SWPRI to PC map */
267 for (i = 0; i < FM10K_SWPRI_MAX; i++)
268 fm10k_write_reg(hw, FM10K_SWPRI_MAP(i),
269 netdev_get_prio_tc_map(netdev, i));
270 }
271
272 /**
273 * fm10k_watchdog_update_host_state - Update the link status based on host.
274 * @interface: board private structure
275 **/
276 static void fm10k_watchdog_update_host_state(struct fm10k_intfc *interface)
277 {
278 struct fm10k_hw *hw = &interface->hw;
279 s32 err;
280
281 if (test_bit(__FM10K_LINK_DOWN, &interface->state)) {
282 interface->host_ready = false;
283 if (time_is_after_jiffies(interface->link_down_event))
284 return;
285 clear_bit(__FM10K_LINK_DOWN, &interface->state);
286 }
287
288 if (interface->flags & FM10K_FLAG_SWPRI_CONFIG) {
289 if (rtnl_trylock()) {
290 fm10k_configure_swpri_map(interface);
291 rtnl_unlock();
292 }
293 }
294
295 /* lock the mailbox for transmit and receive */
296 fm10k_mbx_lock(interface);
297
298 err = hw->mac.ops.get_host_state(hw, &interface->host_ready);
299 if (err && time_is_before_jiffies(interface->last_reset))
300 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
301
302 /* free the lock */
303 fm10k_mbx_unlock(interface);
304 }
305
306 /**
307 * fm10k_mbx_subtask - Process upstream and downstream mailboxes
308 * @interface: board private structure
309 *
310 * This function will process both the upstream and downstream mailboxes.
311 **/
312 static void fm10k_mbx_subtask(struct fm10k_intfc *interface)
313 {
314 /* process upstream mailbox and update device state */
315 fm10k_watchdog_update_host_state(interface);
316
317 /* process downstream mailboxes */
318 fm10k_iov_mbx(interface);
319 }
320
321 /**
322 * fm10k_watchdog_host_is_ready - Update netdev status based on host ready
323 * @interface: board private structure
324 **/
325 static void fm10k_watchdog_host_is_ready(struct fm10k_intfc *interface)
326 {
327 struct net_device *netdev = interface->netdev;
328
329 /* only continue if link state is currently down */
330 if (netif_carrier_ok(netdev))
331 return;
332
333 netif_info(interface, drv, netdev, "NIC Link is up\n");
334
335 netif_carrier_on(netdev);
336 netif_tx_wake_all_queues(netdev);
337 }
338
339 /**
340 * fm10k_watchdog_host_not_ready - Update netdev status based on host not ready
341 * @interface: board private structure
342 **/
343 static void fm10k_watchdog_host_not_ready(struct fm10k_intfc *interface)
344 {
345 struct net_device *netdev = interface->netdev;
346
347 /* only continue if link state is currently up */
348 if (!netif_carrier_ok(netdev))
349 return;
350
351 netif_info(interface, drv, netdev, "NIC Link is down\n");
352
353 netif_carrier_off(netdev);
354 netif_tx_stop_all_queues(netdev);
355 }
356
357 /**
358 * fm10k_update_stats - Update the board statistics counters.
359 * @interface: board private structure
360 **/
361 void fm10k_update_stats(struct fm10k_intfc *interface)
362 {
363 struct net_device_stats *net_stats = &interface->netdev->stats;
364 struct fm10k_hw *hw = &interface->hw;
365 u64 hw_csum_tx_good = 0, hw_csum_rx_good = 0, rx_length_errors = 0;
366 u64 rx_switch_errors = 0, rx_drops = 0, rx_pp_errors = 0;
367 u64 rx_link_errors = 0;
368 u64 rx_errors = 0, rx_csum_errors = 0, tx_csum_errors = 0;
369 u64 restart_queue = 0, tx_busy = 0, alloc_failed = 0;
370 u64 rx_bytes_nic = 0, rx_pkts_nic = 0, rx_drops_nic = 0;
371 u64 tx_bytes_nic = 0, tx_pkts_nic = 0;
372 u64 bytes, pkts;
373 int i;
374
375 /* do not allow stats update via service task for next second */
376 interface->next_stats_update = jiffies + HZ;
377
378 /* gather some stats to the interface struct that are per queue */
379 for (bytes = 0, pkts = 0, i = 0; i < interface->num_tx_queues; i++) {
380 struct fm10k_ring *tx_ring = READ_ONCE(interface->tx_ring[i]);
381
382 if (!tx_ring)
383 continue;
384
385 restart_queue += tx_ring->tx_stats.restart_queue;
386 tx_busy += tx_ring->tx_stats.tx_busy;
387 tx_csum_errors += tx_ring->tx_stats.csum_err;
388 bytes += tx_ring->stats.bytes;
389 pkts += tx_ring->stats.packets;
390 hw_csum_tx_good += tx_ring->tx_stats.csum_good;
391 }
392
393 interface->restart_queue = restart_queue;
394 interface->tx_busy = tx_busy;
395 net_stats->tx_bytes = bytes;
396 net_stats->tx_packets = pkts;
397 interface->tx_csum_errors = tx_csum_errors;
398 interface->hw_csum_tx_good = hw_csum_tx_good;
399
400 /* gather some stats to the interface struct that are per queue */
401 for (bytes = 0, pkts = 0, i = 0; i < interface->num_rx_queues; i++) {
402 struct fm10k_ring *rx_ring = READ_ONCE(interface->rx_ring[i]);
403
404 if (!rx_ring)
405 continue;
406
407 bytes += rx_ring->stats.bytes;
408 pkts += rx_ring->stats.packets;
409 alloc_failed += rx_ring->rx_stats.alloc_failed;
410 rx_csum_errors += rx_ring->rx_stats.csum_err;
411 rx_errors += rx_ring->rx_stats.errors;
412 hw_csum_rx_good += rx_ring->rx_stats.csum_good;
413 rx_switch_errors += rx_ring->rx_stats.switch_errors;
414 rx_drops += rx_ring->rx_stats.drops;
415 rx_pp_errors += rx_ring->rx_stats.pp_errors;
416 rx_link_errors += rx_ring->rx_stats.link_errors;
417 rx_length_errors += rx_ring->rx_stats.length_errors;
418 }
419
420 net_stats->rx_bytes = bytes;
421 net_stats->rx_packets = pkts;
422 interface->alloc_failed = alloc_failed;
423 interface->rx_csum_errors = rx_csum_errors;
424 interface->hw_csum_rx_good = hw_csum_rx_good;
425 interface->rx_switch_errors = rx_switch_errors;
426 interface->rx_drops = rx_drops;
427 interface->rx_pp_errors = rx_pp_errors;
428 interface->rx_link_errors = rx_link_errors;
429 interface->rx_length_errors = rx_length_errors;
430
431 hw->mac.ops.update_hw_stats(hw, &interface->stats);
432
433 for (i = 0; i < hw->mac.max_queues; i++) {
434 struct fm10k_hw_stats_q *q = &interface->stats.q[i];
435
436 tx_bytes_nic += q->tx_bytes.count;
437 tx_pkts_nic += q->tx_packets.count;
438 rx_bytes_nic += q->rx_bytes.count;
439 rx_pkts_nic += q->rx_packets.count;
440 rx_drops_nic += q->rx_drops.count;
441 }
442
443 interface->tx_bytes_nic = tx_bytes_nic;
444 interface->tx_packets_nic = tx_pkts_nic;
445 interface->rx_bytes_nic = rx_bytes_nic;
446 interface->rx_packets_nic = rx_pkts_nic;
447 interface->rx_drops_nic = rx_drops_nic;
448
449 /* Fill out the OS statistics structure */
450 net_stats->rx_errors = rx_errors;
451 net_stats->rx_dropped = interface->stats.nodesc_drop.count;
452 }
453
454 /**
455 * fm10k_watchdog_flush_tx - flush queues on host not ready
456 * @interface - pointer to the device interface structure
457 **/
458 static void fm10k_watchdog_flush_tx(struct fm10k_intfc *interface)
459 {
460 int some_tx_pending = 0;
461 int i;
462
463 /* nothing to do if carrier is up */
464 if (netif_carrier_ok(interface->netdev))
465 return;
466
467 for (i = 0; i < interface->num_tx_queues; i++) {
468 struct fm10k_ring *tx_ring = interface->tx_ring[i];
469
470 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
471 some_tx_pending = 1;
472 break;
473 }
474 }
475
476 /* We've lost link, so the controller stops DMA, but we've got
477 * queued Tx work that's never going to get done, so reset
478 * controller to flush Tx.
479 */
480 if (some_tx_pending)
481 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
482 }
483
484 /**
485 * fm10k_watchdog_subtask - check and bring link up
486 * @interface - pointer to the device interface structure
487 **/
488 static void fm10k_watchdog_subtask(struct fm10k_intfc *interface)
489 {
490 /* if interface is down do nothing */
491 if (test_bit(__FM10K_DOWN, &interface->state) ||
492 test_bit(__FM10K_RESETTING, &interface->state))
493 return;
494
495 if (interface->host_ready)
496 fm10k_watchdog_host_is_ready(interface);
497 else
498 fm10k_watchdog_host_not_ready(interface);
499
500 /* update stats only once every second */
501 if (time_is_before_jiffies(interface->next_stats_update))
502 fm10k_update_stats(interface);
503
504 /* flush any uncompleted work */
505 fm10k_watchdog_flush_tx(interface);
506 }
507
508 /**
509 * fm10k_check_hang_subtask - check for hung queues and dropped interrupts
510 * @interface - pointer to the device interface structure
511 *
512 * This function serves two purposes. First it strobes the interrupt lines
513 * in order to make certain interrupts are occurring. Secondly it sets the
514 * bits needed to check for TX hangs. As a result we should immediately
515 * determine if a hang has occurred.
516 */
517 static void fm10k_check_hang_subtask(struct fm10k_intfc *interface)
518 {
519 int i;
520
521 /* If we're down or resetting, just bail */
522 if (test_bit(__FM10K_DOWN, &interface->state) ||
523 test_bit(__FM10K_RESETTING, &interface->state))
524 return;
525
526 /* rate limit tx hang checks to only once every 2 seconds */
527 if (time_is_after_eq_jiffies(interface->next_tx_hang_check))
528 return;
529 interface->next_tx_hang_check = jiffies + (2 * HZ);
530
531 if (netif_carrier_ok(interface->netdev)) {
532 /* Force detection of hung controller */
533 for (i = 0; i < interface->num_tx_queues; i++)
534 set_check_for_tx_hang(interface->tx_ring[i]);
535
536 /* Rearm all in-use q_vectors for immediate firing */
537 for (i = 0; i < interface->num_q_vectors; i++) {
538 struct fm10k_q_vector *qv = interface->q_vector[i];
539
540 if (!qv->tx.count && !qv->rx.count)
541 continue;
542 writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr);
543 }
544 }
545 }
546
547 /**
548 * fm10k_service_task - manages and runs subtasks
549 * @work: pointer to work_struct containing our data
550 **/
551 static void fm10k_service_task(struct work_struct *work)
552 {
553 struct fm10k_intfc *interface;
554
555 interface = container_of(work, struct fm10k_intfc, service_task);
556
557 /* tasks run even when interface is down */
558 fm10k_mbx_subtask(interface);
559 fm10k_detach_subtask(interface);
560 fm10k_reset_subtask(interface);
561
562 /* tasks only run when interface is up */
563 fm10k_watchdog_subtask(interface);
564 fm10k_check_hang_subtask(interface);
565
566 /* release lock on service events to allow scheduling next event */
567 fm10k_service_event_complete(interface);
568 }
569
570 /**
571 * fm10k_configure_tx_ring - Configure Tx ring after Reset
572 * @interface: board private structure
573 * @ring: structure containing ring specific data
574 *
575 * Configure the Tx descriptor ring after a reset.
576 **/
577 static void fm10k_configure_tx_ring(struct fm10k_intfc *interface,
578 struct fm10k_ring *ring)
579 {
580 struct fm10k_hw *hw = &interface->hw;
581 u64 tdba = ring->dma;
582 u32 size = ring->count * sizeof(struct fm10k_tx_desc);
583 u32 txint = FM10K_INT_MAP_DISABLE;
584 u32 txdctl = BIT(FM10K_TXDCTL_MAX_TIME_SHIFT) | FM10K_TXDCTL_ENABLE;
585 u8 reg_idx = ring->reg_idx;
586
587 /* disable queue to avoid issues while updating state */
588 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0);
589 fm10k_write_flush(hw);
590
591 /* possible poll here to verify ring resources have been cleaned */
592
593 /* set location and size for descriptor ring */
594 fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
595 fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32);
596 fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size);
597
598 /* reset head and tail pointers */
599 fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0);
600 fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0);
601
602 /* store tail pointer */
603 ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)];
604
605 /* reset ntu and ntc to place SW in sync with hardware */
606 ring->next_to_clean = 0;
607 ring->next_to_use = 0;
608
609 /* Map interrupt */
610 if (ring->q_vector) {
611 txint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
612 txint |= FM10K_INT_MAP_TIMER0;
613 }
614
615 fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txint);
616
617 /* enable use of FTAG bit in Tx descriptor, register is RO for VF */
618 fm10k_write_reg(hw, FM10K_PFVTCTL(reg_idx),
619 FM10K_PFVTCTL_FTAG_DESC_ENABLE);
620
621 /* Initialize XPS */
622 if (!test_and_set_bit(__FM10K_TX_XPS_INIT_DONE, &ring->state) &&
623 ring->q_vector)
624 netif_set_xps_queue(ring->netdev,
625 &ring->q_vector->affinity_mask,
626 ring->queue_index);
627
628 /* enable queue */
629 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl);
630 }
631
632 /**
633 * fm10k_enable_tx_ring - Verify Tx ring is enabled after configuration
634 * @interface: board private structure
635 * @ring: structure containing ring specific data
636 *
637 * Verify the Tx descriptor ring is ready for transmit.
638 **/
639 static void fm10k_enable_tx_ring(struct fm10k_intfc *interface,
640 struct fm10k_ring *ring)
641 {
642 struct fm10k_hw *hw = &interface->hw;
643 int wait_loop = 10;
644 u32 txdctl;
645 u8 reg_idx = ring->reg_idx;
646
647 /* if we are already enabled just exit */
648 if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE)
649 return;
650
651 /* poll to verify queue is enabled */
652 do {
653 usleep_range(1000, 2000);
654 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx));
655 } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop);
656 if (!wait_loop)
657 netif_err(interface, drv, interface->netdev,
658 "Could not enable Tx Queue %d\n", reg_idx);
659 }
660
661 /**
662 * fm10k_configure_tx - Configure Transmit Unit after Reset
663 * @interface: board private structure
664 *
665 * Configure the Tx unit of the MAC after a reset.
666 **/
667 static void fm10k_configure_tx(struct fm10k_intfc *interface)
668 {
669 int i;
670
671 /* Setup the HW Tx Head and Tail descriptor pointers */
672 for (i = 0; i < interface->num_tx_queues; i++)
673 fm10k_configure_tx_ring(interface, interface->tx_ring[i]);
674
675 /* poll here to verify that Tx rings are now enabled */
676 for (i = 0; i < interface->num_tx_queues; i++)
677 fm10k_enable_tx_ring(interface, interface->tx_ring[i]);
678 }
679
680 /**
681 * fm10k_configure_rx_ring - Configure Rx ring after Reset
682 * @interface: board private structure
683 * @ring: structure containing ring specific data
684 *
685 * Configure the Rx descriptor ring after a reset.
686 **/
687 static void fm10k_configure_rx_ring(struct fm10k_intfc *interface,
688 struct fm10k_ring *ring)
689 {
690 u64 rdba = ring->dma;
691 struct fm10k_hw *hw = &interface->hw;
692 u32 size = ring->count * sizeof(union fm10k_rx_desc);
693 u32 rxqctl = FM10K_RXQCTL_ENABLE | FM10K_RXQCTL_PF;
694 u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
695 u32 srrctl = FM10K_SRRCTL_BUFFER_CHAINING_EN;
696 u32 rxint = FM10K_INT_MAP_DISABLE;
697 u8 rx_pause = interface->rx_pause;
698 u8 reg_idx = ring->reg_idx;
699
700 /* disable queue to avoid issues while updating state */
701 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), 0);
702 fm10k_write_flush(hw);
703
704 /* possible poll here to verify ring resources have been cleaned */
705
706 /* set location and size for descriptor ring */
707 fm10k_write_reg(hw, FM10K_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
708 fm10k_write_reg(hw, FM10K_RDBAH(reg_idx), rdba >> 32);
709 fm10k_write_reg(hw, FM10K_RDLEN(reg_idx), size);
710
711 /* reset head and tail pointers */
712 fm10k_write_reg(hw, FM10K_RDH(reg_idx), 0);
713 fm10k_write_reg(hw, FM10K_RDT(reg_idx), 0);
714
715 /* store tail pointer */
716 ring->tail = &interface->uc_addr[FM10K_RDT(reg_idx)];
717
718 /* reset ntu and ntc to place SW in sync with hardware */
719 ring->next_to_clean = 0;
720 ring->next_to_use = 0;
721 ring->next_to_alloc = 0;
722
723 /* Configure the Rx buffer size for one buff without split */
724 srrctl |= FM10K_RX_BUFSZ >> FM10K_SRRCTL_BSIZEPKT_SHIFT;
725
726 /* Configure the Rx ring to suppress loopback packets */
727 srrctl |= FM10K_SRRCTL_LOOPBACK_SUPPRESS;
728 fm10k_write_reg(hw, FM10K_SRRCTL(reg_idx), srrctl);
729
730 /* Enable drop on empty */
731 #ifdef CONFIG_DCB
732 if (interface->pfc_en)
733 rx_pause = interface->pfc_en;
734 #endif
735 if (!(rx_pause & BIT(ring->qos_pc)))
736 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
737
738 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
739
740 /* assign default VLAN to queue */
741 ring->vid = hw->mac.default_vid;
742
743 /* if we have an active VLAN, disable default VLAN ID */
744 if (test_bit(hw->mac.default_vid, interface->active_vlans))
745 ring->vid |= FM10K_VLAN_CLEAR;
746
747 /* Map interrupt */
748 if (ring->q_vector) {
749 rxint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
750 rxint |= FM10K_INT_MAP_TIMER1;
751 }
752
753 fm10k_write_reg(hw, FM10K_RXINT(reg_idx), rxint);
754
755 /* enable queue */
756 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl);
757
758 /* place buffers on ring for receive data */
759 fm10k_alloc_rx_buffers(ring, fm10k_desc_unused(ring));
760 }
761
762 /**
763 * fm10k_update_rx_drop_en - Configures the drop enable bits for Rx rings
764 * @interface: board private structure
765 *
766 * Configure the drop enable bits for the Rx rings.
767 **/
768 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface)
769 {
770 struct fm10k_hw *hw = &interface->hw;
771 u8 rx_pause = interface->rx_pause;
772 int i;
773
774 #ifdef CONFIG_DCB
775 if (interface->pfc_en)
776 rx_pause = interface->pfc_en;
777
778 #endif
779 for (i = 0; i < interface->num_rx_queues; i++) {
780 struct fm10k_ring *ring = interface->rx_ring[i];
781 u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
782 u8 reg_idx = ring->reg_idx;
783
784 if (!(rx_pause & BIT(ring->qos_pc)))
785 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
786
787 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
788 }
789 }
790
791 /**
792 * fm10k_configure_dglort - Configure Receive DGLORT after reset
793 * @interface: board private structure
794 *
795 * Configure the DGLORT description and RSS tables.
796 **/
797 static void fm10k_configure_dglort(struct fm10k_intfc *interface)
798 {
799 struct fm10k_dglort_cfg dglort = { 0 };
800 struct fm10k_hw *hw = &interface->hw;
801 int i;
802 u32 mrqc;
803
804 /* Fill out hash function seeds */
805 for (i = 0; i < FM10K_RSSRK_SIZE; i++)
806 fm10k_write_reg(hw, FM10K_RSSRK(0, i), interface->rssrk[i]);
807
808 /* Write RETA table to hardware */
809 for (i = 0; i < FM10K_RETA_SIZE; i++)
810 fm10k_write_reg(hw, FM10K_RETA(0, i), interface->reta[i]);
811
812 /* Generate RSS hash based on packet types, TCP/UDP
813 * port numbers and/or IPv4/v6 src and dst addresses
814 */
815 mrqc = FM10K_MRQC_IPV4 |
816 FM10K_MRQC_TCP_IPV4 |
817 FM10K_MRQC_IPV6 |
818 FM10K_MRQC_TCP_IPV6;
819
820 if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP)
821 mrqc |= FM10K_MRQC_UDP_IPV4;
822 if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP)
823 mrqc |= FM10K_MRQC_UDP_IPV6;
824
825 fm10k_write_reg(hw, FM10K_MRQC(0), mrqc);
826
827 /* configure default DGLORT mapping for RSS/DCB */
828 dglort.inner_rss = 1;
829 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
830 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
831 hw->mac.ops.configure_dglort_map(hw, &dglort);
832
833 /* assign GLORT per queue for queue mapped testing */
834 if (interface->glort_count > 64) {
835 memset(&dglort, 0, sizeof(dglort));
836 dglort.inner_rss = 1;
837 dglort.glort = interface->glort + 64;
838 dglort.idx = fm10k_dglort_pf_queue;
839 dglort.queue_l = fls(interface->num_rx_queues - 1);
840 hw->mac.ops.configure_dglort_map(hw, &dglort);
841 }
842
843 /* assign glort value for RSS/DCB specific to this interface */
844 memset(&dglort, 0, sizeof(dglort));
845 dglort.inner_rss = 1;
846 dglort.glort = interface->glort;
847 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
848 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
849 /* configure DGLORT mapping for RSS/DCB */
850 dglort.idx = fm10k_dglort_pf_rss;
851 if (interface->l2_accel)
852 dglort.shared_l = fls(interface->l2_accel->size);
853 hw->mac.ops.configure_dglort_map(hw, &dglort);
854 }
855
856 /**
857 * fm10k_configure_rx - Configure Receive Unit after Reset
858 * @interface: board private structure
859 *
860 * Configure the Rx unit of the MAC after a reset.
861 **/
862 static void fm10k_configure_rx(struct fm10k_intfc *interface)
863 {
864 int i;
865
866 /* Configure SWPRI to PC map */
867 fm10k_configure_swpri_map(interface);
868
869 /* Configure RSS and DGLORT map */
870 fm10k_configure_dglort(interface);
871
872 /* Setup the HW Rx Head and Tail descriptor pointers */
873 for (i = 0; i < interface->num_rx_queues; i++)
874 fm10k_configure_rx_ring(interface, interface->rx_ring[i]);
875
876 /* possible poll here to verify that Rx rings are now enabled */
877 }
878
879 static void fm10k_napi_enable_all(struct fm10k_intfc *interface)
880 {
881 struct fm10k_q_vector *q_vector;
882 int q_idx;
883
884 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
885 q_vector = interface->q_vector[q_idx];
886 napi_enable(&q_vector->napi);
887 }
888 }
889
890 static irqreturn_t fm10k_msix_clean_rings(int __always_unused irq, void *data)
891 {
892 struct fm10k_q_vector *q_vector = data;
893
894 if (q_vector->rx.count || q_vector->tx.count)
895 napi_schedule_irqoff(&q_vector->napi);
896
897 return IRQ_HANDLED;
898 }
899
900 static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data)
901 {
902 struct fm10k_intfc *interface = data;
903 struct fm10k_hw *hw = &interface->hw;
904 struct fm10k_mbx_info *mbx = &hw->mbx;
905
906 /* re-enable mailbox interrupt and indicate 20us delay */
907 fm10k_write_reg(hw, FM10K_VFITR(FM10K_MBX_VECTOR),
908 (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
909 FM10K_ITR_ENABLE);
910
911 /* service upstream mailbox */
912 if (fm10k_mbx_trylock(interface)) {
913 mbx->ops.process(hw, mbx);
914 fm10k_mbx_unlock(interface);
915 }
916
917 hw->mac.get_host_state = true;
918 fm10k_service_event_schedule(interface);
919
920 return IRQ_HANDLED;
921 }
922
923 #ifdef CONFIG_NET_POLL_CONTROLLER
924 /**
925 * fm10k_netpoll - A Polling 'interrupt' handler
926 * @netdev: network interface device structure
927 *
928 * This is used by netconsole to send skbs without having to re-enable
929 * interrupts. It's not called while the normal interrupt routine is executing.
930 **/
931 void fm10k_netpoll(struct net_device *netdev)
932 {
933 struct fm10k_intfc *interface = netdev_priv(netdev);
934 int i;
935
936 /* if interface is down do nothing */
937 if (test_bit(__FM10K_DOWN, &interface->state))
938 return;
939
940 for (i = 0; i < interface->num_q_vectors; i++)
941 fm10k_msix_clean_rings(0, interface->q_vector[i]);
942 }
943
944 #endif
945 #define FM10K_ERR_MSG(type) case (type): error = #type; break
946 static void fm10k_handle_fault(struct fm10k_intfc *interface, int type,
947 struct fm10k_fault *fault)
948 {
949 struct pci_dev *pdev = interface->pdev;
950 struct fm10k_hw *hw = &interface->hw;
951 struct fm10k_iov_data *iov_data = interface->iov_data;
952 char *error;
953
954 switch (type) {
955 case FM10K_PCA_FAULT:
956 switch (fault->type) {
957 default:
958 error = "Unknown PCA error";
959 break;
960 FM10K_ERR_MSG(PCA_NO_FAULT);
961 FM10K_ERR_MSG(PCA_UNMAPPED_ADDR);
962 FM10K_ERR_MSG(PCA_BAD_QACCESS_PF);
963 FM10K_ERR_MSG(PCA_BAD_QACCESS_VF);
964 FM10K_ERR_MSG(PCA_MALICIOUS_REQ);
965 FM10K_ERR_MSG(PCA_POISONED_TLP);
966 FM10K_ERR_MSG(PCA_TLP_ABORT);
967 }
968 break;
969 case FM10K_THI_FAULT:
970 switch (fault->type) {
971 default:
972 error = "Unknown THI error";
973 break;
974 FM10K_ERR_MSG(THI_NO_FAULT);
975 FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT);
976 }
977 break;
978 case FM10K_FUM_FAULT:
979 switch (fault->type) {
980 default:
981 error = "Unknown FUM error";
982 break;
983 FM10K_ERR_MSG(FUM_NO_FAULT);
984 FM10K_ERR_MSG(FUM_UNMAPPED_ADDR);
985 FM10K_ERR_MSG(FUM_BAD_VF_QACCESS);
986 FM10K_ERR_MSG(FUM_ADD_DECODE_ERR);
987 FM10K_ERR_MSG(FUM_RO_ERROR);
988 FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR);
989 FM10K_ERR_MSG(FUM_CSR_TIMEOUT);
990 FM10K_ERR_MSG(FUM_INVALID_TYPE);
991 FM10K_ERR_MSG(FUM_INVALID_LENGTH);
992 FM10K_ERR_MSG(FUM_INVALID_BE);
993 FM10K_ERR_MSG(FUM_INVALID_ALIGN);
994 }
995 break;
996 default:
997 error = "Undocumented fault";
998 break;
999 }
1000
1001 dev_warn(&pdev->dev,
1002 "%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n",
1003 error, fault->address, fault->specinfo,
1004 PCI_SLOT(fault->func), PCI_FUNC(fault->func));
1005
1006 /* For VF faults, clear out the respective LPORT, reset the queue
1007 * resources, and then reconnect to the mailbox. This allows the
1008 * VF in question to resume behavior. For transient faults that are
1009 * the result of non-malicious behavior this will log the fault and
1010 * allow the VF to resume functionality. Obviously for malicious VFs
1011 * they will be able to attempt malicious behavior again. In this
1012 * case, the system administrator will need to step in and manually
1013 * remove or disable the VF in question.
1014 */
1015 if (fault->func && iov_data) {
1016 int vf = fault->func - 1;
1017 struct fm10k_vf_info *vf_info = &iov_data->vf_info[vf];
1018
1019 hw->iov.ops.reset_lport(hw, vf_info);
1020 hw->iov.ops.reset_resources(hw, vf_info);
1021
1022 /* reset_lport disables the VF, so re-enable it */
1023 hw->iov.ops.set_lport(hw, vf_info, vf,
1024 FM10K_VF_FLAG_MULTI_CAPABLE);
1025
1026 /* reset_resources will disconnect from the mbx */
1027 vf_info->mbx.ops.connect(hw, &vf_info->mbx);
1028 }
1029 }
1030
1031 static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr)
1032 {
1033 struct fm10k_hw *hw = &interface->hw;
1034 struct fm10k_fault fault = { 0 };
1035 int type, err;
1036
1037 for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT;
1038 eicr;
1039 eicr >>= 1, type += FM10K_FAULT_SIZE) {
1040 /* only check if there is an error reported */
1041 if (!(eicr & 0x1))
1042 continue;
1043
1044 /* retrieve fault info */
1045 err = hw->mac.ops.get_fault(hw, type, &fault);
1046 if (err) {
1047 dev_err(&interface->pdev->dev,
1048 "error reading fault\n");
1049 continue;
1050 }
1051
1052 fm10k_handle_fault(interface, type, &fault);
1053 }
1054 }
1055
1056 static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr)
1057 {
1058 struct fm10k_hw *hw = &interface->hw;
1059 const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
1060 u32 maxholdq;
1061 int q;
1062
1063 if (!(eicr & FM10K_EICR_MAXHOLDTIME))
1064 return;
1065
1066 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7));
1067 if (maxholdq)
1068 fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq);
1069 for (q = 255;;) {
1070 if (maxholdq & BIT(31)) {
1071 if (q < FM10K_MAX_QUEUES_PF) {
1072 interface->rx_overrun_pf++;
1073 fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl);
1074 } else {
1075 interface->rx_overrun_vf++;
1076 }
1077 }
1078
1079 maxholdq *= 2;
1080 if (!maxholdq)
1081 q &= ~(32 - 1);
1082
1083 if (!q)
1084 break;
1085
1086 if (q-- % 32)
1087 continue;
1088
1089 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32));
1090 if (maxholdq)
1091 fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq);
1092 }
1093 }
1094
1095 static irqreturn_t fm10k_msix_mbx_pf(int __always_unused irq, void *data)
1096 {
1097 struct fm10k_intfc *interface = data;
1098 struct fm10k_hw *hw = &interface->hw;
1099 struct fm10k_mbx_info *mbx = &hw->mbx;
1100 u32 eicr;
1101
1102 /* unmask any set bits related to this interrupt */
1103 eicr = fm10k_read_reg(hw, FM10K_EICR);
1104 fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX |
1105 FM10K_EICR_SWITCHREADY |
1106 FM10K_EICR_SWITCHNOTREADY));
1107
1108 /* report any faults found to the message log */
1109 fm10k_report_fault(interface, eicr);
1110
1111 /* reset any queues disabled due to receiver overrun */
1112 fm10k_reset_drop_on_empty(interface, eicr);
1113
1114 /* service mailboxes */
1115 if (fm10k_mbx_trylock(interface)) {
1116 mbx->ops.process(hw, mbx);
1117 /* handle VFLRE events */
1118 fm10k_iov_event(interface);
1119 fm10k_mbx_unlock(interface);
1120 }
1121
1122 /* if switch toggled state we should reset GLORTs */
1123 if (eicr & FM10K_EICR_SWITCHNOTREADY) {
1124 /* force link down for at least 4 seconds */
1125 interface->link_down_event = jiffies + (4 * HZ);
1126 set_bit(__FM10K_LINK_DOWN, &interface->state);
1127
1128 /* reset dglort_map back to no config */
1129 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
1130 }
1131
1132 /* we should validate host state after interrupt event */
1133 hw->mac.get_host_state = true;
1134
1135 /* validate host state, and handle VF mailboxes in the service task */
1136 fm10k_service_event_schedule(interface);
1137
1138 /* re-enable mailbox interrupt and indicate 20us delay */
1139 fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR),
1140 (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
1141 FM10K_ITR_ENABLE);
1142
1143 return IRQ_HANDLED;
1144 }
1145
1146 void fm10k_mbx_free_irq(struct fm10k_intfc *interface)
1147 {
1148 struct fm10k_hw *hw = &interface->hw;
1149 struct msix_entry *entry;
1150 int itr_reg;
1151
1152 /* no mailbox IRQ to free if MSI-X is not enabled */
1153 if (!interface->msix_entries)
1154 return;
1155
1156 entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1157
1158 /* disconnect the mailbox */
1159 hw->mbx.ops.disconnect(hw, &hw->mbx);
1160
1161 /* disable Mailbox cause */
1162 if (hw->mac.type == fm10k_mac_pf) {
1163 fm10k_write_reg(hw, FM10K_EIMR,
1164 FM10K_EIMR_DISABLE(PCA_FAULT) |
1165 FM10K_EIMR_DISABLE(FUM_FAULT) |
1166 FM10K_EIMR_DISABLE(MAILBOX) |
1167 FM10K_EIMR_DISABLE(SWITCHREADY) |
1168 FM10K_EIMR_DISABLE(SWITCHNOTREADY) |
1169 FM10K_EIMR_DISABLE(SRAMERROR) |
1170 FM10K_EIMR_DISABLE(VFLR) |
1171 FM10K_EIMR_DISABLE(MAXHOLDTIME));
1172 itr_reg = FM10K_ITR(FM10K_MBX_VECTOR);
1173 } else {
1174 itr_reg = FM10K_VFITR(FM10K_MBX_VECTOR);
1175 }
1176
1177 fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET);
1178
1179 free_irq(entry->vector, interface);
1180 }
1181
1182 static s32 fm10k_mbx_mac_addr(struct fm10k_hw *hw, u32 **results,
1183 struct fm10k_mbx_info *mbx)
1184 {
1185 bool vlan_override = hw->mac.vlan_override;
1186 u16 default_vid = hw->mac.default_vid;
1187 struct fm10k_intfc *interface;
1188 s32 err;
1189
1190 err = fm10k_msg_mac_vlan_vf(hw, results, mbx);
1191 if (err)
1192 return err;
1193
1194 interface = container_of(hw, struct fm10k_intfc, hw);
1195
1196 /* MAC was changed so we need reset */
1197 if (is_valid_ether_addr(hw->mac.perm_addr) &&
1198 !ether_addr_equal(hw->mac.perm_addr, hw->mac.addr))
1199 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1200
1201 /* VLAN override was changed, or default VLAN changed */
1202 if ((vlan_override != hw->mac.vlan_override) ||
1203 (default_vid != hw->mac.default_vid))
1204 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1205
1206 return 0;
1207 }
1208
1209 /* generic error handler for mailbox issues */
1210 static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results,
1211 struct fm10k_mbx_info __always_unused *mbx)
1212 {
1213 struct fm10k_intfc *interface;
1214 struct pci_dev *pdev;
1215
1216 interface = container_of(hw, struct fm10k_intfc, hw);
1217 pdev = interface->pdev;
1218
1219 dev_err(&pdev->dev, "Unknown message ID %u\n",
1220 **results & FM10K_TLV_ID_MASK);
1221
1222 return 0;
1223 }
1224
1225 static const struct fm10k_msg_data vf_mbx_data[] = {
1226 FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test),
1227 FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_mbx_mac_addr),
1228 FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf),
1229 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
1230 };
1231
1232 static int fm10k_mbx_request_irq_vf(struct fm10k_intfc *interface)
1233 {
1234 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1235 struct net_device *dev = interface->netdev;
1236 struct fm10k_hw *hw = &interface->hw;
1237 int err;
1238
1239 /* Use timer0 for interrupt moderation on the mailbox */
1240 u32 itr = entry->entry | FM10K_INT_MAP_TIMER0;
1241
1242 /* register mailbox handlers */
1243 err = hw->mbx.ops.register_handlers(&hw->mbx, vf_mbx_data);
1244 if (err)
1245 return err;
1246
1247 /* request the IRQ */
1248 err = request_irq(entry->vector, fm10k_msix_mbx_vf, 0,
1249 dev->name, interface);
1250 if (err) {
1251 netif_err(interface, probe, dev,
1252 "request_irq for msix_mbx failed: %d\n", err);
1253 return err;
1254 }
1255
1256 /* map all of the interrupt sources */
1257 fm10k_write_reg(hw, FM10K_VFINT_MAP, itr);
1258
1259 /* enable interrupt */
1260 fm10k_write_reg(hw, FM10K_VFITR(entry->entry), FM10K_ITR_ENABLE);
1261
1262 return 0;
1263 }
1264
1265 static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results,
1266 struct fm10k_mbx_info *mbx)
1267 {
1268 struct fm10k_intfc *interface;
1269 u32 dglort_map = hw->mac.dglort_map;
1270 s32 err;
1271
1272 interface = container_of(hw, struct fm10k_intfc, hw);
1273
1274 err = fm10k_msg_err_pf(hw, results, mbx);
1275 if (!err && hw->swapi.status) {
1276 /* force link down for a reasonable delay */
1277 interface->link_down_event = jiffies + (2 * HZ);
1278 set_bit(__FM10K_LINK_DOWN, &interface->state);
1279
1280 /* reset dglort_map back to no config */
1281 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
1282
1283 fm10k_service_event_schedule(interface);
1284
1285 /* prevent overloading kernel message buffer */
1286 if (interface->lport_map_failed)
1287 return 0;
1288
1289 interface->lport_map_failed = true;
1290
1291 if (hw->swapi.status == FM10K_MSG_ERR_PEP_NOT_SCHEDULED)
1292 dev_warn(&interface->pdev->dev,
1293 "cannot obtain link because the host interface is configured for a PCIe host interface bandwidth of zero\n");
1294 dev_warn(&interface->pdev->dev,
1295 "request logical port map failed: %d\n",
1296 hw->swapi.status);
1297
1298 return 0;
1299 }
1300
1301 err = fm10k_msg_lport_map_pf(hw, results, mbx);
1302 if (err)
1303 return err;
1304
1305 interface->lport_map_failed = false;
1306
1307 /* we need to reset if port count was just updated */
1308 if (dglort_map != hw->mac.dglort_map)
1309 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1310
1311 return 0;
1312 }
1313
1314 static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results,
1315 struct fm10k_mbx_info __always_unused *mbx)
1316 {
1317 struct fm10k_intfc *interface;
1318 u16 glort, pvid;
1319 u32 pvid_update;
1320 s32 err;
1321
1322 err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID],
1323 &pvid_update);
1324 if (err)
1325 return err;
1326
1327 /* extract values from the pvid update */
1328 glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT);
1329 pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID);
1330
1331 /* if glort is not valid return error */
1332 if (!fm10k_glort_valid_pf(hw, glort))
1333 return FM10K_ERR_PARAM;
1334
1335 /* verify VLAN ID is valid */
1336 if (pvid >= FM10K_VLAN_TABLE_VID_MAX)
1337 return FM10K_ERR_PARAM;
1338
1339 interface = container_of(hw, struct fm10k_intfc, hw);
1340
1341 /* check to see if this belongs to one of the VFs */
1342 err = fm10k_iov_update_pvid(interface, glort, pvid);
1343 if (!err)
1344 return 0;
1345
1346 /* we need to reset if default VLAN was just updated */
1347 if (pvid != hw->mac.default_vid)
1348 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1349
1350 hw->mac.default_vid = pvid;
1351
1352 return 0;
1353 }
1354
1355 static const struct fm10k_msg_data pf_mbx_data[] = {
1356 FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf),
1357 FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf),
1358 FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map),
1359 FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf),
1360 FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf),
1361 FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid),
1362 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
1363 };
1364
1365 static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface)
1366 {
1367 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1368 struct net_device *dev = interface->netdev;
1369 struct fm10k_hw *hw = &interface->hw;
1370 int err;
1371
1372 /* Use timer0 for interrupt moderation on the mailbox */
1373 u32 mbx_itr = entry->entry | FM10K_INT_MAP_TIMER0;
1374 u32 other_itr = entry->entry | FM10K_INT_MAP_IMMEDIATE;
1375
1376 /* register mailbox handlers */
1377 err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data);
1378 if (err)
1379 return err;
1380
1381 /* request the IRQ */
1382 err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0,
1383 dev->name, interface);
1384 if (err) {
1385 netif_err(interface, probe, dev,
1386 "request_irq for msix_mbx failed: %d\n", err);
1387 return err;
1388 }
1389
1390 /* Enable interrupts w/ no moderation for "other" interrupts */
1391 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_pcie_fault), other_itr);
1392 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_switch_up_down), other_itr);
1393 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_sram), other_itr);
1394 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_max_hold_time), other_itr);
1395 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_vflr), other_itr);
1396
1397 /* Enable interrupts w/ moderation for mailbox */
1398 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_mailbox), mbx_itr);
1399
1400 /* Enable individual interrupt causes */
1401 fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) |
1402 FM10K_EIMR_ENABLE(FUM_FAULT) |
1403 FM10K_EIMR_ENABLE(MAILBOX) |
1404 FM10K_EIMR_ENABLE(SWITCHREADY) |
1405 FM10K_EIMR_ENABLE(SWITCHNOTREADY) |
1406 FM10K_EIMR_ENABLE(SRAMERROR) |
1407 FM10K_EIMR_ENABLE(VFLR) |
1408 FM10K_EIMR_ENABLE(MAXHOLDTIME));
1409
1410 /* enable interrupt */
1411 fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE);
1412
1413 return 0;
1414 }
1415
1416 int fm10k_mbx_request_irq(struct fm10k_intfc *interface)
1417 {
1418 struct fm10k_hw *hw = &interface->hw;
1419 int err;
1420
1421 /* enable Mailbox cause */
1422 if (hw->mac.type == fm10k_mac_pf)
1423 err = fm10k_mbx_request_irq_pf(interface);
1424 else
1425 err = fm10k_mbx_request_irq_vf(interface);
1426 if (err)
1427 return err;
1428
1429 /* connect mailbox */
1430 err = hw->mbx.ops.connect(hw, &hw->mbx);
1431
1432 /* if the mailbox failed to connect, then free IRQ */
1433 if (err)
1434 fm10k_mbx_free_irq(interface);
1435
1436 return err;
1437 }
1438
1439 /**
1440 * fm10k_qv_free_irq - release interrupts associated with queue vectors
1441 * @interface: board private structure
1442 *
1443 * Release all interrupts associated with this interface
1444 **/
1445 void fm10k_qv_free_irq(struct fm10k_intfc *interface)
1446 {
1447 int vector = interface->num_q_vectors;
1448 struct fm10k_hw *hw = &interface->hw;
1449 struct msix_entry *entry;
1450
1451 entry = &interface->msix_entries[NON_Q_VECTORS(hw) + vector];
1452
1453 while (vector) {
1454 struct fm10k_q_vector *q_vector;
1455
1456 vector--;
1457 entry--;
1458 q_vector = interface->q_vector[vector];
1459
1460 if (!q_vector->tx.count && !q_vector->rx.count)
1461 continue;
1462
1463 /* clear the affinity_mask in the IRQ descriptor */
1464 irq_set_affinity_hint(entry->vector, NULL);
1465
1466 /* disable interrupts */
1467 writel(FM10K_ITR_MASK_SET, q_vector->itr);
1468
1469 free_irq(entry->vector, q_vector);
1470 }
1471 }
1472
1473 /**
1474 * fm10k_qv_request_irq - initialize interrupts for queue vectors
1475 * @interface: board private structure
1476 *
1477 * Attempts to configure interrupts using the best available
1478 * capabilities of the hardware and kernel.
1479 **/
1480 int fm10k_qv_request_irq(struct fm10k_intfc *interface)
1481 {
1482 struct net_device *dev = interface->netdev;
1483 struct fm10k_hw *hw = &interface->hw;
1484 struct msix_entry *entry;
1485 int ri = 0, ti = 0;
1486 int vector, err;
1487
1488 entry = &interface->msix_entries[NON_Q_VECTORS(hw)];
1489
1490 for (vector = 0; vector < interface->num_q_vectors; vector++) {
1491 struct fm10k_q_vector *q_vector = interface->q_vector[vector];
1492
1493 /* name the vector */
1494 if (q_vector->tx.count && q_vector->rx.count) {
1495 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1496 "%s-TxRx-%d", dev->name, ri++);
1497 ti++;
1498 } else if (q_vector->rx.count) {
1499 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1500 "%s-rx-%d", dev->name, ri++);
1501 } else if (q_vector->tx.count) {
1502 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1503 "%s-tx-%d", dev->name, ti++);
1504 } else {
1505 /* skip this unused q_vector */
1506 continue;
1507 }
1508
1509 /* Assign ITR register to q_vector */
1510 q_vector->itr = (hw->mac.type == fm10k_mac_pf) ?
1511 &interface->uc_addr[FM10K_ITR(entry->entry)] :
1512 &interface->uc_addr[FM10K_VFITR(entry->entry)];
1513
1514 /* request the IRQ */
1515 err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0,
1516 q_vector->name, q_vector);
1517 if (err) {
1518 netif_err(interface, probe, dev,
1519 "request_irq failed for MSIX interrupt Error: %d\n",
1520 err);
1521 goto err_out;
1522 }
1523
1524 /* assign the mask for this irq */
1525 irq_set_affinity_hint(entry->vector, &q_vector->affinity_mask);
1526
1527 /* Enable q_vector */
1528 writel(FM10K_ITR_ENABLE, q_vector->itr);
1529
1530 entry++;
1531 }
1532
1533 return 0;
1534
1535 err_out:
1536 /* wind through the ring freeing all entries and vectors */
1537 while (vector) {
1538 struct fm10k_q_vector *q_vector;
1539
1540 entry--;
1541 vector--;
1542 q_vector = interface->q_vector[vector];
1543
1544 if (!q_vector->tx.count && !q_vector->rx.count)
1545 continue;
1546
1547 /* clear the affinity_mask in the IRQ descriptor */
1548 irq_set_affinity_hint(entry->vector, NULL);
1549
1550 /* disable interrupts */
1551 writel(FM10K_ITR_MASK_SET, q_vector->itr);
1552
1553 free_irq(entry->vector, q_vector);
1554 }
1555
1556 return err;
1557 }
1558
1559 void fm10k_up(struct fm10k_intfc *interface)
1560 {
1561 struct fm10k_hw *hw = &interface->hw;
1562
1563 /* Enable Tx/Rx DMA */
1564 hw->mac.ops.start_hw(hw);
1565
1566 /* configure Tx descriptor rings */
1567 fm10k_configure_tx(interface);
1568
1569 /* configure Rx descriptor rings */
1570 fm10k_configure_rx(interface);
1571
1572 /* configure interrupts */
1573 hw->mac.ops.update_int_moderator(hw);
1574
1575 /* clear down bit to indicate we are ready to go */
1576 clear_bit(__FM10K_DOWN, &interface->state);
1577
1578 /* enable polling cleanups */
1579 fm10k_napi_enable_all(interface);
1580
1581 /* re-establish Rx filters */
1582 fm10k_restore_rx_state(interface);
1583
1584 /* enable transmits */
1585 netif_tx_start_all_queues(interface->netdev);
1586
1587 /* kick off the service timer now */
1588 hw->mac.get_host_state = true;
1589 mod_timer(&interface->service_timer, jiffies);
1590 }
1591
1592 static void fm10k_napi_disable_all(struct fm10k_intfc *interface)
1593 {
1594 struct fm10k_q_vector *q_vector;
1595 int q_idx;
1596
1597 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
1598 q_vector = interface->q_vector[q_idx];
1599 napi_disable(&q_vector->napi);
1600 }
1601 }
1602
1603 void fm10k_down(struct fm10k_intfc *interface)
1604 {
1605 struct net_device *netdev = interface->netdev;
1606 struct fm10k_hw *hw = &interface->hw;
1607 int err;
1608
1609 /* signal that we are down to the interrupt handler and service task */
1610 if (test_and_set_bit(__FM10K_DOWN, &interface->state))
1611 return;
1612
1613 /* call carrier off first to avoid false dev_watchdog timeouts */
1614 netif_carrier_off(netdev);
1615
1616 /* disable transmits */
1617 netif_tx_stop_all_queues(netdev);
1618 netif_tx_disable(netdev);
1619
1620 /* reset Rx filters */
1621 fm10k_reset_rx_state(interface);
1622
1623 /* allow 10ms for device to quiesce */
1624 usleep_range(10000, 20000);
1625
1626 /* disable polling routines */
1627 fm10k_napi_disable_all(interface);
1628
1629 /* capture stats one last time before stopping interface */
1630 fm10k_update_stats(interface);
1631
1632 /* Disable DMA engine for Tx/Rx */
1633 err = hw->mac.ops.stop_hw(hw);
1634 if (err)
1635 dev_err(&interface->pdev->dev, "stop_hw failed: %d\n", err);
1636
1637 /* free any buffers still on the rings */
1638 fm10k_clean_all_tx_rings(interface);
1639 fm10k_clean_all_rx_rings(interface);
1640 }
1641
1642 /**
1643 * fm10k_sw_init - Initialize general software structures
1644 * @interface: host interface private structure to initialize
1645 *
1646 * fm10k_sw_init initializes the interface private data structure.
1647 * Fields are initialized based on PCI device information and
1648 * OS network device settings (MTU size).
1649 **/
1650 static int fm10k_sw_init(struct fm10k_intfc *interface,
1651 const struct pci_device_id *ent)
1652 {
1653 const struct fm10k_info *fi = fm10k_info_tbl[ent->driver_data];
1654 struct fm10k_hw *hw = &interface->hw;
1655 struct pci_dev *pdev = interface->pdev;
1656 struct net_device *netdev = interface->netdev;
1657 u32 rss_key[FM10K_RSSRK_SIZE];
1658 unsigned int rss;
1659 int err;
1660
1661 /* initialize back pointer */
1662 hw->back = interface;
1663 hw->hw_addr = interface->uc_addr;
1664
1665 /* PCI config space info */
1666 hw->vendor_id = pdev->vendor;
1667 hw->device_id = pdev->device;
1668 hw->revision_id = pdev->revision;
1669 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1670 hw->subsystem_device_id = pdev->subsystem_device;
1671
1672 /* Setup hw api */
1673 memcpy(&hw->mac.ops, fi->mac_ops, sizeof(hw->mac.ops));
1674 hw->mac.type = fi->mac;
1675
1676 /* Setup IOV handlers */
1677 if (fi->iov_ops)
1678 memcpy(&hw->iov.ops, fi->iov_ops, sizeof(hw->iov.ops));
1679
1680 /* Set common capability flags and settings */
1681 rss = min_t(int, FM10K_MAX_RSS_INDICES, num_online_cpus());
1682 interface->ring_feature[RING_F_RSS].limit = rss;
1683 fi->get_invariants(hw);
1684
1685 /* pick up the PCIe bus settings for reporting later */
1686 if (hw->mac.ops.get_bus_info)
1687 hw->mac.ops.get_bus_info(hw);
1688
1689 /* limit the usable DMA range */
1690 if (hw->mac.ops.set_dma_mask)
1691 hw->mac.ops.set_dma_mask(hw, dma_get_mask(&pdev->dev));
1692
1693 /* update netdev with DMA restrictions */
1694 if (dma_get_mask(&pdev->dev) > DMA_BIT_MASK(32)) {
1695 netdev->features |= NETIF_F_HIGHDMA;
1696 netdev->vlan_features |= NETIF_F_HIGHDMA;
1697 }
1698
1699 /* delay any future reset requests */
1700 interface->last_reset = jiffies + (10 * HZ);
1701
1702 /* reset and initialize the hardware so it is in a known state */
1703 err = hw->mac.ops.reset_hw(hw);
1704 if (err) {
1705 dev_err(&pdev->dev, "reset_hw failed: %d\n", err);
1706 return err;
1707 }
1708
1709 err = hw->mac.ops.init_hw(hw);
1710 if (err) {
1711 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
1712 return err;
1713 }
1714
1715 /* initialize hardware statistics */
1716 hw->mac.ops.update_hw_stats(hw, &interface->stats);
1717
1718 /* Set upper limit on IOV VFs that can be allocated */
1719 pci_sriov_set_totalvfs(pdev, hw->iov.total_vfs);
1720
1721 /* Start with random Ethernet address */
1722 eth_random_addr(hw->mac.addr);
1723
1724 /* Initialize MAC address from hardware */
1725 err = hw->mac.ops.read_mac_addr(hw);
1726 if (err) {
1727 dev_warn(&pdev->dev,
1728 "Failed to obtain MAC address defaulting to random\n");
1729 /* tag address assignment as random */
1730 netdev->addr_assign_type |= NET_ADDR_RANDOM;
1731 }
1732
1733 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
1734 ether_addr_copy(netdev->perm_addr, hw->mac.addr);
1735
1736 if (!is_valid_ether_addr(netdev->perm_addr)) {
1737 dev_err(&pdev->dev, "Invalid MAC Address\n");
1738 return -EIO;
1739 }
1740
1741 /* initialize DCBNL interface */
1742 fm10k_dcbnl_set_ops(netdev);
1743
1744 /* set default ring sizes */
1745 interface->tx_ring_count = FM10K_DEFAULT_TXD;
1746 interface->rx_ring_count = FM10K_DEFAULT_RXD;
1747
1748 /* set default interrupt moderation */
1749 interface->tx_itr = FM10K_TX_ITR_DEFAULT;
1750 interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_RX_ITR_DEFAULT;
1751
1752 /* initialize vxlan_port list */
1753 INIT_LIST_HEAD(&interface->vxlan_port);
1754
1755 netdev_rss_key_fill(rss_key, sizeof(rss_key));
1756 memcpy(interface->rssrk, rss_key, sizeof(rss_key));
1757
1758 /* Start off interface as being down */
1759 set_bit(__FM10K_DOWN, &interface->state);
1760
1761 return 0;
1762 }
1763
1764 static void fm10k_slot_warn(struct fm10k_intfc *interface)
1765 {
1766 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
1767 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
1768 struct fm10k_hw *hw = &interface->hw;
1769 int max_gts = 0, expected_gts = 0;
1770
1771 if (pcie_get_minimum_link(interface->pdev, &speed, &width) ||
1772 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
1773 dev_warn(&interface->pdev->dev,
1774 "Unable to determine PCI Express bandwidth.\n");
1775 return;
1776 }
1777
1778 switch (speed) {
1779 case PCIE_SPEED_2_5GT:
1780 /* 8b/10b encoding reduces max throughput by 20% */
1781 max_gts = 2 * width;
1782 break;
1783 case PCIE_SPEED_5_0GT:
1784 /* 8b/10b encoding reduces max throughput by 20% */
1785 max_gts = 4 * width;
1786 break;
1787 case PCIE_SPEED_8_0GT:
1788 /* 128b/130b encoding has less than 2% impact on throughput */
1789 max_gts = 8 * width;
1790 break;
1791 default:
1792 dev_warn(&interface->pdev->dev,
1793 "Unable to determine PCI Express bandwidth.\n");
1794 return;
1795 }
1796
1797 dev_info(&interface->pdev->dev,
1798 "PCI Express bandwidth of %dGT/s available\n",
1799 max_gts);
1800 dev_info(&interface->pdev->dev,
1801 "(Speed:%s, Width: x%d, Encoding Loss:%s, Payload:%s)\n",
1802 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
1803 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
1804 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
1805 "Unknown"),
1806 hw->bus.width,
1807 (speed == PCIE_SPEED_2_5GT ? "20%" :
1808 speed == PCIE_SPEED_5_0GT ? "20%" :
1809 speed == PCIE_SPEED_8_0GT ? "<2%" :
1810 "Unknown"),
1811 (hw->bus.payload == fm10k_bus_payload_128 ? "128B" :
1812 hw->bus.payload == fm10k_bus_payload_256 ? "256B" :
1813 hw->bus.payload == fm10k_bus_payload_512 ? "512B" :
1814 "Unknown"));
1815
1816 switch (hw->bus_caps.speed) {
1817 case fm10k_bus_speed_2500:
1818 /* 8b/10b encoding reduces max throughput by 20% */
1819 expected_gts = 2 * hw->bus_caps.width;
1820 break;
1821 case fm10k_bus_speed_5000:
1822 /* 8b/10b encoding reduces max throughput by 20% */
1823 expected_gts = 4 * hw->bus_caps.width;
1824 break;
1825 case fm10k_bus_speed_8000:
1826 /* 128b/130b encoding has less than 2% impact on throughput */
1827 expected_gts = 8 * hw->bus_caps.width;
1828 break;
1829 default:
1830 dev_warn(&interface->pdev->dev,
1831 "Unable to determine expected PCI Express bandwidth.\n");
1832 return;
1833 }
1834
1835 if (max_gts >= expected_gts)
1836 return;
1837
1838 dev_warn(&interface->pdev->dev,
1839 "This device requires %dGT/s of bandwidth for optimal performance.\n",
1840 expected_gts);
1841 dev_warn(&interface->pdev->dev,
1842 "A %sslot with x%d lanes is suggested.\n",
1843 (hw->bus_caps.speed == fm10k_bus_speed_2500 ? "2.5GT/s " :
1844 hw->bus_caps.speed == fm10k_bus_speed_5000 ? "5.0GT/s " :
1845 hw->bus_caps.speed == fm10k_bus_speed_8000 ? "8.0GT/s " : ""),
1846 hw->bus_caps.width);
1847 }
1848
1849 /**
1850 * fm10k_probe - Device Initialization Routine
1851 * @pdev: PCI device information struct
1852 * @ent: entry in fm10k_pci_tbl
1853 *
1854 * Returns 0 on success, negative on failure
1855 *
1856 * fm10k_probe initializes an interface identified by a pci_dev structure.
1857 * The OS initialization, configuring of the interface private structure,
1858 * and a hardware reset occur.
1859 **/
1860 static int fm10k_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1861 {
1862 struct net_device *netdev;
1863 struct fm10k_intfc *interface;
1864 int err;
1865
1866 err = pci_enable_device_mem(pdev);
1867 if (err)
1868 return err;
1869
1870 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));
1871 if (err)
1872 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
1873 if (err) {
1874 dev_err(&pdev->dev,
1875 "DMA configuration failed: %d\n", err);
1876 goto err_dma;
1877 }
1878
1879 err = pci_request_selected_regions(pdev,
1880 pci_select_bars(pdev,
1881 IORESOURCE_MEM),
1882 fm10k_driver_name);
1883 if (err) {
1884 dev_err(&pdev->dev,
1885 "pci_request_selected_regions failed: %d\n", err);
1886 goto err_pci_reg;
1887 }
1888
1889 pci_enable_pcie_error_reporting(pdev);
1890
1891 pci_set_master(pdev);
1892 pci_save_state(pdev);
1893
1894 netdev = fm10k_alloc_netdev(fm10k_info_tbl[ent->driver_data]);
1895 if (!netdev) {
1896 err = -ENOMEM;
1897 goto err_alloc_netdev;
1898 }
1899
1900 SET_NETDEV_DEV(netdev, &pdev->dev);
1901
1902 interface = netdev_priv(netdev);
1903 pci_set_drvdata(pdev, interface);
1904
1905 interface->netdev = netdev;
1906 interface->pdev = pdev;
1907
1908 interface->uc_addr = ioremap(pci_resource_start(pdev, 0),
1909 FM10K_UC_ADDR_SIZE);
1910 if (!interface->uc_addr) {
1911 err = -EIO;
1912 goto err_ioremap;
1913 }
1914
1915 err = fm10k_sw_init(interface, ent);
1916 if (err)
1917 goto err_sw_init;
1918
1919 /* enable debugfs support */
1920 fm10k_dbg_intfc_init(interface);
1921
1922 err = fm10k_init_queueing_scheme(interface);
1923 if (err)
1924 goto err_sw_init;
1925
1926 /* the mbx interrupt might attempt to schedule the service task, so we
1927 * must ensure it is disabled since we haven't yet requested the timer
1928 * or work item.
1929 */
1930 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
1931
1932 err = fm10k_mbx_request_irq(interface);
1933 if (err)
1934 goto err_mbx_interrupt;
1935
1936 /* final check of hardware state before registering the interface */
1937 err = fm10k_hw_ready(interface);
1938 if (err)
1939 goto err_register;
1940
1941 err = register_netdev(netdev);
1942 if (err)
1943 goto err_register;
1944
1945 /* carrier off reporting is important to ethtool even BEFORE open */
1946 netif_carrier_off(netdev);
1947
1948 /* stop all the transmit queues from transmitting until link is up */
1949 netif_tx_stop_all_queues(netdev);
1950
1951 /* Initialize service timer and service task late in order to avoid
1952 * cleanup issues.
1953 */
1954 setup_timer(&interface->service_timer, &fm10k_service_timer,
1955 (unsigned long)interface);
1956 INIT_WORK(&interface->service_task, fm10k_service_task);
1957
1958 /* kick off service timer now, even when interface is down */
1959 mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
1960
1961 /* print warning for non-optimal configurations */
1962 fm10k_slot_warn(interface);
1963
1964 /* report MAC address for logging */
1965 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
1966
1967 /* enable SR-IOV after registering netdev to enforce PF/VF ordering */
1968 fm10k_iov_configure(pdev, 0);
1969
1970 /* clear the service task disable bit to allow service task to start */
1971 clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
1972
1973 return 0;
1974
1975 err_register:
1976 fm10k_mbx_free_irq(interface);
1977 err_mbx_interrupt:
1978 fm10k_clear_queueing_scheme(interface);
1979 err_sw_init:
1980 if (interface->sw_addr)
1981 iounmap(interface->sw_addr);
1982 iounmap(interface->uc_addr);
1983 err_ioremap:
1984 free_netdev(netdev);
1985 err_alloc_netdev:
1986 pci_release_selected_regions(pdev,
1987 pci_select_bars(pdev, IORESOURCE_MEM));
1988 err_pci_reg:
1989 err_dma:
1990 pci_disable_device(pdev);
1991 return err;
1992 }
1993
1994 /**
1995 * fm10k_remove - Device Removal Routine
1996 * @pdev: PCI device information struct
1997 *
1998 * fm10k_remove is called by the PCI subsystem to alert the driver
1999 * that it should release a PCI device. The could be caused by a
2000 * Hot-Plug event, or because the driver is going to be removed from
2001 * memory.
2002 **/
2003 static void fm10k_remove(struct pci_dev *pdev)
2004 {
2005 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2006 struct net_device *netdev = interface->netdev;
2007
2008 del_timer_sync(&interface->service_timer);
2009
2010 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2011 cancel_work_sync(&interface->service_task);
2012
2013 /* free netdev, this may bounce the interrupts due to setup_tc */
2014 if (netdev->reg_state == NETREG_REGISTERED)
2015 unregister_netdev(netdev);
2016
2017 /* release VFs */
2018 fm10k_iov_disable(pdev);
2019
2020 /* disable mailbox interrupt */
2021 fm10k_mbx_free_irq(interface);
2022
2023 /* free interrupts */
2024 fm10k_clear_queueing_scheme(interface);
2025
2026 /* remove any debugfs interfaces */
2027 fm10k_dbg_intfc_exit(interface);
2028
2029 if (interface->sw_addr)
2030 iounmap(interface->sw_addr);
2031 iounmap(interface->uc_addr);
2032
2033 free_netdev(netdev);
2034
2035 pci_release_selected_regions(pdev,
2036 pci_select_bars(pdev, IORESOURCE_MEM));
2037
2038 pci_disable_pcie_error_reporting(pdev);
2039
2040 pci_disable_device(pdev);
2041 }
2042
2043 #ifdef CONFIG_PM
2044 /**
2045 * fm10k_resume - Restore device to pre-sleep state
2046 * @pdev: PCI device information struct
2047 *
2048 * fm10k_resume is called after the system has powered back up from a sleep
2049 * state and is ready to resume operation. This function is meant to restore
2050 * the device back to its pre-sleep state.
2051 **/
2052 static int fm10k_resume(struct pci_dev *pdev)
2053 {
2054 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2055 struct net_device *netdev = interface->netdev;
2056 struct fm10k_hw *hw = &interface->hw;
2057 u32 err;
2058
2059 pci_set_power_state(pdev, PCI_D0);
2060 pci_restore_state(pdev);
2061
2062 /* pci_restore_state clears dev->state_saved so call
2063 * pci_save_state to restore it.
2064 */
2065 pci_save_state(pdev);
2066
2067 err = pci_enable_device_mem(pdev);
2068 if (err) {
2069 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
2070 return err;
2071 }
2072 pci_set_master(pdev);
2073
2074 pci_wake_from_d3(pdev, false);
2075
2076 /* refresh hw_addr in case it was dropped */
2077 hw->hw_addr = interface->uc_addr;
2078
2079 /* reset hardware to known state */
2080 err = hw->mac.ops.init_hw(&interface->hw);
2081 if (err) {
2082 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
2083 return err;
2084 }
2085
2086 /* reset statistics starting values */
2087 hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
2088
2089 rtnl_lock();
2090
2091 err = fm10k_init_queueing_scheme(interface);
2092 if (err)
2093 goto err_queueing_scheme;
2094
2095 err = fm10k_mbx_request_irq(interface);
2096 if (err)
2097 goto err_mbx_irq;
2098
2099 err = fm10k_hw_ready(interface);
2100 if (err)
2101 goto err_open;
2102
2103 err = netif_running(netdev) ? fm10k_open(netdev) : 0;
2104 if (err)
2105 goto err_open;
2106
2107 rtnl_unlock();
2108
2109 /* assume host is not ready, to prevent race with watchdog in case we
2110 * actually don't have connection to the switch
2111 */
2112 interface->host_ready = false;
2113 fm10k_watchdog_host_not_ready(interface);
2114
2115 /* clear the service task disable bit to allow service task to start */
2116 clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2117 fm10k_service_event_schedule(interface);
2118
2119 /* restore SR-IOV interface */
2120 fm10k_iov_resume(pdev);
2121
2122 netif_device_attach(netdev);
2123
2124 return 0;
2125 err_open:
2126 fm10k_mbx_free_irq(interface);
2127 err_mbx_irq:
2128 fm10k_clear_queueing_scheme(interface);
2129 err_queueing_scheme:
2130 rtnl_unlock();
2131
2132 return err;
2133 }
2134
2135 /**
2136 * fm10k_suspend - Prepare the device for a system sleep state
2137 * @pdev: PCI device information struct
2138 *
2139 * fm10k_suspend is meant to shutdown the device prior to the system entering
2140 * a sleep state. The fm10k hardware does not support wake on lan so the
2141 * driver simply needs to shut down the device so it is in a low power state.
2142 **/
2143 static int fm10k_suspend(struct pci_dev *pdev,
2144 pm_message_t __always_unused state)
2145 {
2146 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2147 struct net_device *netdev = interface->netdev;
2148 int err = 0;
2149
2150 netif_device_detach(netdev);
2151
2152 fm10k_iov_suspend(pdev);
2153
2154 /* the watchdog tasks may read registers, which will appear like a
2155 * surprise-remove event once the PCI device is disabled. This will
2156 * cause us to close the netdevice, so we don't retain the open/closed
2157 * state post-resume. Prevent this by disabling the service task while
2158 * suspended, until we actually resume.
2159 */
2160 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2161 cancel_work_sync(&interface->service_task);
2162
2163 rtnl_lock();
2164
2165 if (netif_running(netdev))
2166 fm10k_close(netdev);
2167
2168 fm10k_mbx_free_irq(interface);
2169
2170 fm10k_clear_queueing_scheme(interface);
2171
2172 rtnl_unlock();
2173
2174 err = pci_save_state(pdev);
2175 if (err)
2176 return err;
2177
2178 pci_disable_device(pdev);
2179 pci_wake_from_d3(pdev, false);
2180 pci_set_power_state(pdev, PCI_D3hot);
2181
2182 return 0;
2183 }
2184
2185 #endif /* CONFIG_PM */
2186 /**
2187 * fm10k_io_error_detected - called when PCI error is detected
2188 * @pdev: Pointer to PCI device
2189 * @state: The current pci connection state
2190 *
2191 * This function is called after a PCI bus error affecting
2192 * this device has been detected.
2193 */
2194 static pci_ers_result_t fm10k_io_error_detected(struct pci_dev *pdev,
2195 pci_channel_state_t state)
2196 {
2197 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2198 struct net_device *netdev = interface->netdev;
2199
2200 netif_device_detach(netdev);
2201
2202 if (state == pci_channel_io_perm_failure)
2203 return PCI_ERS_RESULT_DISCONNECT;
2204
2205 rtnl_lock();
2206
2207 if (netif_running(netdev))
2208 fm10k_close(netdev);
2209
2210 fm10k_mbx_free_irq(interface);
2211
2212 /* free interrupts */
2213 fm10k_clear_queueing_scheme(interface);
2214
2215 rtnl_unlock();
2216
2217 /* Request a slot reset. */
2218 return PCI_ERS_RESULT_NEED_RESET;
2219 }
2220
2221 /**
2222 * fm10k_io_slot_reset - called after the pci bus has been reset.
2223 * @pdev: Pointer to PCI device
2224 *
2225 * Restart the card from scratch, as if from a cold-boot.
2226 */
2227 static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev)
2228 {
2229 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2230 pci_ers_result_t result;
2231
2232 if (pci_enable_device_mem(pdev)) {
2233 dev_err(&pdev->dev,
2234 "Cannot re-enable PCI device after reset.\n");
2235 result = PCI_ERS_RESULT_DISCONNECT;
2236 } else {
2237 pci_set_master(pdev);
2238 pci_restore_state(pdev);
2239
2240 /* After second error pci->state_saved is false, this
2241 * resets it so EEH doesn't break.
2242 */
2243 pci_save_state(pdev);
2244
2245 pci_wake_from_d3(pdev, false);
2246
2247 /* refresh hw_addr in case it was dropped */
2248 interface->hw.hw_addr = interface->uc_addr;
2249
2250 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
2251 fm10k_service_event_schedule(interface);
2252
2253 result = PCI_ERS_RESULT_RECOVERED;
2254 }
2255
2256 pci_cleanup_aer_uncorrect_error_status(pdev);
2257
2258 return result;
2259 }
2260
2261 /**
2262 * fm10k_io_resume - called when traffic can start flowing again.
2263 * @pdev: Pointer to PCI device
2264 *
2265 * This callback is called when the error recovery driver tells us that
2266 * its OK to resume normal operation.
2267 */
2268 static void fm10k_io_resume(struct pci_dev *pdev)
2269 {
2270 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2271 struct net_device *netdev = interface->netdev;
2272 struct fm10k_hw *hw = &interface->hw;
2273 int err = 0;
2274
2275 /* reset hardware to known state */
2276 err = hw->mac.ops.init_hw(&interface->hw);
2277 if (err) {
2278 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
2279 return;
2280 }
2281
2282 /* reset statistics starting values */
2283 hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
2284
2285 rtnl_lock();
2286
2287 err = fm10k_init_queueing_scheme(interface);
2288 if (err) {
2289 dev_err(&interface->pdev->dev,
2290 "init_queueing_scheme failed: %d\n", err);
2291 goto unlock;
2292 }
2293
2294 /* reassociate interrupts */
2295 fm10k_mbx_request_irq(interface);
2296
2297 rtnl_lock();
2298 if (netif_running(netdev))
2299 err = fm10k_open(netdev);
2300 rtnl_unlock();
2301
2302 /* final check of hardware state before registering the interface */
2303 err = err ? : fm10k_hw_ready(interface);
2304
2305 if (!err)
2306 netif_device_attach(netdev);
2307
2308 unlock:
2309 rtnl_unlock();
2310 }
2311
2312 static const struct pci_error_handlers fm10k_err_handler = {
2313 .error_detected = fm10k_io_error_detected,
2314 .slot_reset = fm10k_io_slot_reset,
2315 .resume = fm10k_io_resume,
2316 };
2317
2318 static struct pci_driver fm10k_driver = {
2319 .name = fm10k_driver_name,
2320 .id_table = fm10k_pci_tbl,
2321 .probe = fm10k_probe,
2322 .remove = fm10k_remove,
2323 #ifdef CONFIG_PM
2324 .suspend = fm10k_suspend,
2325 .resume = fm10k_resume,
2326 #endif
2327 .sriov_configure = fm10k_iov_configure,
2328 .err_handler = &fm10k_err_handler
2329 };
2330
2331 /**
2332 * fm10k_register_pci_driver - register driver interface
2333 *
2334 * This function is called on module load in order to register the driver.
2335 **/
2336 int fm10k_register_pci_driver(void)
2337 {
2338 return pci_register_driver(&fm10k_driver);
2339 }
2340
2341 /**
2342 * fm10k_unregister_pci_driver - unregister driver interface
2343 *
2344 * This function is called on module unload in order to remove the driver.
2345 **/
2346 void fm10k_unregister_pci_driver(void)
2347 {
2348 pci_unregister_driver(&fm10k_driver);
2349 }
Linux kernel - Deliverables
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