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fm10k: split fm10k_reinit into two functions
[deliverable/linux.git] / drivers / net / ethernet / intel / fm10k / fm10k_pci.c
1 /* Intel(R) Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2016 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21 #include <linux/module.h>
22 #include <linux/aer.h>
23
24 #include "fm10k.h"
25
26 static const struct fm10k_info *fm10k_info_tbl[] = {
27 [fm10k_device_pf] = &fm10k_pf_info,
28 [fm10k_device_vf] = &fm10k_vf_info,
29 };
30
31 /**
32 * fm10k_pci_tbl - PCI Device ID Table
33 *
34 * Wildcard entries (PCI_ANY_ID) should come last
35 * Last entry must be all 0s
36 *
37 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
38 * Class, Class Mask, private data (not used) }
39 */
40 static const struct pci_device_id fm10k_pci_tbl[] = {
41 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_PF), fm10k_device_pf },
42 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_VF), fm10k_device_vf },
43 /* required last entry */
44 { 0, }
45 };
46 MODULE_DEVICE_TABLE(pci, fm10k_pci_tbl);
47
48 u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg)
49 {
50 struct fm10k_intfc *interface = hw->back;
51 u16 value = 0;
52
53 if (FM10K_REMOVED(hw->hw_addr))
54 return ~value;
55
56 pci_read_config_word(interface->pdev, reg, &value);
57 if (value == 0xFFFF)
58 fm10k_write_flush(hw);
59
60 return value;
61 }
62
63 u32 fm10k_read_reg(struct fm10k_hw *hw, int reg)
64 {
65 u32 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
66 u32 value = 0;
67
68 if (FM10K_REMOVED(hw_addr))
69 return ~value;
70
71 value = readl(&hw_addr[reg]);
72 if (!(~value) && (!reg || !(~readl(hw_addr)))) {
73 struct fm10k_intfc *interface = hw->back;
74 struct net_device *netdev = interface->netdev;
75
76 hw->hw_addr = NULL;
77 netif_device_detach(netdev);
78 netdev_err(netdev, "PCIe link lost, device now detached\n");
79 }
80
81 return value;
82 }
83
84 static int fm10k_hw_ready(struct fm10k_intfc *interface)
85 {
86 struct fm10k_hw *hw = &interface->hw;
87
88 fm10k_write_flush(hw);
89
90 return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0;
91 }
92
93 void fm10k_service_event_schedule(struct fm10k_intfc *interface)
94 {
95 if (!test_bit(__FM10K_SERVICE_DISABLE, &interface->state) &&
96 !test_and_set_bit(__FM10K_SERVICE_SCHED, &interface->state))
97 queue_work(fm10k_workqueue, &interface->service_task);
98 }
99
100 static void fm10k_service_event_complete(struct fm10k_intfc *interface)
101 {
102 WARN_ON(!test_bit(__FM10K_SERVICE_SCHED, &interface->state));
103
104 /* flush memory to make sure state is correct before next watchog */
105 smp_mb__before_atomic();
106 clear_bit(__FM10K_SERVICE_SCHED, &interface->state);
107 }
108
109 /**
110 * fm10k_service_timer - Timer Call-back
111 * @data: pointer to interface cast into an unsigned long
112 **/
113 static void fm10k_service_timer(unsigned long data)
114 {
115 struct fm10k_intfc *interface = (struct fm10k_intfc *)data;
116
117 /* Reset the timer */
118 mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
119
120 fm10k_service_event_schedule(interface);
121 }
122
123 static void fm10k_detach_subtask(struct fm10k_intfc *interface)
124 {
125 struct net_device *netdev = interface->netdev;
126
127 /* do nothing if device is still present or hw_addr is set */
128 if (netif_device_present(netdev) || interface->hw.hw_addr)
129 return;
130
131 rtnl_lock();
132
133 if (netif_running(netdev))
134 dev_close(netdev);
135
136 rtnl_unlock();
137 }
138
139 static void fm10k_prepare_for_reset(struct fm10k_intfc *interface)
140 {
141 struct net_device *netdev = interface->netdev;
142
143 WARN_ON(in_interrupt());
144
145 /* put off any impending NetWatchDogTimeout */
146 netif_trans_update(netdev);
147
148 while (test_and_set_bit(__FM10K_RESETTING, &interface->state))
149 usleep_range(1000, 2000);
150
151 rtnl_lock();
152
153 fm10k_iov_suspend(interface->pdev);
154
155 if (netif_running(netdev))
156 fm10k_close(netdev);
157
158 fm10k_mbx_free_irq(interface);
159
160 /* free interrupts */
161 fm10k_clear_queueing_scheme(interface);
162
163 /* delay any future reset requests */
164 interface->last_reset = jiffies + (10 * HZ);
165
166 rtnl_unlock();
167 }
168
169 static int fm10k_handle_reset(struct fm10k_intfc *interface)
170 {
171 struct net_device *netdev = interface->netdev;
172 struct fm10k_hw *hw = &interface->hw;
173 int err;
174
175 rtnl_lock();
176
177 /* reset and initialize the hardware so it is in a known state */
178 err = hw->mac.ops.reset_hw(hw);
179 if (err) {
180 dev_err(&interface->pdev->dev, "reset_hw failed: %d\n", err);
181 goto reinit_err;
182 }
183
184 err = hw->mac.ops.init_hw(hw);
185 if (err) {
186 dev_err(&interface->pdev->dev, "init_hw failed: %d\n", err);
187 goto reinit_err;
188 }
189
190 err = fm10k_init_queueing_scheme(interface);
191 if (err) {
192 dev_err(&interface->pdev->dev,
193 "init_queueing_scheme failed: %d\n", err);
194 goto reinit_err;
195 }
196
197 /* re-associate interrupts */
198 err = fm10k_mbx_request_irq(interface);
199 if (err)
200 goto err_mbx_irq;
201
202 err = fm10k_hw_ready(interface);
203 if (err)
204 goto err_open;
205
206 /* update hardware address for VFs if perm_addr has changed */
207 if (hw->mac.type == fm10k_mac_vf) {
208 if (is_valid_ether_addr(hw->mac.perm_addr)) {
209 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
210 ether_addr_copy(netdev->perm_addr, hw->mac.perm_addr);
211 ether_addr_copy(netdev->dev_addr, hw->mac.perm_addr);
212 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
213 }
214
215 if (hw->mac.vlan_override)
216 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
217 else
218 netdev->features |= NETIF_F_HW_VLAN_CTAG_RX;
219 }
220
221 err = netif_running(netdev) ? fm10k_open(netdev) : 0;
222 if (err)
223 goto err_open;
224
225 fm10k_iov_resume(interface->pdev);
226
227 rtnl_unlock();
228
229 clear_bit(__FM10K_RESETTING, &interface->state);
230
231 return err;
232 err_open:
233 fm10k_mbx_free_irq(interface);
234 err_mbx_irq:
235 fm10k_clear_queueing_scheme(interface);
236 reinit_err:
237 netif_device_detach(netdev);
238
239 rtnl_unlock();
240
241 clear_bit(__FM10K_RESETTING, &interface->state);
242
243 return err;
244 }
245
246 static void fm10k_reinit(struct fm10k_intfc *interface)
247 {
248 int err;
249
250 fm10k_prepare_for_reset(interface);
251
252 err = fm10k_handle_reset(interface);
253 if (err)
254 dev_err(&interface->pdev->dev,
255 "fm10k_handle_reset failed: %d\n", err);
256 }
257
258 static void fm10k_reset_subtask(struct fm10k_intfc *interface)
259 {
260 if (!(interface->flags & FM10K_FLAG_RESET_REQUESTED))
261 return;
262
263 interface->flags &= ~FM10K_FLAG_RESET_REQUESTED;
264
265 netdev_err(interface->netdev, "Reset interface\n");
266
267 fm10k_reinit(interface);
268 }
269
270 /**
271 * fm10k_configure_swpri_map - Configure Receive SWPRI to PC mapping
272 * @interface: board private structure
273 *
274 * Configure the SWPRI to PC mapping for the port.
275 **/
276 static void fm10k_configure_swpri_map(struct fm10k_intfc *interface)
277 {
278 struct net_device *netdev = interface->netdev;
279 struct fm10k_hw *hw = &interface->hw;
280 int i;
281
282 /* clear flag indicating update is needed */
283 interface->flags &= ~FM10K_FLAG_SWPRI_CONFIG;
284
285 /* these registers are only available on the PF */
286 if (hw->mac.type != fm10k_mac_pf)
287 return;
288
289 /* configure SWPRI to PC map */
290 for (i = 0; i < FM10K_SWPRI_MAX; i++)
291 fm10k_write_reg(hw, FM10K_SWPRI_MAP(i),
292 netdev_get_prio_tc_map(netdev, i));
293 }
294
295 /**
296 * fm10k_watchdog_update_host_state - Update the link status based on host.
297 * @interface: board private structure
298 **/
299 static void fm10k_watchdog_update_host_state(struct fm10k_intfc *interface)
300 {
301 struct fm10k_hw *hw = &interface->hw;
302 s32 err;
303
304 if (test_bit(__FM10K_LINK_DOWN, &interface->state)) {
305 interface->host_ready = false;
306 if (time_is_after_jiffies(interface->link_down_event))
307 return;
308 clear_bit(__FM10K_LINK_DOWN, &interface->state);
309 }
310
311 if (interface->flags & FM10K_FLAG_SWPRI_CONFIG) {
312 if (rtnl_trylock()) {
313 fm10k_configure_swpri_map(interface);
314 rtnl_unlock();
315 }
316 }
317
318 /* lock the mailbox for transmit and receive */
319 fm10k_mbx_lock(interface);
320
321 err = hw->mac.ops.get_host_state(hw, &interface->host_ready);
322 if (err && time_is_before_jiffies(interface->last_reset))
323 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
324
325 /* free the lock */
326 fm10k_mbx_unlock(interface);
327 }
328
329 /**
330 * fm10k_mbx_subtask - Process upstream and downstream mailboxes
331 * @interface: board private structure
332 *
333 * This function will process both the upstream and downstream mailboxes.
334 **/
335 static void fm10k_mbx_subtask(struct fm10k_intfc *interface)
336 {
337 /* process upstream mailbox and update device state */
338 fm10k_watchdog_update_host_state(interface);
339
340 /* process downstream mailboxes */
341 fm10k_iov_mbx(interface);
342 }
343
344 /**
345 * fm10k_watchdog_host_is_ready - Update netdev status based on host ready
346 * @interface: board private structure
347 **/
348 static void fm10k_watchdog_host_is_ready(struct fm10k_intfc *interface)
349 {
350 struct net_device *netdev = interface->netdev;
351
352 /* only continue if link state is currently down */
353 if (netif_carrier_ok(netdev))
354 return;
355
356 netif_info(interface, drv, netdev, "NIC Link is up\n");
357
358 netif_carrier_on(netdev);
359 netif_tx_wake_all_queues(netdev);
360 }
361
362 /**
363 * fm10k_watchdog_host_not_ready - Update netdev status based on host not ready
364 * @interface: board private structure
365 **/
366 static void fm10k_watchdog_host_not_ready(struct fm10k_intfc *interface)
367 {
368 struct net_device *netdev = interface->netdev;
369
370 /* only continue if link state is currently up */
371 if (!netif_carrier_ok(netdev))
372 return;
373
374 netif_info(interface, drv, netdev, "NIC Link is down\n");
375
376 netif_carrier_off(netdev);
377 netif_tx_stop_all_queues(netdev);
378 }
379
380 /**
381 * fm10k_update_stats - Update the board statistics counters.
382 * @interface: board private structure
383 **/
384 void fm10k_update_stats(struct fm10k_intfc *interface)
385 {
386 struct net_device_stats *net_stats = &interface->netdev->stats;
387 struct fm10k_hw *hw = &interface->hw;
388 u64 hw_csum_tx_good = 0, hw_csum_rx_good = 0, rx_length_errors = 0;
389 u64 rx_switch_errors = 0, rx_drops = 0, rx_pp_errors = 0;
390 u64 rx_link_errors = 0;
391 u64 rx_errors = 0, rx_csum_errors = 0, tx_csum_errors = 0;
392 u64 restart_queue = 0, tx_busy = 0, alloc_failed = 0;
393 u64 rx_bytes_nic = 0, rx_pkts_nic = 0, rx_drops_nic = 0;
394 u64 tx_bytes_nic = 0, tx_pkts_nic = 0;
395 u64 bytes, pkts;
396 int i;
397
398 /* ensure only one thread updates stats at a time */
399 if (test_and_set_bit(__FM10K_UPDATING_STATS, &interface->state))
400 return;
401
402 /* do not allow stats update via service task for next second */
403 interface->next_stats_update = jiffies + HZ;
404
405 /* gather some stats to the interface struct that are per queue */
406 for (bytes = 0, pkts = 0, i = 0; i < interface->num_tx_queues; i++) {
407 struct fm10k_ring *tx_ring = READ_ONCE(interface->tx_ring[i]);
408
409 if (!tx_ring)
410 continue;
411
412 restart_queue += tx_ring->tx_stats.restart_queue;
413 tx_busy += tx_ring->tx_stats.tx_busy;
414 tx_csum_errors += tx_ring->tx_stats.csum_err;
415 bytes += tx_ring->stats.bytes;
416 pkts += tx_ring->stats.packets;
417 hw_csum_tx_good += tx_ring->tx_stats.csum_good;
418 }
419
420 interface->restart_queue = restart_queue;
421 interface->tx_busy = tx_busy;
422 net_stats->tx_bytes = bytes;
423 net_stats->tx_packets = pkts;
424 interface->tx_csum_errors = tx_csum_errors;
425 interface->hw_csum_tx_good = hw_csum_tx_good;
426
427 /* gather some stats to the interface struct that are per queue */
428 for (bytes = 0, pkts = 0, i = 0; i < interface->num_rx_queues; i++) {
429 struct fm10k_ring *rx_ring = READ_ONCE(interface->rx_ring[i]);
430
431 if (!rx_ring)
432 continue;
433
434 bytes += rx_ring->stats.bytes;
435 pkts += rx_ring->stats.packets;
436 alloc_failed += rx_ring->rx_stats.alloc_failed;
437 rx_csum_errors += rx_ring->rx_stats.csum_err;
438 rx_errors += rx_ring->rx_stats.errors;
439 hw_csum_rx_good += rx_ring->rx_stats.csum_good;
440 rx_switch_errors += rx_ring->rx_stats.switch_errors;
441 rx_drops += rx_ring->rx_stats.drops;
442 rx_pp_errors += rx_ring->rx_stats.pp_errors;
443 rx_link_errors += rx_ring->rx_stats.link_errors;
444 rx_length_errors += rx_ring->rx_stats.length_errors;
445 }
446
447 net_stats->rx_bytes = bytes;
448 net_stats->rx_packets = pkts;
449 interface->alloc_failed = alloc_failed;
450 interface->rx_csum_errors = rx_csum_errors;
451 interface->hw_csum_rx_good = hw_csum_rx_good;
452 interface->rx_switch_errors = rx_switch_errors;
453 interface->rx_drops = rx_drops;
454 interface->rx_pp_errors = rx_pp_errors;
455 interface->rx_link_errors = rx_link_errors;
456 interface->rx_length_errors = rx_length_errors;
457
458 hw->mac.ops.update_hw_stats(hw, &interface->stats);
459
460 for (i = 0; i < hw->mac.max_queues; i++) {
461 struct fm10k_hw_stats_q *q = &interface->stats.q[i];
462
463 tx_bytes_nic += q->tx_bytes.count;
464 tx_pkts_nic += q->tx_packets.count;
465 rx_bytes_nic += q->rx_bytes.count;
466 rx_pkts_nic += q->rx_packets.count;
467 rx_drops_nic += q->rx_drops.count;
468 }
469
470 interface->tx_bytes_nic = tx_bytes_nic;
471 interface->tx_packets_nic = tx_pkts_nic;
472 interface->rx_bytes_nic = rx_bytes_nic;
473 interface->rx_packets_nic = rx_pkts_nic;
474 interface->rx_drops_nic = rx_drops_nic;
475
476 /* Fill out the OS statistics structure */
477 net_stats->rx_errors = rx_errors;
478 net_stats->rx_dropped = interface->stats.nodesc_drop.count;
479
480 clear_bit(__FM10K_UPDATING_STATS, &interface->state);
481 }
482
483 /**
484 * fm10k_watchdog_flush_tx - flush queues on host not ready
485 * @interface - pointer to the device interface structure
486 **/
487 static void fm10k_watchdog_flush_tx(struct fm10k_intfc *interface)
488 {
489 int some_tx_pending = 0;
490 int i;
491
492 /* nothing to do if carrier is up */
493 if (netif_carrier_ok(interface->netdev))
494 return;
495
496 for (i = 0; i < interface->num_tx_queues; i++) {
497 struct fm10k_ring *tx_ring = interface->tx_ring[i];
498
499 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
500 some_tx_pending = 1;
501 break;
502 }
503 }
504
505 /* We've lost link, so the controller stops DMA, but we've got
506 * queued Tx work that's never going to get done, so reset
507 * controller to flush Tx.
508 */
509 if (some_tx_pending)
510 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
511 }
512
513 /**
514 * fm10k_watchdog_subtask - check and bring link up
515 * @interface - pointer to the device interface structure
516 **/
517 static void fm10k_watchdog_subtask(struct fm10k_intfc *interface)
518 {
519 /* if interface is down do nothing */
520 if (test_bit(__FM10K_DOWN, &interface->state) ||
521 test_bit(__FM10K_RESETTING, &interface->state))
522 return;
523
524 if (interface->host_ready)
525 fm10k_watchdog_host_is_ready(interface);
526 else
527 fm10k_watchdog_host_not_ready(interface);
528
529 /* update stats only once every second */
530 if (time_is_before_jiffies(interface->next_stats_update))
531 fm10k_update_stats(interface);
532
533 /* flush any uncompleted work */
534 fm10k_watchdog_flush_tx(interface);
535 }
536
537 /**
538 * fm10k_check_hang_subtask - check for hung queues and dropped interrupts
539 * @interface - pointer to the device interface structure
540 *
541 * This function serves two purposes. First it strobes the interrupt lines
542 * in order to make certain interrupts are occurring. Secondly it sets the
543 * bits needed to check for TX hangs. As a result we should immediately
544 * determine if a hang has occurred.
545 */
546 static void fm10k_check_hang_subtask(struct fm10k_intfc *interface)
547 {
548 int i;
549
550 /* If we're down or resetting, just bail */
551 if (test_bit(__FM10K_DOWN, &interface->state) ||
552 test_bit(__FM10K_RESETTING, &interface->state))
553 return;
554
555 /* rate limit tx hang checks to only once every 2 seconds */
556 if (time_is_after_eq_jiffies(interface->next_tx_hang_check))
557 return;
558 interface->next_tx_hang_check = jiffies + (2 * HZ);
559
560 if (netif_carrier_ok(interface->netdev)) {
561 /* Force detection of hung controller */
562 for (i = 0; i < interface->num_tx_queues; i++)
563 set_check_for_tx_hang(interface->tx_ring[i]);
564
565 /* Rearm all in-use q_vectors for immediate firing */
566 for (i = 0; i < interface->num_q_vectors; i++) {
567 struct fm10k_q_vector *qv = interface->q_vector[i];
568
569 if (!qv->tx.count && !qv->rx.count)
570 continue;
571 writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr);
572 }
573 }
574 }
575
576 /**
577 * fm10k_service_task - manages and runs subtasks
578 * @work: pointer to work_struct containing our data
579 **/
580 static void fm10k_service_task(struct work_struct *work)
581 {
582 struct fm10k_intfc *interface;
583
584 interface = container_of(work, struct fm10k_intfc, service_task);
585
586 /* tasks run even when interface is down */
587 fm10k_mbx_subtask(interface);
588 fm10k_detach_subtask(interface);
589 fm10k_reset_subtask(interface);
590
591 /* tasks only run when interface is up */
592 fm10k_watchdog_subtask(interface);
593 fm10k_check_hang_subtask(interface);
594
595 /* release lock on service events to allow scheduling next event */
596 fm10k_service_event_complete(interface);
597 }
598
599 /**
600 * fm10k_configure_tx_ring - Configure Tx ring after Reset
601 * @interface: board private structure
602 * @ring: structure containing ring specific data
603 *
604 * Configure the Tx descriptor ring after a reset.
605 **/
606 static void fm10k_configure_tx_ring(struct fm10k_intfc *interface,
607 struct fm10k_ring *ring)
608 {
609 struct fm10k_hw *hw = &interface->hw;
610 u64 tdba = ring->dma;
611 u32 size = ring->count * sizeof(struct fm10k_tx_desc);
612 u32 txint = FM10K_INT_MAP_DISABLE;
613 u32 txdctl = BIT(FM10K_TXDCTL_MAX_TIME_SHIFT) | FM10K_TXDCTL_ENABLE;
614 u8 reg_idx = ring->reg_idx;
615
616 /* disable queue to avoid issues while updating state */
617 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0);
618 fm10k_write_flush(hw);
619
620 /* possible poll here to verify ring resources have been cleaned */
621
622 /* set location and size for descriptor ring */
623 fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
624 fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32);
625 fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size);
626
627 /* reset head and tail pointers */
628 fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0);
629 fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0);
630
631 /* store tail pointer */
632 ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)];
633
634 /* reset ntu and ntc to place SW in sync with hardware */
635 ring->next_to_clean = 0;
636 ring->next_to_use = 0;
637
638 /* Map interrupt */
639 if (ring->q_vector) {
640 txint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
641 txint |= FM10K_INT_MAP_TIMER0;
642 }
643
644 fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txint);
645
646 /* enable use of FTAG bit in Tx descriptor, register is RO for VF */
647 fm10k_write_reg(hw, FM10K_PFVTCTL(reg_idx),
648 FM10K_PFVTCTL_FTAG_DESC_ENABLE);
649
650 /* Initialize XPS */
651 if (!test_and_set_bit(__FM10K_TX_XPS_INIT_DONE, &ring->state) &&
652 ring->q_vector)
653 netif_set_xps_queue(ring->netdev,
654 &ring->q_vector->affinity_mask,
655 ring->queue_index);
656
657 /* enable queue */
658 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl);
659 }
660
661 /**
662 * fm10k_enable_tx_ring - Verify Tx ring is enabled after configuration
663 * @interface: board private structure
664 * @ring: structure containing ring specific data
665 *
666 * Verify the Tx descriptor ring is ready for transmit.
667 **/
668 static void fm10k_enable_tx_ring(struct fm10k_intfc *interface,
669 struct fm10k_ring *ring)
670 {
671 struct fm10k_hw *hw = &interface->hw;
672 int wait_loop = 10;
673 u32 txdctl;
674 u8 reg_idx = ring->reg_idx;
675
676 /* if we are already enabled just exit */
677 if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE)
678 return;
679
680 /* poll to verify queue is enabled */
681 do {
682 usleep_range(1000, 2000);
683 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx));
684 } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop);
685 if (!wait_loop)
686 netif_err(interface, drv, interface->netdev,
687 "Could not enable Tx Queue %d\n", reg_idx);
688 }
689
690 /**
691 * fm10k_configure_tx - Configure Transmit Unit after Reset
692 * @interface: board private structure
693 *
694 * Configure the Tx unit of the MAC after a reset.
695 **/
696 static void fm10k_configure_tx(struct fm10k_intfc *interface)
697 {
698 int i;
699
700 /* Setup the HW Tx Head and Tail descriptor pointers */
701 for (i = 0; i < interface->num_tx_queues; i++)
702 fm10k_configure_tx_ring(interface, interface->tx_ring[i]);
703
704 /* poll here to verify that Tx rings are now enabled */
705 for (i = 0; i < interface->num_tx_queues; i++)
706 fm10k_enable_tx_ring(interface, interface->tx_ring[i]);
707 }
708
709 /**
710 * fm10k_configure_rx_ring - Configure Rx ring after Reset
711 * @interface: board private structure
712 * @ring: structure containing ring specific data
713 *
714 * Configure the Rx descriptor ring after a reset.
715 **/
716 static void fm10k_configure_rx_ring(struct fm10k_intfc *interface,
717 struct fm10k_ring *ring)
718 {
719 u64 rdba = ring->dma;
720 struct fm10k_hw *hw = &interface->hw;
721 u32 size = ring->count * sizeof(union fm10k_rx_desc);
722 u32 rxqctl = FM10K_RXQCTL_ENABLE | FM10K_RXQCTL_PF;
723 u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
724 u32 srrctl = FM10K_SRRCTL_BUFFER_CHAINING_EN;
725 u32 rxint = FM10K_INT_MAP_DISABLE;
726 u8 rx_pause = interface->rx_pause;
727 u8 reg_idx = ring->reg_idx;
728
729 /* disable queue to avoid issues while updating state */
730 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), 0);
731 fm10k_write_flush(hw);
732
733 /* possible poll here to verify ring resources have been cleaned */
734
735 /* set location and size for descriptor ring */
736 fm10k_write_reg(hw, FM10K_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
737 fm10k_write_reg(hw, FM10K_RDBAH(reg_idx), rdba >> 32);
738 fm10k_write_reg(hw, FM10K_RDLEN(reg_idx), size);
739
740 /* reset head and tail pointers */
741 fm10k_write_reg(hw, FM10K_RDH(reg_idx), 0);
742 fm10k_write_reg(hw, FM10K_RDT(reg_idx), 0);
743
744 /* store tail pointer */
745 ring->tail = &interface->uc_addr[FM10K_RDT(reg_idx)];
746
747 /* reset ntu and ntc to place SW in sync with hardware */
748 ring->next_to_clean = 0;
749 ring->next_to_use = 0;
750 ring->next_to_alloc = 0;
751
752 /* Configure the Rx buffer size for one buff without split */
753 srrctl |= FM10K_RX_BUFSZ >> FM10K_SRRCTL_BSIZEPKT_SHIFT;
754
755 /* Configure the Rx ring to suppress loopback packets */
756 srrctl |= FM10K_SRRCTL_LOOPBACK_SUPPRESS;
757 fm10k_write_reg(hw, FM10K_SRRCTL(reg_idx), srrctl);
758
759 /* Enable drop on empty */
760 #ifdef CONFIG_DCB
761 if (interface->pfc_en)
762 rx_pause = interface->pfc_en;
763 #endif
764 if (!(rx_pause & BIT(ring->qos_pc)))
765 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
766
767 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
768
769 /* assign default VLAN to queue */
770 ring->vid = hw->mac.default_vid;
771
772 /* if we have an active VLAN, disable default VLAN ID */
773 if (test_bit(hw->mac.default_vid, interface->active_vlans))
774 ring->vid |= FM10K_VLAN_CLEAR;
775
776 /* Map interrupt */
777 if (ring->q_vector) {
778 rxint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
779 rxint |= FM10K_INT_MAP_TIMER1;
780 }
781
782 fm10k_write_reg(hw, FM10K_RXINT(reg_idx), rxint);
783
784 /* enable queue */
785 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl);
786
787 /* place buffers on ring for receive data */
788 fm10k_alloc_rx_buffers(ring, fm10k_desc_unused(ring));
789 }
790
791 /**
792 * fm10k_update_rx_drop_en - Configures the drop enable bits for Rx rings
793 * @interface: board private structure
794 *
795 * Configure the drop enable bits for the Rx rings.
796 **/
797 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface)
798 {
799 struct fm10k_hw *hw = &interface->hw;
800 u8 rx_pause = interface->rx_pause;
801 int i;
802
803 #ifdef CONFIG_DCB
804 if (interface->pfc_en)
805 rx_pause = interface->pfc_en;
806
807 #endif
808 for (i = 0; i < interface->num_rx_queues; i++) {
809 struct fm10k_ring *ring = interface->rx_ring[i];
810 u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
811 u8 reg_idx = ring->reg_idx;
812
813 if (!(rx_pause & BIT(ring->qos_pc)))
814 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
815
816 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
817 }
818 }
819
820 /**
821 * fm10k_configure_dglort - Configure Receive DGLORT after reset
822 * @interface: board private structure
823 *
824 * Configure the DGLORT description and RSS tables.
825 **/
826 static void fm10k_configure_dglort(struct fm10k_intfc *interface)
827 {
828 struct fm10k_dglort_cfg dglort = { 0 };
829 struct fm10k_hw *hw = &interface->hw;
830 int i;
831 u32 mrqc;
832
833 /* Fill out hash function seeds */
834 for (i = 0; i < FM10K_RSSRK_SIZE; i++)
835 fm10k_write_reg(hw, FM10K_RSSRK(0, i), interface->rssrk[i]);
836
837 /* Write RETA table to hardware */
838 for (i = 0; i < FM10K_RETA_SIZE; i++)
839 fm10k_write_reg(hw, FM10K_RETA(0, i), interface->reta[i]);
840
841 /* Generate RSS hash based on packet types, TCP/UDP
842 * port numbers and/or IPv4/v6 src and dst addresses
843 */
844 mrqc = FM10K_MRQC_IPV4 |
845 FM10K_MRQC_TCP_IPV4 |
846 FM10K_MRQC_IPV6 |
847 FM10K_MRQC_TCP_IPV6;
848
849 if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP)
850 mrqc |= FM10K_MRQC_UDP_IPV4;
851 if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP)
852 mrqc |= FM10K_MRQC_UDP_IPV6;
853
854 fm10k_write_reg(hw, FM10K_MRQC(0), mrqc);
855
856 /* configure default DGLORT mapping for RSS/DCB */
857 dglort.inner_rss = 1;
858 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
859 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
860 hw->mac.ops.configure_dglort_map(hw, &dglort);
861
862 /* assign GLORT per queue for queue mapped testing */
863 if (interface->glort_count > 64) {
864 memset(&dglort, 0, sizeof(dglort));
865 dglort.inner_rss = 1;
866 dglort.glort = interface->glort + 64;
867 dglort.idx = fm10k_dglort_pf_queue;
868 dglort.queue_l = fls(interface->num_rx_queues - 1);
869 hw->mac.ops.configure_dglort_map(hw, &dglort);
870 }
871
872 /* assign glort value for RSS/DCB specific to this interface */
873 memset(&dglort, 0, sizeof(dglort));
874 dglort.inner_rss = 1;
875 dglort.glort = interface->glort;
876 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
877 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
878 /* configure DGLORT mapping for RSS/DCB */
879 dglort.idx = fm10k_dglort_pf_rss;
880 if (interface->l2_accel)
881 dglort.shared_l = fls(interface->l2_accel->size);
882 hw->mac.ops.configure_dglort_map(hw, &dglort);
883 }
884
885 /**
886 * fm10k_configure_rx - Configure Receive Unit after Reset
887 * @interface: board private structure
888 *
889 * Configure the Rx unit of the MAC after a reset.
890 **/
891 static void fm10k_configure_rx(struct fm10k_intfc *interface)
892 {
893 int i;
894
895 /* Configure SWPRI to PC map */
896 fm10k_configure_swpri_map(interface);
897
898 /* Configure RSS and DGLORT map */
899 fm10k_configure_dglort(interface);
900
901 /* Setup the HW Rx Head and Tail descriptor pointers */
902 for (i = 0; i < interface->num_rx_queues; i++)
903 fm10k_configure_rx_ring(interface, interface->rx_ring[i]);
904
905 /* possible poll here to verify that Rx rings are now enabled */
906 }
907
908 static void fm10k_napi_enable_all(struct fm10k_intfc *interface)
909 {
910 struct fm10k_q_vector *q_vector;
911 int q_idx;
912
913 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
914 q_vector = interface->q_vector[q_idx];
915 napi_enable(&q_vector->napi);
916 }
917 }
918
919 static irqreturn_t fm10k_msix_clean_rings(int __always_unused irq, void *data)
920 {
921 struct fm10k_q_vector *q_vector = data;
922
923 if (q_vector->rx.count || q_vector->tx.count)
924 napi_schedule_irqoff(&q_vector->napi);
925
926 return IRQ_HANDLED;
927 }
928
929 static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data)
930 {
931 struct fm10k_intfc *interface = data;
932 struct fm10k_hw *hw = &interface->hw;
933 struct fm10k_mbx_info *mbx = &hw->mbx;
934
935 /* re-enable mailbox interrupt and indicate 20us delay */
936 fm10k_write_reg(hw, FM10K_VFITR(FM10K_MBX_VECTOR),
937 (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
938 FM10K_ITR_ENABLE);
939
940 /* service upstream mailbox */
941 if (fm10k_mbx_trylock(interface)) {
942 mbx->ops.process(hw, mbx);
943 fm10k_mbx_unlock(interface);
944 }
945
946 hw->mac.get_host_state = true;
947 fm10k_service_event_schedule(interface);
948
949 return IRQ_HANDLED;
950 }
951
952 #ifdef CONFIG_NET_POLL_CONTROLLER
953 /**
954 * fm10k_netpoll - A Polling 'interrupt' handler
955 * @netdev: network interface device structure
956 *
957 * This is used by netconsole to send skbs without having to re-enable
958 * interrupts. It's not called while the normal interrupt routine is executing.
959 **/
960 void fm10k_netpoll(struct net_device *netdev)
961 {
962 struct fm10k_intfc *interface = netdev_priv(netdev);
963 int i;
964
965 /* if interface is down do nothing */
966 if (test_bit(__FM10K_DOWN, &interface->state))
967 return;
968
969 for (i = 0; i < interface->num_q_vectors; i++)
970 fm10k_msix_clean_rings(0, interface->q_vector[i]);
971 }
972
973 #endif
974 #define FM10K_ERR_MSG(type) case (type): error = #type; break
975 static void fm10k_handle_fault(struct fm10k_intfc *interface, int type,
976 struct fm10k_fault *fault)
977 {
978 struct pci_dev *pdev = interface->pdev;
979 struct fm10k_hw *hw = &interface->hw;
980 struct fm10k_iov_data *iov_data = interface->iov_data;
981 char *error;
982
983 switch (type) {
984 case FM10K_PCA_FAULT:
985 switch (fault->type) {
986 default:
987 error = "Unknown PCA error";
988 break;
989 FM10K_ERR_MSG(PCA_NO_FAULT);
990 FM10K_ERR_MSG(PCA_UNMAPPED_ADDR);
991 FM10K_ERR_MSG(PCA_BAD_QACCESS_PF);
992 FM10K_ERR_MSG(PCA_BAD_QACCESS_VF);
993 FM10K_ERR_MSG(PCA_MALICIOUS_REQ);
994 FM10K_ERR_MSG(PCA_POISONED_TLP);
995 FM10K_ERR_MSG(PCA_TLP_ABORT);
996 }
997 break;
998 case FM10K_THI_FAULT:
999 switch (fault->type) {
1000 default:
1001 error = "Unknown THI error";
1002 break;
1003 FM10K_ERR_MSG(THI_NO_FAULT);
1004 FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT);
1005 }
1006 break;
1007 case FM10K_FUM_FAULT:
1008 switch (fault->type) {
1009 default:
1010 error = "Unknown FUM error";
1011 break;
1012 FM10K_ERR_MSG(FUM_NO_FAULT);
1013 FM10K_ERR_MSG(FUM_UNMAPPED_ADDR);
1014 FM10K_ERR_MSG(FUM_BAD_VF_QACCESS);
1015 FM10K_ERR_MSG(FUM_ADD_DECODE_ERR);
1016 FM10K_ERR_MSG(FUM_RO_ERROR);
1017 FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR);
1018 FM10K_ERR_MSG(FUM_CSR_TIMEOUT);
1019 FM10K_ERR_MSG(FUM_INVALID_TYPE);
1020 FM10K_ERR_MSG(FUM_INVALID_LENGTH);
1021 FM10K_ERR_MSG(FUM_INVALID_BE);
1022 FM10K_ERR_MSG(FUM_INVALID_ALIGN);
1023 }
1024 break;
1025 default:
1026 error = "Undocumented fault";
1027 break;
1028 }
1029
1030 dev_warn(&pdev->dev,
1031 "%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n",
1032 error, fault->address, fault->specinfo,
1033 PCI_SLOT(fault->func), PCI_FUNC(fault->func));
1034
1035 /* For VF faults, clear out the respective LPORT, reset the queue
1036 * resources, and then reconnect to the mailbox. This allows the
1037 * VF in question to resume behavior. For transient faults that are
1038 * the result of non-malicious behavior this will log the fault and
1039 * allow the VF to resume functionality. Obviously for malicious VFs
1040 * they will be able to attempt malicious behavior again. In this
1041 * case, the system administrator will need to step in and manually
1042 * remove or disable the VF in question.
1043 */
1044 if (fault->func && iov_data) {
1045 int vf = fault->func - 1;
1046 struct fm10k_vf_info *vf_info = &iov_data->vf_info[vf];
1047
1048 hw->iov.ops.reset_lport(hw, vf_info);
1049 hw->iov.ops.reset_resources(hw, vf_info);
1050
1051 /* reset_lport disables the VF, so re-enable it */
1052 hw->iov.ops.set_lport(hw, vf_info, vf,
1053 FM10K_VF_FLAG_MULTI_CAPABLE);
1054
1055 /* reset_resources will disconnect from the mbx */
1056 vf_info->mbx.ops.connect(hw, &vf_info->mbx);
1057 }
1058 }
1059
1060 static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr)
1061 {
1062 struct fm10k_hw *hw = &interface->hw;
1063 struct fm10k_fault fault = { 0 };
1064 int type, err;
1065
1066 for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT;
1067 eicr;
1068 eicr >>= 1, type += FM10K_FAULT_SIZE) {
1069 /* only check if there is an error reported */
1070 if (!(eicr & 0x1))
1071 continue;
1072
1073 /* retrieve fault info */
1074 err = hw->mac.ops.get_fault(hw, type, &fault);
1075 if (err) {
1076 dev_err(&interface->pdev->dev,
1077 "error reading fault\n");
1078 continue;
1079 }
1080
1081 fm10k_handle_fault(interface, type, &fault);
1082 }
1083 }
1084
1085 static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr)
1086 {
1087 struct fm10k_hw *hw = &interface->hw;
1088 const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
1089 u32 maxholdq;
1090 int q;
1091
1092 if (!(eicr & FM10K_EICR_MAXHOLDTIME))
1093 return;
1094
1095 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7));
1096 if (maxholdq)
1097 fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq);
1098 for (q = 255;;) {
1099 if (maxholdq & BIT(31)) {
1100 if (q < FM10K_MAX_QUEUES_PF) {
1101 interface->rx_overrun_pf++;
1102 fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl);
1103 } else {
1104 interface->rx_overrun_vf++;
1105 }
1106 }
1107
1108 maxholdq *= 2;
1109 if (!maxholdq)
1110 q &= ~(32 - 1);
1111
1112 if (!q)
1113 break;
1114
1115 if (q-- % 32)
1116 continue;
1117
1118 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32));
1119 if (maxholdq)
1120 fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq);
1121 }
1122 }
1123
1124 static irqreturn_t fm10k_msix_mbx_pf(int __always_unused irq, void *data)
1125 {
1126 struct fm10k_intfc *interface = data;
1127 struct fm10k_hw *hw = &interface->hw;
1128 struct fm10k_mbx_info *mbx = &hw->mbx;
1129 u32 eicr;
1130
1131 /* unmask any set bits related to this interrupt */
1132 eicr = fm10k_read_reg(hw, FM10K_EICR);
1133 fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX |
1134 FM10K_EICR_SWITCHREADY |
1135 FM10K_EICR_SWITCHNOTREADY));
1136
1137 /* report any faults found to the message log */
1138 fm10k_report_fault(interface, eicr);
1139
1140 /* reset any queues disabled due to receiver overrun */
1141 fm10k_reset_drop_on_empty(interface, eicr);
1142
1143 /* service mailboxes */
1144 if (fm10k_mbx_trylock(interface)) {
1145 mbx->ops.process(hw, mbx);
1146 /* handle VFLRE events */
1147 fm10k_iov_event(interface);
1148 fm10k_mbx_unlock(interface);
1149 }
1150
1151 /* if switch toggled state we should reset GLORTs */
1152 if (eicr & FM10K_EICR_SWITCHNOTREADY) {
1153 /* force link down for at least 4 seconds */
1154 interface->link_down_event = jiffies + (4 * HZ);
1155 set_bit(__FM10K_LINK_DOWN, &interface->state);
1156
1157 /* reset dglort_map back to no config */
1158 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
1159 }
1160
1161 /* we should validate host state after interrupt event */
1162 hw->mac.get_host_state = true;
1163
1164 /* validate host state, and handle VF mailboxes in the service task */
1165 fm10k_service_event_schedule(interface);
1166
1167 /* re-enable mailbox interrupt and indicate 20us delay */
1168 fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR),
1169 (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
1170 FM10K_ITR_ENABLE);
1171
1172 return IRQ_HANDLED;
1173 }
1174
1175 void fm10k_mbx_free_irq(struct fm10k_intfc *interface)
1176 {
1177 struct fm10k_hw *hw = &interface->hw;
1178 struct msix_entry *entry;
1179 int itr_reg;
1180
1181 /* no mailbox IRQ to free if MSI-X is not enabled */
1182 if (!interface->msix_entries)
1183 return;
1184
1185 entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1186
1187 /* disconnect the mailbox */
1188 hw->mbx.ops.disconnect(hw, &hw->mbx);
1189
1190 /* disable Mailbox cause */
1191 if (hw->mac.type == fm10k_mac_pf) {
1192 fm10k_write_reg(hw, FM10K_EIMR,
1193 FM10K_EIMR_DISABLE(PCA_FAULT) |
1194 FM10K_EIMR_DISABLE(FUM_FAULT) |
1195 FM10K_EIMR_DISABLE(MAILBOX) |
1196 FM10K_EIMR_DISABLE(SWITCHREADY) |
1197 FM10K_EIMR_DISABLE(SWITCHNOTREADY) |
1198 FM10K_EIMR_DISABLE(SRAMERROR) |
1199 FM10K_EIMR_DISABLE(VFLR) |
1200 FM10K_EIMR_DISABLE(MAXHOLDTIME));
1201 itr_reg = FM10K_ITR(FM10K_MBX_VECTOR);
1202 } else {
1203 itr_reg = FM10K_VFITR(FM10K_MBX_VECTOR);
1204 }
1205
1206 fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET);
1207
1208 free_irq(entry->vector, interface);
1209 }
1210
1211 static s32 fm10k_mbx_mac_addr(struct fm10k_hw *hw, u32 **results,
1212 struct fm10k_mbx_info *mbx)
1213 {
1214 bool vlan_override = hw->mac.vlan_override;
1215 u16 default_vid = hw->mac.default_vid;
1216 struct fm10k_intfc *interface;
1217 s32 err;
1218
1219 err = fm10k_msg_mac_vlan_vf(hw, results, mbx);
1220 if (err)
1221 return err;
1222
1223 interface = container_of(hw, struct fm10k_intfc, hw);
1224
1225 /* MAC was changed so we need reset */
1226 if (is_valid_ether_addr(hw->mac.perm_addr) &&
1227 !ether_addr_equal(hw->mac.perm_addr, hw->mac.addr))
1228 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1229
1230 /* VLAN override was changed, or default VLAN changed */
1231 if ((vlan_override != hw->mac.vlan_override) ||
1232 (default_vid != hw->mac.default_vid))
1233 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1234
1235 return 0;
1236 }
1237
1238 /* generic error handler for mailbox issues */
1239 static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results,
1240 struct fm10k_mbx_info __always_unused *mbx)
1241 {
1242 struct fm10k_intfc *interface;
1243 struct pci_dev *pdev;
1244
1245 interface = container_of(hw, struct fm10k_intfc, hw);
1246 pdev = interface->pdev;
1247
1248 dev_err(&pdev->dev, "Unknown message ID %u\n",
1249 **results & FM10K_TLV_ID_MASK);
1250
1251 return 0;
1252 }
1253
1254 static const struct fm10k_msg_data vf_mbx_data[] = {
1255 FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test),
1256 FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_mbx_mac_addr),
1257 FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf),
1258 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
1259 };
1260
1261 static int fm10k_mbx_request_irq_vf(struct fm10k_intfc *interface)
1262 {
1263 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1264 struct net_device *dev = interface->netdev;
1265 struct fm10k_hw *hw = &interface->hw;
1266 int err;
1267
1268 /* Use timer0 for interrupt moderation on the mailbox */
1269 u32 itr = entry->entry | FM10K_INT_MAP_TIMER0;
1270
1271 /* register mailbox handlers */
1272 err = hw->mbx.ops.register_handlers(&hw->mbx, vf_mbx_data);
1273 if (err)
1274 return err;
1275
1276 /* request the IRQ */
1277 err = request_irq(entry->vector, fm10k_msix_mbx_vf, 0,
1278 dev->name, interface);
1279 if (err) {
1280 netif_err(interface, probe, dev,
1281 "request_irq for msix_mbx failed: %d\n", err);
1282 return err;
1283 }
1284
1285 /* map all of the interrupt sources */
1286 fm10k_write_reg(hw, FM10K_VFINT_MAP, itr);
1287
1288 /* enable interrupt */
1289 fm10k_write_reg(hw, FM10K_VFITR(entry->entry), FM10K_ITR_ENABLE);
1290
1291 return 0;
1292 }
1293
1294 static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results,
1295 struct fm10k_mbx_info *mbx)
1296 {
1297 struct fm10k_intfc *interface;
1298 u32 dglort_map = hw->mac.dglort_map;
1299 s32 err;
1300
1301 interface = container_of(hw, struct fm10k_intfc, hw);
1302
1303 err = fm10k_msg_err_pf(hw, results, mbx);
1304 if (!err && hw->swapi.status) {
1305 /* force link down for a reasonable delay */
1306 interface->link_down_event = jiffies + (2 * HZ);
1307 set_bit(__FM10K_LINK_DOWN, &interface->state);
1308
1309 /* reset dglort_map back to no config */
1310 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
1311
1312 fm10k_service_event_schedule(interface);
1313
1314 /* prevent overloading kernel message buffer */
1315 if (interface->lport_map_failed)
1316 return 0;
1317
1318 interface->lport_map_failed = true;
1319
1320 if (hw->swapi.status == FM10K_MSG_ERR_PEP_NOT_SCHEDULED)
1321 dev_warn(&interface->pdev->dev,
1322 "cannot obtain link because the host interface is configured for a PCIe host interface bandwidth of zero\n");
1323 dev_warn(&interface->pdev->dev,
1324 "request logical port map failed: %d\n",
1325 hw->swapi.status);
1326
1327 return 0;
1328 }
1329
1330 err = fm10k_msg_lport_map_pf(hw, results, mbx);
1331 if (err)
1332 return err;
1333
1334 interface->lport_map_failed = false;
1335
1336 /* we need to reset if port count was just updated */
1337 if (dglort_map != hw->mac.dglort_map)
1338 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1339
1340 return 0;
1341 }
1342
1343 static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results,
1344 struct fm10k_mbx_info __always_unused *mbx)
1345 {
1346 struct fm10k_intfc *interface;
1347 u16 glort, pvid;
1348 u32 pvid_update;
1349 s32 err;
1350
1351 err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID],
1352 &pvid_update);
1353 if (err)
1354 return err;
1355
1356 /* extract values from the pvid update */
1357 glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT);
1358 pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID);
1359
1360 /* if glort is not valid return error */
1361 if (!fm10k_glort_valid_pf(hw, glort))
1362 return FM10K_ERR_PARAM;
1363
1364 /* verify VLAN ID is valid */
1365 if (pvid >= FM10K_VLAN_TABLE_VID_MAX)
1366 return FM10K_ERR_PARAM;
1367
1368 interface = container_of(hw, struct fm10k_intfc, hw);
1369
1370 /* check to see if this belongs to one of the VFs */
1371 err = fm10k_iov_update_pvid(interface, glort, pvid);
1372 if (!err)
1373 return 0;
1374
1375 /* we need to reset if default VLAN was just updated */
1376 if (pvid != hw->mac.default_vid)
1377 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1378
1379 hw->mac.default_vid = pvid;
1380
1381 return 0;
1382 }
1383
1384 static const struct fm10k_msg_data pf_mbx_data[] = {
1385 FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf),
1386 FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf),
1387 FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map),
1388 FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf),
1389 FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf),
1390 FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid),
1391 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
1392 };
1393
1394 static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface)
1395 {
1396 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1397 struct net_device *dev = interface->netdev;
1398 struct fm10k_hw *hw = &interface->hw;
1399 int err;
1400
1401 /* Use timer0 for interrupt moderation on the mailbox */
1402 u32 mbx_itr = entry->entry | FM10K_INT_MAP_TIMER0;
1403 u32 other_itr = entry->entry | FM10K_INT_MAP_IMMEDIATE;
1404
1405 /* register mailbox handlers */
1406 err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data);
1407 if (err)
1408 return err;
1409
1410 /* request the IRQ */
1411 err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0,
1412 dev->name, interface);
1413 if (err) {
1414 netif_err(interface, probe, dev,
1415 "request_irq for msix_mbx failed: %d\n", err);
1416 return err;
1417 }
1418
1419 /* Enable interrupts w/ no moderation for "other" interrupts */
1420 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_pcie_fault), other_itr);
1421 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_switch_up_down), other_itr);
1422 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_sram), other_itr);
1423 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_max_hold_time), other_itr);
1424 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_vflr), other_itr);
1425
1426 /* Enable interrupts w/ moderation for mailbox */
1427 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_mailbox), mbx_itr);
1428
1429 /* Enable individual interrupt causes */
1430 fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) |
1431 FM10K_EIMR_ENABLE(FUM_FAULT) |
1432 FM10K_EIMR_ENABLE(MAILBOX) |
1433 FM10K_EIMR_ENABLE(SWITCHREADY) |
1434 FM10K_EIMR_ENABLE(SWITCHNOTREADY) |
1435 FM10K_EIMR_ENABLE(SRAMERROR) |
1436 FM10K_EIMR_ENABLE(VFLR) |
1437 FM10K_EIMR_ENABLE(MAXHOLDTIME));
1438
1439 /* enable interrupt */
1440 fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE);
1441
1442 return 0;
1443 }
1444
1445 int fm10k_mbx_request_irq(struct fm10k_intfc *interface)
1446 {
1447 struct fm10k_hw *hw = &interface->hw;
1448 int err;
1449
1450 /* enable Mailbox cause */
1451 if (hw->mac.type == fm10k_mac_pf)
1452 err = fm10k_mbx_request_irq_pf(interface);
1453 else
1454 err = fm10k_mbx_request_irq_vf(interface);
1455 if (err)
1456 return err;
1457
1458 /* connect mailbox */
1459 err = hw->mbx.ops.connect(hw, &hw->mbx);
1460
1461 /* if the mailbox failed to connect, then free IRQ */
1462 if (err)
1463 fm10k_mbx_free_irq(interface);
1464
1465 return err;
1466 }
1467
1468 /**
1469 * fm10k_qv_free_irq - release interrupts associated with queue vectors
1470 * @interface: board private structure
1471 *
1472 * Release all interrupts associated with this interface
1473 **/
1474 void fm10k_qv_free_irq(struct fm10k_intfc *interface)
1475 {
1476 int vector = interface->num_q_vectors;
1477 struct fm10k_hw *hw = &interface->hw;
1478 struct msix_entry *entry;
1479
1480 entry = &interface->msix_entries[NON_Q_VECTORS(hw) + vector];
1481
1482 while (vector) {
1483 struct fm10k_q_vector *q_vector;
1484
1485 vector--;
1486 entry--;
1487 q_vector = interface->q_vector[vector];
1488
1489 if (!q_vector->tx.count && !q_vector->rx.count)
1490 continue;
1491
1492 /* clear the affinity_mask in the IRQ descriptor */
1493 irq_set_affinity_hint(entry->vector, NULL);
1494
1495 /* disable interrupts */
1496 writel(FM10K_ITR_MASK_SET, q_vector->itr);
1497
1498 free_irq(entry->vector, q_vector);
1499 }
1500 }
1501
1502 /**
1503 * fm10k_qv_request_irq - initialize interrupts for queue vectors
1504 * @interface: board private structure
1505 *
1506 * Attempts to configure interrupts using the best available
1507 * capabilities of the hardware and kernel.
1508 **/
1509 int fm10k_qv_request_irq(struct fm10k_intfc *interface)
1510 {
1511 struct net_device *dev = interface->netdev;
1512 struct fm10k_hw *hw = &interface->hw;
1513 struct msix_entry *entry;
1514 int ri = 0, ti = 0;
1515 int vector, err;
1516
1517 entry = &interface->msix_entries[NON_Q_VECTORS(hw)];
1518
1519 for (vector = 0; vector < interface->num_q_vectors; vector++) {
1520 struct fm10k_q_vector *q_vector = interface->q_vector[vector];
1521
1522 /* name the vector */
1523 if (q_vector->tx.count && q_vector->rx.count) {
1524 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1525 "%s-TxRx-%d", dev->name, ri++);
1526 ti++;
1527 } else if (q_vector->rx.count) {
1528 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1529 "%s-rx-%d", dev->name, ri++);
1530 } else if (q_vector->tx.count) {
1531 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1532 "%s-tx-%d", dev->name, ti++);
1533 } else {
1534 /* skip this unused q_vector */
1535 continue;
1536 }
1537
1538 /* Assign ITR register to q_vector */
1539 q_vector->itr = (hw->mac.type == fm10k_mac_pf) ?
1540 &interface->uc_addr[FM10K_ITR(entry->entry)] :
1541 &interface->uc_addr[FM10K_VFITR(entry->entry)];
1542
1543 /* request the IRQ */
1544 err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0,
1545 q_vector->name, q_vector);
1546 if (err) {
1547 netif_err(interface, probe, dev,
1548 "request_irq failed for MSIX interrupt Error: %d\n",
1549 err);
1550 goto err_out;
1551 }
1552
1553 /* assign the mask for this irq */
1554 irq_set_affinity_hint(entry->vector, &q_vector->affinity_mask);
1555
1556 /* Enable q_vector */
1557 writel(FM10K_ITR_ENABLE, q_vector->itr);
1558
1559 entry++;
1560 }
1561
1562 return 0;
1563
1564 err_out:
1565 /* wind through the ring freeing all entries and vectors */
1566 while (vector) {
1567 struct fm10k_q_vector *q_vector;
1568
1569 entry--;
1570 vector--;
1571 q_vector = interface->q_vector[vector];
1572
1573 if (!q_vector->tx.count && !q_vector->rx.count)
1574 continue;
1575
1576 /* clear the affinity_mask in the IRQ descriptor */
1577 irq_set_affinity_hint(entry->vector, NULL);
1578
1579 /* disable interrupts */
1580 writel(FM10K_ITR_MASK_SET, q_vector->itr);
1581
1582 free_irq(entry->vector, q_vector);
1583 }
1584
1585 return err;
1586 }
1587
1588 void fm10k_up(struct fm10k_intfc *interface)
1589 {
1590 struct fm10k_hw *hw = &interface->hw;
1591
1592 /* Enable Tx/Rx DMA */
1593 hw->mac.ops.start_hw(hw);
1594
1595 /* configure Tx descriptor rings */
1596 fm10k_configure_tx(interface);
1597
1598 /* configure Rx descriptor rings */
1599 fm10k_configure_rx(interface);
1600
1601 /* configure interrupts */
1602 hw->mac.ops.update_int_moderator(hw);
1603
1604 /* enable statistics capture again */
1605 clear_bit(__FM10K_UPDATING_STATS, &interface->state);
1606
1607 /* clear down bit to indicate we are ready to go */
1608 clear_bit(__FM10K_DOWN, &interface->state);
1609
1610 /* enable polling cleanups */
1611 fm10k_napi_enable_all(interface);
1612
1613 /* re-establish Rx filters */
1614 fm10k_restore_rx_state(interface);
1615
1616 /* enable transmits */
1617 netif_tx_start_all_queues(interface->netdev);
1618
1619 /* kick off the service timer now */
1620 hw->mac.get_host_state = true;
1621 mod_timer(&interface->service_timer, jiffies);
1622 }
1623
1624 static void fm10k_napi_disable_all(struct fm10k_intfc *interface)
1625 {
1626 struct fm10k_q_vector *q_vector;
1627 int q_idx;
1628
1629 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
1630 q_vector = interface->q_vector[q_idx];
1631 napi_disable(&q_vector->napi);
1632 }
1633 }
1634
1635 void fm10k_down(struct fm10k_intfc *interface)
1636 {
1637 struct net_device *netdev = interface->netdev;
1638 struct fm10k_hw *hw = &interface->hw;
1639 int err, i = 0, count = 0;
1640
1641 /* signal that we are down to the interrupt handler and service task */
1642 if (test_and_set_bit(__FM10K_DOWN, &interface->state))
1643 return;
1644
1645 /* call carrier off first to avoid false dev_watchdog timeouts */
1646 netif_carrier_off(netdev);
1647
1648 /* disable transmits */
1649 netif_tx_stop_all_queues(netdev);
1650 netif_tx_disable(netdev);
1651
1652 /* reset Rx filters */
1653 fm10k_reset_rx_state(interface);
1654
1655 /* disable polling routines */
1656 fm10k_napi_disable_all(interface);
1657
1658 /* capture stats one last time before stopping interface */
1659 fm10k_update_stats(interface);
1660
1661 /* prevent updating statistics while we're down */
1662 while (test_and_set_bit(__FM10K_UPDATING_STATS, &interface->state))
1663 usleep_range(1000, 2000);
1664
1665 /* skip waiting for TX DMA if we lost PCIe link */
1666 if (FM10K_REMOVED(hw->hw_addr))
1667 goto skip_tx_dma_drain;
1668
1669 /* In some rare circumstances it can take a while for Tx queues to
1670 * quiesce and be fully disabled. Attempt to .stop_hw() first, and
1671 * then if we get ERR_REQUESTS_PENDING, go ahead and wait in a loop
1672 * until the Tx queues have emptied, or until a number of retries. If
1673 * we fail to clear within the retry loop, we will issue a warning
1674 * indicating that Tx DMA is probably hung. Note this means we call
1675 * .stop_hw() twice but this shouldn't cause any problems.
1676 */
1677 err = hw->mac.ops.stop_hw(hw);
1678 if (err != FM10K_ERR_REQUESTS_PENDING)
1679 goto skip_tx_dma_drain;
1680
1681 #define TX_DMA_DRAIN_RETRIES 25
1682 for (count = 0; count < TX_DMA_DRAIN_RETRIES; count++) {
1683 usleep_range(10000, 20000);
1684
1685 /* start checking at the last ring to have pending Tx */
1686 for (; i < interface->num_tx_queues; i++)
1687 if (fm10k_get_tx_pending(interface->tx_ring[i]))
1688 break;
1689
1690 /* if all the queues are drained, we can break now */
1691 if (i == interface->num_tx_queues)
1692 break;
1693 }
1694
1695 if (count >= TX_DMA_DRAIN_RETRIES)
1696 dev_err(&interface->pdev->dev,
1697 "Tx queues failed to drain after %d tries. Tx DMA is probably hung.\n",
1698 count);
1699 skip_tx_dma_drain:
1700 /* Disable DMA engine for Tx/Rx */
1701 err = hw->mac.ops.stop_hw(hw);
1702 if (err == FM10K_ERR_REQUESTS_PENDING)
1703 dev_err(&interface->pdev->dev,
1704 "due to pending requests hw was not shut down gracefully\n");
1705 else if (err)
1706 dev_err(&interface->pdev->dev, "stop_hw failed: %d\n", err);
1707
1708 /* free any buffers still on the rings */
1709 fm10k_clean_all_tx_rings(interface);
1710 fm10k_clean_all_rx_rings(interface);
1711 }
1712
1713 /**
1714 * fm10k_sw_init - Initialize general software structures
1715 * @interface: host interface private structure to initialize
1716 *
1717 * fm10k_sw_init initializes the interface private data structure.
1718 * Fields are initialized based on PCI device information and
1719 * OS network device settings (MTU size).
1720 **/
1721 static int fm10k_sw_init(struct fm10k_intfc *interface,
1722 const struct pci_device_id *ent)
1723 {
1724 const struct fm10k_info *fi = fm10k_info_tbl[ent->driver_data];
1725 struct fm10k_hw *hw = &interface->hw;
1726 struct pci_dev *pdev = interface->pdev;
1727 struct net_device *netdev = interface->netdev;
1728 u32 rss_key[FM10K_RSSRK_SIZE];
1729 unsigned int rss;
1730 int err;
1731
1732 /* initialize back pointer */
1733 hw->back = interface;
1734 hw->hw_addr = interface->uc_addr;
1735
1736 /* PCI config space info */
1737 hw->vendor_id = pdev->vendor;
1738 hw->device_id = pdev->device;
1739 hw->revision_id = pdev->revision;
1740 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1741 hw->subsystem_device_id = pdev->subsystem_device;
1742
1743 /* Setup hw api */
1744 memcpy(&hw->mac.ops, fi->mac_ops, sizeof(hw->mac.ops));
1745 hw->mac.type = fi->mac;
1746
1747 /* Setup IOV handlers */
1748 if (fi->iov_ops)
1749 memcpy(&hw->iov.ops, fi->iov_ops, sizeof(hw->iov.ops));
1750
1751 /* Set common capability flags and settings */
1752 rss = min_t(int, FM10K_MAX_RSS_INDICES, num_online_cpus());
1753 interface->ring_feature[RING_F_RSS].limit = rss;
1754 fi->get_invariants(hw);
1755
1756 /* pick up the PCIe bus settings for reporting later */
1757 if (hw->mac.ops.get_bus_info)
1758 hw->mac.ops.get_bus_info(hw);
1759
1760 /* limit the usable DMA range */
1761 if (hw->mac.ops.set_dma_mask)
1762 hw->mac.ops.set_dma_mask(hw, dma_get_mask(&pdev->dev));
1763
1764 /* update netdev with DMA restrictions */
1765 if (dma_get_mask(&pdev->dev) > DMA_BIT_MASK(32)) {
1766 netdev->features |= NETIF_F_HIGHDMA;
1767 netdev->vlan_features |= NETIF_F_HIGHDMA;
1768 }
1769
1770 /* delay any future reset requests */
1771 interface->last_reset = jiffies + (10 * HZ);
1772
1773 /* reset and initialize the hardware so it is in a known state */
1774 err = hw->mac.ops.reset_hw(hw);
1775 if (err) {
1776 dev_err(&pdev->dev, "reset_hw failed: %d\n", err);
1777 return err;
1778 }
1779
1780 err = hw->mac.ops.init_hw(hw);
1781 if (err) {
1782 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
1783 return err;
1784 }
1785
1786 /* initialize hardware statistics */
1787 hw->mac.ops.update_hw_stats(hw, &interface->stats);
1788
1789 /* Set upper limit on IOV VFs that can be allocated */
1790 pci_sriov_set_totalvfs(pdev, hw->iov.total_vfs);
1791
1792 /* Start with random Ethernet address */
1793 eth_random_addr(hw->mac.addr);
1794
1795 /* Initialize MAC address from hardware */
1796 err = hw->mac.ops.read_mac_addr(hw);
1797 if (err) {
1798 dev_warn(&pdev->dev,
1799 "Failed to obtain MAC address defaulting to random\n");
1800 /* tag address assignment as random */
1801 netdev->addr_assign_type |= NET_ADDR_RANDOM;
1802 }
1803
1804 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
1805 ether_addr_copy(netdev->perm_addr, hw->mac.addr);
1806
1807 if (!is_valid_ether_addr(netdev->perm_addr)) {
1808 dev_err(&pdev->dev, "Invalid MAC Address\n");
1809 return -EIO;
1810 }
1811
1812 /* initialize DCBNL interface */
1813 fm10k_dcbnl_set_ops(netdev);
1814
1815 /* set default ring sizes */
1816 interface->tx_ring_count = FM10K_DEFAULT_TXD;
1817 interface->rx_ring_count = FM10K_DEFAULT_RXD;
1818
1819 /* set default interrupt moderation */
1820 interface->tx_itr = FM10K_TX_ITR_DEFAULT;
1821 interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_RX_ITR_DEFAULT;
1822
1823 /* initialize vxlan_port list */
1824 INIT_LIST_HEAD(&interface->vxlan_port);
1825
1826 netdev_rss_key_fill(rss_key, sizeof(rss_key));
1827 memcpy(interface->rssrk, rss_key, sizeof(rss_key));
1828
1829 /* Start off interface as being down */
1830 set_bit(__FM10K_DOWN, &interface->state);
1831 set_bit(__FM10K_UPDATING_STATS, &interface->state);
1832
1833 return 0;
1834 }
1835
1836 static void fm10k_slot_warn(struct fm10k_intfc *interface)
1837 {
1838 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
1839 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
1840 struct fm10k_hw *hw = &interface->hw;
1841 int max_gts = 0, expected_gts = 0;
1842
1843 if (pcie_get_minimum_link(interface->pdev, &speed, &width) ||
1844 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
1845 dev_warn(&interface->pdev->dev,
1846 "Unable to determine PCI Express bandwidth.\n");
1847 return;
1848 }
1849
1850 switch (speed) {
1851 case PCIE_SPEED_2_5GT:
1852 /* 8b/10b encoding reduces max throughput by 20% */
1853 max_gts = 2 * width;
1854 break;
1855 case PCIE_SPEED_5_0GT:
1856 /* 8b/10b encoding reduces max throughput by 20% */
1857 max_gts = 4 * width;
1858 break;
1859 case PCIE_SPEED_8_0GT:
1860 /* 128b/130b encoding has less than 2% impact on throughput */
1861 max_gts = 8 * width;
1862 break;
1863 default:
1864 dev_warn(&interface->pdev->dev,
1865 "Unable to determine PCI Express bandwidth.\n");
1866 return;
1867 }
1868
1869 dev_info(&interface->pdev->dev,
1870 "PCI Express bandwidth of %dGT/s available\n",
1871 max_gts);
1872 dev_info(&interface->pdev->dev,
1873 "(Speed:%s, Width: x%d, Encoding Loss:%s, Payload:%s)\n",
1874 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
1875 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
1876 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
1877 "Unknown"),
1878 hw->bus.width,
1879 (speed == PCIE_SPEED_2_5GT ? "20%" :
1880 speed == PCIE_SPEED_5_0GT ? "20%" :
1881 speed == PCIE_SPEED_8_0GT ? "<2%" :
1882 "Unknown"),
1883 (hw->bus.payload == fm10k_bus_payload_128 ? "128B" :
1884 hw->bus.payload == fm10k_bus_payload_256 ? "256B" :
1885 hw->bus.payload == fm10k_bus_payload_512 ? "512B" :
1886 "Unknown"));
1887
1888 switch (hw->bus_caps.speed) {
1889 case fm10k_bus_speed_2500:
1890 /* 8b/10b encoding reduces max throughput by 20% */
1891 expected_gts = 2 * hw->bus_caps.width;
1892 break;
1893 case fm10k_bus_speed_5000:
1894 /* 8b/10b encoding reduces max throughput by 20% */
1895 expected_gts = 4 * hw->bus_caps.width;
1896 break;
1897 case fm10k_bus_speed_8000:
1898 /* 128b/130b encoding has less than 2% impact on throughput */
1899 expected_gts = 8 * hw->bus_caps.width;
1900 break;
1901 default:
1902 dev_warn(&interface->pdev->dev,
1903 "Unable to determine expected PCI Express bandwidth.\n");
1904 return;
1905 }
1906
1907 if (max_gts >= expected_gts)
1908 return;
1909
1910 dev_warn(&interface->pdev->dev,
1911 "This device requires %dGT/s of bandwidth for optimal performance.\n",
1912 expected_gts);
1913 dev_warn(&interface->pdev->dev,
1914 "A %sslot with x%d lanes is suggested.\n",
1915 (hw->bus_caps.speed == fm10k_bus_speed_2500 ? "2.5GT/s " :
1916 hw->bus_caps.speed == fm10k_bus_speed_5000 ? "5.0GT/s " :
1917 hw->bus_caps.speed == fm10k_bus_speed_8000 ? "8.0GT/s " : ""),
1918 hw->bus_caps.width);
1919 }
1920
1921 /**
1922 * fm10k_probe - Device Initialization Routine
1923 * @pdev: PCI device information struct
1924 * @ent: entry in fm10k_pci_tbl
1925 *
1926 * Returns 0 on success, negative on failure
1927 *
1928 * fm10k_probe initializes an interface identified by a pci_dev structure.
1929 * The OS initialization, configuring of the interface private structure,
1930 * and a hardware reset occur.
1931 **/
1932 static int fm10k_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1933 {
1934 struct net_device *netdev;
1935 struct fm10k_intfc *interface;
1936 int err;
1937
1938 err = pci_enable_device_mem(pdev);
1939 if (err)
1940 return err;
1941
1942 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));
1943 if (err)
1944 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
1945 if (err) {
1946 dev_err(&pdev->dev,
1947 "DMA configuration failed: %d\n", err);
1948 goto err_dma;
1949 }
1950
1951 err = pci_request_selected_regions(pdev,
1952 pci_select_bars(pdev,
1953 IORESOURCE_MEM),
1954 fm10k_driver_name);
1955 if (err) {
1956 dev_err(&pdev->dev,
1957 "pci_request_selected_regions failed: %d\n", err);
1958 goto err_pci_reg;
1959 }
1960
1961 pci_enable_pcie_error_reporting(pdev);
1962
1963 pci_set_master(pdev);
1964 pci_save_state(pdev);
1965
1966 netdev = fm10k_alloc_netdev(fm10k_info_tbl[ent->driver_data]);
1967 if (!netdev) {
1968 err = -ENOMEM;
1969 goto err_alloc_netdev;
1970 }
1971
1972 SET_NETDEV_DEV(netdev, &pdev->dev);
1973
1974 interface = netdev_priv(netdev);
1975 pci_set_drvdata(pdev, interface);
1976
1977 interface->netdev = netdev;
1978 interface->pdev = pdev;
1979
1980 interface->uc_addr = ioremap(pci_resource_start(pdev, 0),
1981 FM10K_UC_ADDR_SIZE);
1982 if (!interface->uc_addr) {
1983 err = -EIO;
1984 goto err_ioremap;
1985 }
1986
1987 err = fm10k_sw_init(interface, ent);
1988 if (err)
1989 goto err_sw_init;
1990
1991 /* enable debugfs support */
1992 fm10k_dbg_intfc_init(interface);
1993
1994 err = fm10k_init_queueing_scheme(interface);
1995 if (err)
1996 goto err_sw_init;
1997
1998 /* the mbx interrupt might attempt to schedule the service task, so we
1999 * must ensure it is disabled since we haven't yet requested the timer
2000 * or work item.
2001 */
2002 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2003
2004 err = fm10k_mbx_request_irq(interface);
2005 if (err)
2006 goto err_mbx_interrupt;
2007
2008 /* final check of hardware state before registering the interface */
2009 err = fm10k_hw_ready(interface);
2010 if (err)
2011 goto err_register;
2012
2013 err = register_netdev(netdev);
2014 if (err)
2015 goto err_register;
2016
2017 /* carrier off reporting is important to ethtool even BEFORE open */
2018 netif_carrier_off(netdev);
2019
2020 /* stop all the transmit queues from transmitting until link is up */
2021 netif_tx_stop_all_queues(netdev);
2022
2023 /* Initialize service timer and service task late in order to avoid
2024 * cleanup issues.
2025 */
2026 setup_timer(&interface->service_timer, &fm10k_service_timer,
2027 (unsigned long)interface);
2028 INIT_WORK(&interface->service_task, fm10k_service_task);
2029
2030 /* kick off service timer now, even when interface is down */
2031 mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
2032
2033 /* print warning for non-optimal configurations */
2034 fm10k_slot_warn(interface);
2035
2036 /* report MAC address for logging */
2037 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
2038
2039 /* enable SR-IOV after registering netdev to enforce PF/VF ordering */
2040 fm10k_iov_configure(pdev, 0);
2041
2042 /* clear the service task disable bit to allow service task to start */
2043 clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2044
2045 return 0;
2046
2047 err_register:
2048 fm10k_mbx_free_irq(interface);
2049 err_mbx_interrupt:
2050 fm10k_clear_queueing_scheme(interface);
2051 err_sw_init:
2052 if (interface->sw_addr)
2053 iounmap(interface->sw_addr);
2054 iounmap(interface->uc_addr);
2055 err_ioremap:
2056 free_netdev(netdev);
2057 err_alloc_netdev:
2058 pci_release_selected_regions(pdev,
2059 pci_select_bars(pdev, IORESOURCE_MEM));
2060 err_pci_reg:
2061 err_dma:
2062 pci_disable_device(pdev);
2063 return err;
2064 }
2065
2066 /**
2067 * fm10k_remove - Device Removal Routine
2068 * @pdev: PCI device information struct
2069 *
2070 * fm10k_remove is called by the PCI subsystem to alert the driver
2071 * that it should release a PCI device. The could be caused by a
2072 * Hot-Plug event, or because the driver is going to be removed from
2073 * memory.
2074 **/
2075 static void fm10k_remove(struct pci_dev *pdev)
2076 {
2077 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2078 struct net_device *netdev = interface->netdev;
2079
2080 del_timer_sync(&interface->service_timer);
2081
2082 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2083 cancel_work_sync(&interface->service_task);
2084
2085 /* free netdev, this may bounce the interrupts due to setup_tc */
2086 if (netdev->reg_state == NETREG_REGISTERED)
2087 unregister_netdev(netdev);
2088
2089 /* release VFs */
2090 fm10k_iov_disable(pdev);
2091
2092 /* disable mailbox interrupt */
2093 fm10k_mbx_free_irq(interface);
2094
2095 /* free interrupts */
2096 fm10k_clear_queueing_scheme(interface);
2097
2098 /* remove any debugfs interfaces */
2099 fm10k_dbg_intfc_exit(interface);
2100
2101 if (interface->sw_addr)
2102 iounmap(interface->sw_addr);
2103 iounmap(interface->uc_addr);
2104
2105 free_netdev(netdev);
2106
2107 pci_release_selected_regions(pdev,
2108 pci_select_bars(pdev, IORESOURCE_MEM));
2109
2110 pci_disable_pcie_error_reporting(pdev);
2111
2112 pci_disable_device(pdev);
2113 }
2114
2115 #ifdef CONFIG_PM
2116 /**
2117 * fm10k_resume - Restore device to pre-sleep state
2118 * @pdev: PCI device information struct
2119 *
2120 * fm10k_resume is called after the system has powered back up from a sleep
2121 * state and is ready to resume operation. This function is meant to restore
2122 * the device back to its pre-sleep state.
2123 **/
2124 static int fm10k_resume(struct pci_dev *pdev)
2125 {
2126 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2127 struct net_device *netdev = interface->netdev;
2128 struct fm10k_hw *hw = &interface->hw;
2129 u32 err;
2130
2131 pci_set_power_state(pdev, PCI_D0);
2132 pci_restore_state(pdev);
2133
2134 /* pci_restore_state clears dev->state_saved so call
2135 * pci_save_state to restore it.
2136 */
2137 pci_save_state(pdev);
2138
2139 err = pci_enable_device_mem(pdev);
2140 if (err) {
2141 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
2142 return err;
2143 }
2144 pci_set_master(pdev);
2145
2146 pci_wake_from_d3(pdev, false);
2147
2148 /* refresh hw_addr in case it was dropped */
2149 hw->hw_addr = interface->uc_addr;
2150
2151 /* reset hardware to known state */
2152 err = hw->mac.ops.init_hw(&interface->hw);
2153 if (err) {
2154 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
2155 return err;
2156 }
2157
2158 /* reset statistics starting values */
2159 hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
2160
2161 rtnl_lock();
2162
2163 err = fm10k_init_queueing_scheme(interface);
2164 if (err)
2165 goto err_queueing_scheme;
2166
2167 err = fm10k_mbx_request_irq(interface);
2168 if (err)
2169 goto err_mbx_irq;
2170
2171 err = fm10k_hw_ready(interface);
2172 if (err)
2173 goto err_open;
2174
2175 err = netif_running(netdev) ? fm10k_open(netdev) : 0;
2176 if (err)
2177 goto err_open;
2178
2179 rtnl_unlock();
2180
2181 /* assume host is not ready, to prevent race with watchdog in case we
2182 * actually don't have connection to the switch
2183 */
2184 interface->host_ready = false;
2185 fm10k_watchdog_host_not_ready(interface);
2186
2187 /* clear the service task disable bit to allow service task to start */
2188 clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2189 fm10k_service_event_schedule(interface);
2190
2191 /* restore SR-IOV interface */
2192 fm10k_iov_resume(pdev);
2193
2194 netif_device_attach(netdev);
2195
2196 return 0;
2197 err_open:
2198 fm10k_mbx_free_irq(interface);
2199 err_mbx_irq:
2200 fm10k_clear_queueing_scheme(interface);
2201 err_queueing_scheme:
2202 rtnl_unlock();
2203
2204 return err;
2205 }
2206
2207 /**
2208 * fm10k_suspend - Prepare the device for a system sleep state
2209 * @pdev: PCI device information struct
2210 *
2211 * fm10k_suspend is meant to shutdown the device prior to the system entering
2212 * a sleep state. The fm10k hardware does not support wake on lan so the
2213 * driver simply needs to shut down the device so it is in a low power state.
2214 **/
2215 static int fm10k_suspend(struct pci_dev *pdev,
2216 pm_message_t __always_unused state)
2217 {
2218 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2219 struct net_device *netdev = interface->netdev;
2220 int err = 0;
2221
2222 netif_device_detach(netdev);
2223
2224 fm10k_iov_suspend(pdev);
2225
2226 /* the watchdog tasks may read registers, which will appear like a
2227 * surprise-remove event once the PCI device is disabled. This will
2228 * cause us to close the netdevice, so we don't retain the open/closed
2229 * state post-resume. Prevent this by disabling the service task while
2230 * suspended, until we actually resume.
2231 */
2232 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2233 cancel_work_sync(&interface->service_task);
2234
2235 rtnl_lock();
2236
2237 if (netif_running(netdev))
2238 fm10k_close(netdev);
2239
2240 fm10k_mbx_free_irq(interface);
2241
2242 fm10k_clear_queueing_scheme(interface);
2243
2244 rtnl_unlock();
2245
2246 err = pci_save_state(pdev);
2247 if (err)
2248 return err;
2249
2250 pci_disable_device(pdev);
2251 pci_wake_from_d3(pdev, false);
2252 pci_set_power_state(pdev, PCI_D3hot);
2253
2254 return 0;
2255 }
2256
2257 #endif /* CONFIG_PM */
2258 /**
2259 * fm10k_io_error_detected - called when PCI error is detected
2260 * @pdev: Pointer to PCI device
2261 * @state: The current pci connection state
2262 *
2263 * This function is called after a PCI bus error affecting
2264 * this device has been detected.
2265 */
2266 static pci_ers_result_t fm10k_io_error_detected(struct pci_dev *pdev,
2267 pci_channel_state_t state)
2268 {
2269 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2270 struct net_device *netdev = interface->netdev;
2271
2272 netif_device_detach(netdev);
2273
2274 if (state == pci_channel_io_perm_failure)
2275 return PCI_ERS_RESULT_DISCONNECT;
2276
2277 rtnl_lock();
2278
2279 if (netif_running(netdev))
2280 fm10k_close(netdev);
2281
2282 fm10k_mbx_free_irq(interface);
2283
2284 /* free interrupts */
2285 fm10k_clear_queueing_scheme(interface);
2286
2287 rtnl_unlock();
2288
2289 /* Request a slot reset. */
2290 return PCI_ERS_RESULT_NEED_RESET;
2291 }
2292
2293 /**
2294 * fm10k_io_slot_reset - called after the pci bus has been reset.
2295 * @pdev: Pointer to PCI device
2296 *
2297 * Restart the card from scratch, as if from a cold-boot.
2298 */
2299 static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev)
2300 {
2301 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2302 pci_ers_result_t result;
2303
2304 if (pci_enable_device_mem(pdev)) {
2305 dev_err(&pdev->dev,
2306 "Cannot re-enable PCI device after reset.\n");
2307 result = PCI_ERS_RESULT_DISCONNECT;
2308 } else {
2309 pci_set_master(pdev);
2310 pci_restore_state(pdev);
2311
2312 /* After second error pci->state_saved is false, this
2313 * resets it so EEH doesn't break.
2314 */
2315 pci_save_state(pdev);
2316
2317 pci_wake_from_d3(pdev, false);
2318
2319 /* refresh hw_addr in case it was dropped */
2320 interface->hw.hw_addr = interface->uc_addr;
2321
2322 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
2323 fm10k_service_event_schedule(interface);
2324
2325 result = PCI_ERS_RESULT_RECOVERED;
2326 }
2327
2328 pci_cleanup_aer_uncorrect_error_status(pdev);
2329
2330 return result;
2331 }
2332
2333 /**
2334 * fm10k_io_resume - called when traffic can start flowing again.
2335 * @pdev: Pointer to PCI device
2336 *
2337 * This callback is called when the error recovery driver tells us that
2338 * its OK to resume normal operation.
2339 */
2340 static void fm10k_io_resume(struct pci_dev *pdev)
2341 {
2342 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2343 struct net_device *netdev = interface->netdev;
2344 struct fm10k_hw *hw = &interface->hw;
2345 int err = 0;
2346
2347 /* reset hardware to known state */
2348 err = hw->mac.ops.init_hw(&interface->hw);
2349 if (err) {
2350 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
2351 return;
2352 }
2353
2354 /* reset statistics starting values */
2355 hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
2356
2357 rtnl_lock();
2358
2359 err = fm10k_init_queueing_scheme(interface);
2360 if (err) {
2361 dev_err(&interface->pdev->dev,
2362 "init_queueing_scheme failed: %d\n", err);
2363 goto unlock;
2364 }
2365
2366 /* reassociate interrupts */
2367 fm10k_mbx_request_irq(interface);
2368
2369 rtnl_lock();
2370 if (netif_running(netdev))
2371 err = fm10k_open(netdev);
2372 rtnl_unlock();
2373
2374 /* final check of hardware state before registering the interface */
2375 err = err ? : fm10k_hw_ready(interface);
2376
2377 if (!err)
2378 netif_device_attach(netdev);
2379
2380 unlock:
2381 rtnl_unlock();
2382 }
2383
2384 static const struct pci_error_handlers fm10k_err_handler = {
2385 .error_detected = fm10k_io_error_detected,
2386 .slot_reset = fm10k_io_slot_reset,
2387 .resume = fm10k_io_resume,
2388 };
2389
2390 static struct pci_driver fm10k_driver = {
2391 .name = fm10k_driver_name,
2392 .id_table = fm10k_pci_tbl,
2393 .probe = fm10k_probe,
2394 .remove = fm10k_remove,
2395 #ifdef CONFIG_PM
2396 .suspend = fm10k_suspend,
2397 .resume = fm10k_resume,
2398 #endif
2399 .sriov_configure = fm10k_iov_configure,
2400 .err_handler = &fm10k_err_handler
2401 };
2402
2403 /**
2404 * fm10k_register_pci_driver - register driver interface
2405 *
2406 * This function is called on module load in order to register the driver.
2407 **/
2408 int fm10k_register_pci_driver(void)
2409 {
2410 return pci_register_driver(&fm10k_driver);
2411 }
2412
2413 /**
2414 * fm10k_unregister_pci_driver - unregister driver interface
2415 *
2416 * This function is called on module unload in order to remove the driver.
2417 **/
2418 void fm10k_unregister_pci_driver(void)
2419 {
2420 pci_unregister_driver(&fm10k_driver);
2421 }
Linux kernel - Deliverables
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