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fm10k: wait for queues to drain if stop_hw() fails once
[deliverable/linux.git] / drivers / net / ethernet / intel / fm10k / fm10k_pci.c
1 /* Intel(R) Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2016 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21 #include <linux/module.h>
22 #include <linux/aer.h>
23
24 #include "fm10k.h"
25
26 static const struct fm10k_info *fm10k_info_tbl[] = {
27 [fm10k_device_pf] = &fm10k_pf_info,
28 [fm10k_device_vf] = &fm10k_vf_info,
29 };
30
31 /**
32 * fm10k_pci_tbl - PCI Device ID Table
33 *
34 * Wildcard entries (PCI_ANY_ID) should come last
35 * Last entry must be all 0s
36 *
37 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
38 * Class, Class Mask, private data (not used) }
39 */
40 static const struct pci_device_id fm10k_pci_tbl[] = {
41 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_PF), fm10k_device_pf },
42 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_VF), fm10k_device_vf },
43 /* required last entry */
44 { 0, }
45 };
46 MODULE_DEVICE_TABLE(pci, fm10k_pci_tbl);
47
48 u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg)
49 {
50 struct fm10k_intfc *interface = hw->back;
51 u16 value = 0;
52
53 if (FM10K_REMOVED(hw->hw_addr))
54 return ~value;
55
56 pci_read_config_word(interface->pdev, reg, &value);
57 if (value == 0xFFFF)
58 fm10k_write_flush(hw);
59
60 return value;
61 }
62
63 u32 fm10k_read_reg(struct fm10k_hw *hw, int reg)
64 {
65 u32 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
66 u32 value = 0;
67
68 if (FM10K_REMOVED(hw_addr))
69 return ~value;
70
71 value = readl(&hw_addr[reg]);
72 if (!(~value) && (!reg || !(~readl(hw_addr)))) {
73 struct fm10k_intfc *interface = hw->back;
74 struct net_device *netdev = interface->netdev;
75
76 hw->hw_addr = NULL;
77 netif_device_detach(netdev);
78 netdev_err(netdev, "PCIe link lost, device now detached\n");
79 }
80
81 return value;
82 }
83
84 static int fm10k_hw_ready(struct fm10k_intfc *interface)
85 {
86 struct fm10k_hw *hw = &interface->hw;
87
88 fm10k_write_flush(hw);
89
90 return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0;
91 }
92
93 void fm10k_service_event_schedule(struct fm10k_intfc *interface)
94 {
95 if (!test_bit(__FM10K_SERVICE_DISABLE, &interface->state) &&
96 !test_and_set_bit(__FM10K_SERVICE_SCHED, &interface->state))
97 queue_work(fm10k_workqueue, &interface->service_task);
98 }
99
100 static void fm10k_service_event_complete(struct fm10k_intfc *interface)
101 {
102 WARN_ON(!test_bit(__FM10K_SERVICE_SCHED, &interface->state));
103
104 /* flush memory to make sure state is correct before next watchog */
105 smp_mb__before_atomic();
106 clear_bit(__FM10K_SERVICE_SCHED, &interface->state);
107 }
108
109 /**
110 * fm10k_service_timer - Timer Call-back
111 * @data: pointer to interface cast into an unsigned long
112 **/
113 static void fm10k_service_timer(unsigned long data)
114 {
115 struct fm10k_intfc *interface = (struct fm10k_intfc *)data;
116
117 /* Reset the timer */
118 mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
119
120 fm10k_service_event_schedule(interface);
121 }
122
123 static void fm10k_detach_subtask(struct fm10k_intfc *interface)
124 {
125 struct net_device *netdev = interface->netdev;
126
127 /* do nothing if device is still present or hw_addr is set */
128 if (netif_device_present(netdev) || interface->hw.hw_addr)
129 return;
130
131 rtnl_lock();
132
133 if (netif_running(netdev))
134 dev_close(netdev);
135
136 rtnl_unlock();
137 }
138
139 static void fm10k_reinit(struct fm10k_intfc *interface)
140 {
141 struct net_device *netdev = interface->netdev;
142 struct fm10k_hw *hw = &interface->hw;
143 int err;
144
145 WARN_ON(in_interrupt());
146
147 /* put off any impending NetWatchDogTimeout */
148 netif_trans_update(netdev);
149
150 while (test_and_set_bit(__FM10K_RESETTING, &interface->state))
151 usleep_range(1000, 2000);
152
153 rtnl_lock();
154
155 fm10k_iov_suspend(interface->pdev);
156
157 if (netif_running(netdev))
158 fm10k_close(netdev);
159
160 fm10k_mbx_free_irq(interface);
161
162 /* free interrupts */
163 fm10k_clear_queueing_scheme(interface);
164
165 /* delay any future reset requests */
166 interface->last_reset = jiffies + (10 * HZ);
167
168 /* reset and initialize the hardware so it is in a known state */
169 err = hw->mac.ops.reset_hw(hw);
170 if (err) {
171 dev_err(&interface->pdev->dev, "reset_hw failed: %d\n", err);
172 goto reinit_err;
173 }
174
175 err = hw->mac.ops.init_hw(hw);
176 if (err) {
177 dev_err(&interface->pdev->dev, "init_hw failed: %d\n", err);
178 goto reinit_err;
179 }
180
181 err = fm10k_init_queueing_scheme(interface);
182 if (err) {
183 dev_err(&interface->pdev->dev,
184 "init_queueing_scheme failed: %d\n", err);
185 goto reinit_err;
186 }
187
188 /* reassociate interrupts */
189 err = fm10k_mbx_request_irq(interface);
190 if (err)
191 goto err_mbx_irq;
192
193 err = fm10k_hw_ready(interface);
194 if (err)
195 goto err_open;
196
197 /* update hardware address for VFs if perm_addr has changed */
198 if (hw->mac.type == fm10k_mac_vf) {
199 if (is_valid_ether_addr(hw->mac.perm_addr)) {
200 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
201 ether_addr_copy(netdev->perm_addr, hw->mac.perm_addr);
202 ether_addr_copy(netdev->dev_addr, hw->mac.perm_addr);
203 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
204 }
205
206 if (hw->mac.vlan_override)
207 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
208 else
209 netdev->features |= NETIF_F_HW_VLAN_CTAG_RX;
210 }
211
212 err = netif_running(netdev) ? fm10k_open(netdev) : 0;
213 if (err)
214 goto err_open;
215
216 fm10k_iov_resume(interface->pdev);
217
218 rtnl_unlock();
219
220 clear_bit(__FM10K_RESETTING, &interface->state);
221
222 return;
223 err_open:
224 fm10k_mbx_free_irq(interface);
225 err_mbx_irq:
226 fm10k_clear_queueing_scheme(interface);
227 reinit_err:
228 netif_device_detach(netdev);
229
230 rtnl_unlock();
231
232 clear_bit(__FM10K_RESETTING, &interface->state);
233 }
234
235 static void fm10k_reset_subtask(struct fm10k_intfc *interface)
236 {
237 if (!(interface->flags & FM10K_FLAG_RESET_REQUESTED))
238 return;
239
240 interface->flags &= ~FM10K_FLAG_RESET_REQUESTED;
241
242 netdev_err(interface->netdev, "Reset interface\n");
243
244 fm10k_reinit(interface);
245 }
246
247 /**
248 * fm10k_configure_swpri_map - Configure Receive SWPRI to PC mapping
249 * @interface: board private structure
250 *
251 * Configure the SWPRI to PC mapping for the port.
252 **/
253 static void fm10k_configure_swpri_map(struct fm10k_intfc *interface)
254 {
255 struct net_device *netdev = interface->netdev;
256 struct fm10k_hw *hw = &interface->hw;
257 int i;
258
259 /* clear flag indicating update is needed */
260 interface->flags &= ~FM10K_FLAG_SWPRI_CONFIG;
261
262 /* these registers are only available on the PF */
263 if (hw->mac.type != fm10k_mac_pf)
264 return;
265
266 /* configure SWPRI to PC map */
267 for (i = 0; i < FM10K_SWPRI_MAX; i++)
268 fm10k_write_reg(hw, FM10K_SWPRI_MAP(i),
269 netdev_get_prio_tc_map(netdev, i));
270 }
271
272 /**
273 * fm10k_watchdog_update_host_state - Update the link status based on host.
274 * @interface: board private structure
275 **/
276 static void fm10k_watchdog_update_host_state(struct fm10k_intfc *interface)
277 {
278 struct fm10k_hw *hw = &interface->hw;
279 s32 err;
280
281 if (test_bit(__FM10K_LINK_DOWN, &interface->state)) {
282 interface->host_ready = false;
283 if (time_is_after_jiffies(interface->link_down_event))
284 return;
285 clear_bit(__FM10K_LINK_DOWN, &interface->state);
286 }
287
288 if (interface->flags & FM10K_FLAG_SWPRI_CONFIG) {
289 if (rtnl_trylock()) {
290 fm10k_configure_swpri_map(interface);
291 rtnl_unlock();
292 }
293 }
294
295 /* lock the mailbox for transmit and receive */
296 fm10k_mbx_lock(interface);
297
298 err = hw->mac.ops.get_host_state(hw, &interface->host_ready);
299 if (err && time_is_before_jiffies(interface->last_reset))
300 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
301
302 /* free the lock */
303 fm10k_mbx_unlock(interface);
304 }
305
306 /**
307 * fm10k_mbx_subtask - Process upstream and downstream mailboxes
308 * @interface: board private structure
309 *
310 * This function will process both the upstream and downstream mailboxes.
311 **/
312 static void fm10k_mbx_subtask(struct fm10k_intfc *interface)
313 {
314 /* process upstream mailbox and update device state */
315 fm10k_watchdog_update_host_state(interface);
316
317 /* process downstream mailboxes */
318 fm10k_iov_mbx(interface);
319 }
320
321 /**
322 * fm10k_watchdog_host_is_ready - Update netdev status based on host ready
323 * @interface: board private structure
324 **/
325 static void fm10k_watchdog_host_is_ready(struct fm10k_intfc *interface)
326 {
327 struct net_device *netdev = interface->netdev;
328
329 /* only continue if link state is currently down */
330 if (netif_carrier_ok(netdev))
331 return;
332
333 netif_info(interface, drv, netdev, "NIC Link is up\n");
334
335 netif_carrier_on(netdev);
336 netif_tx_wake_all_queues(netdev);
337 }
338
339 /**
340 * fm10k_watchdog_host_not_ready - Update netdev status based on host not ready
341 * @interface: board private structure
342 **/
343 static void fm10k_watchdog_host_not_ready(struct fm10k_intfc *interface)
344 {
345 struct net_device *netdev = interface->netdev;
346
347 /* only continue if link state is currently up */
348 if (!netif_carrier_ok(netdev))
349 return;
350
351 netif_info(interface, drv, netdev, "NIC Link is down\n");
352
353 netif_carrier_off(netdev);
354 netif_tx_stop_all_queues(netdev);
355 }
356
357 /**
358 * fm10k_update_stats - Update the board statistics counters.
359 * @interface: board private structure
360 **/
361 void fm10k_update_stats(struct fm10k_intfc *interface)
362 {
363 struct net_device_stats *net_stats = &interface->netdev->stats;
364 struct fm10k_hw *hw = &interface->hw;
365 u64 hw_csum_tx_good = 0, hw_csum_rx_good = 0, rx_length_errors = 0;
366 u64 rx_switch_errors = 0, rx_drops = 0, rx_pp_errors = 0;
367 u64 rx_link_errors = 0;
368 u64 rx_errors = 0, rx_csum_errors = 0, tx_csum_errors = 0;
369 u64 restart_queue = 0, tx_busy = 0, alloc_failed = 0;
370 u64 rx_bytes_nic = 0, rx_pkts_nic = 0, rx_drops_nic = 0;
371 u64 tx_bytes_nic = 0, tx_pkts_nic = 0;
372 u64 bytes, pkts;
373 int i;
374
375 /* ensure only one thread updates stats at a time */
376 if (test_and_set_bit(__FM10K_UPDATING_STATS, &interface->state))
377 return;
378
379 /* do not allow stats update via service task for next second */
380 interface->next_stats_update = jiffies + HZ;
381
382 /* gather some stats to the interface struct that are per queue */
383 for (bytes = 0, pkts = 0, i = 0; i < interface->num_tx_queues; i++) {
384 struct fm10k_ring *tx_ring = READ_ONCE(interface->tx_ring[i]);
385
386 if (!tx_ring)
387 continue;
388
389 restart_queue += tx_ring->tx_stats.restart_queue;
390 tx_busy += tx_ring->tx_stats.tx_busy;
391 tx_csum_errors += tx_ring->tx_stats.csum_err;
392 bytes += tx_ring->stats.bytes;
393 pkts += tx_ring->stats.packets;
394 hw_csum_tx_good += tx_ring->tx_stats.csum_good;
395 }
396
397 interface->restart_queue = restart_queue;
398 interface->tx_busy = tx_busy;
399 net_stats->tx_bytes = bytes;
400 net_stats->tx_packets = pkts;
401 interface->tx_csum_errors = tx_csum_errors;
402 interface->hw_csum_tx_good = hw_csum_tx_good;
403
404 /* gather some stats to the interface struct that are per queue */
405 for (bytes = 0, pkts = 0, i = 0; i < interface->num_rx_queues; i++) {
406 struct fm10k_ring *rx_ring = READ_ONCE(interface->rx_ring[i]);
407
408 if (!rx_ring)
409 continue;
410
411 bytes += rx_ring->stats.bytes;
412 pkts += rx_ring->stats.packets;
413 alloc_failed += rx_ring->rx_stats.alloc_failed;
414 rx_csum_errors += rx_ring->rx_stats.csum_err;
415 rx_errors += rx_ring->rx_stats.errors;
416 hw_csum_rx_good += rx_ring->rx_stats.csum_good;
417 rx_switch_errors += rx_ring->rx_stats.switch_errors;
418 rx_drops += rx_ring->rx_stats.drops;
419 rx_pp_errors += rx_ring->rx_stats.pp_errors;
420 rx_link_errors += rx_ring->rx_stats.link_errors;
421 rx_length_errors += rx_ring->rx_stats.length_errors;
422 }
423
424 net_stats->rx_bytes = bytes;
425 net_stats->rx_packets = pkts;
426 interface->alloc_failed = alloc_failed;
427 interface->rx_csum_errors = rx_csum_errors;
428 interface->hw_csum_rx_good = hw_csum_rx_good;
429 interface->rx_switch_errors = rx_switch_errors;
430 interface->rx_drops = rx_drops;
431 interface->rx_pp_errors = rx_pp_errors;
432 interface->rx_link_errors = rx_link_errors;
433 interface->rx_length_errors = rx_length_errors;
434
435 hw->mac.ops.update_hw_stats(hw, &interface->stats);
436
437 for (i = 0; i < hw->mac.max_queues; i++) {
438 struct fm10k_hw_stats_q *q = &interface->stats.q[i];
439
440 tx_bytes_nic += q->tx_bytes.count;
441 tx_pkts_nic += q->tx_packets.count;
442 rx_bytes_nic += q->rx_bytes.count;
443 rx_pkts_nic += q->rx_packets.count;
444 rx_drops_nic += q->rx_drops.count;
445 }
446
447 interface->tx_bytes_nic = tx_bytes_nic;
448 interface->tx_packets_nic = tx_pkts_nic;
449 interface->rx_bytes_nic = rx_bytes_nic;
450 interface->rx_packets_nic = rx_pkts_nic;
451 interface->rx_drops_nic = rx_drops_nic;
452
453 /* Fill out the OS statistics structure */
454 net_stats->rx_errors = rx_errors;
455 net_stats->rx_dropped = interface->stats.nodesc_drop.count;
456
457 clear_bit(__FM10K_UPDATING_STATS, &interface->state);
458 }
459
460 /**
461 * fm10k_watchdog_flush_tx - flush queues on host not ready
462 * @interface - pointer to the device interface structure
463 **/
464 static void fm10k_watchdog_flush_tx(struct fm10k_intfc *interface)
465 {
466 int some_tx_pending = 0;
467 int i;
468
469 /* nothing to do if carrier is up */
470 if (netif_carrier_ok(interface->netdev))
471 return;
472
473 for (i = 0; i < interface->num_tx_queues; i++) {
474 struct fm10k_ring *tx_ring = interface->tx_ring[i];
475
476 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
477 some_tx_pending = 1;
478 break;
479 }
480 }
481
482 /* We've lost link, so the controller stops DMA, but we've got
483 * queued Tx work that's never going to get done, so reset
484 * controller to flush Tx.
485 */
486 if (some_tx_pending)
487 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
488 }
489
490 /**
491 * fm10k_watchdog_subtask - check and bring link up
492 * @interface - pointer to the device interface structure
493 **/
494 static void fm10k_watchdog_subtask(struct fm10k_intfc *interface)
495 {
496 /* if interface is down do nothing */
497 if (test_bit(__FM10K_DOWN, &interface->state) ||
498 test_bit(__FM10K_RESETTING, &interface->state))
499 return;
500
501 if (interface->host_ready)
502 fm10k_watchdog_host_is_ready(interface);
503 else
504 fm10k_watchdog_host_not_ready(interface);
505
506 /* update stats only once every second */
507 if (time_is_before_jiffies(interface->next_stats_update))
508 fm10k_update_stats(interface);
509
510 /* flush any uncompleted work */
511 fm10k_watchdog_flush_tx(interface);
512 }
513
514 /**
515 * fm10k_check_hang_subtask - check for hung queues and dropped interrupts
516 * @interface - pointer to the device interface structure
517 *
518 * This function serves two purposes. First it strobes the interrupt lines
519 * in order to make certain interrupts are occurring. Secondly it sets the
520 * bits needed to check for TX hangs. As a result we should immediately
521 * determine if a hang has occurred.
522 */
523 static void fm10k_check_hang_subtask(struct fm10k_intfc *interface)
524 {
525 int i;
526
527 /* If we're down or resetting, just bail */
528 if (test_bit(__FM10K_DOWN, &interface->state) ||
529 test_bit(__FM10K_RESETTING, &interface->state))
530 return;
531
532 /* rate limit tx hang checks to only once every 2 seconds */
533 if (time_is_after_eq_jiffies(interface->next_tx_hang_check))
534 return;
535 interface->next_tx_hang_check = jiffies + (2 * HZ);
536
537 if (netif_carrier_ok(interface->netdev)) {
538 /* Force detection of hung controller */
539 for (i = 0; i < interface->num_tx_queues; i++)
540 set_check_for_tx_hang(interface->tx_ring[i]);
541
542 /* Rearm all in-use q_vectors for immediate firing */
543 for (i = 0; i < interface->num_q_vectors; i++) {
544 struct fm10k_q_vector *qv = interface->q_vector[i];
545
546 if (!qv->tx.count && !qv->rx.count)
547 continue;
548 writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr);
549 }
550 }
551 }
552
553 /**
554 * fm10k_service_task - manages and runs subtasks
555 * @work: pointer to work_struct containing our data
556 **/
557 static void fm10k_service_task(struct work_struct *work)
558 {
559 struct fm10k_intfc *interface;
560
561 interface = container_of(work, struct fm10k_intfc, service_task);
562
563 /* tasks run even when interface is down */
564 fm10k_mbx_subtask(interface);
565 fm10k_detach_subtask(interface);
566 fm10k_reset_subtask(interface);
567
568 /* tasks only run when interface is up */
569 fm10k_watchdog_subtask(interface);
570 fm10k_check_hang_subtask(interface);
571
572 /* release lock on service events to allow scheduling next event */
573 fm10k_service_event_complete(interface);
574 }
575
576 /**
577 * fm10k_configure_tx_ring - Configure Tx ring after Reset
578 * @interface: board private structure
579 * @ring: structure containing ring specific data
580 *
581 * Configure the Tx descriptor ring after a reset.
582 **/
583 static void fm10k_configure_tx_ring(struct fm10k_intfc *interface,
584 struct fm10k_ring *ring)
585 {
586 struct fm10k_hw *hw = &interface->hw;
587 u64 tdba = ring->dma;
588 u32 size = ring->count * sizeof(struct fm10k_tx_desc);
589 u32 txint = FM10K_INT_MAP_DISABLE;
590 u32 txdctl = BIT(FM10K_TXDCTL_MAX_TIME_SHIFT) | FM10K_TXDCTL_ENABLE;
591 u8 reg_idx = ring->reg_idx;
592
593 /* disable queue to avoid issues while updating state */
594 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0);
595 fm10k_write_flush(hw);
596
597 /* possible poll here to verify ring resources have been cleaned */
598
599 /* set location and size for descriptor ring */
600 fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
601 fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32);
602 fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size);
603
604 /* reset head and tail pointers */
605 fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0);
606 fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0);
607
608 /* store tail pointer */
609 ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)];
610
611 /* reset ntu and ntc to place SW in sync with hardware */
612 ring->next_to_clean = 0;
613 ring->next_to_use = 0;
614
615 /* Map interrupt */
616 if (ring->q_vector) {
617 txint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
618 txint |= FM10K_INT_MAP_TIMER0;
619 }
620
621 fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txint);
622
623 /* enable use of FTAG bit in Tx descriptor, register is RO for VF */
624 fm10k_write_reg(hw, FM10K_PFVTCTL(reg_idx),
625 FM10K_PFVTCTL_FTAG_DESC_ENABLE);
626
627 /* Initialize XPS */
628 if (!test_and_set_bit(__FM10K_TX_XPS_INIT_DONE, &ring->state) &&
629 ring->q_vector)
630 netif_set_xps_queue(ring->netdev,
631 &ring->q_vector->affinity_mask,
632 ring->queue_index);
633
634 /* enable queue */
635 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl);
636 }
637
638 /**
639 * fm10k_enable_tx_ring - Verify Tx ring is enabled after configuration
640 * @interface: board private structure
641 * @ring: structure containing ring specific data
642 *
643 * Verify the Tx descriptor ring is ready for transmit.
644 **/
645 static void fm10k_enable_tx_ring(struct fm10k_intfc *interface,
646 struct fm10k_ring *ring)
647 {
648 struct fm10k_hw *hw = &interface->hw;
649 int wait_loop = 10;
650 u32 txdctl;
651 u8 reg_idx = ring->reg_idx;
652
653 /* if we are already enabled just exit */
654 if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE)
655 return;
656
657 /* poll to verify queue is enabled */
658 do {
659 usleep_range(1000, 2000);
660 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx));
661 } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop);
662 if (!wait_loop)
663 netif_err(interface, drv, interface->netdev,
664 "Could not enable Tx Queue %d\n", reg_idx);
665 }
666
667 /**
668 * fm10k_configure_tx - Configure Transmit Unit after Reset
669 * @interface: board private structure
670 *
671 * Configure the Tx unit of the MAC after a reset.
672 **/
673 static void fm10k_configure_tx(struct fm10k_intfc *interface)
674 {
675 int i;
676
677 /* Setup the HW Tx Head and Tail descriptor pointers */
678 for (i = 0; i < interface->num_tx_queues; i++)
679 fm10k_configure_tx_ring(interface, interface->tx_ring[i]);
680
681 /* poll here to verify that Tx rings are now enabled */
682 for (i = 0; i < interface->num_tx_queues; i++)
683 fm10k_enable_tx_ring(interface, interface->tx_ring[i]);
684 }
685
686 /**
687 * fm10k_configure_rx_ring - Configure Rx ring after Reset
688 * @interface: board private structure
689 * @ring: structure containing ring specific data
690 *
691 * Configure the Rx descriptor ring after a reset.
692 **/
693 static void fm10k_configure_rx_ring(struct fm10k_intfc *interface,
694 struct fm10k_ring *ring)
695 {
696 u64 rdba = ring->dma;
697 struct fm10k_hw *hw = &interface->hw;
698 u32 size = ring->count * sizeof(union fm10k_rx_desc);
699 u32 rxqctl = FM10K_RXQCTL_ENABLE | FM10K_RXQCTL_PF;
700 u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
701 u32 srrctl = FM10K_SRRCTL_BUFFER_CHAINING_EN;
702 u32 rxint = FM10K_INT_MAP_DISABLE;
703 u8 rx_pause = interface->rx_pause;
704 u8 reg_idx = ring->reg_idx;
705
706 /* disable queue to avoid issues while updating state */
707 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), 0);
708 fm10k_write_flush(hw);
709
710 /* possible poll here to verify ring resources have been cleaned */
711
712 /* set location and size for descriptor ring */
713 fm10k_write_reg(hw, FM10K_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
714 fm10k_write_reg(hw, FM10K_RDBAH(reg_idx), rdba >> 32);
715 fm10k_write_reg(hw, FM10K_RDLEN(reg_idx), size);
716
717 /* reset head and tail pointers */
718 fm10k_write_reg(hw, FM10K_RDH(reg_idx), 0);
719 fm10k_write_reg(hw, FM10K_RDT(reg_idx), 0);
720
721 /* store tail pointer */
722 ring->tail = &interface->uc_addr[FM10K_RDT(reg_idx)];
723
724 /* reset ntu and ntc to place SW in sync with hardware */
725 ring->next_to_clean = 0;
726 ring->next_to_use = 0;
727 ring->next_to_alloc = 0;
728
729 /* Configure the Rx buffer size for one buff without split */
730 srrctl |= FM10K_RX_BUFSZ >> FM10K_SRRCTL_BSIZEPKT_SHIFT;
731
732 /* Configure the Rx ring to suppress loopback packets */
733 srrctl |= FM10K_SRRCTL_LOOPBACK_SUPPRESS;
734 fm10k_write_reg(hw, FM10K_SRRCTL(reg_idx), srrctl);
735
736 /* Enable drop on empty */
737 #ifdef CONFIG_DCB
738 if (interface->pfc_en)
739 rx_pause = interface->pfc_en;
740 #endif
741 if (!(rx_pause & BIT(ring->qos_pc)))
742 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
743
744 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
745
746 /* assign default VLAN to queue */
747 ring->vid = hw->mac.default_vid;
748
749 /* if we have an active VLAN, disable default VLAN ID */
750 if (test_bit(hw->mac.default_vid, interface->active_vlans))
751 ring->vid |= FM10K_VLAN_CLEAR;
752
753 /* Map interrupt */
754 if (ring->q_vector) {
755 rxint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
756 rxint |= FM10K_INT_MAP_TIMER1;
757 }
758
759 fm10k_write_reg(hw, FM10K_RXINT(reg_idx), rxint);
760
761 /* enable queue */
762 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl);
763
764 /* place buffers on ring for receive data */
765 fm10k_alloc_rx_buffers(ring, fm10k_desc_unused(ring));
766 }
767
768 /**
769 * fm10k_update_rx_drop_en - Configures the drop enable bits for Rx rings
770 * @interface: board private structure
771 *
772 * Configure the drop enable bits for the Rx rings.
773 **/
774 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface)
775 {
776 struct fm10k_hw *hw = &interface->hw;
777 u8 rx_pause = interface->rx_pause;
778 int i;
779
780 #ifdef CONFIG_DCB
781 if (interface->pfc_en)
782 rx_pause = interface->pfc_en;
783
784 #endif
785 for (i = 0; i < interface->num_rx_queues; i++) {
786 struct fm10k_ring *ring = interface->rx_ring[i];
787 u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
788 u8 reg_idx = ring->reg_idx;
789
790 if (!(rx_pause & BIT(ring->qos_pc)))
791 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
792
793 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
794 }
795 }
796
797 /**
798 * fm10k_configure_dglort - Configure Receive DGLORT after reset
799 * @interface: board private structure
800 *
801 * Configure the DGLORT description and RSS tables.
802 **/
803 static void fm10k_configure_dglort(struct fm10k_intfc *interface)
804 {
805 struct fm10k_dglort_cfg dglort = { 0 };
806 struct fm10k_hw *hw = &interface->hw;
807 int i;
808 u32 mrqc;
809
810 /* Fill out hash function seeds */
811 for (i = 0; i < FM10K_RSSRK_SIZE; i++)
812 fm10k_write_reg(hw, FM10K_RSSRK(0, i), interface->rssrk[i]);
813
814 /* Write RETA table to hardware */
815 for (i = 0; i < FM10K_RETA_SIZE; i++)
816 fm10k_write_reg(hw, FM10K_RETA(0, i), interface->reta[i]);
817
818 /* Generate RSS hash based on packet types, TCP/UDP
819 * port numbers and/or IPv4/v6 src and dst addresses
820 */
821 mrqc = FM10K_MRQC_IPV4 |
822 FM10K_MRQC_TCP_IPV4 |
823 FM10K_MRQC_IPV6 |
824 FM10K_MRQC_TCP_IPV6;
825
826 if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP)
827 mrqc |= FM10K_MRQC_UDP_IPV4;
828 if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP)
829 mrqc |= FM10K_MRQC_UDP_IPV6;
830
831 fm10k_write_reg(hw, FM10K_MRQC(0), mrqc);
832
833 /* configure default DGLORT mapping for RSS/DCB */
834 dglort.inner_rss = 1;
835 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
836 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
837 hw->mac.ops.configure_dglort_map(hw, &dglort);
838
839 /* assign GLORT per queue for queue mapped testing */
840 if (interface->glort_count > 64) {
841 memset(&dglort, 0, sizeof(dglort));
842 dglort.inner_rss = 1;
843 dglort.glort = interface->glort + 64;
844 dglort.idx = fm10k_dglort_pf_queue;
845 dglort.queue_l = fls(interface->num_rx_queues - 1);
846 hw->mac.ops.configure_dglort_map(hw, &dglort);
847 }
848
849 /* assign glort value for RSS/DCB specific to this interface */
850 memset(&dglort, 0, sizeof(dglort));
851 dglort.inner_rss = 1;
852 dglort.glort = interface->glort;
853 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
854 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
855 /* configure DGLORT mapping for RSS/DCB */
856 dglort.idx = fm10k_dglort_pf_rss;
857 if (interface->l2_accel)
858 dglort.shared_l = fls(interface->l2_accel->size);
859 hw->mac.ops.configure_dglort_map(hw, &dglort);
860 }
861
862 /**
863 * fm10k_configure_rx - Configure Receive Unit after Reset
864 * @interface: board private structure
865 *
866 * Configure the Rx unit of the MAC after a reset.
867 **/
868 static void fm10k_configure_rx(struct fm10k_intfc *interface)
869 {
870 int i;
871
872 /* Configure SWPRI to PC map */
873 fm10k_configure_swpri_map(interface);
874
875 /* Configure RSS and DGLORT map */
876 fm10k_configure_dglort(interface);
877
878 /* Setup the HW Rx Head and Tail descriptor pointers */
879 for (i = 0; i < interface->num_rx_queues; i++)
880 fm10k_configure_rx_ring(interface, interface->rx_ring[i]);
881
882 /* possible poll here to verify that Rx rings are now enabled */
883 }
884
885 static void fm10k_napi_enable_all(struct fm10k_intfc *interface)
886 {
887 struct fm10k_q_vector *q_vector;
888 int q_idx;
889
890 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
891 q_vector = interface->q_vector[q_idx];
892 napi_enable(&q_vector->napi);
893 }
894 }
895
896 static irqreturn_t fm10k_msix_clean_rings(int __always_unused irq, void *data)
897 {
898 struct fm10k_q_vector *q_vector = data;
899
900 if (q_vector->rx.count || q_vector->tx.count)
901 napi_schedule_irqoff(&q_vector->napi);
902
903 return IRQ_HANDLED;
904 }
905
906 static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data)
907 {
908 struct fm10k_intfc *interface = data;
909 struct fm10k_hw *hw = &interface->hw;
910 struct fm10k_mbx_info *mbx = &hw->mbx;
911
912 /* re-enable mailbox interrupt and indicate 20us delay */
913 fm10k_write_reg(hw, FM10K_VFITR(FM10K_MBX_VECTOR),
914 (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
915 FM10K_ITR_ENABLE);
916
917 /* service upstream mailbox */
918 if (fm10k_mbx_trylock(interface)) {
919 mbx->ops.process(hw, mbx);
920 fm10k_mbx_unlock(interface);
921 }
922
923 hw->mac.get_host_state = true;
924 fm10k_service_event_schedule(interface);
925
926 return IRQ_HANDLED;
927 }
928
929 #ifdef CONFIG_NET_POLL_CONTROLLER
930 /**
931 * fm10k_netpoll - A Polling 'interrupt' handler
932 * @netdev: network interface device structure
933 *
934 * This is used by netconsole to send skbs without having to re-enable
935 * interrupts. It's not called while the normal interrupt routine is executing.
936 **/
937 void fm10k_netpoll(struct net_device *netdev)
938 {
939 struct fm10k_intfc *interface = netdev_priv(netdev);
940 int i;
941
942 /* if interface is down do nothing */
943 if (test_bit(__FM10K_DOWN, &interface->state))
944 return;
945
946 for (i = 0; i < interface->num_q_vectors; i++)
947 fm10k_msix_clean_rings(0, interface->q_vector[i]);
948 }
949
950 #endif
951 #define FM10K_ERR_MSG(type) case (type): error = #type; break
952 static void fm10k_handle_fault(struct fm10k_intfc *interface, int type,
953 struct fm10k_fault *fault)
954 {
955 struct pci_dev *pdev = interface->pdev;
956 struct fm10k_hw *hw = &interface->hw;
957 struct fm10k_iov_data *iov_data = interface->iov_data;
958 char *error;
959
960 switch (type) {
961 case FM10K_PCA_FAULT:
962 switch (fault->type) {
963 default:
964 error = "Unknown PCA error";
965 break;
966 FM10K_ERR_MSG(PCA_NO_FAULT);
967 FM10K_ERR_MSG(PCA_UNMAPPED_ADDR);
968 FM10K_ERR_MSG(PCA_BAD_QACCESS_PF);
969 FM10K_ERR_MSG(PCA_BAD_QACCESS_VF);
970 FM10K_ERR_MSG(PCA_MALICIOUS_REQ);
971 FM10K_ERR_MSG(PCA_POISONED_TLP);
972 FM10K_ERR_MSG(PCA_TLP_ABORT);
973 }
974 break;
975 case FM10K_THI_FAULT:
976 switch (fault->type) {
977 default:
978 error = "Unknown THI error";
979 break;
980 FM10K_ERR_MSG(THI_NO_FAULT);
981 FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT);
982 }
983 break;
984 case FM10K_FUM_FAULT:
985 switch (fault->type) {
986 default:
987 error = "Unknown FUM error";
988 break;
989 FM10K_ERR_MSG(FUM_NO_FAULT);
990 FM10K_ERR_MSG(FUM_UNMAPPED_ADDR);
991 FM10K_ERR_MSG(FUM_BAD_VF_QACCESS);
992 FM10K_ERR_MSG(FUM_ADD_DECODE_ERR);
993 FM10K_ERR_MSG(FUM_RO_ERROR);
994 FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR);
995 FM10K_ERR_MSG(FUM_CSR_TIMEOUT);
996 FM10K_ERR_MSG(FUM_INVALID_TYPE);
997 FM10K_ERR_MSG(FUM_INVALID_LENGTH);
998 FM10K_ERR_MSG(FUM_INVALID_BE);
999 FM10K_ERR_MSG(FUM_INVALID_ALIGN);
1000 }
1001 break;
1002 default:
1003 error = "Undocumented fault";
1004 break;
1005 }
1006
1007 dev_warn(&pdev->dev,
1008 "%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n",
1009 error, fault->address, fault->specinfo,
1010 PCI_SLOT(fault->func), PCI_FUNC(fault->func));
1011
1012 /* For VF faults, clear out the respective LPORT, reset the queue
1013 * resources, and then reconnect to the mailbox. This allows the
1014 * VF in question to resume behavior. For transient faults that are
1015 * the result of non-malicious behavior this will log the fault and
1016 * allow the VF to resume functionality. Obviously for malicious VFs
1017 * they will be able to attempt malicious behavior again. In this
1018 * case, the system administrator will need to step in and manually
1019 * remove or disable the VF in question.
1020 */
1021 if (fault->func && iov_data) {
1022 int vf = fault->func - 1;
1023 struct fm10k_vf_info *vf_info = &iov_data->vf_info[vf];
1024
1025 hw->iov.ops.reset_lport(hw, vf_info);
1026 hw->iov.ops.reset_resources(hw, vf_info);
1027
1028 /* reset_lport disables the VF, so re-enable it */
1029 hw->iov.ops.set_lport(hw, vf_info, vf,
1030 FM10K_VF_FLAG_MULTI_CAPABLE);
1031
1032 /* reset_resources will disconnect from the mbx */
1033 vf_info->mbx.ops.connect(hw, &vf_info->mbx);
1034 }
1035 }
1036
1037 static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr)
1038 {
1039 struct fm10k_hw *hw = &interface->hw;
1040 struct fm10k_fault fault = { 0 };
1041 int type, err;
1042
1043 for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT;
1044 eicr;
1045 eicr >>= 1, type += FM10K_FAULT_SIZE) {
1046 /* only check if there is an error reported */
1047 if (!(eicr & 0x1))
1048 continue;
1049
1050 /* retrieve fault info */
1051 err = hw->mac.ops.get_fault(hw, type, &fault);
1052 if (err) {
1053 dev_err(&interface->pdev->dev,
1054 "error reading fault\n");
1055 continue;
1056 }
1057
1058 fm10k_handle_fault(interface, type, &fault);
1059 }
1060 }
1061
1062 static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr)
1063 {
1064 struct fm10k_hw *hw = &interface->hw;
1065 const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
1066 u32 maxholdq;
1067 int q;
1068
1069 if (!(eicr & FM10K_EICR_MAXHOLDTIME))
1070 return;
1071
1072 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7));
1073 if (maxholdq)
1074 fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq);
1075 for (q = 255;;) {
1076 if (maxholdq & BIT(31)) {
1077 if (q < FM10K_MAX_QUEUES_PF) {
1078 interface->rx_overrun_pf++;
1079 fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl);
1080 } else {
1081 interface->rx_overrun_vf++;
1082 }
1083 }
1084
1085 maxholdq *= 2;
1086 if (!maxholdq)
1087 q &= ~(32 - 1);
1088
1089 if (!q)
1090 break;
1091
1092 if (q-- % 32)
1093 continue;
1094
1095 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32));
1096 if (maxholdq)
1097 fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq);
1098 }
1099 }
1100
1101 static irqreturn_t fm10k_msix_mbx_pf(int __always_unused irq, void *data)
1102 {
1103 struct fm10k_intfc *interface = data;
1104 struct fm10k_hw *hw = &interface->hw;
1105 struct fm10k_mbx_info *mbx = &hw->mbx;
1106 u32 eicr;
1107
1108 /* unmask any set bits related to this interrupt */
1109 eicr = fm10k_read_reg(hw, FM10K_EICR);
1110 fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX |
1111 FM10K_EICR_SWITCHREADY |
1112 FM10K_EICR_SWITCHNOTREADY));
1113
1114 /* report any faults found to the message log */
1115 fm10k_report_fault(interface, eicr);
1116
1117 /* reset any queues disabled due to receiver overrun */
1118 fm10k_reset_drop_on_empty(interface, eicr);
1119
1120 /* service mailboxes */
1121 if (fm10k_mbx_trylock(interface)) {
1122 mbx->ops.process(hw, mbx);
1123 /* handle VFLRE events */
1124 fm10k_iov_event(interface);
1125 fm10k_mbx_unlock(interface);
1126 }
1127
1128 /* if switch toggled state we should reset GLORTs */
1129 if (eicr & FM10K_EICR_SWITCHNOTREADY) {
1130 /* force link down for at least 4 seconds */
1131 interface->link_down_event = jiffies + (4 * HZ);
1132 set_bit(__FM10K_LINK_DOWN, &interface->state);
1133
1134 /* reset dglort_map back to no config */
1135 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
1136 }
1137
1138 /* we should validate host state after interrupt event */
1139 hw->mac.get_host_state = true;
1140
1141 /* validate host state, and handle VF mailboxes in the service task */
1142 fm10k_service_event_schedule(interface);
1143
1144 /* re-enable mailbox interrupt and indicate 20us delay */
1145 fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR),
1146 (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
1147 FM10K_ITR_ENABLE);
1148
1149 return IRQ_HANDLED;
1150 }
1151
1152 void fm10k_mbx_free_irq(struct fm10k_intfc *interface)
1153 {
1154 struct fm10k_hw *hw = &interface->hw;
1155 struct msix_entry *entry;
1156 int itr_reg;
1157
1158 /* no mailbox IRQ to free if MSI-X is not enabled */
1159 if (!interface->msix_entries)
1160 return;
1161
1162 entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1163
1164 /* disconnect the mailbox */
1165 hw->mbx.ops.disconnect(hw, &hw->mbx);
1166
1167 /* disable Mailbox cause */
1168 if (hw->mac.type == fm10k_mac_pf) {
1169 fm10k_write_reg(hw, FM10K_EIMR,
1170 FM10K_EIMR_DISABLE(PCA_FAULT) |
1171 FM10K_EIMR_DISABLE(FUM_FAULT) |
1172 FM10K_EIMR_DISABLE(MAILBOX) |
1173 FM10K_EIMR_DISABLE(SWITCHREADY) |
1174 FM10K_EIMR_DISABLE(SWITCHNOTREADY) |
1175 FM10K_EIMR_DISABLE(SRAMERROR) |
1176 FM10K_EIMR_DISABLE(VFLR) |
1177 FM10K_EIMR_DISABLE(MAXHOLDTIME));
1178 itr_reg = FM10K_ITR(FM10K_MBX_VECTOR);
1179 } else {
1180 itr_reg = FM10K_VFITR(FM10K_MBX_VECTOR);
1181 }
1182
1183 fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET);
1184
1185 free_irq(entry->vector, interface);
1186 }
1187
1188 static s32 fm10k_mbx_mac_addr(struct fm10k_hw *hw, u32 **results,
1189 struct fm10k_mbx_info *mbx)
1190 {
1191 bool vlan_override = hw->mac.vlan_override;
1192 u16 default_vid = hw->mac.default_vid;
1193 struct fm10k_intfc *interface;
1194 s32 err;
1195
1196 err = fm10k_msg_mac_vlan_vf(hw, results, mbx);
1197 if (err)
1198 return err;
1199
1200 interface = container_of(hw, struct fm10k_intfc, hw);
1201
1202 /* MAC was changed so we need reset */
1203 if (is_valid_ether_addr(hw->mac.perm_addr) &&
1204 !ether_addr_equal(hw->mac.perm_addr, hw->mac.addr))
1205 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1206
1207 /* VLAN override was changed, or default VLAN changed */
1208 if ((vlan_override != hw->mac.vlan_override) ||
1209 (default_vid != hw->mac.default_vid))
1210 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1211
1212 return 0;
1213 }
1214
1215 /* generic error handler for mailbox issues */
1216 static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results,
1217 struct fm10k_mbx_info __always_unused *mbx)
1218 {
1219 struct fm10k_intfc *interface;
1220 struct pci_dev *pdev;
1221
1222 interface = container_of(hw, struct fm10k_intfc, hw);
1223 pdev = interface->pdev;
1224
1225 dev_err(&pdev->dev, "Unknown message ID %u\n",
1226 **results & FM10K_TLV_ID_MASK);
1227
1228 return 0;
1229 }
1230
1231 static const struct fm10k_msg_data vf_mbx_data[] = {
1232 FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test),
1233 FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_mbx_mac_addr),
1234 FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf),
1235 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
1236 };
1237
1238 static int fm10k_mbx_request_irq_vf(struct fm10k_intfc *interface)
1239 {
1240 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1241 struct net_device *dev = interface->netdev;
1242 struct fm10k_hw *hw = &interface->hw;
1243 int err;
1244
1245 /* Use timer0 for interrupt moderation on the mailbox */
1246 u32 itr = entry->entry | FM10K_INT_MAP_TIMER0;
1247
1248 /* register mailbox handlers */
1249 err = hw->mbx.ops.register_handlers(&hw->mbx, vf_mbx_data);
1250 if (err)
1251 return err;
1252
1253 /* request the IRQ */
1254 err = request_irq(entry->vector, fm10k_msix_mbx_vf, 0,
1255 dev->name, interface);
1256 if (err) {
1257 netif_err(interface, probe, dev,
1258 "request_irq for msix_mbx failed: %d\n", err);
1259 return err;
1260 }
1261
1262 /* map all of the interrupt sources */
1263 fm10k_write_reg(hw, FM10K_VFINT_MAP, itr);
1264
1265 /* enable interrupt */
1266 fm10k_write_reg(hw, FM10K_VFITR(entry->entry), FM10K_ITR_ENABLE);
1267
1268 return 0;
1269 }
1270
1271 static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results,
1272 struct fm10k_mbx_info *mbx)
1273 {
1274 struct fm10k_intfc *interface;
1275 u32 dglort_map = hw->mac.dglort_map;
1276 s32 err;
1277
1278 interface = container_of(hw, struct fm10k_intfc, hw);
1279
1280 err = fm10k_msg_err_pf(hw, results, mbx);
1281 if (!err && hw->swapi.status) {
1282 /* force link down for a reasonable delay */
1283 interface->link_down_event = jiffies + (2 * HZ);
1284 set_bit(__FM10K_LINK_DOWN, &interface->state);
1285
1286 /* reset dglort_map back to no config */
1287 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
1288
1289 fm10k_service_event_schedule(interface);
1290
1291 /* prevent overloading kernel message buffer */
1292 if (interface->lport_map_failed)
1293 return 0;
1294
1295 interface->lport_map_failed = true;
1296
1297 if (hw->swapi.status == FM10K_MSG_ERR_PEP_NOT_SCHEDULED)
1298 dev_warn(&interface->pdev->dev,
1299 "cannot obtain link because the host interface is configured for a PCIe host interface bandwidth of zero\n");
1300 dev_warn(&interface->pdev->dev,
1301 "request logical port map failed: %d\n",
1302 hw->swapi.status);
1303
1304 return 0;
1305 }
1306
1307 err = fm10k_msg_lport_map_pf(hw, results, mbx);
1308 if (err)
1309 return err;
1310
1311 interface->lport_map_failed = false;
1312
1313 /* we need to reset if port count was just updated */
1314 if (dglort_map != hw->mac.dglort_map)
1315 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1316
1317 return 0;
1318 }
1319
1320 static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results,
1321 struct fm10k_mbx_info __always_unused *mbx)
1322 {
1323 struct fm10k_intfc *interface;
1324 u16 glort, pvid;
1325 u32 pvid_update;
1326 s32 err;
1327
1328 err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID],
1329 &pvid_update);
1330 if (err)
1331 return err;
1332
1333 /* extract values from the pvid update */
1334 glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT);
1335 pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID);
1336
1337 /* if glort is not valid return error */
1338 if (!fm10k_glort_valid_pf(hw, glort))
1339 return FM10K_ERR_PARAM;
1340
1341 /* verify VLAN ID is valid */
1342 if (pvid >= FM10K_VLAN_TABLE_VID_MAX)
1343 return FM10K_ERR_PARAM;
1344
1345 interface = container_of(hw, struct fm10k_intfc, hw);
1346
1347 /* check to see if this belongs to one of the VFs */
1348 err = fm10k_iov_update_pvid(interface, glort, pvid);
1349 if (!err)
1350 return 0;
1351
1352 /* we need to reset if default VLAN was just updated */
1353 if (pvid != hw->mac.default_vid)
1354 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1355
1356 hw->mac.default_vid = pvid;
1357
1358 return 0;
1359 }
1360
1361 static const struct fm10k_msg_data pf_mbx_data[] = {
1362 FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf),
1363 FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf),
1364 FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map),
1365 FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf),
1366 FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf),
1367 FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid),
1368 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
1369 };
1370
1371 static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface)
1372 {
1373 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1374 struct net_device *dev = interface->netdev;
1375 struct fm10k_hw *hw = &interface->hw;
1376 int err;
1377
1378 /* Use timer0 for interrupt moderation on the mailbox */
1379 u32 mbx_itr = entry->entry | FM10K_INT_MAP_TIMER0;
1380 u32 other_itr = entry->entry | FM10K_INT_MAP_IMMEDIATE;
1381
1382 /* register mailbox handlers */
1383 err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data);
1384 if (err)
1385 return err;
1386
1387 /* request the IRQ */
1388 err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0,
1389 dev->name, interface);
1390 if (err) {
1391 netif_err(interface, probe, dev,
1392 "request_irq for msix_mbx failed: %d\n", err);
1393 return err;
1394 }
1395
1396 /* Enable interrupts w/ no moderation for "other" interrupts */
1397 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_pcie_fault), other_itr);
1398 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_switch_up_down), other_itr);
1399 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_sram), other_itr);
1400 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_max_hold_time), other_itr);
1401 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_vflr), other_itr);
1402
1403 /* Enable interrupts w/ moderation for mailbox */
1404 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_mailbox), mbx_itr);
1405
1406 /* Enable individual interrupt causes */
1407 fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) |
1408 FM10K_EIMR_ENABLE(FUM_FAULT) |
1409 FM10K_EIMR_ENABLE(MAILBOX) |
1410 FM10K_EIMR_ENABLE(SWITCHREADY) |
1411 FM10K_EIMR_ENABLE(SWITCHNOTREADY) |
1412 FM10K_EIMR_ENABLE(SRAMERROR) |
1413 FM10K_EIMR_ENABLE(VFLR) |
1414 FM10K_EIMR_ENABLE(MAXHOLDTIME));
1415
1416 /* enable interrupt */
1417 fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE);
1418
1419 return 0;
1420 }
1421
1422 int fm10k_mbx_request_irq(struct fm10k_intfc *interface)
1423 {
1424 struct fm10k_hw *hw = &interface->hw;
1425 int err;
1426
1427 /* enable Mailbox cause */
1428 if (hw->mac.type == fm10k_mac_pf)
1429 err = fm10k_mbx_request_irq_pf(interface);
1430 else
1431 err = fm10k_mbx_request_irq_vf(interface);
1432 if (err)
1433 return err;
1434
1435 /* connect mailbox */
1436 err = hw->mbx.ops.connect(hw, &hw->mbx);
1437
1438 /* if the mailbox failed to connect, then free IRQ */
1439 if (err)
1440 fm10k_mbx_free_irq(interface);
1441
1442 return err;
1443 }
1444
1445 /**
1446 * fm10k_qv_free_irq - release interrupts associated with queue vectors
1447 * @interface: board private structure
1448 *
1449 * Release all interrupts associated with this interface
1450 **/
1451 void fm10k_qv_free_irq(struct fm10k_intfc *interface)
1452 {
1453 int vector = interface->num_q_vectors;
1454 struct fm10k_hw *hw = &interface->hw;
1455 struct msix_entry *entry;
1456
1457 entry = &interface->msix_entries[NON_Q_VECTORS(hw) + vector];
1458
1459 while (vector) {
1460 struct fm10k_q_vector *q_vector;
1461
1462 vector--;
1463 entry--;
1464 q_vector = interface->q_vector[vector];
1465
1466 if (!q_vector->tx.count && !q_vector->rx.count)
1467 continue;
1468
1469 /* clear the affinity_mask in the IRQ descriptor */
1470 irq_set_affinity_hint(entry->vector, NULL);
1471
1472 /* disable interrupts */
1473 writel(FM10K_ITR_MASK_SET, q_vector->itr);
1474
1475 free_irq(entry->vector, q_vector);
1476 }
1477 }
1478
1479 /**
1480 * fm10k_qv_request_irq - initialize interrupts for queue vectors
1481 * @interface: board private structure
1482 *
1483 * Attempts to configure interrupts using the best available
1484 * capabilities of the hardware and kernel.
1485 **/
1486 int fm10k_qv_request_irq(struct fm10k_intfc *interface)
1487 {
1488 struct net_device *dev = interface->netdev;
1489 struct fm10k_hw *hw = &interface->hw;
1490 struct msix_entry *entry;
1491 int ri = 0, ti = 0;
1492 int vector, err;
1493
1494 entry = &interface->msix_entries[NON_Q_VECTORS(hw)];
1495
1496 for (vector = 0; vector < interface->num_q_vectors; vector++) {
1497 struct fm10k_q_vector *q_vector = interface->q_vector[vector];
1498
1499 /* name the vector */
1500 if (q_vector->tx.count && q_vector->rx.count) {
1501 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1502 "%s-TxRx-%d", dev->name, ri++);
1503 ti++;
1504 } else if (q_vector->rx.count) {
1505 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1506 "%s-rx-%d", dev->name, ri++);
1507 } else if (q_vector->tx.count) {
1508 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1509 "%s-tx-%d", dev->name, ti++);
1510 } else {
1511 /* skip this unused q_vector */
1512 continue;
1513 }
1514
1515 /* Assign ITR register to q_vector */
1516 q_vector->itr = (hw->mac.type == fm10k_mac_pf) ?
1517 &interface->uc_addr[FM10K_ITR(entry->entry)] :
1518 &interface->uc_addr[FM10K_VFITR(entry->entry)];
1519
1520 /* request the IRQ */
1521 err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0,
1522 q_vector->name, q_vector);
1523 if (err) {
1524 netif_err(interface, probe, dev,
1525 "request_irq failed for MSIX interrupt Error: %d\n",
1526 err);
1527 goto err_out;
1528 }
1529
1530 /* assign the mask for this irq */
1531 irq_set_affinity_hint(entry->vector, &q_vector->affinity_mask);
1532
1533 /* Enable q_vector */
1534 writel(FM10K_ITR_ENABLE, q_vector->itr);
1535
1536 entry++;
1537 }
1538
1539 return 0;
1540
1541 err_out:
1542 /* wind through the ring freeing all entries and vectors */
1543 while (vector) {
1544 struct fm10k_q_vector *q_vector;
1545
1546 entry--;
1547 vector--;
1548 q_vector = interface->q_vector[vector];
1549
1550 if (!q_vector->tx.count && !q_vector->rx.count)
1551 continue;
1552
1553 /* clear the affinity_mask in the IRQ descriptor */
1554 irq_set_affinity_hint(entry->vector, NULL);
1555
1556 /* disable interrupts */
1557 writel(FM10K_ITR_MASK_SET, q_vector->itr);
1558
1559 free_irq(entry->vector, q_vector);
1560 }
1561
1562 return err;
1563 }
1564
1565 void fm10k_up(struct fm10k_intfc *interface)
1566 {
1567 struct fm10k_hw *hw = &interface->hw;
1568
1569 /* Enable Tx/Rx DMA */
1570 hw->mac.ops.start_hw(hw);
1571
1572 /* configure Tx descriptor rings */
1573 fm10k_configure_tx(interface);
1574
1575 /* configure Rx descriptor rings */
1576 fm10k_configure_rx(interface);
1577
1578 /* configure interrupts */
1579 hw->mac.ops.update_int_moderator(hw);
1580
1581 /* enable statistics capture again */
1582 clear_bit(__FM10K_UPDATING_STATS, &interface->state);
1583
1584 /* clear down bit to indicate we are ready to go */
1585 clear_bit(__FM10K_DOWN, &interface->state);
1586
1587 /* enable polling cleanups */
1588 fm10k_napi_enable_all(interface);
1589
1590 /* re-establish Rx filters */
1591 fm10k_restore_rx_state(interface);
1592
1593 /* enable transmits */
1594 netif_tx_start_all_queues(interface->netdev);
1595
1596 /* kick off the service timer now */
1597 hw->mac.get_host_state = true;
1598 mod_timer(&interface->service_timer, jiffies);
1599 }
1600
1601 static void fm10k_napi_disable_all(struct fm10k_intfc *interface)
1602 {
1603 struct fm10k_q_vector *q_vector;
1604 int q_idx;
1605
1606 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
1607 q_vector = interface->q_vector[q_idx];
1608 napi_disable(&q_vector->napi);
1609 }
1610 }
1611
1612 void fm10k_down(struct fm10k_intfc *interface)
1613 {
1614 struct net_device *netdev = interface->netdev;
1615 struct fm10k_hw *hw = &interface->hw;
1616 int err, i = 0, count = 0;
1617
1618 /* signal that we are down to the interrupt handler and service task */
1619 if (test_and_set_bit(__FM10K_DOWN, &interface->state))
1620 return;
1621
1622 /* call carrier off first to avoid false dev_watchdog timeouts */
1623 netif_carrier_off(netdev);
1624
1625 /* disable transmits */
1626 netif_tx_stop_all_queues(netdev);
1627 netif_tx_disable(netdev);
1628
1629 /* reset Rx filters */
1630 fm10k_reset_rx_state(interface);
1631
1632 /* disable polling routines */
1633 fm10k_napi_disable_all(interface);
1634
1635 /* capture stats one last time before stopping interface */
1636 fm10k_update_stats(interface);
1637
1638 /* prevent updating statistics while we're down */
1639 while (test_and_set_bit(__FM10K_UPDATING_STATS, &interface->state))
1640 usleep_range(1000, 2000);
1641
1642 /* skip waiting for TX DMA if we lost PCIe link */
1643 if (FM10K_REMOVED(hw->hw_addr))
1644 goto skip_tx_dma_drain;
1645
1646 /* In some rare circumstances it can take a while for Tx queues to
1647 * quiesce and be fully disabled. Attempt to .stop_hw() first, and
1648 * then if we get ERR_REQUESTS_PENDING, go ahead and wait in a loop
1649 * until the Tx queues have emptied, or until a number of retries. If
1650 * we fail to clear within the retry loop, we will issue a warning
1651 * indicating that Tx DMA is probably hung. Note this means we call
1652 * .stop_hw() twice but this shouldn't cause any problems.
1653 */
1654 err = hw->mac.ops.stop_hw(hw);
1655 if (err != FM10K_ERR_REQUESTS_PENDING)
1656 goto skip_tx_dma_drain;
1657
1658 #define TX_DMA_DRAIN_RETRIES 25
1659 for (count = 0; count < TX_DMA_DRAIN_RETRIES; count++) {
1660 usleep_range(10000, 20000);
1661
1662 /* start checking at the last ring to have pending Tx */
1663 for (; i < interface->num_tx_queues; i++)
1664 if (fm10k_get_tx_pending(interface->tx_ring[i]))
1665 break;
1666
1667 /* if all the queues are drained, we can break now */
1668 if (i == interface->num_tx_queues)
1669 break;
1670 }
1671
1672 if (count >= TX_DMA_DRAIN_RETRIES)
1673 dev_err(&interface->pdev->dev,
1674 "Tx queues failed to drain after %d tries. Tx DMA is probably hung.\n",
1675 count);
1676 skip_tx_dma_drain:
1677 /* Disable DMA engine for Tx/Rx */
1678 err = hw->mac.ops.stop_hw(hw);
1679 if (err == FM10K_ERR_REQUESTS_PENDING)
1680 dev_err(&interface->pdev->dev,
1681 "due to pending requests hw was not shut down gracefully\n");
1682 else if (err)
1683 dev_err(&interface->pdev->dev, "stop_hw failed: %d\n", err);
1684
1685 /* free any buffers still on the rings */
1686 fm10k_clean_all_tx_rings(interface);
1687 fm10k_clean_all_rx_rings(interface);
1688 }
1689
1690 /**
1691 * fm10k_sw_init - Initialize general software structures
1692 * @interface: host interface private structure to initialize
1693 *
1694 * fm10k_sw_init initializes the interface private data structure.
1695 * Fields are initialized based on PCI device information and
1696 * OS network device settings (MTU size).
1697 **/
1698 static int fm10k_sw_init(struct fm10k_intfc *interface,
1699 const struct pci_device_id *ent)
1700 {
1701 const struct fm10k_info *fi = fm10k_info_tbl[ent->driver_data];
1702 struct fm10k_hw *hw = &interface->hw;
1703 struct pci_dev *pdev = interface->pdev;
1704 struct net_device *netdev = interface->netdev;
1705 u32 rss_key[FM10K_RSSRK_SIZE];
1706 unsigned int rss;
1707 int err;
1708
1709 /* initialize back pointer */
1710 hw->back = interface;
1711 hw->hw_addr = interface->uc_addr;
1712
1713 /* PCI config space info */
1714 hw->vendor_id = pdev->vendor;
1715 hw->device_id = pdev->device;
1716 hw->revision_id = pdev->revision;
1717 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1718 hw->subsystem_device_id = pdev->subsystem_device;
1719
1720 /* Setup hw api */
1721 memcpy(&hw->mac.ops, fi->mac_ops, sizeof(hw->mac.ops));
1722 hw->mac.type = fi->mac;
1723
1724 /* Setup IOV handlers */
1725 if (fi->iov_ops)
1726 memcpy(&hw->iov.ops, fi->iov_ops, sizeof(hw->iov.ops));
1727
1728 /* Set common capability flags and settings */
1729 rss = min_t(int, FM10K_MAX_RSS_INDICES, num_online_cpus());
1730 interface->ring_feature[RING_F_RSS].limit = rss;
1731 fi->get_invariants(hw);
1732
1733 /* pick up the PCIe bus settings for reporting later */
1734 if (hw->mac.ops.get_bus_info)
1735 hw->mac.ops.get_bus_info(hw);
1736
1737 /* limit the usable DMA range */
1738 if (hw->mac.ops.set_dma_mask)
1739 hw->mac.ops.set_dma_mask(hw, dma_get_mask(&pdev->dev));
1740
1741 /* update netdev with DMA restrictions */
1742 if (dma_get_mask(&pdev->dev) > DMA_BIT_MASK(32)) {
1743 netdev->features |= NETIF_F_HIGHDMA;
1744 netdev->vlan_features |= NETIF_F_HIGHDMA;
1745 }
1746
1747 /* delay any future reset requests */
1748 interface->last_reset = jiffies + (10 * HZ);
1749
1750 /* reset and initialize the hardware so it is in a known state */
1751 err = hw->mac.ops.reset_hw(hw);
1752 if (err) {
1753 dev_err(&pdev->dev, "reset_hw failed: %d\n", err);
1754 return err;
1755 }
1756
1757 err = hw->mac.ops.init_hw(hw);
1758 if (err) {
1759 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
1760 return err;
1761 }
1762
1763 /* initialize hardware statistics */
1764 hw->mac.ops.update_hw_stats(hw, &interface->stats);
1765
1766 /* Set upper limit on IOV VFs that can be allocated */
1767 pci_sriov_set_totalvfs(pdev, hw->iov.total_vfs);
1768
1769 /* Start with random Ethernet address */
1770 eth_random_addr(hw->mac.addr);
1771
1772 /* Initialize MAC address from hardware */
1773 err = hw->mac.ops.read_mac_addr(hw);
1774 if (err) {
1775 dev_warn(&pdev->dev,
1776 "Failed to obtain MAC address defaulting to random\n");
1777 /* tag address assignment as random */
1778 netdev->addr_assign_type |= NET_ADDR_RANDOM;
1779 }
1780
1781 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
1782 ether_addr_copy(netdev->perm_addr, hw->mac.addr);
1783
1784 if (!is_valid_ether_addr(netdev->perm_addr)) {
1785 dev_err(&pdev->dev, "Invalid MAC Address\n");
1786 return -EIO;
1787 }
1788
1789 /* initialize DCBNL interface */
1790 fm10k_dcbnl_set_ops(netdev);
1791
1792 /* set default ring sizes */
1793 interface->tx_ring_count = FM10K_DEFAULT_TXD;
1794 interface->rx_ring_count = FM10K_DEFAULT_RXD;
1795
1796 /* set default interrupt moderation */
1797 interface->tx_itr = FM10K_TX_ITR_DEFAULT;
1798 interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_RX_ITR_DEFAULT;
1799
1800 /* initialize vxlan_port list */
1801 INIT_LIST_HEAD(&interface->vxlan_port);
1802
1803 netdev_rss_key_fill(rss_key, sizeof(rss_key));
1804 memcpy(interface->rssrk, rss_key, sizeof(rss_key));
1805
1806 /* Start off interface as being down */
1807 set_bit(__FM10K_DOWN, &interface->state);
1808 set_bit(__FM10K_UPDATING_STATS, &interface->state);
1809
1810 return 0;
1811 }
1812
1813 static void fm10k_slot_warn(struct fm10k_intfc *interface)
1814 {
1815 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
1816 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
1817 struct fm10k_hw *hw = &interface->hw;
1818 int max_gts = 0, expected_gts = 0;
1819
1820 if (pcie_get_minimum_link(interface->pdev, &speed, &width) ||
1821 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
1822 dev_warn(&interface->pdev->dev,
1823 "Unable to determine PCI Express bandwidth.\n");
1824 return;
1825 }
1826
1827 switch (speed) {
1828 case PCIE_SPEED_2_5GT:
1829 /* 8b/10b encoding reduces max throughput by 20% */
1830 max_gts = 2 * width;
1831 break;
1832 case PCIE_SPEED_5_0GT:
1833 /* 8b/10b encoding reduces max throughput by 20% */
1834 max_gts = 4 * width;
1835 break;
1836 case PCIE_SPEED_8_0GT:
1837 /* 128b/130b encoding has less than 2% impact on throughput */
1838 max_gts = 8 * width;
1839 break;
1840 default:
1841 dev_warn(&interface->pdev->dev,
1842 "Unable to determine PCI Express bandwidth.\n");
1843 return;
1844 }
1845
1846 dev_info(&interface->pdev->dev,
1847 "PCI Express bandwidth of %dGT/s available\n",
1848 max_gts);
1849 dev_info(&interface->pdev->dev,
1850 "(Speed:%s, Width: x%d, Encoding Loss:%s, Payload:%s)\n",
1851 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
1852 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
1853 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
1854 "Unknown"),
1855 hw->bus.width,
1856 (speed == PCIE_SPEED_2_5GT ? "20%" :
1857 speed == PCIE_SPEED_5_0GT ? "20%" :
1858 speed == PCIE_SPEED_8_0GT ? "<2%" :
1859 "Unknown"),
1860 (hw->bus.payload == fm10k_bus_payload_128 ? "128B" :
1861 hw->bus.payload == fm10k_bus_payload_256 ? "256B" :
1862 hw->bus.payload == fm10k_bus_payload_512 ? "512B" :
1863 "Unknown"));
1864
1865 switch (hw->bus_caps.speed) {
1866 case fm10k_bus_speed_2500:
1867 /* 8b/10b encoding reduces max throughput by 20% */
1868 expected_gts = 2 * hw->bus_caps.width;
1869 break;
1870 case fm10k_bus_speed_5000:
1871 /* 8b/10b encoding reduces max throughput by 20% */
1872 expected_gts = 4 * hw->bus_caps.width;
1873 break;
1874 case fm10k_bus_speed_8000:
1875 /* 128b/130b encoding has less than 2% impact on throughput */
1876 expected_gts = 8 * hw->bus_caps.width;
1877 break;
1878 default:
1879 dev_warn(&interface->pdev->dev,
1880 "Unable to determine expected PCI Express bandwidth.\n");
1881 return;
1882 }
1883
1884 if (max_gts >= expected_gts)
1885 return;
1886
1887 dev_warn(&interface->pdev->dev,
1888 "This device requires %dGT/s of bandwidth for optimal performance.\n",
1889 expected_gts);
1890 dev_warn(&interface->pdev->dev,
1891 "A %sslot with x%d lanes is suggested.\n",
1892 (hw->bus_caps.speed == fm10k_bus_speed_2500 ? "2.5GT/s " :
1893 hw->bus_caps.speed == fm10k_bus_speed_5000 ? "5.0GT/s " :
1894 hw->bus_caps.speed == fm10k_bus_speed_8000 ? "8.0GT/s " : ""),
1895 hw->bus_caps.width);
1896 }
1897
1898 /**
1899 * fm10k_probe - Device Initialization Routine
1900 * @pdev: PCI device information struct
1901 * @ent: entry in fm10k_pci_tbl
1902 *
1903 * Returns 0 on success, negative on failure
1904 *
1905 * fm10k_probe initializes an interface identified by a pci_dev structure.
1906 * The OS initialization, configuring of the interface private structure,
1907 * and a hardware reset occur.
1908 **/
1909 static int fm10k_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1910 {
1911 struct net_device *netdev;
1912 struct fm10k_intfc *interface;
1913 int err;
1914
1915 err = pci_enable_device_mem(pdev);
1916 if (err)
1917 return err;
1918
1919 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));
1920 if (err)
1921 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
1922 if (err) {
1923 dev_err(&pdev->dev,
1924 "DMA configuration failed: %d\n", err);
1925 goto err_dma;
1926 }
1927
1928 err = pci_request_selected_regions(pdev,
1929 pci_select_bars(pdev,
1930 IORESOURCE_MEM),
1931 fm10k_driver_name);
1932 if (err) {
1933 dev_err(&pdev->dev,
1934 "pci_request_selected_regions failed: %d\n", err);
1935 goto err_pci_reg;
1936 }
1937
1938 pci_enable_pcie_error_reporting(pdev);
1939
1940 pci_set_master(pdev);
1941 pci_save_state(pdev);
1942
1943 netdev = fm10k_alloc_netdev(fm10k_info_tbl[ent->driver_data]);
1944 if (!netdev) {
1945 err = -ENOMEM;
1946 goto err_alloc_netdev;
1947 }
1948
1949 SET_NETDEV_DEV(netdev, &pdev->dev);
1950
1951 interface = netdev_priv(netdev);
1952 pci_set_drvdata(pdev, interface);
1953
1954 interface->netdev = netdev;
1955 interface->pdev = pdev;
1956
1957 interface->uc_addr = ioremap(pci_resource_start(pdev, 0),
1958 FM10K_UC_ADDR_SIZE);
1959 if (!interface->uc_addr) {
1960 err = -EIO;
1961 goto err_ioremap;
1962 }
1963
1964 err = fm10k_sw_init(interface, ent);
1965 if (err)
1966 goto err_sw_init;
1967
1968 /* enable debugfs support */
1969 fm10k_dbg_intfc_init(interface);
1970
1971 err = fm10k_init_queueing_scheme(interface);
1972 if (err)
1973 goto err_sw_init;
1974
1975 /* the mbx interrupt might attempt to schedule the service task, so we
1976 * must ensure it is disabled since we haven't yet requested the timer
1977 * or work item.
1978 */
1979 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
1980
1981 err = fm10k_mbx_request_irq(interface);
1982 if (err)
1983 goto err_mbx_interrupt;
1984
1985 /* final check of hardware state before registering the interface */
1986 err = fm10k_hw_ready(interface);
1987 if (err)
1988 goto err_register;
1989
1990 err = register_netdev(netdev);
1991 if (err)
1992 goto err_register;
1993
1994 /* carrier off reporting is important to ethtool even BEFORE open */
1995 netif_carrier_off(netdev);
1996
1997 /* stop all the transmit queues from transmitting until link is up */
1998 netif_tx_stop_all_queues(netdev);
1999
2000 /* Initialize service timer and service task late in order to avoid
2001 * cleanup issues.
2002 */
2003 setup_timer(&interface->service_timer, &fm10k_service_timer,
2004 (unsigned long)interface);
2005 INIT_WORK(&interface->service_task, fm10k_service_task);
2006
2007 /* kick off service timer now, even when interface is down */
2008 mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
2009
2010 /* print warning for non-optimal configurations */
2011 fm10k_slot_warn(interface);
2012
2013 /* report MAC address for logging */
2014 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
2015
2016 /* enable SR-IOV after registering netdev to enforce PF/VF ordering */
2017 fm10k_iov_configure(pdev, 0);
2018
2019 /* clear the service task disable bit to allow service task to start */
2020 clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2021
2022 return 0;
2023
2024 err_register:
2025 fm10k_mbx_free_irq(interface);
2026 err_mbx_interrupt:
2027 fm10k_clear_queueing_scheme(interface);
2028 err_sw_init:
2029 if (interface->sw_addr)
2030 iounmap(interface->sw_addr);
2031 iounmap(interface->uc_addr);
2032 err_ioremap:
2033 free_netdev(netdev);
2034 err_alloc_netdev:
2035 pci_release_selected_regions(pdev,
2036 pci_select_bars(pdev, IORESOURCE_MEM));
2037 err_pci_reg:
2038 err_dma:
2039 pci_disable_device(pdev);
2040 return err;
2041 }
2042
2043 /**
2044 * fm10k_remove - Device Removal Routine
2045 * @pdev: PCI device information struct
2046 *
2047 * fm10k_remove is called by the PCI subsystem to alert the driver
2048 * that it should release a PCI device. The could be caused by a
2049 * Hot-Plug event, or because the driver is going to be removed from
2050 * memory.
2051 **/
2052 static void fm10k_remove(struct pci_dev *pdev)
2053 {
2054 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2055 struct net_device *netdev = interface->netdev;
2056
2057 del_timer_sync(&interface->service_timer);
2058
2059 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2060 cancel_work_sync(&interface->service_task);
2061
2062 /* free netdev, this may bounce the interrupts due to setup_tc */
2063 if (netdev->reg_state == NETREG_REGISTERED)
2064 unregister_netdev(netdev);
2065
2066 /* release VFs */
2067 fm10k_iov_disable(pdev);
2068
2069 /* disable mailbox interrupt */
2070 fm10k_mbx_free_irq(interface);
2071
2072 /* free interrupts */
2073 fm10k_clear_queueing_scheme(interface);
2074
2075 /* remove any debugfs interfaces */
2076 fm10k_dbg_intfc_exit(interface);
2077
2078 if (interface->sw_addr)
2079 iounmap(interface->sw_addr);
2080 iounmap(interface->uc_addr);
2081
2082 free_netdev(netdev);
2083
2084 pci_release_selected_regions(pdev,
2085 pci_select_bars(pdev, IORESOURCE_MEM));
2086
2087 pci_disable_pcie_error_reporting(pdev);
2088
2089 pci_disable_device(pdev);
2090 }
2091
2092 #ifdef CONFIG_PM
2093 /**
2094 * fm10k_resume - Restore device to pre-sleep state
2095 * @pdev: PCI device information struct
2096 *
2097 * fm10k_resume is called after the system has powered back up from a sleep
2098 * state and is ready to resume operation. This function is meant to restore
2099 * the device back to its pre-sleep state.
2100 **/
2101 static int fm10k_resume(struct pci_dev *pdev)
2102 {
2103 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2104 struct net_device *netdev = interface->netdev;
2105 struct fm10k_hw *hw = &interface->hw;
2106 u32 err;
2107
2108 pci_set_power_state(pdev, PCI_D0);
2109 pci_restore_state(pdev);
2110
2111 /* pci_restore_state clears dev->state_saved so call
2112 * pci_save_state to restore it.
2113 */
2114 pci_save_state(pdev);
2115
2116 err = pci_enable_device_mem(pdev);
2117 if (err) {
2118 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
2119 return err;
2120 }
2121 pci_set_master(pdev);
2122
2123 pci_wake_from_d3(pdev, false);
2124
2125 /* refresh hw_addr in case it was dropped */
2126 hw->hw_addr = interface->uc_addr;
2127
2128 /* reset hardware to known state */
2129 err = hw->mac.ops.init_hw(&interface->hw);
2130 if (err) {
2131 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
2132 return err;
2133 }
2134
2135 /* reset statistics starting values */
2136 hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
2137
2138 rtnl_lock();
2139
2140 err = fm10k_init_queueing_scheme(interface);
2141 if (err)
2142 goto err_queueing_scheme;
2143
2144 err = fm10k_mbx_request_irq(interface);
2145 if (err)
2146 goto err_mbx_irq;
2147
2148 err = fm10k_hw_ready(interface);
2149 if (err)
2150 goto err_open;
2151
2152 err = netif_running(netdev) ? fm10k_open(netdev) : 0;
2153 if (err)
2154 goto err_open;
2155
2156 rtnl_unlock();
2157
2158 /* assume host is not ready, to prevent race with watchdog in case we
2159 * actually don't have connection to the switch
2160 */
2161 interface->host_ready = false;
2162 fm10k_watchdog_host_not_ready(interface);
2163
2164 /* clear the service task disable bit to allow service task to start */
2165 clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2166 fm10k_service_event_schedule(interface);
2167
2168 /* restore SR-IOV interface */
2169 fm10k_iov_resume(pdev);
2170
2171 netif_device_attach(netdev);
2172
2173 return 0;
2174 err_open:
2175 fm10k_mbx_free_irq(interface);
2176 err_mbx_irq:
2177 fm10k_clear_queueing_scheme(interface);
2178 err_queueing_scheme:
2179 rtnl_unlock();
2180
2181 return err;
2182 }
2183
2184 /**
2185 * fm10k_suspend - Prepare the device for a system sleep state
2186 * @pdev: PCI device information struct
2187 *
2188 * fm10k_suspend is meant to shutdown the device prior to the system entering
2189 * a sleep state. The fm10k hardware does not support wake on lan so the
2190 * driver simply needs to shut down the device so it is in a low power state.
2191 **/
2192 static int fm10k_suspend(struct pci_dev *pdev,
2193 pm_message_t __always_unused state)
2194 {
2195 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2196 struct net_device *netdev = interface->netdev;
2197 int err = 0;
2198
2199 netif_device_detach(netdev);
2200
2201 fm10k_iov_suspend(pdev);
2202
2203 /* the watchdog tasks may read registers, which will appear like a
2204 * surprise-remove event once the PCI device is disabled. This will
2205 * cause us to close the netdevice, so we don't retain the open/closed
2206 * state post-resume. Prevent this by disabling the service task while
2207 * suspended, until we actually resume.
2208 */
2209 set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
2210 cancel_work_sync(&interface->service_task);
2211
2212 rtnl_lock();
2213
2214 if (netif_running(netdev))
2215 fm10k_close(netdev);
2216
2217 fm10k_mbx_free_irq(interface);
2218
2219 fm10k_clear_queueing_scheme(interface);
2220
2221 rtnl_unlock();
2222
2223 err = pci_save_state(pdev);
2224 if (err)
2225 return err;
2226
2227 pci_disable_device(pdev);
2228 pci_wake_from_d3(pdev, false);
2229 pci_set_power_state(pdev, PCI_D3hot);
2230
2231 return 0;
2232 }
2233
2234 #endif /* CONFIG_PM */
2235 /**
2236 * fm10k_io_error_detected - called when PCI error is detected
2237 * @pdev: Pointer to PCI device
2238 * @state: The current pci connection state
2239 *
2240 * This function is called after a PCI bus error affecting
2241 * this device has been detected.
2242 */
2243 static pci_ers_result_t fm10k_io_error_detected(struct pci_dev *pdev,
2244 pci_channel_state_t state)
2245 {
2246 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2247 struct net_device *netdev = interface->netdev;
2248
2249 netif_device_detach(netdev);
2250
2251 if (state == pci_channel_io_perm_failure)
2252 return PCI_ERS_RESULT_DISCONNECT;
2253
2254 rtnl_lock();
2255
2256 if (netif_running(netdev))
2257 fm10k_close(netdev);
2258
2259 fm10k_mbx_free_irq(interface);
2260
2261 /* free interrupts */
2262 fm10k_clear_queueing_scheme(interface);
2263
2264 rtnl_unlock();
2265
2266 /* Request a slot reset. */
2267 return PCI_ERS_RESULT_NEED_RESET;
2268 }
2269
2270 /**
2271 * fm10k_io_slot_reset - called after the pci bus has been reset.
2272 * @pdev: Pointer to PCI device
2273 *
2274 * Restart the card from scratch, as if from a cold-boot.
2275 */
2276 static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev)
2277 {
2278 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2279 pci_ers_result_t result;
2280
2281 if (pci_enable_device_mem(pdev)) {
2282 dev_err(&pdev->dev,
2283 "Cannot re-enable PCI device after reset.\n");
2284 result = PCI_ERS_RESULT_DISCONNECT;
2285 } else {
2286 pci_set_master(pdev);
2287 pci_restore_state(pdev);
2288
2289 /* After second error pci->state_saved is false, this
2290 * resets it so EEH doesn't break.
2291 */
2292 pci_save_state(pdev);
2293
2294 pci_wake_from_d3(pdev, false);
2295
2296 /* refresh hw_addr in case it was dropped */
2297 interface->hw.hw_addr = interface->uc_addr;
2298
2299 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
2300 fm10k_service_event_schedule(interface);
2301
2302 result = PCI_ERS_RESULT_RECOVERED;
2303 }
2304
2305 pci_cleanup_aer_uncorrect_error_status(pdev);
2306
2307 return result;
2308 }
2309
2310 /**
2311 * fm10k_io_resume - called when traffic can start flowing again.
2312 * @pdev: Pointer to PCI device
2313 *
2314 * This callback is called when the error recovery driver tells us that
2315 * its OK to resume normal operation.
2316 */
2317 static void fm10k_io_resume(struct pci_dev *pdev)
2318 {
2319 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2320 struct net_device *netdev = interface->netdev;
2321 struct fm10k_hw *hw = &interface->hw;
2322 int err = 0;
2323
2324 /* reset hardware to known state */
2325 err = hw->mac.ops.init_hw(&interface->hw);
2326 if (err) {
2327 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
2328 return;
2329 }
2330
2331 /* reset statistics starting values */
2332 hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
2333
2334 rtnl_lock();
2335
2336 err = fm10k_init_queueing_scheme(interface);
2337 if (err) {
2338 dev_err(&interface->pdev->dev,
2339 "init_queueing_scheme failed: %d\n", err);
2340 goto unlock;
2341 }
2342
2343 /* reassociate interrupts */
2344 fm10k_mbx_request_irq(interface);
2345
2346 rtnl_lock();
2347 if (netif_running(netdev))
2348 err = fm10k_open(netdev);
2349 rtnl_unlock();
2350
2351 /* final check of hardware state before registering the interface */
2352 err = err ? : fm10k_hw_ready(interface);
2353
2354 if (!err)
2355 netif_device_attach(netdev);
2356
2357 unlock:
2358 rtnl_unlock();
2359 }
2360
2361 static const struct pci_error_handlers fm10k_err_handler = {
2362 .error_detected = fm10k_io_error_detected,
2363 .slot_reset = fm10k_io_slot_reset,
2364 .resume = fm10k_io_resume,
2365 };
2366
2367 static struct pci_driver fm10k_driver = {
2368 .name = fm10k_driver_name,
2369 .id_table = fm10k_pci_tbl,
2370 .probe = fm10k_probe,
2371 .remove = fm10k_remove,
2372 #ifdef CONFIG_PM
2373 .suspend = fm10k_suspend,
2374 .resume = fm10k_resume,
2375 #endif
2376 .sriov_configure = fm10k_iov_configure,
2377 .err_handler = &fm10k_err_handler
2378 };
2379
2380 /**
2381 * fm10k_register_pci_driver - register driver interface
2382 *
2383 * This function is called on module load in order to register the driver.
2384 **/
2385 int fm10k_register_pci_driver(void)
2386 {
2387 return pci_register_driver(&fm10k_driver);
2388 }
2389
2390 /**
2391 * fm10k_unregister_pci_driver - unregister driver interface
2392 *
2393 * This function is called on module unload in order to remove the driver.
2394 **/
2395 void fm10k_unregister_pci_driver(void)
2396 {
2397 pci_unregister_driver(&fm10k_driver);
2398 }
Linux kernel - Deliverables
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