1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include "i40e_type.h"
28 #include "i40e_adminq.h"
29 #include "i40e_prototype.h"
30 #include "i40e_virtchnl.h"
33 * i40e_set_mac_type - Sets MAC type
34 * @hw: pointer to the HW structure
36 * This function sets the mac type of the adapter based on the
37 * vendor ID and device ID stored in the hw structure.
39 static i40e_status
i40e_set_mac_type(struct i40e_hw
*hw
)
41 i40e_status status
= 0;
43 if (hw
->vendor_id
== PCI_VENDOR_ID_INTEL
) {
44 switch (hw
->device_id
) {
45 case I40E_SFP_XL710_DEVICE_ID
:
46 case I40E_SFP_X710_DEVICE_ID
:
47 case I40E_QEMU_DEVICE_ID
:
48 case I40E_KX_A_DEVICE_ID
:
49 case I40E_KX_B_DEVICE_ID
:
50 case I40E_KX_C_DEVICE_ID
:
51 case I40E_KX_D_DEVICE_ID
:
52 case I40E_QSFP_A_DEVICE_ID
:
53 case I40E_QSFP_B_DEVICE_ID
:
54 case I40E_QSFP_C_DEVICE_ID
:
55 hw
->mac
.type
= I40E_MAC_XL710
;
57 case I40E_VF_DEVICE_ID
:
58 case I40E_VF_HV_DEVICE_ID
:
59 hw
->mac
.type
= I40E_MAC_VF
;
62 hw
->mac
.type
= I40E_MAC_GENERIC
;
66 status
= I40E_ERR_DEVICE_NOT_SUPPORTED
;
69 hw_dbg(hw
, "i40e_set_mac_type found mac: %d, returns: %d\n",
70 hw
->mac
.type
, status
);
76 * @hw: debug mask related to admin queue
77 * @cap: pointer to adminq command descriptor
78 * @buffer: pointer to command buffer
80 * Dumps debug log about adminq command with descriptor contents.
82 void i40e_debug_aq(struct i40e_hw
*hw
, enum i40e_debug_mask mask
, void *desc
,
85 struct i40e_aq_desc
*aq_desc
= (struct i40e_aq_desc
*)desc
;
86 u8
*aq_buffer
= (u8
*)buffer
;
90 if ((!(mask
& hw
->debug_mask
)) || (desc
== NULL
))
94 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
95 aq_desc
->opcode
, aq_desc
->flags
, aq_desc
->datalen
,
97 i40e_debug(hw
, mask
, "\tcookie (h,l) 0x%08X 0x%08X\n",
98 aq_desc
->cookie_high
, aq_desc
->cookie_low
);
99 i40e_debug(hw
, mask
, "\tparam (0,1) 0x%08X 0x%08X\n",
100 aq_desc
->params
.internal
.param0
,
101 aq_desc
->params
.internal
.param1
);
102 i40e_debug(hw
, mask
, "\taddr (h,l) 0x%08X 0x%08X\n",
103 aq_desc
->params
.external
.addr_high
,
104 aq_desc
->params
.external
.addr_low
);
106 if ((buffer
!= NULL
) && (aq_desc
->datalen
!= 0)) {
107 memset(data
, 0, sizeof(data
));
108 i40e_debug(hw
, mask
, "AQ CMD Buffer:\n");
109 for (i
= 0; i
< le16_to_cpu(aq_desc
->datalen
); i
++) {
110 data
[((i
% 16) / 4)] |=
111 ((u32
)aq_buffer
[i
]) << (8 * (i
% 4));
112 if ((i
% 16) == 15) {
114 "\t0x%04X %08X %08X %08X %08X\n",
115 i
- 15, data
[0], data
[1], data
[2],
117 memset(data
, 0, sizeof(data
));
121 i40e_debug(hw
, mask
, "\t0x%04X %08X %08X %08X %08X\n",
122 i
- (i
% 16), data
[0], data
[1], data
[2],
128 * i40e_check_asq_alive
129 * @hw: pointer to the hw struct
131 * Returns true if Queue is enabled else false.
133 bool i40e_check_asq_alive(struct i40e_hw
*hw
)
135 return !!(rd32(hw
, hw
->aq
.asq
.len
) & I40E_PF_ATQLEN_ATQENABLE_MASK
);
139 * i40e_aq_queue_shutdown
140 * @hw: pointer to the hw struct
141 * @unloading: is the driver unloading itself
143 * Tell the Firmware that we're shutting down the AdminQ and whether
144 * or not the driver is unloading as well.
146 i40e_status
i40e_aq_queue_shutdown(struct i40e_hw
*hw
,
149 struct i40e_aq_desc desc
;
150 struct i40e_aqc_queue_shutdown
*cmd
=
151 (struct i40e_aqc_queue_shutdown
*)&desc
.params
.raw
;
154 i40e_fill_default_direct_cmd_desc(&desc
,
155 i40e_aqc_opc_queue_shutdown
);
158 cmd
->driver_unloading
= cpu_to_le32(I40E_AQ_DRIVER_UNLOADING
);
159 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, NULL
);
166 * i40e_init_shared_code - Initialize the shared code
167 * @hw: pointer to hardware structure
169 * This assigns the MAC type and PHY code and inits the NVM.
170 * Does not touch the hardware. This function must be called prior to any
171 * other function in the shared code. The i40e_hw structure should be
172 * memset to 0 prior to calling this function. The following fields in
173 * hw structure should be filled in prior to calling this function:
174 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
175 * subsystem_vendor_id, and revision_id
177 i40e_status
i40e_init_shared_code(struct i40e_hw
*hw
)
179 i40e_status status
= 0;
182 i40e_set_mac_type(hw
);
184 switch (hw
->mac
.type
) {
188 return I40E_ERR_DEVICE_NOT_SUPPORTED
;
192 hw
->phy
.get_link_info
= true;
194 /* Determine port number */
195 reg
= rd32(hw
, I40E_PFGEN_PORTNUM
);
196 reg
= ((reg
& I40E_PFGEN_PORTNUM_PORT_NUM_MASK
) >>
197 I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT
);
200 /* Determine the PF number based on the PCI fn */
201 reg
= rd32(hw
, I40E_GLPCI_CAPSUP
);
202 if (reg
& I40E_GLPCI_CAPSUP_ARI_EN_MASK
)
203 hw
->pf_id
= (u8
)((hw
->bus
.device
<< 3) | hw
->bus
.func
);
205 hw
->pf_id
= (u8
)hw
->bus
.func
;
207 status
= i40e_init_nvm(hw
);
212 * i40e_aq_mac_address_read - Retrieve the MAC addresses
213 * @hw: pointer to the hw struct
214 * @flags: a return indicator of what addresses were added to the addr store
215 * @addrs: the requestor's mac addr store
216 * @cmd_details: pointer to command details structure or NULL
218 static i40e_status
i40e_aq_mac_address_read(struct i40e_hw
*hw
,
220 struct i40e_aqc_mac_address_read_data
*addrs
,
221 struct i40e_asq_cmd_details
*cmd_details
)
223 struct i40e_aq_desc desc
;
224 struct i40e_aqc_mac_address_read
*cmd_data
=
225 (struct i40e_aqc_mac_address_read
*)&desc
.params
.raw
;
228 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_mac_address_read
);
229 desc
.flags
|= cpu_to_le16(I40E_AQ_FLAG_BUF
);
231 status
= i40e_asq_send_command(hw
, &desc
, addrs
,
232 sizeof(*addrs
), cmd_details
);
233 *flags
= le16_to_cpu(cmd_data
->command_flags
);
239 * i40e_aq_mac_address_write - Change the MAC addresses
240 * @hw: pointer to the hw struct
241 * @flags: indicates which MAC to be written
242 * @mac_addr: address to write
243 * @cmd_details: pointer to command details structure or NULL
245 i40e_status
i40e_aq_mac_address_write(struct i40e_hw
*hw
,
246 u16 flags
, u8
*mac_addr
,
247 struct i40e_asq_cmd_details
*cmd_details
)
249 struct i40e_aq_desc desc
;
250 struct i40e_aqc_mac_address_write
*cmd_data
=
251 (struct i40e_aqc_mac_address_write
*)&desc
.params
.raw
;
254 i40e_fill_default_direct_cmd_desc(&desc
,
255 i40e_aqc_opc_mac_address_write
);
256 cmd_data
->command_flags
= cpu_to_le16(flags
);
257 memcpy(&cmd_data
->mac_sal
, &mac_addr
[0], 4);
258 memcpy(&cmd_data
->mac_sah
, &mac_addr
[4], 2);
260 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
266 * i40e_get_mac_addr - get MAC address
267 * @hw: pointer to the HW structure
268 * @mac_addr: pointer to MAC address
270 * Reads the adapter's MAC address from register
272 i40e_status
i40e_get_mac_addr(struct i40e_hw
*hw
, u8
*mac_addr
)
274 struct i40e_aqc_mac_address_read_data addrs
;
278 status
= i40e_aq_mac_address_read(hw
, &flags
, &addrs
, NULL
);
280 if (flags
& I40E_AQC_LAN_ADDR_VALID
)
281 memcpy(mac_addr
, &addrs
.pf_lan_mac
, sizeof(addrs
.pf_lan_mac
));
287 * i40e_get_media_type - Gets media type
288 * @hw: pointer to the hardware structure
290 static enum i40e_media_type
i40e_get_media_type(struct i40e_hw
*hw
)
292 enum i40e_media_type media
;
294 switch (hw
->phy
.link_info
.phy_type
) {
295 case I40E_PHY_TYPE_10GBASE_SR
:
296 case I40E_PHY_TYPE_10GBASE_LR
:
297 case I40E_PHY_TYPE_40GBASE_SR4
:
298 case I40E_PHY_TYPE_40GBASE_LR4
:
299 media
= I40E_MEDIA_TYPE_FIBER
;
301 case I40E_PHY_TYPE_100BASE_TX
:
302 case I40E_PHY_TYPE_1000BASE_T
:
303 case I40E_PHY_TYPE_10GBASE_T
:
304 media
= I40E_MEDIA_TYPE_BASET
;
306 case I40E_PHY_TYPE_10GBASE_CR1_CU
:
307 case I40E_PHY_TYPE_40GBASE_CR4_CU
:
308 case I40E_PHY_TYPE_10GBASE_CR1
:
309 case I40E_PHY_TYPE_40GBASE_CR4
:
310 case I40E_PHY_TYPE_10GBASE_SFPP_CU
:
311 media
= I40E_MEDIA_TYPE_DA
;
313 case I40E_PHY_TYPE_1000BASE_KX
:
314 case I40E_PHY_TYPE_10GBASE_KX4
:
315 case I40E_PHY_TYPE_10GBASE_KR
:
316 case I40E_PHY_TYPE_40GBASE_KR4
:
317 media
= I40E_MEDIA_TYPE_BACKPLANE
;
319 case I40E_PHY_TYPE_SGMII
:
320 case I40E_PHY_TYPE_XAUI
:
321 case I40E_PHY_TYPE_XFI
:
322 case I40E_PHY_TYPE_XLAUI
:
323 case I40E_PHY_TYPE_XLPPI
:
325 media
= I40E_MEDIA_TYPE_UNKNOWN
;
332 #define I40E_PF_RESET_WAIT_COUNT_A0 200
333 #define I40E_PF_RESET_WAIT_COUNT 10
335 * i40e_pf_reset - Reset the PF
336 * @hw: pointer to the hardware structure
338 * Assuming someone else has triggered a global reset,
339 * assure the global reset is complete and then reset the PF
341 i40e_status
i40e_pf_reset(struct i40e_hw
*hw
)
348 /* Poll for Global Reset steady state in case of recent GRST.
349 * The grst delay value is in 100ms units, and we'll wait a
350 * couple counts longer to be sure we don't just miss the end.
352 grst_del
= rd32(hw
, I40E_GLGEN_RSTCTL
) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
353 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT
;
354 for (cnt
= 0; cnt
< grst_del
+ 2; cnt
++) {
355 reg
= rd32(hw
, I40E_GLGEN_RSTAT
);
356 if (!(reg
& I40E_GLGEN_RSTAT_DEVSTATE_MASK
))
360 if (reg
& I40E_GLGEN_RSTAT_DEVSTATE_MASK
) {
361 hw_dbg(hw
, "Global reset polling failed to complete.\n");
362 return I40E_ERR_RESET_FAILED
;
365 /* Now Wait for the FW to be ready */
366 for (cnt1
= 0; cnt1
< I40E_PF_RESET_WAIT_COUNT
; cnt1
++) {
367 reg
= rd32(hw
, I40E_GLNVM_ULD
);
368 reg
&= (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK
|
369 I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK
);
370 if (reg
== (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK
|
371 I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK
)) {
372 hw_dbg(hw
, "Core and Global modules ready %d\n", cnt1
);
375 usleep_range(10000, 20000);
377 if (!(reg
& (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK
|
378 I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK
))) {
379 hw_dbg(hw
, "wait for FW Reset complete timedout\n");
380 hw_dbg(hw
, "I40E_GLNVM_ULD = 0x%x\n", reg
);
381 return I40E_ERR_RESET_FAILED
;
384 /* If there was a Global Reset in progress when we got here,
385 * we don't need to do the PF Reset
388 if (hw
->revision_id
== 0)
389 cnt
= I40E_PF_RESET_WAIT_COUNT_A0
;
391 cnt
= I40E_PF_RESET_WAIT_COUNT
;
392 reg
= rd32(hw
, I40E_PFGEN_CTRL
);
393 wr32(hw
, I40E_PFGEN_CTRL
,
394 (reg
| I40E_PFGEN_CTRL_PFSWR_MASK
));
396 reg
= rd32(hw
, I40E_PFGEN_CTRL
);
397 if (!(reg
& I40E_PFGEN_CTRL_PFSWR_MASK
))
399 usleep_range(1000, 2000);
401 if (reg
& I40E_PFGEN_CTRL_PFSWR_MASK
) {
402 hw_dbg(hw
, "PF reset polling failed to complete.\n");
403 return I40E_ERR_RESET_FAILED
;
407 i40e_clear_pxe_mode(hw
);
413 * i40e_clear_pxe_mode - clear pxe operations mode
414 * @hw: pointer to the hw struct
416 * Make sure all PXE mode settings are cleared, including things
417 * like descriptor fetch/write-back mode.
419 void i40e_clear_pxe_mode(struct i40e_hw
*hw
)
423 /* Clear single descriptor fetch/write-back mode */
424 reg
= rd32(hw
, I40E_GLLAN_RCTL_0
);
426 if (hw
->revision_id
== 0) {
427 /* As a work around clear PXE_MODE instead of setting it */
428 wr32(hw
, I40E_GLLAN_RCTL_0
, (reg
& (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK
)));
430 wr32(hw
, I40E_GLLAN_RCTL_0
, (reg
| I40E_GLLAN_RCTL_0_PXE_MODE_MASK
));
435 * i40e_led_is_mine - helper to find matching led
436 * @hw: pointer to the hw struct
437 * @idx: index into GPIO registers
439 * returns: 0 if no match, otherwise the value of the GPIO_CTL register
441 static u32
i40e_led_is_mine(struct i40e_hw
*hw
, int idx
)
446 if (!hw
->func_caps
.led
[idx
])
449 gpio_val
= rd32(hw
, I40E_GLGEN_GPIO_CTL(idx
));
450 port
= (gpio_val
& I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK
) >>
451 I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT
;
453 /* if PRT_NUM_NA is 1 then this LED is not port specific, OR
454 * if it is not our port then ignore
456 if ((gpio_val
& I40E_GLGEN_GPIO_CTL_PRT_NUM_NA_MASK
) ||
464 #define I40E_LINK_ACTIVITY 0xC
467 * i40e_led_get - return current on/off mode
468 * @hw: pointer to the hw struct
470 * The value returned is the 'mode' field as defined in the
471 * GPIO register definitions: 0x0 = off, 0xf = on, and other
472 * values are variations of possible behaviors relating to
473 * blink, link, and wire.
475 u32
i40e_led_get(struct i40e_hw
*hw
)
480 /* as per the documentation GPIO 22-29 are the LED
481 * GPIO pins named LED0..LED7
483 for (i
= I40E_LED0
; i
<= I40E_GLGEN_GPIO_CTL_MAX_INDEX
; i
++) {
484 u32 gpio_val
= i40e_led_is_mine(hw
, i
);
489 mode
= (gpio_val
& I40E_GLGEN_GPIO_CTL_LED_MODE_MASK
) >>
490 I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT
;
498 * i40e_led_set - set new on/off mode
499 * @hw: pointer to the hw struct
500 * @mode: 0=off, 0xf=on (else see manual for mode details)
501 * @blink: true if the LED should blink when on, false if steady
503 * if this function is used to turn on the blink it should
504 * be used to disable the blink when restoring the original state.
506 void i40e_led_set(struct i40e_hw
*hw
, u32 mode
, bool blink
)
510 if (mode
& 0xfffffff0)
511 hw_dbg(hw
, "invalid mode passed in %X\n", mode
);
513 /* as per the documentation GPIO 22-29 are the LED
514 * GPIO pins named LED0..LED7
516 for (i
= I40E_LED0
; i
<= I40E_GLGEN_GPIO_CTL_MAX_INDEX
; i
++) {
517 u32 gpio_val
= i40e_led_is_mine(hw
, i
);
522 gpio_val
&= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK
;
523 /* this & is a bit of paranoia, but serves as a range check */
524 gpio_val
|= ((mode
<< I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT
) &
525 I40E_GLGEN_GPIO_CTL_LED_MODE_MASK
);
527 if (mode
== I40E_LINK_ACTIVITY
)
530 gpio_val
|= (blink
? 1 : 0) <<
531 I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT
;
533 wr32(hw
, I40E_GLGEN_GPIO_CTL(i
), gpio_val
);
538 /* Admin command wrappers */
541 * i40e_aq_set_link_restart_an
542 * @hw: pointer to the hw struct
543 * @cmd_details: pointer to command details structure or NULL
545 * Sets up the link and restarts the Auto-Negotiation over the link.
547 i40e_status
i40e_aq_set_link_restart_an(struct i40e_hw
*hw
,
548 struct i40e_asq_cmd_details
*cmd_details
)
550 struct i40e_aq_desc desc
;
551 struct i40e_aqc_set_link_restart_an
*cmd
=
552 (struct i40e_aqc_set_link_restart_an
*)&desc
.params
.raw
;
555 i40e_fill_default_direct_cmd_desc(&desc
,
556 i40e_aqc_opc_set_link_restart_an
);
558 cmd
->command
= I40E_AQ_PHY_RESTART_AN
;
560 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
566 * i40e_aq_get_link_info
567 * @hw: pointer to the hw struct
568 * @enable_lse: enable/disable LinkStatusEvent reporting
569 * @link: pointer to link status structure - optional
570 * @cmd_details: pointer to command details structure or NULL
572 * Returns the link status of the adapter.
574 i40e_status
i40e_aq_get_link_info(struct i40e_hw
*hw
,
575 bool enable_lse
, struct i40e_link_status
*link
,
576 struct i40e_asq_cmd_details
*cmd_details
)
578 struct i40e_aq_desc desc
;
579 struct i40e_aqc_get_link_status
*resp
=
580 (struct i40e_aqc_get_link_status
*)&desc
.params
.raw
;
581 struct i40e_link_status
*hw_link_info
= &hw
->phy
.link_info
;
585 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_get_link_status
);
588 command_flags
= I40E_AQ_LSE_ENABLE
;
590 command_flags
= I40E_AQ_LSE_DISABLE
;
591 resp
->command_flags
= cpu_to_le16(command_flags
);
593 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
596 goto aq_get_link_info_exit
;
598 /* save off old link status information */
599 memcpy(&hw
->phy
.link_info_old
, hw_link_info
,
600 sizeof(struct i40e_link_status
));
602 /* update link status */
603 hw_link_info
->phy_type
= (enum i40e_aq_phy_type
)resp
->phy_type
;
604 hw
->phy
.media_type
= i40e_get_media_type(hw
);
605 hw_link_info
->link_speed
= (enum i40e_aq_link_speed
)resp
->link_speed
;
606 hw_link_info
->link_info
= resp
->link_info
;
607 hw_link_info
->an_info
= resp
->an_info
;
608 hw_link_info
->ext_info
= resp
->ext_info
;
609 hw_link_info
->loopback
= resp
->loopback
;
611 if (resp
->command_flags
& cpu_to_le16(I40E_AQ_LSE_ENABLE
))
612 hw_link_info
->lse_enable
= true;
614 hw_link_info
->lse_enable
= false;
616 /* save link status information */
618 *link
= *hw_link_info
;
620 /* flag cleared so helper functions don't call AQ again */
621 hw
->phy
.get_link_info
= false;
623 aq_get_link_info_exit
:
629 * @hw: pointer to the hw struct
630 * @vsi: pointer to a vsi context struct
631 * @cmd_details: pointer to command details structure or NULL
633 * Add a VSI context to the hardware.
635 i40e_status
i40e_aq_add_vsi(struct i40e_hw
*hw
,
636 struct i40e_vsi_context
*vsi_ctx
,
637 struct i40e_asq_cmd_details
*cmd_details
)
639 struct i40e_aq_desc desc
;
640 struct i40e_aqc_add_get_update_vsi
*cmd
=
641 (struct i40e_aqc_add_get_update_vsi
*)&desc
.params
.raw
;
642 struct i40e_aqc_add_get_update_vsi_completion
*resp
=
643 (struct i40e_aqc_add_get_update_vsi_completion
*)
647 i40e_fill_default_direct_cmd_desc(&desc
,
648 i40e_aqc_opc_add_vsi
);
650 cmd
->uplink_seid
= cpu_to_le16(vsi_ctx
->uplink_seid
);
651 cmd
->connection_type
= vsi_ctx
->connection_type
;
652 cmd
->vf_id
= vsi_ctx
->vf_num
;
653 cmd
->vsi_flags
= cpu_to_le16(vsi_ctx
->flags
);
655 desc
.flags
|= cpu_to_le16((u16
)(I40E_AQ_FLAG_BUF
| I40E_AQ_FLAG_RD
));
656 if (sizeof(vsi_ctx
->info
) > I40E_AQ_LARGE_BUF
)
657 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
659 status
= i40e_asq_send_command(hw
, &desc
, &vsi_ctx
->info
,
660 sizeof(vsi_ctx
->info
), cmd_details
);
663 goto aq_add_vsi_exit
;
665 vsi_ctx
->seid
= le16_to_cpu(resp
->seid
);
666 vsi_ctx
->vsi_number
= le16_to_cpu(resp
->vsi_number
);
667 vsi_ctx
->vsis_allocated
= le16_to_cpu(resp
->vsi_used
);
668 vsi_ctx
->vsis_unallocated
= le16_to_cpu(resp
->vsi_free
);
675 * i40e_aq_set_vsi_unicast_promiscuous
676 * @hw: pointer to the hw struct
678 * @set: set unicast promiscuous enable/disable
679 * @cmd_details: pointer to command details structure or NULL
681 i40e_status
i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw
*hw
,
682 u16 seid
, bool set
, struct i40e_asq_cmd_details
*cmd_details
)
684 struct i40e_aq_desc desc
;
685 struct i40e_aqc_set_vsi_promiscuous_modes
*cmd
=
686 (struct i40e_aqc_set_vsi_promiscuous_modes
*)&desc
.params
.raw
;
690 i40e_fill_default_direct_cmd_desc(&desc
,
691 i40e_aqc_opc_set_vsi_promiscuous_modes
);
694 flags
|= I40E_AQC_SET_VSI_PROMISC_UNICAST
;
696 cmd
->promiscuous_flags
= cpu_to_le16(flags
);
698 cmd
->valid_flags
= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST
);
700 cmd
->seid
= cpu_to_le16(seid
);
701 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
707 * i40e_aq_set_vsi_multicast_promiscuous
708 * @hw: pointer to the hw struct
710 * @set: set multicast promiscuous enable/disable
711 * @cmd_details: pointer to command details structure or NULL
713 i40e_status
i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw
*hw
,
714 u16 seid
, bool set
, struct i40e_asq_cmd_details
*cmd_details
)
716 struct i40e_aq_desc desc
;
717 struct i40e_aqc_set_vsi_promiscuous_modes
*cmd
=
718 (struct i40e_aqc_set_vsi_promiscuous_modes
*)&desc
.params
.raw
;
722 i40e_fill_default_direct_cmd_desc(&desc
,
723 i40e_aqc_opc_set_vsi_promiscuous_modes
);
726 flags
|= I40E_AQC_SET_VSI_PROMISC_MULTICAST
;
728 cmd
->promiscuous_flags
= cpu_to_le16(flags
);
730 cmd
->valid_flags
= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST
);
732 cmd
->seid
= cpu_to_le16(seid
);
733 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
739 * i40e_aq_set_vsi_broadcast
740 * @hw: pointer to the hw struct
742 * @set_filter: true to set filter, false to clear filter
743 * @cmd_details: pointer to command details structure or NULL
745 * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
747 i40e_status
i40e_aq_set_vsi_broadcast(struct i40e_hw
*hw
,
748 u16 seid
, bool set_filter
,
749 struct i40e_asq_cmd_details
*cmd_details
)
751 struct i40e_aq_desc desc
;
752 struct i40e_aqc_set_vsi_promiscuous_modes
*cmd
=
753 (struct i40e_aqc_set_vsi_promiscuous_modes
*)&desc
.params
.raw
;
756 i40e_fill_default_direct_cmd_desc(&desc
,
757 i40e_aqc_opc_set_vsi_promiscuous_modes
);
760 cmd
->promiscuous_flags
761 |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST
);
763 cmd
->promiscuous_flags
764 &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST
);
766 cmd
->valid_flags
= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST
);
767 cmd
->seid
= cpu_to_le16(seid
);
768 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
774 * i40e_get_vsi_params - get VSI configuration info
775 * @hw: pointer to the hw struct
776 * @vsi: pointer to a vsi context struct
777 * @cmd_details: pointer to command details structure or NULL
779 i40e_status
i40e_aq_get_vsi_params(struct i40e_hw
*hw
,
780 struct i40e_vsi_context
*vsi_ctx
,
781 struct i40e_asq_cmd_details
*cmd_details
)
783 struct i40e_aq_desc desc
;
784 struct i40e_aqc_add_get_update_vsi
*cmd
=
785 (struct i40e_aqc_add_get_update_vsi
*)&desc
.params
.raw
;
786 struct i40e_aqc_add_get_update_vsi_completion
*resp
=
787 (struct i40e_aqc_add_get_update_vsi_completion
*)
791 i40e_fill_default_direct_cmd_desc(&desc
,
792 i40e_aqc_opc_get_vsi_parameters
);
794 cmd
->uplink_seid
= cpu_to_le16(vsi_ctx
->seid
);
796 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
797 if (sizeof(vsi_ctx
->info
) > I40E_AQ_LARGE_BUF
)
798 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
800 status
= i40e_asq_send_command(hw
, &desc
, &vsi_ctx
->info
,
801 sizeof(vsi_ctx
->info
), NULL
);
804 goto aq_get_vsi_params_exit
;
806 vsi_ctx
->seid
= le16_to_cpu(resp
->seid
);
807 vsi_ctx
->vsi_number
= le16_to_cpu(resp
->vsi_number
);
808 vsi_ctx
->vsis_allocated
= le16_to_cpu(resp
->vsi_used
);
809 vsi_ctx
->vsis_unallocated
= le16_to_cpu(resp
->vsi_free
);
811 aq_get_vsi_params_exit
:
816 * i40e_aq_update_vsi_params
817 * @hw: pointer to the hw struct
818 * @vsi: pointer to a vsi context struct
819 * @cmd_details: pointer to command details structure or NULL
821 * Update a VSI context.
823 i40e_status
i40e_aq_update_vsi_params(struct i40e_hw
*hw
,
824 struct i40e_vsi_context
*vsi_ctx
,
825 struct i40e_asq_cmd_details
*cmd_details
)
827 struct i40e_aq_desc desc
;
828 struct i40e_aqc_add_get_update_vsi
*cmd
=
829 (struct i40e_aqc_add_get_update_vsi
*)&desc
.params
.raw
;
832 i40e_fill_default_direct_cmd_desc(&desc
,
833 i40e_aqc_opc_update_vsi_parameters
);
834 cmd
->uplink_seid
= cpu_to_le16(vsi_ctx
->seid
);
836 desc
.flags
|= cpu_to_le16((u16
)(I40E_AQ_FLAG_BUF
| I40E_AQ_FLAG_RD
));
837 if (sizeof(vsi_ctx
->info
) > I40E_AQ_LARGE_BUF
)
838 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
840 status
= i40e_asq_send_command(hw
, &desc
, &vsi_ctx
->info
,
841 sizeof(vsi_ctx
->info
), cmd_details
);
847 * i40e_aq_get_switch_config
848 * @hw: pointer to the hardware structure
849 * @buf: pointer to the result buffer
850 * @buf_size: length of input buffer
851 * @start_seid: seid to start for the report, 0 == beginning
852 * @cmd_details: pointer to command details structure or NULL
854 * Fill the buf with switch configuration returned from AdminQ command
856 i40e_status
i40e_aq_get_switch_config(struct i40e_hw
*hw
,
857 struct i40e_aqc_get_switch_config_resp
*buf
,
858 u16 buf_size
, u16
*start_seid
,
859 struct i40e_asq_cmd_details
*cmd_details
)
861 struct i40e_aq_desc desc
;
862 struct i40e_aqc_switch_seid
*scfg
=
863 (struct i40e_aqc_switch_seid
*)&desc
.params
.raw
;
866 i40e_fill_default_direct_cmd_desc(&desc
,
867 i40e_aqc_opc_get_switch_config
);
868 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
869 if (buf_size
> I40E_AQ_LARGE_BUF
)
870 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
871 scfg
->seid
= cpu_to_le16(*start_seid
);
873 status
= i40e_asq_send_command(hw
, &desc
, buf
, buf_size
, cmd_details
);
874 *start_seid
= le16_to_cpu(scfg
->seid
);
880 * i40e_aq_get_firmware_version
881 * @hw: pointer to the hw struct
882 * @fw_major_version: firmware major version
883 * @fw_minor_version: firmware minor version
884 * @api_major_version: major queue version
885 * @api_minor_version: minor queue version
886 * @cmd_details: pointer to command details structure or NULL
888 * Get the firmware version from the admin queue commands
890 i40e_status
i40e_aq_get_firmware_version(struct i40e_hw
*hw
,
891 u16
*fw_major_version
, u16
*fw_minor_version
,
892 u16
*api_major_version
, u16
*api_minor_version
,
893 struct i40e_asq_cmd_details
*cmd_details
)
895 struct i40e_aq_desc desc
;
896 struct i40e_aqc_get_version
*resp
=
897 (struct i40e_aqc_get_version
*)&desc
.params
.raw
;
900 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_get_version
);
902 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
905 if (fw_major_version
!= NULL
)
906 *fw_major_version
= le16_to_cpu(resp
->fw_major
);
907 if (fw_minor_version
!= NULL
)
908 *fw_minor_version
= le16_to_cpu(resp
->fw_minor
);
909 if (api_major_version
!= NULL
)
910 *api_major_version
= le16_to_cpu(resp
->api_major
);
911 if (api_minor_version
!= NULL
)
912 *api_minor_version
= le16_to_cpu(resp
->api_minor
);
919 * i40e_aq_send_driver_version
920 * @hw: pointer to the hw struct
921 * @event: driver event: driver ok, start or stop
922 * @dv: driver's major, minor version
923 * @cmd_details: pointer to command details structure or NULL
925 * Send the driver version to the firmware
927 i40e_status
i40e_aq_send_driver_version(struct i40e_hw
*hw
,
928 struct i40e_driver_version
*dv
,
929 struct i40e_asq_cmd_details
*cmd_details
)
931 struct i40e_aq_desc desc
;
932 struct i40e_aqc_driver_version
*cmd
=
933 (struct i40e_aqc_driver_version
*)&desc
.params
.raw
;
937 return I40E_ERR_PARAM
;
939 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_driver_version
);
941 desc
.flags
|= cpu_to_le16(I40E_AQ_FLAG_SI
);
942 cmd
->driver_major_ver
= dv
->major_version
;
943 cmd
->driver_minor_ver
= dv
->minor_version
;
944 cmd
->driver_build_ver
= dv
->build_version
;
945 cmd
->driver_subbuild_ver
= dv
->subbuild_version
;
946 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
952 * i40e_get_link_status - get status of the HW network link
953 * @hw: pointer to the hw struct
955 * Returns true if link is up, false if link is down.
957 * Side effect: LinkStatusEvent reporting becomes enabled
959 bool i40e_get_link_status(struct i40e_hw
*hw
)
961 i40e_status status
= 0;
962 bool link_status
= false;
964 if (hw
->phy
.get_link_info
) {
965 status
= i40e_aq_get_link_info(hw
, true, NULL
, NULL
);
968 goto i40e_get_link_status_exit
;
971 link_status
= hw
->phy
.link_info
.link_info
& I40E_AQ_LINK_UP
;
973 i40e_get_link_status_exit
:
978 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
979 * @hw: pointer to the hw struct
980 * @uplink_seid: the MAC or other gizmo SEID
981 * @downlink_seid: the VSI SEID
982 * @enabled_tc: bitmap of TCs to be enabled
983 * @default_port: true for default port VSI, false for control port
984 * @enable_l2_filtering: true to add L2 filter table rules to regular forwarding rules for cloud support
985 * @veb_seid: pointer to where to put the resulting VEB SEID
986 * @cmd_details: pointer to command details structure or NULL
988 * This asks the FW to add a VEB between the uplink and downlink
989 * elements. If the uplink SEID is 0, this will be a floating VEB.
991 i40e_status
i40e_aq_add_veb(struct i40e_hw
*hw
, u16 uplink_seid
,
992 u16 downlink_seid
, u8 enabled_tc
,
993 bool default_port
, bool enable_l2_filtering
,
995 struct i40e_asq_cmd_details
*cmd_details
)
997 struct i40e_aq_desc desc
;
998 struct i40e_aqc_add_veb
*cmd
=
999 (struct i40e_aqc_add_veb
*)&desc
.params
.raw
;
1000 struct i40e_aqc_add_veb_completion
*resp
=
1001 (struct i40e_aqc_add_veb_completion
*)&desc
.params
.raw
;
1005 /* SEIDs need to either both be set or both be 0 for floating VEB */
1006 if (!!uplink_seid
!= !!downlink_seid
)
1007 return I40E_ERR_PARAM
;
1009 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_add_veb
);
1011 cmd
->uplink_seid
= cpu_to_le16(uplink_seid
);
1012 cmd
->downlink_seid
= cpu_to_le16(downlink_seid
);
1013 cmd
->enable_tcs
= enabled_tc
;
1015 veb_flags
|= I40E_AQC_ADD_VEB_FLOATING
;
1017 veb_flags
|= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT
;
1019 veb_flags
|= I40E_AQC_ADD_VEB_PORT_TYPE_DATA
;
1021 if (enable_l2_filtering
)
1022 veb_flags
|= I40E_AQC_ADD_VEB_ENABLE_L2_FILTER
;
1024 cmd
->veb_flags
= cpu_to_le16(veb_flags
);
1026 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1028 if (!status
&& veb_seid
)
1029 *veb_seid
= le16_to_cpu(resp
->veb_seid
);
1035 * i40e_aq_get_veb_parameters - Retrieve VEB parameters
1036 * @hw: pointer to the hw struct
1037 * @veb_seid: the SEID of the VEB to query
1038 * @switch_id: the uplink switch id
1039 * @floating_veb: set to true if the VEB is floating
1040 * @statistic_index: index of the stats counter block for this VEB
1041 * @vebs_used: number of VEB's used by function
1042 * @vebs_unallocated: total VEB's not reserved by any function
1043 * @cmd_details: pointer to command details structure or NULL
1045 * This retrieves the parameters for a particular VEB, specified by
1046 * uplink_seid, and returns them to the caller.
1048 i40e_status
i40e_aq_get_veb_parameters(struct i40e_hw
*hw
,
1049 u16 veb_seid
, u16
*switch_id
,
1050 bool *floating
, u16
*statistic_index
,
1051 u16
*vebs_used
, u16
*vebs_free
,
1052 struct i40e_asq_cmd_details
*cmd_details
)
1054 struct i40e_aq_desc desc
;
1055 struct i40e_aqc_get_veb_parameters_completion
*cmd_resp
=
1056 (struct i40e_aqc_get_veb_parameters_completion
*)
1061 return I40E_ERR_PARAM
;
1063 i40e_fill_default_direct_cmd_desc(&desc
,
1064 i40e_aqc_opc_get_veb_parameters
);
1065 cmd_resp
->seid
= cpu_to_le16(veb_seid
);
1067 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1072 *switch_id
= le16_to_cpu(cmd_resp
->switch_id
);
1073 if (statistic_index
)
1074 *statistic_index
= le16_to_cpu(cmd_resp
->statistic_index
);
1076 *vebs_used
= le16_to_cpu(cmd_resp
->vebs_used
);
1078 *vebs_free
= le16_to_cpu(cmd_resp
->vebs_free
);
1080 u16 flags
= le16_to_cpu(cmd_resp
->veb_flags
);
1081 if (flags
& I40E_AQC_ADD_VEB_FLOATING
)
1092 * i40e_aq_add_macvlan
1093 * @hw: pointer to the hw struct
1094 * @seid: VSI for the mac address
1095 * @mv_list: list of macvlans to be added
1096 * @count: length of the list
1097 * @cmd_details: pointer to command details structure or NULL
1099 * Add MAC/VLAN addresses to the HW filtering
1101 i40e_status
i40e_aq_add_macvlan(struct i40e_hw
*hw
, u16 seid
,
1102 struct i40e_aqc_add_macvlan_element_data
*mv_list
,
1103 u16 count
, struct i40e_asq_cmd_details
*cmd_details
)
1105 struct i40e_aq_desc desc
;
1106 struct i40e_aqc_macvlan
*cmd
=
1107 (struct i40e_aqc_macvlan
*)&desc
.params
.raw
;
1111 if (count
== 0 || !mv_list
|| !hw
)
1112 return I40E_ERR_PARAM
;
1114 buf_size
= count
* sizeof(struct i40e_aqc_add_macvlan_element_data
);
1116 /* prep the rest of the request */
1117 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_add_macvlan
);
1118 cmd
->num_addresses
= cpu_to_le16(count
);
1119 cmd
->seid
[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID
| seid
);
1123 desc
.flags
|= cpu_to_le16((u16
)(I40E_AQ_FLAG_BUF
| I40E_AQ_FLAG_RD
));
1124 if (buf_size
> I40E_AQ_LARGE_BUF
)
1125 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1127 status
= i40e_asq_send_command(hw
, &desc
, mv_list
, buf_size
,
1134 * i40e_aq_remove_macvlan
1135 * @hw: pointer to the hw struct
1136 * @seid: VSI for the mac address
1137 * @mv_list: list of macvlans to be removed
1138 * @count: length of the list
1139 * @cmd_details: pointer to command details structure or NULL
1141 * Remove MAC/VLAN addresses from the HW filtering
1143 i40e_status
i40e_aq_remove_macvlan(struct i40e_hw
*hw
, u16 seid
,
1144 struct i40e_aqc_remove_macvlan_element_data
*mv_list
,
1145 u16 count
, struct i40e_asq_cmd_details
*cmd_details
)
1147 struct i40e_aq_desc desc
;
1148 struct i40e_aqc_macvlan
*cmd
=
1149 (struct i40e_aqc_macvlan
*)&desc
.params
.raw
;
1153 if (count
== 0 || !mv_list
|| !hw
)
1154 return I40E_ERR_PARAM
;
1156 buf_size
= count
* sizeof(struct i40e_aqc_remove_macvlan_element_data
);
1158 /* prep the rest of the request */
1159 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_remove_macvlan
);
1160 cmd
->num_addresses
= cpu_to_le16(count
);
1161 cmd
->seid
[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID
| seid
);
1165 desc
.flags
|= cpu_to_le16((u16
)(I40E_AQ_FLAG_BUF
| I40E_AQ_FLAG_RD
));
1166 if (buf_size
> I40E_AQ_LARGE_BUF
)
1167 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1169 status
= i40e_asq_send_command(hw
, &desc
, mv_list
, buf_size
,
1176 * i40e_aq_send_msg_to_vf
1177 * @hw: pointer to the hardware structure
1178 * @vfid: vf id to send msg
1179 * @msg: pointer to the msg buffer
1180 * @msglen: msg length
1181 * @cmd_details: pointer to command details
1185 i40e_status
i40e_aq_send_msg_to_vf(struct i40e_hw
*hw
, u16 vfid
,
1186 u32 v_opcode
, u32 v_retval
, u8
*msg
, u16 msglen
,
1187 struct i40e_asq_cmd_details
*cmd_details
)
1189 struct i40e_aq_desc desc
;
1190 struct i40e_aqc_pf_vf_message
*cmd
=
1191 (struct i40e_aqc_pf_vf_message
*)&desc
.params
.raw
;
1194 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_send_msg_to_vf
);
1195 cmd
->id
= cpu_to_le32(vfid
);
1196 desc
.cookie_high
= cpu_to_le32(v_opcode
);
1197 desc
.cookie_low
= cpu_to_le32(v_retval
);
1198 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_SI
);
1200 desc
.flags
|= cpu_to_le16((u16
)(I40E_AQ_FLAG_BUF
|
1202 if (msglen
> I40E_AQ_LARGE_BUF
)
1203 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1204 desc
.datalen
= cpu_to_le16(msglen
);
1206 status
= i40e_asq_send_command(hw
, &desc
, msg
, msglen
, cmd_details
);
1212 * i40e_aq_set_hmc_resource_profile
1213 * @hw: pointer to the hw struct
1214 * @profile: type of profile the HMC is to be set as
1215 * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1216 * @cmd_details: pointer to command details structure or NULL
1218 * set the HMC profile of the device.
1220 i40e_status
i40e_aq_set_hmc_resource_profile(struct i40e_hw
*hw
,
1221 enum i40e_aq_hmc_profile profile
,
1222 u8 pe_vf_enabled_count
,
1223 struct i40e_asq_cmd_details
*cmd_details
)
1225 struct i40e_aq_desc desc
;
1226 struct i40e_aq_get_set_hmc_resource_profile
*cmd
=
1227 (struct i40e_aq_get_set_hmc_resource_profile
*)&desc
.params
.raw
;
1230 i40e_fill_default_direct_cmd_desc(&desc
,
1231 i40e_aqc_opc_set_hmc_resource_profile
);
1233 cmd
->pm_profile
= (u8
)profile
;
1234 cmd
->pe_vf_enabled
= pe_vf_enabled_count
;
1236 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1242 * i40e_aq_request_resource
1243 * @hw: pointer to the hw struct
1244 * @resource: resource id
1245 * @access: access type
1246 * @sdp_number: resource number
1247 * @timeout: the maximum time in ms that the driver may hold the resource
1248 * @cmd_details: pointer to command details structure or NULL
1250 * requests common resource using the admin queue commands
1252 i40e_status
i40e_aq_request_resource(struct i40e_hw
*hw
,
1253 enum i40e_aq_resources_ids resource
,
1254 enum i40e_aq_resource_access_type access
,
1255 u8 sdp_number
, u64
*timeout
,
1256 struct i40e_asq_cmd_details
*cmd_details
)
1258 struct i40e_aq_desc desc
;
1259 struct i40e_aqc_request_resource
*cmd_resp
=
1260 (struct i40e_aqc_request_resource
*)&desc
.params
.raw
;
1263 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_request_resource
);
1265 cmd_resp
->resource_id
= cpu_to_le16(resource
);
1266 cmd_resp
->access_type
= cpu_to_le16(access
);
1267 cmd_resp
->resource_number
= cpu_to_le32(sdp_number
);
1269 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1270 /* The completion specifies the maximum time in ms that the driver
1271 * may hold the resource in the Timeout field.
1272 * If the resource is held by someone else, the command completes with
1273 * busy return value and the timeout field indicates the maximum time
1274 * the current owner of the resource has to free it.
1276 if (!status
|| hw
->aq
.asq_last_status
== I40E_AQ_RC_EBUSY
)
1277 *timeout
= le32_to_cpu(cmd_resp
->timeout
);
1283 * i40e_aq_release_resource
1284 * @hw: pointer to the hw struct
1285 * @resource: resource id
1286 * @sdp_number: resource number
1287 * @cmd_details: pointer to command details structure or NULL
1289 * release common resource using the admin queue commands
1291 i40e_status
i40e_aq_release_resource(struct i40e_hw
*hw
,
1292 enum i40e_aq_resources_ids resource
,
1294 struct i40e_asq_cmd_details
*cmd_details
)
1296 struct i40e_aq_desc desc
;
1297 struct i40e_aqc_request_resource
*cmd
=
1298 (struct i40e_aqc_request_resource
*)&desc
.params
.raw
;
1301 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_release_resource
);
1303 cmd
->resource_id
= cpu_to_le16(resource
);
1304 cmd
->resource_number
= cpu_to_le32(sdp_number
);
1306 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1313 * @hw: pointer to the hw struct
1314 * @module_pointer: module pointer location in words from the NVM beginning
1315 * @offset: byte offset from the module beginning
1316 * @length: length of the section to be read (in bytes from the offset)
1317 * @data: command buffer (size [bytes] = length)
1318 * @last_command: tells if this is the last command in a series
1319 * @cmd_details: pointer to command details structure or NULL
1321 * Read the NVM using the admin queue commands
1323 i40e_status
i40e_aq_read_nvm(struct i40e_hw
*hw
, u8 module_pointer
,
1324 u32 offset
, u16 length
, void *data
,
1326 struct i40e_asq_cmd_details
*cmd_details
)
1328 struct i40e_aq_desc desc
;
1329 struct i40e_aqc_nvm_update
*cmd
=
1330 (struct i40e_aqc_nvm_update
*)&desc
.params
.raw
;
1333 /* In offset the highest byte must be zeroed. */
1334 if (offset
& 0xFF000000) {
1335 status
= I40E_ERR_PARAM
;
1336 goto i40e_aq_read_nvm_exit
;
1339 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_nvm_read
);
1341 /* If this is the last command in a series, set the proper flag. */
1343 cmd
->command_flags
|= I40E_AQ_NVM_LAST_CMD
;
1344 cmd
->module_pointer
= module_pointer
;
1345 cmd
->offset
= cpu_to_le32(offset
);
1346 cmd
->length
= cpu_to_le16(length
);
1348 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
1349 if (length
> I40E_AQ_LARGE_BUF
)
1350 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1352 status
= i40e_asq_send_command(hw
, &desc
, data
, length
, cmd_details
);
1354 i40e_aq_read_nvm_exit
:
1358 #define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
1359 #define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
1360 #define I40E_DEV_FUNC_CAP_NPAR 0x03
1361 #define I40E_DEV_FUNC_CAP_OS2BMC 0x04
1362 #define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
1363 #define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
1364 #define I40E_DEV_FUNC_CAP_VF 0x13
1365 #define I40E_DEV_FUNC_CAP_VMDQ 0x14
1366 #define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
1367 #define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
1368 #define I40E_DEV_FUNC_CAP_VSI 0x17
1369 #define I40E_DEV_FUNC_CAP_DCB 0x18
1370 #define I40E_DEV_FUNC_CAP_FCOE 0x21
1371 #define I40E_DEV_FUNC_CAP_RSS 0x40
1372 #define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
1373 #define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
1374 #define I40E_DEV_FUNC_CAP_MSIX 0x43
1375 #define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
1376 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1377 #define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
1378 #define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1
1379 #define I40E_DEV_FUNC_CAP_CEM 0xF2
1380 #define I40E_DEV_FUNC_CAP_IWARP 0x51
1381 #define I40E_DEV_FUNC_CAP_LED 0x61
1382 #define I40E_DEV_FUNC_CAP_SDP 0x62
1383 #define I40E_DEV_FUNC_CAP_MDIO 0x63
1386 * i40e_parse_discover_capabilities
1387 * @hw: pointer to the hw struct
1388 * @buff: pointer to a buffer containing device/function capability records
1389 * @cap_count: number of capability records in the list
1390 * @list_type_opc: type of capabilities list to parse
1392 * Parse the device/function capabilities list.
1394 static void i40e_parse_discover_capabilities(struct i40e_hw
*hw
, void *buff
,
1396 enum i40e_admin_queue_opc list_type_opc
)
1398 struct i40e_aqc_list_capabilities_element_resp
*cap
;
1399 u32 number
, logical_id
, phys_id
;
1400 struct i40e_hw_capabilities
*p
;
1405 cap
= (struct i40e_aqc_list_capabilities_element_resp
*) buff
;
1407 if (list_type_opc
== i40e_aqc_opc_list_dev_capabilities
)
1408 p
= (struct i40e_hw_capabilities
*)&hw
->dev_caps
;
1409 else if (list_type_opc
== i40e_aqc_opc_list_func_capabilities
)
1410 p
= (struct i40e_hw_capabilities
*)&hw
->func_caps
;
1414 for (i
= 0; i
< cap_count
; i
++, cap
++) {
1415 id
= le16_to_cpu(cap
->id
);
1416 number
= le32_to_cpu(cap
->number
);
1417 logical_id
= le32_to_cpu(cap
->logical_id
);
1418 phys_id
= le32_to_cpu(cap
->phys_id
);
1421 case I40E_DEV_FUNC_CAP_SWITCH_MODE
:
1422 p
->switch_mode
= number
;
1424 case I40E_DEV_FUNC_CAP_MGMT_MODE
:
1425 p
->management_mode
= number
;
1427 case I40E_DEV_FUNC_CAP_NPAR
:
1428 p
->npar_enable
= number
;
1430 case I40E_DEV_FUNC_CAP_OS2BMC
:
1433 case I40E_DEV_FUNC_CAP_VALID_FUNC
:
1434 p
->valid_functions
= number
;
1436 case I40E_DEV_FUNC_CAP_SRIOV_1_1
:
1438 p
->sr_iov_1_1
= true;
1440 case I40E_DEV_FUNC_CAP_VF
:
1441 p
->num_vfs
= number
;
1442 p
->vf_base_id
= logical_id
;
1444 case I40E_DEV_FUNC_CAP_VMDQ
:
1448 case I40E_DEV_FUNC_CAP_802_1_QBG
:
1450 p
->evb_802_1_qbg
= true;
1452 case I40E_DEV_FUNC_CAP_802_1_QBH
:
1454 p
->evb_802_1_qbh
= true;
1456 case I40E_DEV_FUNC_CAP_VSI
:
1457 p
->num_vsis
= number
;
1459 case I40E_DEV_FUNC_CAP_DCB
:
1462 p
->enabled_tcmap
= logical_id
;
1466 case I40E_DEV_FUNC_CAP_FCOE
:
1470 case I40E_DEV_FUNC_CAP_RSS
:
1472 reg_val
= rd32(hw
, I40E_PFQF_CTL_0
);
1473 if (reg_val
& I40E_PFQF_CTL_0_HASHLUTSIZE_MASK
)
1474 p
->rss_table_size
= number
;
1476 p
->rss_table_size
= 128;
1477 p
->rss_table_entry_width
= logical_id
;
1479 case I40E_DEV_FUNC_CAP_RX_QUEUES
:
1480 p
->num_rx_qp
= number
;
1481 p
->base_queue
= phys_id
;
1483 case I40E_DEV_FUNC_CAP_TX_QUEUES
:
1484 p
->num_tx_qp
= number
;
1485 p
->base_queue
= phys_id
;
1487 case I40E_DEV_FUNC_CAP_MSIX
:
1488 p
->num_msix_vectors
= number
;
1490 case I40E_DEV_FUNC_CAP_MSIX_VF
:
1491 p
->num_msix_vectors_vf
= number
;
1493 case I40E_DEV_FUNC_CAP_MFP_MODE_1
:
1495 p
->mfp_mode_1
= true;
1497 case I40E_DEV_FUNC_CAP_CEM
:
1501 case I40E_DEV_FUNC_CAP_IWARP
:
1505 case I40E_DEV_FUNC_CAP_LED
:
1506 if (phys_id
< I40E_HW_CAP_MAX_GPIO
)
1507 p
->led
[phys_id
] = true;
1509 case I40E_DEV_FUNC_CAP_SDP
:
1510 if (phys_id
< I40E_HW_CAP_MAX_GPIO
)
1511 p
->sdp
[phys_id
] = true;
1513 case I40E_DEV_FUNC_CAP_MDIO
:
1515 p
->mdio_port_num
= phys_id
;
1516 p
->mdio_port_mode
= logical_id
;
1519 case I40E_DEV_FUNC_CAP_IEEE_1588
:
1521 p
->ieee_1588
= true;
1523 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR
:
1525 p
->fd_filters_guaranteed
= number
;
1526 p
->fd_filters_best_effort
= logical_id
;
1533 /* additional HW specific goodies that might
1534 * someday be HW version specific
1536 p
->rx_buf_chain_len
= I40E_MAX_CHAINED_RX_BUFFERS
;
1540 * i40e_aq_discover_capabilities
1541 * @hw: pointer to the hw struct
1542 * @buff: a virtual buffer to hold the capabilities
1543 * @buff_size: Size of the virtual buffer
1544 * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1545 * @list_type_opc: capabilities type to discover - pass in the command opcode
1546 * @cmd_details: pointer to command details structure or NULL
1548 * Get the device capabilities descriptions from the firmware
1550 i40e_status
i40e_aq_discover_capabilities(struct i40e_hw
*hw
,
1551 void *buff
, u16 buff_size
, u16
*data_size
,
1552 enum i40e_admin_queue_opc list_type_opc
,
1553 struct i40e_asq_cmd_details
*cmd_details
)
1555 struct i40e_aqc_list_capabilites
*cmd
;
1556 i40e_status status
= 0;
1557 struct i40e_aq_desc desc
;
1559 cmd
= (struct i40e_aqc_list_capabilites
*)&desc
.params
.raw
;
1561 if (list_type_opc
!= i40e_aqc_opc_list_func_capabilities
&&
1562 list_type_opc
!= i40e_aqc_opc_list_dev_capabilities
) {
1563 status
= I40E_ERR_PARAM
;
1567 i40e_fill_default_direct_cmd_desc(&desc
, list_type_opc
);
1569 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
1570 if (buff_size
> I40E_AQ_LARGE_BUF
)
1571 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1573 status
= i40e_asq_send_command(hw
, &desc
, buff
, buff_size
, cmd_details
);
1574 *data_size
= le16_to_cpu(desc
.datalen
);
1579 i40e_parse_discover_capabilities(hw
, buff
, le32_to_cpu(cmd
->count
),
1587 * i40e_aq_get_lldp_mib
1588 * @hw: pointer to the hw struct
1589 * @bridge_type: type of bridge requested
1590 * @mib_type: Local, Remote or both Local and Remote MIBs
1591 * @buff: pointer to a user supplied buffer to store the MIB block
1592 * @buff_size: size of the buffer (in bytes)
1593 * @local_len : length of the returned Local LLDP MIB
1594 * @remote_len: length of the returned Remote LLDP MIB
1595 * @cmd_details: pointer to command details structure or NULL
1597 * Requests the complete LLDP MIB (entire packet).
1599 i40e_status
i40e_aq_get_lldp_mib(struct i40e_hw
*hw
, u8 bridge_type
,
1600 u8 mib_type
, void *buff
, u16 buff_size
,
1601 u16
*local_len
, u16
*remote_len
,
1602 struct i40e_asq_cmd_details
*cmd_details
)
1604 struct i40e_aq_desc desc
;
1605 struct i40e_aqc_lldp_get_mib
*cmd
=
1606 (struct i40e_aqc_lldp_get_mib
*)&desc
.params
.raw
;
1607 struct i40e_aqc_lldp_get_mib
*resp
=
1608 (struct i40e_aqc_lldp_get_mib
*)&desc
.params
.raw
;
1611 if (buff_size
== 0 || !buff
)
1612 return I40E_ERR_PARAM
;
1614 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_lldp_get_mib
);
1615 /* Indirect Command */
1616 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
1618 cmd
->type
= mib_type
& I40E_AQ_LLDP_MIB_TYPE_MASK
;
1619 cmd
->type
|= ((bridge_type
<< I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT
) &
1620 I40E_AQ_LLDP_BRIDGE_TYPE_MASK
);
1622 desc
.datalen
= cpu_to_le16(buff_size
);
1624 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
1625 if (buff_size
> I40E_AQ_LARGE_BUF
)
1626 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1628 status
= i40e_asq_send_command(hw
, &desc
, buff
, buff_size
, cmd_details
);
1630 if (local_len
!= NULL
)
1631 *local_len
= le16_to_cpu(resp
->local_len
);
1632 if (remote_len
!= NULL
)
1633 *remote_len
= le16_to_cpu(resp
->remote_len
);
1640 * i40e_aq_cfg_lldp_mib_change_event
1641 * @hw: pointer to the hw struct
1642 * @enable_update: Enable or Disable event posting
1643 * @cmd_details: pointer to command details structure or NULL
1645 * Enable or Disable posting of an event on ARQ when LLDP MIB
1646 * associated with the interface changes
1648 i40e_status
i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw
*hw
,
1650 struct i40e_asq_cmd_details
*cmd_details
)
1652 struct i40e_aq_desc desc
;
1653 struct i40e_aqc_lldp_update_mib
*cmd
=
1654 (struct i40e_aqc_lldp_update_mib
*)&desc
.params
.raw
;
1657 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_lldp_update_mib
);
1660 cmd
->command
|= I40E_AQ_LLDP_MIB_UPDATE_DISABLE
;
1662 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1669 * @hw: pointer to the hw struct
1670 * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1671 * @cmd_details: pointer to command details structure or NULL
1673 * Stop or Shutdown the embedded LLDP Agent
1675 i40e_status
i40e_aq_stop_lldp(struct i40e_hw
*hw
, bool shutdown_agent
,
1676 struct i40e_asq_cmd_details
*cmd_details
)
1678 struct i40e_aq_desc desc
;
1679 struct i40e_aqc_lldp_stop
*cmd
=
1680 (struct i40e_aqc_lldp_stop
*)&desc
.params
.raw
;
1683 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_lldp_stop
);
1686 cmd
->command
|= I40E_AQ_LLDP_AGENT_SHUTDOWN
;
1688 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1694 * i40e_aq_start_lldp
1695 * @hw: pointer to the hw struct
1696 * @cmd_details: pointer to command details structure or NULL
1698 * Start the embedded LLDP Agent on all ports.
1700 i40e_status
i40e_aq_start_lldp(struct i40e_hw
*hw
,
1701 struct i40e_asq_cmd_details
*cmd_details
)
1703 struct i40e_aq_desc desc
;
1704 struct i40e_aqc_lldp_start
*cmd
=
1705 (struct i40e_aqc_lldp_start
*)&desc
.params
.raw
;
1708 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_lldp_start
);
1710 cmd
->command
= I40E_AQ_LLDP_AGENT_START
;
1712 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1718 * i40e_aq_add_udp_tunnel
1719 * @hw: pointer to the hw struct
1720 * @udp_port: the UDP port to add
1721 * @header_len: length of the tunneling header length in DWords
1722 * @protocol_index: protocol index type
1723 * @cmd_details: pointer to command details structure or NULL
1725 i40e_status
i40e_aq_add_udp_tunnel(struct i40e_hw
*hw
,
1726 u16 udp_port
, u8 header_len
,
1727 u8 protocol_index
, u8
*filter_index
,
1728 struct i40e_asq_cmd_details
*cmd_details
)
1730 struct i40e_aq_desc desc
;
1731 struct i40e_aqc_add_udp_tunnel
*cmd
=
1732 (struct i40e_aqc_add_udp_tunnel
*)&desc
.params
.raw
;
1733 struct i40e_aqc_del_udp_tunnel_completion
*resp
=
1734 (struct i40e_aqc_del_udp_tunnel_completion
*)&desc
.params
.raw
;
1737 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_add_udp_tunnel
);
1739 cmd
->udp_port
= cpu_to_le16(udp_port
);
1740 cmd
->header_len
= header_len
;
1741 cmd
->protocol_type
= protocol_index
;
1743 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1746 *filter_index
= resp
->index
;
1752 * i40e_aq_del_udp_tunnel
1753 * @hw: pointer to the hw struct
1754 * @index: filter index
1755 * @cmd_details: pointer to command details structure or NULL
1757 i40e_status
i40e_aq_del_udp_tunnel(struct i40e_hw
*hw
, u8 index
,
1758 struct i40e_asq_cmd_details
*cmd_details
)
1760 struct i40e_aq_desc desc
;
1761 struct i40e_aqc_remove_udp_tunnel
*cmd
=
1762 (struct i40e_aqc_remove_udp_tunnel
*)&desc
.params
.raw
;
1765 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_del_udp_tunnel
);
1769 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1775 * i40e_aq_delete_element - Delete switch element
1776 * @hw: pointer to the hw struct
1777 * @seid: the SEID to delete from the switch
1778 * @cmd_details: pointer to command details structure or NULL
1780 * This deletes a switch element from the switch.
1782 i40e_status
i40e_aq_delete_element(struct i40e_hw
*hw
, u16 seid
,
1783 struct i40e_asq_cmd_details
*cmd_details
)
1785 struct i40e_aq_desc desc
;
1786 struct i40e_aqc_switch_seid
*cmd
=
1787 (struct i40e_aqc_switch_seid
*)&desc
.params
.raw
;
1791 return I40E_ERR_PARAM
;
1793 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_delete_element
);
1795 cmd
->seid
= cpu_to_le16(seid
);
1797 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1803 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1804 * @hw: pointer to the hw struct
1805 * @seid: seid for the physical port/switching component/vsi
1806 * @buff: Indirect buffer to hold data parameters and response
1807 * @buff_size: Indirect buffer size
1808 * @opcode: Tx scheduler AQ command opcode
1809 * @cmd_details: pointer to command details structure or NULL
1811 * Generic command handler for Tx scheduler AQ commands
1813 static i40e_status
i40e_aq_tx_sched_cmd(struct i40e_hw
*hw
, u16 seid
,
1814 void *buff
, u16 buff_size
,
1815 enum i40e_admin_queue_opc opcode
,
1816 struct i40e_asq_cmd_details
*cmd_details
)
1818 struct i40e_aq_desc desc
;
1819 struct i40e_aqc_tx_sched_ind
*cmd
=
1820 (struct i40e_aqc_tx_sched_ind
*)&desc
.params
.raw
;
1822 bool cmd_param_flag
= false;
1825 case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit
:
1826 case i40e_aqc_opc_configure_vsi_tc_bw
:
1827 case i40e_aqc_opc_enable_switching_comp_ets
:
1828 case i40e_aqc_opc_modify_switching_comp_ets
:
1829 case i40e_aqc_opc_disable_switching_comp_ets
:
1830 case i40e_aqc_opc_configure_switching_comp_ets_bw_limit
:
1831 case i40e_aqc_opc_configure_switching_comp_bw_config
:
1832 cmd_param_flag
= true;
1834 case i40e_aqc_opc_query_vsi_bw_config
:
1835 case i40e_aqc_opc_query_vsi_ets_sla_config
:
1836 case i40e_aqc_opc_query_switching_comp_ets_config
:
1837 case i40e_aqc_opc_query_port_ets_config
:
1838 case i40e_aqc_opc_query_switching_comp_bw_config
:
1839 cmd_param_flag
= false;
1842 return I40E_ERR_PARAM
;
1845 i40e_fill_default_direct_cmd_desc(&desc
, opcode
);
1847 /* Indirect command */
1848 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
1850 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_RD
);
1851 if (buff_size
> I40E_AQ_LARGE_BUF
)
1852 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1854 desc
.datalen
= cpu_to_le16(buff_size
);
1856 cmd
->vsi_seid
= cpu_to_le16(seid
);
1858 status
= i40e_asq_send_command(hw
, &desc
, buff
, buff_size
, cmd_details
);
1864 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1865 * @hw: pointer to the hw struct
1867 * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1868 * @cmd_details: pointer to command details structure or NULL
1870 i40e_status
i40e_aq_config_vsi_tc_bw(struct i40e_hw
*hw
,
1872 struct i40e_aqc_configure_vsi_tc_bw_data
*bw_data
,
1873 struct i40e_asq_cmd_details
*cmd_details
)
1875 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1876 i40e_aqc_opc_configure_vsi_tc_bw
,
1881 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1882 * @hw: pointer to the hw struct
1883 * @seid: seid of the VSI
1884 * @bw_data: Buffer to hold VSI BW configuration
1885 * @cmd_details: pointer to command details structure or NULL
1887 i40e_status
i40e_aq_query_vsi_bw_config(struct i40e_hw
*hw
,
1889 struct i40e_aqc_query_vsi_bw_config_resp
*bw_data
,
1890 struct i40e_asq_cmd_details
*cmd_details
)
1892 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1893 i40e_aqc_opc_query_vsi_bw_config
,
1898 * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1899 * @hw: pointer to the hw struct
1900 * @seid: seid of the VSI
1901 * @bw_data: Buffer to hold VSI BW configuration per TC
1902 * @cmd_details: pointer to command details structure or NULL
1904 i40e_status
i40e_aq_query_vsi_ets_sla_config(struct i40e_hw
*hw
,
1906 struct i40e_aqc_query_vsi_ets_sla_config_resp
*bw_data
,
1907 struct i40e_asq_cmd_details
*cmd_details
)
1909 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1910 i40e_aqc_opc_query_vsi_ets_sla_config
,
1915 * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1916 * @hw: pointer to the hw struct
1917 * @seid: seid of the switching component
1918 * @bw_data: Buffer to hold switching component's per TC BW config
1919 * @cmd_details: pointer to command details structure or NULL
1921 i40e_status
i40e_aq_query_switch_comp_ets_config(struct i40e_hw
*hw
,
1923 struct i40e_aqc_query_switching_comp_ets_config_resp
*bw_data
,
1924 struct i40e_asq_cmd_details
*cmd_details
)
1926 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1927 i40e_aqc_opc_query_switching_comp_ets_config
,
1932 * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1933 * @hw: pointer to the hw struct
1934 * @seid: seid of the VSI or switching component connected to Physical Port
1935 * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1936 * @cmd_details: pointer to command details structure or NULL
1938 i40e_status
i40e_aq_query_port_ets_config(struct i40e_hw
*hw
,
1940 struct i40e_aqc_query_port_ets_config_resp
*bw_data
,
1941 struct i40e_asq_cmd_details
*cmd_details
)
1943 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1944 i40e_aqc_opc_query_port_ets_config
,
1949 * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
1950 * @hw: pointer to the hw struct
1951 * @seid: seid of the switching component
1952 * @bw_data: Buffer to hold switching component's BW configuration
1953 * @cmd_details: pointer to command details structure or NULL
1955 i40e_status
i40e_aq_query_switch_comp_bw_config(struct i40e_hw
*hw
,
1957 struct i40e_aqc_query_switching_comp_bw_config_resp
*bw_data
,
1958 struct i40e_asq_cmd_details
*cmd_details
)
1960 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1961 i40e_aqc_opc_query_switching_comp_bw_config
,
1966 * i40e_validate_filter_settings
1967 * @hw: pointer to the hardware structure
1968 * @settings: Filter control settings
1970 * Check and validate the filter control settings passed.
1971 * The function checks for the valid filter/context sizes being
1972 * passed for FCoE and PE.
1974 * Returns 0 if the values passed are valid and within
1975 * range else returns an error.
1977 static i40e_status
i40e_validate_filter_settings(struct i40e_hw
*hw
,
1978 struct i40e_filter_control_settings
*settings
)
1980 u32 fcoe_cntx_size
, fcoe_filt_size
;
1981 u32 pe_cntx_size
, pe_filt_size
;
1982 u32 fcoe_fmax
, pe_fmax
;
1985 /* Validate FCoE settings passed */
1986 switch (settings
->fcoe_filt_num
) {
1987 case I40E_HASH_FILTER_SIZE_1K
:
1988 case I40E_HASH_FILTER_SIZE_2K
:
1989 case I40E_HASH_FILTER_SIZE_4K
:
1990 case I40E_HASH_FILTER_SIZE_8K
:
1991 case I40E_HASH_FILTER_SIZE_16K
:
1992 case I40E_HASH_FILTER_SIZE_32K
:
1993 fcoe_filt_size
= I40E_HASH_FILTER_BASE_SIZE
;
1994 fcoe_filt_size
<<= (u32
)settings
->fcoe_filt_num
;
1997 return I40E_ERR_PARAM
;
2000 switch (settings
->fcoe_cntx_num
) {
2001 case I40E_DMA_CNTX_SIZE_512
:
2002 case I40E_DMA_CNTX_SIZE_1K
:
2003 case I40E_DMA_CNTX_SIZE_2K
:
2004 case I40E_DMA_CNTX_SIZE_4K
:
2005 fcoe_cntx_size
= I40E_DMA_CNTX_BASE_SIZE
;
2006 fcoe_cntx_size
<<= (u32
)settings
->fcoe_cntx_num
;
2009 return I40E_ERR_PARAM
;
2012 /* Validate PE settings passed */
2013 switch (settings
->pe_filt_num
) {
2014 case I40E_HASH_FILTER_SIZE_1K
:
2015 case I40E_HASH_FILTER_SIZE_2K
:
2016 case I40E_HASH_FILTER_SIZE_4K
:
2017 case I40E_HASH_FILTER_SIZE_8K
:
2018 case I40E_HASH_FILTER_SIZE_16K
:
2019 case I40E_HASH_FILTER_SIZE_32K
:
2020 case I40E_HASH_FILTER_SIZE_64K
:
2021 case I40E_HASH_FILTER_SIZE_128K
:
2022 case I40E_HASH_FILTER_SIZE_256K
:
2023 case I40E_HASH_FILTER_SIZE_512K
:
2024 case I40E_HASH_FILTER_SIZE_1M
:
2025 pe_filt_size
= I40E_HASH_FILTER_BASE_SIZE
;
2026 pe_filt_size
<<= (u32
)settings
->pe_filt_num
;
2029 return I40E_ERR_PARAM
;
2032 switch (settings
->pe_cntx_num
) {
2033 case I40E_DMA_CNTX_SIZE_512
:
2034 case I40E_DMA_CNTX_SIZE_1K
:
2035 case I40E_DMA_CNTX_SIZE_2K
:
2036 case I40E_DMA_CNTX_SIZE_4K
:
2037 case I40E_DMA_CNTX_SIZE_8K
:
2038 case I40E_DMA_CNTX_SIZE_16K
:
2039 case I40E_DMA_CNTX_SIZE_32K
:
2040 case I40E_DMA_CNTX_SIZE_64K
:
2041 case I40E_DMA_CNTX_SIZE_128K
:
2042 case I40E_DMA_CNTX_SIZE_256K
:
2043 pe_cntx_size
= I40E_DMA_CNTX_BASE_SIZE
;
2044 pe_cntx_size
<<= (u32
)settings
->pe_cntx_num
;
2047 return I40E_ERR_PARAM
;
2050 /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
2051 val
= rd32(hw
, I40E_GLHMC_FCOEFMAX
);
2052 fcoe_fmax
= (val
& I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK
)
2053 >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT
;
2054 if (fcoe_filt_size
+ fcoe_cntx_size
> fcoe_fmax
)
2055 return I40E_ERR_INVALID_SIZE
;
2057 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
2058 val
= rd32(hw
, I40E_GLHMC_PEXFMAX
);
2059 pe_fmax
= (val
& I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK
)
2060 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT
;
2061 if (pe_filt_size
+ pe_cntx_size
> pe_fmax
)
2062 return I40E_ERR_INVALID_SIZE
;
2068 * i40e_set_filter_control
2069 * @hw: pointer to the hardware structure
2070 * @settings: Filter control settings
2072 * Set the Queue Filters for PE/FCoE and enable filters required
2073 * for a single PF. It is expected that these settings are programmed
2074 * at the driver initialization time.
2076 i40e_status
i40e_set_filter_control(struct i40e_hw
*hw
,
2077 struct i40e_filter_control_settings
*settings
)
2079 i40e_status ret
= 0;
2080 u32 hash_lut_size
= 0;
2084 return I40E_ERR_PARAM
;
2086 /* Validate the input settings */
2087 ret
= i40e_validate_filter_settings(hw
, settings
);
2091 /* Read the PF Queue Filter control register */
2092 val
= rd32(hw
, I40E_PFQF_CTL_0
);
2094 /* Program required PE hash buckets for the PF */
2095 val
&= ~I40E_PFQF_CTL_0_PEHSIZE_MASK
;
2096 val
|= ((u32
)settings
->pe_filt_num
<< I40E_PFQF_CTL_0_PEHSIZE_SHIFT
) &
2097 I40E_PFQF_CTL_0_PEHSIZE_MASK
;
2098 /* Program required PE contexts for the PF */
2099 val
&= ~I40E_PFQF_CTL_0_PEDSIZE_MASK
;
2100 val
|= ((u32
)settings
->pe_cntx_num
<< I40E_PFQF_CTL_0_PEDSIZE_SHIFT
) &
2101 I40E_PFQF_CTL_0_PEDSIZE_MASK
;
2103 /* Program required FCoE hash buckets for the PF */
2104 val
&= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK
;
2105 val
|= ((u32
)settings
->fcoe_filt_num
<<
2106 I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT
) &
2107 I40E_PFQF_CTL_0_PFFCHSIZE_MASK
;
2108 /* Program required FCoE DDP contexts for the PF */
2109 val
&= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK
;
2110 val
|= ((u32
)settings
->fcoe_cntx_num
<<
2111 I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT
) &
2112 I40E_PFQF_CTL_0_PFFCDSIZE_MASK
;
2114 /* Program Hash LUT size for the PF */
2115 val
&= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK
;
2116 if (settings
->hash_lut_size
== I40E_HASH_LUT_SIZE_512
)
2118 val
|= (hash_lut_size
<< I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT
) &
2119 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK
;
2121 /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2122 if (settings
->enable_fdir
)
2123 val
|= I40E_PFQF_CTL_0_FD_ENA_MASK
;
2124 if (settings
->enable_ethtype
)
2125 val
|= I40E_PFQF_CTL_0_ETYPE_ENA_MASK
;
2126 if (settings
->enable_macvlan
)
2127 val
|= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK
;
2129 wr32(hw
, I40E_PFQF_CTL_0
, val
);
2134 * i40e_set_pci_config_data - store PCI bus info
2135 * @hw: pointer to hardware structure
2136 * @link_status: the link status word from PCI config space
2138 * Stores the PCI bus info (speed, width, type) within the i40e_hw structure
2140 void i40e_set_pci_config_data(struct i40e_hw
*hw
, u16 link_status
)
2142 hw
->bus
.type
= i40e_bus_type_pci_express
;
2144 switch (link_status
& PCI_EXP_LNKSTA_NLW
) {
2145 case PCI_EXP_LNKSTA_NLW_X1
:
2146 hw
->bus
.width
= i40e_bus_width_pcie_x1
;
2148 case PCI_EXP_LNKSTA_NLW_X2
:
2149 hw
->bus
.width
= i40e_bus_width_pcie_x2
;
2151 case PCI_EXP_LNKSTA_NLW_X4
:
2152 hw
->bus
.width
= i40e_bus_width_pcie_x4
;
2154 case PCI_EXP_LNKSTA_NLW_X8
:
2155 hw
->bus
.width
= i40e_bus_width_pcie_x8
;
2158 hw
->bus
.width
= i40e_bus_width_unknown
;
2162 switch (link_status
& PCI_EXP_LNKSTA_CLS
) {
2163 case PCI_EXP_LNKSTA_CLS_2_5GB
:
2164 hw
->bus
.speed
= i40e_bus_speed_2500
;
2166 case PCI_EXP_LNKSTA_CLS_5_0GB
:
2167 hw
->bus
.speed
= i40e_bus_speed_5000
;
2169 case PCI_EXP_LNKSTA_CLS_8_0GB
:
2170 hw
->bus
.speed
= i40e_bus_speed_8000
;
2173 hw
->bus
.speed
= i40e_bus_speed_unknown
;