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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_common.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28 #include "i40e_type.h"
29 #include "i40e_adminq.h"
30 #include "i40e_prototype.h"
31 #include "i40e_virtchnl.h"
32
33 /**
34 * i40e_set_mac_type - Sets MAC type
35 * @hw: pointer to the HW structure
36 *
37 * This function sets the mac type of the adapter based on the
38 * vendor ID and device ID stored in the hw structure.
39 **/
40 static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
41 {
42 i40e_status status = 0;
43
44 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
45 switch (hw->device_id) {
46 case I40E_SFP_XL710_DEVICE_ID:
47 case I40E_SFP_X710_DEVICE_ID:
48 case I40E_QEMU_DEVICE_ID:
49 case I40E_KX_A_DEVICE_ID:
50 case I40E_KX_B_DEVICE_ID:
51 case I40E_KX_C_DEVICE_ID:
52 case I40E_KX_D_DEVICE_ID:
53 case I40E_QSFP_A_DEVICE_ID:
54 case I40E_QSFP_B_DEVICE_ID:
55 case I40E_QSFP_C_DEVICE_ID:
56 hw->mac.type = I40E_MAC_XL710;
57 break;
58 case I40E_VF_DEVICE_ID:
59 case I40E_VF_HV_DEVICE_ID:
60 hw->mac.type = I40E_MAC_VF;
61 break;
62 default:
63 hw->mac.type = I40E_MAC_GENERIC;
64 break;
65 }
66 } else {
67 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
68 }
69
70 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
71 hw->mac.type, status);
72 return status;
73 }
74
75 /**
76 * i40e_debug_aq
77 * @hw: debug mask related to admin queue
78 * @cap: pointer to adminq command descriptor
79 * @buffer: pointer to command buffer
80 *
81 * Dumps debug log about adminq command with descriptor contents.
82 **/
83 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
84 void *buffer)
85 {
86 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
87 u8 *aq_buffer = (u8 *)buffer;
88 u32 data[4];
89 u32 i = 0;
90
91 if ((!(mask & hw->debug_mask)) || (desc == NULL))
92 return;
93
94 i40e_debug(hw, mask,
95 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
96 aq_desc->opcode, aq_desc->flags, aq_desc->datalen,
97 aq_desc->retval);
98 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
99 aq_desc->cookie_high, aq_desc->cookie_low);
100 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
101 aq_desc->params.internal.param0,
102 aq_desc->params.internal.param1);
103 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
104 aq_desc->params.external.addr_high,
105 aq_desc->params.external.addr_low);
106
107 if ((buffer != NULL) && (aq_desc->datalen != 0)) {
108 memset(data, 0, sizeof(data));
109 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
110 for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) {
111 data[((i % 16) / 4)] |=
112 ((u32)aq_buffer[i]) << (8 * (i % 4));
113 if ((i % 16) == 15) {
114 i40e_debug(hw, mask,
115 "\t0x%04X %08X %08X %08X %08X\n",
116 i - 15, data[0], data[1], data[2],
117 data[3]);
118 memset(data, 0, sizeof(data));
119 }
120 }
121 if ((i % 16) != 0)
122 i40e_debug(hw, mask, "\t0x%04X %08X %08X %08X %08X\n",
123 i - (i % 16), data[0], data[1], data[2],
124 data[3]);
125 }
126 }
127
128 /**
129 * i40e_init_shared_code - Initialize the shared code
130 * @hw: pointer to hardware structure
131 *
132 * This assigns the MAC type and PHY code and inits the NVM.
133 * Does not touch the hardware. This function must be called prior to any
134 * other function in the shared code. The i40e_hw structure should be
135 * memset to 0 prior to calling this function. The following fields in
136 * hw structure should be filled in prior to calling this function:
137 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
138 * subsystem_vendor_id, and revision_id
139 **/
140 i40e_status i40e_init_shared_code(struct i40e_hw *hw)
141 {
142 i40e_status status = 0;
143 u32 reg;
144
145 hw->phy.get_link_info = true;
146
147 /* Determine port number */
148 reg = rd32(hw, I40E_PFGEN_PORTNUM);
149 reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >>
150 I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT);
151 hw->port = (u8)reg;
152
153 i40e_set_mac_type(hw);
154
155 switch (hw->mac.type) {
156 case I40E_MAC_XL710:
157 break;
158 default:
159 return I40E_ERR_DEVICE_NOT_SUPPORTED;
160 break;
161 }
162
163 status = i40e_init_nvm(hw);
164 return status;
165 }
166
167 /**
168 * i40e_aq_mac_address_read - Retrieve the MAC addresses
169 * @hw: pointer to the hw struct
170 * @flags: a return indicator of what addresses were added to the addr store
171 * @addrs: the requestor's mac addr store
172 * @cmd_details: pointer to command details structure or NULL
173 **/
174 static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
175 u16 *flags,
176 struct i40e_aqc_mac_address_read_data *addrs,
177 struct i40e_asq_cmd_details *cmd_details)
178 {
179 struct i40e_aq_desc desc;
180 struct i40e_aqc_mac_address_read *cmd_data =
181 (struct i40e_aqc_mac_address_read *)&desc.params.raw;
182 i40e_status status;
183
184 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
185 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);
186
187 status = i40e_asq_send_command(hw, &desc, addrs,
188 sizeof(*addrs), cmd_details);
189 *flags = le16_to_cpu(cmd_data->command_flags);
190
191 return status;
192 }
193
194 /**
195 * i40e_aq_mac_address_write - Change the MAC addresses
196 * @hw: pointer to the hw struct
197 * @flags: indicates which MAC to be written
198 * @mac_addr: address to write
199 * @cmd_details: pointer to command details structure or NULL
200 **/
201 i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
202 u16 flags, u8 *mac_addr,
203 struct i40e_asq_cmd_details *cmd_details)
204 {
205 struct i40e_aq_desc desc;
206 struct i40e_aqc_mac_address_write *cmd_data =
207 (struct i40e_aqc_mac_address_write *)&desc.params.raw;
208 i40e_status status;
209
210 i40e_fill_default_direct_cmd_desc(&desc,
211 i40e_aqc_opc_mac_address_write);
212 cmd_data->command_flags = cpu_to_le16(flags);
213 memcpy(&cmd_data->mac_sal, &mac_addr[0], 4);
214 memcpy(&cmd_data->mac_sah, &mac_addr[4], 2);
215
216 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
217
218 return status;
219 }
220
221 /**
222 * i40e_get_mac_addr - get MAC address
223 * @hw: pointer to the HW structure
224 * @mac_addr: pointer to MAC address
225 *
226 * Reads the adapter's MAC address from register
227 **/
228 i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
229 {
230 struct i40e_aqc_mac_address_read_data addrs;
231 i40e_status status;
232 u16 flags = 0;
233
234 status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
235
236 if (flags & I40E_AQC_LAN_ADDR_VALID)
237 memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
238
239 return status;
240 }
241
242 /**
243 * i40e_validate_mac_addr - Validate MAC address
244 * @mac_addr: pointer to MAC address
245 *
246 * Tests a MAC address to ensure it is a valid Individual Address
247 **/
248 i40e_status i40e_validate_mac_addr(u8 *mac_addr)
249 {
250 i40e_status status = 0;
251
252 /* Make sure it is not a multicast address */
253 if (I40E_IS_MULTICAST(mac_addr)) {
254 hw_dbg(hw, "MAC address is multicast\n");
255 status = I40E_ERR_INVALID_MAC_ADDR;
256 /* Not a broadcast address */
257 } else if (I40E_IS_BROADCAST(mac_addr)) {
258 hw_dbg(hw, "MAC address is broadcast\n");
259 status = I40E_ERR_INVALID_MAC_ADDR;
260 /* Reject the zero address */
261 } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&
262 mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {
263 hw_dbg(hw, "MAC address is all zeros\n");
264 status = I40E_ERR_INVALID_MAC_ADDR;
265 }
266 return status;
267 }
268
269 /**
270 * i40e_get_media_type - Gets media type
271 * @hw: pointer to the hardware structure
272 **/
273 static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
274 {
275 enum i40e_media_type media;
276
277 switch (hw->phy.link_info.phy_type) {
278 case I40E_PHY_TYPE_10GBASE_SR:
279 case I40E_PHY_TYPE_10GBASE_LR:
280 case I40E_PHY_TYPE_40GBASE_SR4:
281 case I40E_PHY_TYPE_40GBASE_LR4:
282 media = I40E_MEDIA_TYPE_FIBER;
283 break;
284 case I40E_PHY_TYPE_100BASE_TX:
285 case I40E_PHY_TYPE_1000BASE_T:
286 case I40E_PHY_TYPE_10GBASE_T:
287 media = I40E_MEDIA_TYPE_BASET;
288 break;
289 case I40E_PHY_TYPE_10GBASE_CR1_CU:
290 case I40E_PHY_TYPE_40GBASE_CR4_CU:
291 case I40E_PHY_TYPE_10GBASE_CR1:
292 case I40E_PHY_TYPE_40GBASE_CR4:
293 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
294 media = I40E_MEDIA_TYPE_DA;
295 break;
296 case I40E_PHY_TYPE_1000BASE_KX:
297 case I40E_PHY_TYPE_10GBASE_KX4:
298 case I40E_PHY_TYPE_10GBASE_KR:
299 case I40E_PHY_TYPE_40GBASE_KR4:
300 media = I40E_MEDIA_TYPE_BACKPLANE;
301 break;
302 case I40E_PHY_TYPE_SGMII:
303 case I40E_PHY_TYPE_XAUI:
304 case I40E_PHY_TYPE_XFI:
305 case I40E_PHY_TYPE_XLAUI:
306 case I40E_PHY_TYPE_XLPPI:
307 default:
308 media = I40E_MEDIA_TYPE_UNKNOWN;
309 break;
310 }
311
312 return media;
313 }
314
315 #define I40E_PF_RESET_WAIT_COUNT_A0 200
316 #define I40E_PF_RESET_WAIT_COUNT 10
317 /**
318 * i40e_pf_reset - Reset the PF
319 * @hw: pointer to the hardware structure
320 *
321 * Assuming someone else has triggered a global reset,
322 * assure the global reset is complete and then reset the PF
323 **/
324 i40e_status i40e_pf_reset(struct i40e_hw *hw)
325 {
326 u32 cnt = 0;
327 u32 reg = 0;
328 u32 grst_del;
329
330 /* Poll for Global Reset steady state in case of recent GRST.
331 * The grst delay value is in 100ms units, and we'll wait a
332 * couple counts longer to be sure we don't just miss the end.
333 */
334 grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
335 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
336 for (cnt = 0; cnt < grst_del + 2; cnt++) {
337 reg = rd32(hw, I40E_GLGEN_RSTAT);
338 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
339 break;
340 msleep(100);
341 }
342 if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
343 hw_dbg(hw, "Global reset polling failed to complete.\n");
344 return I40E_ERR_RESET_FAILED;
345 }
346
347 /* Determine the PF number based on the PCI fn */
348 reg = rd32(hw, I40E_GLPCI_CAPSUP);
349 if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK)
350 hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func);
351 else
352 hw->pf_id = (u8)hw->bus.func;
353
354 /* If there was a Global Reset in progress when we got here,
355 * we don't need to do the PF Reset
356 */
357 if (!cnt) {
358 if (hw->revision_id == 0)
359 cnt = I40E_PF_RESET_WAIT_COUNT_A0;
360 else
361 cnt = I40E_PF_RESET_WAIT_COUNT;
362 reg = rd32(hw, I40E_PFGEN_CTRL);
363 wr32(hw, I40E_PFGEN_CTRL,
364 (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
365 for (; cnt; cnt--) {
366 reg = rd32(hw, I40E_PFGEN_CTRL);
367 if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
368 break;
369 usleep_range(1000, 2000);
370 }
371 if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
372 hw_dbg(hw, "PF reset polling failed to complete.\n");
373 return I40E_ERR_RESET_FAILED;
374 }
375 }
376
377 i40e_clear_pxe_mode(hw);
378 return 0;
379 }
380
381 /**
382 * i40e_clear_pxe_mode - clear pxe operations mode
383 * @hw: pointer to the hw struct
384 *
385 * Make sure all PXE mode settings are cleared, including things
386 * like descriptor fetch/write-back mode.
387 **/
388 void i40e_clear_pxe_mode(struct i40e_hw *hw)
389 {
390 u32 reg;
391
392 /* Clear single descriptor fetch/write-back mode */
393 reg = rd32(hw, I40E_GLLAN_RCTL_0);
394
395 if (hw->revision_id == 0) {
396 /* As a work around clear PXE_MODE instead of setting it */
397 wr32(hw, I40E_GLLAN_RCTL_0, (reg & (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK)));
398 } else {
399 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
400 }
401 }
402
403 /**
404 * i40e_led_get - return current on/off mode
405 * @hw: pointer to the hw struct
406 *
407 * The value returned is the 'mode' field as defined in the
408 * GPIO register definitions: 0x0 = off, 0xf = on, and other
409 * values are variations of possible behaviors relating to
410 * blink, link, and wire.
411 **/
412 u32 i40e_led_get(struct i40e_hw *hw)
413 {
414 u32 gpio_val = 0;
415 u32 mode = 0;
416 u32 port;
417 int i;
418
419 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
420 if (!hw->func_caps.led[i])
421 continue;
422
423 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
424 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
425 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
426
427 if (port != hw->port)
428 continue;
429
430 mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
431 >> I40E_GLGEN_GPIO_CTL_INT_MODE_SHIFT;
432 break;
433 }
434
435 return mode;
436 }
437
438 /**
439 * i40e_led_set - set new on/off mode
440 * @hw: pointer to the hw struct
441 * @mode: 0=off, else on (see EAS for mode details)
442 **/
443 void i40e_led_set(struct i40e_hw *hw, u32 mode)
444 {
445 u32 gpio_val = 0;
446 u32 led_mode = 0;
447 u32 port;
448 int i;
449
450 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
451 if (!hw->func_caps.led[i])
452 continue;
453
454 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
455 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
456 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
457
458 if (port != hw->port)
459 continue;
460
461 led_mode = (mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
462 I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
463 gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
464 gpio_val |= led_mode;
465 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
466 }
467 }
468
469 /* Admin command wrappers */
470 /**
471 * i40e_aq_queue_shutdown
472 * @hw: pointer to the hw struct
473 * @unloading: is the driver unloading itself
474 *
475 * Tell the Firmware that we're shutting down the AdminQ and whether
476 * or not the driver is unloading as well.
477 **/
478 i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
479 bool unloading)
480 {
481 struct i40e_aq_desc desc;
482 struct i40e_aqc_queue_shutdown *cmd =
483 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
484 i40e_status status;
485
486 i40e_fill_default_direct_cmd_desc(&desc,
487 i40e_aqc_opc_queue_shutdown);
488
489 if (unloading)
490 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
491 status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
492
493 return status;
494 }
495
496 /**
497 * i40e_aq_set_link_restart_an
498 * @hw: pointer to the hw struct
499 * @cmd_details: pointer to command details structure or NULL
500 *
501 * Sets up the link and restarts the Auto-Negotiation over the link.
502 **/
503 i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
504 struct i40e_asq_cmd_details *cmd_details)
505 {
506 struct i40e_aq_desc desc;
507 struct i40e_aqc_set_link_restart_an *cmd =
508 (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
509 i40e_status status;
510
511 i40e_fill_default_direct_cmd_desc(&desc,
512 i40e_aqc_opc_set_link_restart_an);
513
514 cmd->command = I40E_AQ_PHY_RESTART_AN;
515
516 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
517
518 return status;
519 }
520
521 /**
522 * i40e_aq_get_link_info
523 * @hw: pointer to the hw struct
524 * @enable_lse: enable/disable LinkStatusEvent reporting
525 * @link: pointer to link status structure - optional
526 * @cmd_details: pointer to command details structure or NULL
527 *
528 * Returns the link status of the adapter.
529 **/
530 i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
531 bool enable_lse, struct i40e_link_status *link,
532 struct i40e_asq_cmd_details *cmd_details)
533 {
534 struct i40e_aq_desc desc;
535 struct i40e_aqc_get_link_status *resp =
536 (struct i40e_aqc_get_link_status *)&desc.params.raw;
537 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
538 i40e_status status;
539 u16 command_flags;
540
541 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
542
543 if (enable_lse)
544 command_flags = I40E_AQ_LSE_ENABLE;
545 else
546 command_flags = I40E_AQ_LSE_DISABLE;
547 resp->command_flags = cpu_to_le16(command_flags);
548
549 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
550
551 if (status)
552 goto aq_get_link_info_exit;
553
554 /* save off old link status information */
555 memcpy(&hw->phy.link_info_old, hw_link_info,
556 sizeof(struct i40e_link_status));
557
558 /* update link status */
559 hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
560 hw->phy.media_type = i40e_get_media_type(hw);
561 hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
562 hw_link_info->link_info = resp->link_info;
563 hw_link_info->an_info = resp->an_info;
564 hw_link_info->ext_info = resp->ext_info;
565
566 if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
567 hw_link_info->lse_enable = true;
568 else
569 hw_link_info->lse_enable = false;
570
571 /* save link status information */
572 if (link)
573 *link = *hw_link_info;
574
575 /* flag cleared so helper functions don't call AQ again */
576 hw->phy.get_link_info = false;
577
578 aq_get_link_info_exit:
579 return status;
580 }
581
582 /**
583 * i40e_aq_add_vsi
584 * @hw: pointer to the hw struct
585 * @vsi: pointer to a vsi context struct
586 * @cmd_details: pointer to command details structure or NULL
587 *
588 * Add a VSI context to the hardware.
589 **/
590 i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
591 struct i40e_vsi_context *vsi_ctx,
592 struct i40e_asq_cmd_details *cmd_details)
593 {
594 struct i40e_aq_desc desc;
595 struct i40e_aqc_add_get_update_vsi *cmd =
596 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
597 struct i40e_aqc_add_get_update_vsi_completion *resp =
598 (struct i40e_aqc_add_get_update_vsi_completion *)
599 &desc.params.raw;
600 i40e_status status;
601
602 i40e_fill_default_direct_cmd_desc(&desc,
603 i40e_aqc_opc_add_vsi);
604
605 cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
606 cmd->connection_type = vsi_ctx->connection_type;
607 cmd->vf_id = vsi_ctx->vf_num;
608 cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
609
610 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
611 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
612 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
613
614 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
615 sizeof(vsi_ctx->info), cmd_details);
616
617 if (status)
618 goto aq_add_vsi_exit;
619
620 vsi_ctx->seid = le16_to_cpu(resp->seid);
621 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
622 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
623 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
624
625 aq_add_vsi_exit:
626 return status;
627 }
628
629 /**
630 * i40e_aq_set_vsi_unicast_promiscuous
631 * @hw: pointer to the hw struct
632 * @seid: vsi number
633 * @set: set unicast promiscuous enable/disable
634 * @cmd_details: pointer to command details structure or NULL
635 **/
636 i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
637 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
638 {
639 struct i40e_aq_desc desc;
640 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
641 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
642 i40e_status status;
643 u16 flags = 0;
644
645 i40e_fill_default_direct_cmd_desc(&desc,
646 i40e_aqc_opc_set_vsi_promiscuous_modes);
647
648 if (set)
649 flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
650
651 cmd->promiscuous_flags = cpu_to_le16(flags);
652
653 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
654
655 cmd->seid = cpu_to_le16(seid);
656 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
657
658 return status;
659 }
660
661 /**
662 * i40e_aq_set_vsi_multicast_promiscuous
663 * @hw: pointer to the hw struct
664 * @seid: vsi number
665 * @set: set multicast promiscuous enable/disable
666 * @cmd_details: pointer to command details structure or NULL
667 **/
668 i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
669 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
670 {
671 struct i40e_aq_desc desc;
672 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
673 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
674 i40e_status status;
675 u16 flags = 0;
676
677 i40e_fill_default_direct_cmd_desc(&desc,
678 i40e_aqc_opc_set_vsi_promiscuous_modes);
679
680 if (set)
681 flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
682
683 cmd->promiscuous_flags = cpu_to_le16(flags);
684
685 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
686
687 cmd->seid = cpu_to_le16(seid);
688 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
689
690 return status;
691 }
692
693 /**
694 * i40e_aq_set_vsi_broadcast
695 * @hw: pointer to the hw struct
696 * @seid: vsi number
697 * @set_filter: true to set filter, false to clear filter
698 * @cmd_details: pointer to command details structure or NULL
699 *
700 * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
701 **/
702 i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
703 u16 seid, bool set_filter,
704 struct i40e_asq_cmd_details *cmd_details)
705 {
706 struct i40e_aq_desc desc;
707 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
708 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
709 i40e_status status;
710
711 i40e_fill_default_direct_cmd_desc(&desc,
712 i40e_aqc_opc_set_vsi_promiscuous_modes);
713
714 if (set_filter)
715 cmd->promiscuous_flags
716 |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
717 else
718 cmd->promiscuous_flags
719 &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);
720
721 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
722 cmd->seid = cpu_to_le16(seid);
723 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
724
725 return status;
726 }
727
728 /**
729 * i40e_get_vsi_params - get VSI configuration info
730 * @hw: pointer to the hw struct
731 * @vsi: pointer to a vsi context struct
732 * @cmd_details: pointer to command details structure or NULL
733 **/
734 i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
735 struct i40e_vsi_context *vsi_ctx,
736 struct i40e_asq_cmd_details *cmd_details)
737 {
738 struct i40e_aq_desc desc;
739 struct i40e_aqc_switch_seid *cmd =
740 (struct i40e_aqc_switch_seid *)&desc.params.raw;
741 struct i40e_aqc_add_get_update_vsi_completion *resp =
742 (struct i40e_aqc_add_get_update_vsi_completion *)
743 &desc.params.raw;
744 i40e_status status;
745
746 i40e_fill_default_direct_cmd_desc(&desc,
747 i40e_aqc_opc_get_vsi_parameters);
748
749 cmd->seid = cpu_to_le16(vsi_ctx->seid);
750
751 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
752 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
753 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
754
755 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
756 sizeof(vsi_ctx->info), NULL);
757
758 if (status)
759 goto aq_get_vsi_params_exit;
760
761 vsi_ctx->seid = le16_to_cpu(resp->seid);
762 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
763 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
764 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
765
766 aq_get_vsi_params_exit:
767 return status;
768 }
769
770 /**
771 * i40e_aq_update_vsi_params
772 * @hw: pointer to the hw struct
773 * @vsi: pointer to a vsi context struct
774 * @cmd_details: pointer to command details structure or NULL
775 *
776 * Update a VSI context.
777 **/
778 i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
779 struct i40e_vsi_context *vsi_ctx,
780 struct i40e_asq_cmd_details *cmd_details)
781 {
782 struct i40e_aq_desc desc;
783 struct i40e_aqc_switch_seid *cmd =
784 (struct i40e_aqc_switch_seid *)&desc.params.raw;
785 i40e_status status;
786
787 i40e_fill_default_direct_cmd_desc(&desc,
788 i40e_aqc_opc_update_vsi_parameters);
789 cmd->seid = cpu_to_le16(vsi_ctx->seid);
790
791 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
792 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
793 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
794
795 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
796 sizeof(vsi_ctx->info), cmd_details);
797
798 return status;
799 }
800
801 /**
802 * i40e_aq_get_switch_config
803 * @hw: pointer to the hardware structure
804 * @buf: pointer to the result buffer
805 * @buf_size: length of input buffer
806 * @start_seid: seid to start for the report, 0 == beginning
807 * @cmd_details: pointer to command details structure or NULL
808 *
809 * Fill the buf with switch configuration returned from AdminQ command
810 **/
811 i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
812 struct i40e_aqc_get_switch_config_resp *buf,
813 u16 buf_size, u16 *start_seid,
814 struct i40e_asq_cmd_details *cmd_details)
815 {
816 struct i40e_aq_desc desc;
817 struct i40e_aqc_switch_seid *scfg =
818 (struct i40e_aqc_switch_seid *)&desc.params.raw;
819 i40e_status status;
820
821 i40e_fill_default_direct_cmd_desc(&desc,
822 i40e_aqc_opc_get_switch_config);
823 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
824 if (buf_size > I40E_AQ_LARGE_BUF)
825 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
826 scfg->seid = cpu_to_le16(*start_seid);
827
828 status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
829 *start_seid = le16_to_cpu(scfg->seid);
830
831 return status;
832 }
833
834 /**
835 * i40e_aq_get_firmware_version
836 * @hw: pointer to the hw struct
837 * @fw_major_version: firmware major version
838 * @fw_minor_version: firmware minor version
839 * @api_major_version: major queue version
840 * @api_minor_version: minor queue version
841 * @cmd_details: pointer to command details structure or NULL
842 *
843 * Get the firmware version from the admin queue commands
844 **/
845 i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
846 u16 *fw_major_version, u16 *fw_minor_version,
847 u16 *api_major_version, u16 *api_minor_version,
848 struct i40e_asq_cmd_details *cmd_details)
849 {
850 struct i40e_aq_desc desc;
851 struct i40e_aqc_get_version *resp =
852 (struct i40e_aqc_get_version *)&desc.params.raw;
853 i40e_status status;
854
855 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);
856
857 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
858
859 if (!status) {
860 if (fw_major_version != NULL)
861 *fw_major_version = le16_to_cpu(resp->fw_major);
862 if (fw_minor_version != NULL)
863 *fw_minor_version = le16_to_cpu(resp->fw_minor);
864 if (api_major_version != NULL)
865 *api_major_version = le16_to_cpu(resp->api_major);
866 if (api_minor_version != NULL)
867 *api_minor_version = le16_to_cpu(resp->api_minor);
868 }
869
870 return status;
871 }
872
873 /**
874 * i40e_aq_send_driver_version
875 * @hw: pointer to the hw struct
876 * @event: driver event: driver ok, start or stop
877 * @dv: driver's major, minor version
878 * @cmd_details: pointer to command details structure or NULL
879 *
880 * Send the driver version to the firmware
881 **/
882 i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
883 struct i40e_driver_version *dv,
884 struct i40e_asq_cmd_details *cmd_details)
885 {
886 struct i40e_aq_desc desc;
887 struct i40e_aqc_driver_version *cmd =
888 (struct i40e_aqc_driver_version *)&desc.params.raw;
889 i40e_status status;
890
891 if (dv == NULL)
892 return I40E_ERR_PARAM;
893
894 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
895
896 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI);
897 cmd->driver_major_ver = dv->major_version;
898 cmd->driver_minor_ver = dv->minor_version;
899 cmd->driver_build_ver = dv->build_version;
900 cmd->driver_subbuild_ver = dv->subbuild_version;
901 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
902
903 return status;
904 }
905
906 /**
907 * i40e_get_link_status - get status of the HW network link
908 * @hw: pointer to the hw struct
909 *
910 * Returns true if link is up, false if link is down.
911 *
912 * Side effect: LinkStatusEvent reporting becomes enabled
913 **/
914 bool i40e_get_link_status(struct i40e_hw *hw)
915 {
916 i40e_status status = 0;
917 bool link_status = false;
918
919 if (hw->phy.get_link_info) {
920 status = i40e_aq_get_link_info(hw, true, NULL, NULL);
921
922 if (status)
923 goto i40e_get_link_status_exit;
924 }
925
926 link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
927
928 i40e_get_link_status_exit:
929 return link_status;
930 }
931
932 /**
933 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
934 * @hw: pointer to the hw struct
935 * @uplink_seid: the MAC or other gizmo SEID
936 * @downlink_seid: the VSI SEID
937 * @enabled_tc: bitmap of TCs to be enabled
938 * @default_port: true for default port VSI, false for control port
939 * @enable_l2_filtering: true to add L2 filter table rules to regular forwarding rules for cloud support
940 * @veb_seid: pointer to where to put the resulting VEB SEID
941 * @cmd_details: pointer to command details structure or NULL
942 *
943 * This asks the FW to add a VEB between the uplink and downlink
944 * elements. If the uplink SEID is 0, this will be a floating VEB.
945 **/
946 i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
947 u16 downlink_seid, u8 enabled_tc,
948 bool default_port, bool enable_l2_filtering,
949 u16 *veb_seid,
950 struct i40e_asq_cmd_details *cmd_details)
951 {
952 struct i40e_aq_desc desc;
953 struct i40e_aqc_add_veb *cmd =
954 (struct i40e_aqc_add_veb *)&desc.params.raw;
955 struct i40e_aqc_add_veb_completion *resp =
956 (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
957 i40e_status status;
958 u16 veb_flags = 0;
959
960 /* SEIDs need to either both be set or both be 0 for floating VEB */
961 if (!!uplink_seid != !!downlink_seid)
962 return I40E_ERR_PARAM;
963
964 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
965
966 cmd->uplink_seid = cpu_to_le16(uplink_seid);
967 cmd->downlink_seid = cpu_to_le16(downlink_seid);
968 cmd->enable_tcs = enabled_tc;
969 if (!uplink_seid)
970 veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
971 if (default_port)
972 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
973 else
974 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;
975
976 if (enable_l2_filtering)
977 veb_flags |= I40E_AQC_ADD_VEB_ENABLE_L2_FILTER;
978
979 cmd->veb_flags = cpu_to_le16(veb_flags);
980
981 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
982
983 if (!status && veb_seid)
984 *veb_seid = le16_to_cpu(resp->veb_seid);
985
986 return status;
987 }
988
989 /**
990 * i40e_aq_get_veb_parameters - Retrieve VEB parameters
991 * @hw: pointer to the hw struct
992 * @veb_seid: the SEID of the VEB to query
993 * @switch_id: the uplink switch id
994 * @floating_veb: set to true if the VEB is floating
995 * @statistic_index: index of the stats counter block for this VEB
996 * @vebs_used: number of VEB's used by function
997 * @vebs_unallocated: total VEB's not reserved by any function
998 * @cmd_details: pointer to command details structure or NULL
999 *
1000 * This retrieves the parameters for a particular VEB, specified by
1001 * uplink_seid, and returns them to the caller.
1002 **/
1003 i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
1004 u16 veb_seid, u16 *switch_id,
1005 bool *floating, u16 *statistic_index,
1006 u16 *vebs_used, u16 *vebs_free,
1007 struct i40e_asq_cmd_details *cmd_details)
1008 {
1009 struct i40e_aq_desc desc;
1010 struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
1011 (struct i40e_aqc_get_veb_parameters_completion *)
1012 &desc.params.raw;
1013 i40e_status status;
1014
1015 if (veb_seid == 0)
1016 return I40E_ERR_PARAM;
1017
1018 i40e_fill_default_direct_cmd_desc(&desc,
1019 i40e_aqc_opc_get_veb_parameters);
1020 cmd_resp->seid = cpu_to_le16(veb_seid);
1021
1022 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1023 if (status)
1024 goto get_veb_exit;
1025
1026 if (switch_id)
1027 *switch_id = le16_to_cpu(cmd_resp->switch_id);
1028 if (statistic_index)
1029 *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
1030 if (vebs_used)
1031 *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
1032 if (vebs_free)
1033 *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
1034 if (floating) {
1035 u16 flags = le16_to_cpu(cmd_resp->veb_flags);
1036 if (flags & I40E_AQC_ADD_VEB_FLOATING)
1037 *floating = true;
1038 else
1039 *floating = false;
1040 }
1041
1042 get_veb_exit:
1043 return status;
1044 }
1045
1046 /**
1047 * i40e_aq_add_macvlan
1048 * @hw: pointer to the hw struct
1049 * @seid: VSI for the mac address
1050 * @mv_list: list of macvlans to be added
1051 * @count: length of the list
1052 * @cmd_details: pointer to command details structure or NULL
1053 *
1054 * Add MAC/VLAN addresses to the HW filtering
1055 **/
1056 i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
1057 struct i40e_aqc_add_macvlan_element_data *mv_list,
1058 u16 count, struct i40e_asq_cmd_details *cmd_details)
1059 {
1060 struct i40e_aq_desc desc;
1061 struct i40e_aqc_macvlan *cmd =
1062 (struct i40e_aqc_macvlan *)&desc.params.raw;
1063 i40e_status status;
1064 u16 buf_size;
1065
1066 if (count == 0 || !mv_list || !hw)
1067 return I40E_ERR_PARAM;
1068
1069 buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data);
1070
1071 /* prep the rest of the request */
1072 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
1073 cmd->num_addresses = cpu_to_le16(count);
1074 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1075 cmd->seid[1] = 0;
1076 cmd->seid[2] = 0;
1077
1078 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1079 if (buf_size > I40E_AQ_LARGE_BUF)
1080 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1081
1082 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1083 cmd_details);
1084
1085 return status;
1086 }
1087
1088 /**
1089 * i40e_aq_remove_macvlan
1090 * @hw: pointer to the hw struct
1091 * @seid: VSI for the mac address
1092 * @mv_list: list of macvlans to be removed
1093 * @count: length of the list
1094 * @cmd_details: pointer to command details structure or NULL
1095 *
1096 * Remove MAC/VLAN addresses from the HW filtering
1097 **/
1098 i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
1099 struct i40e_aqc_remove_macvlan_element_data *mv_list,
1100 u16 count, struct i40e_asq_cmd_details *cmd_details)
1101 {
1102 struct i40e_aq_desc desc;
1103 struct i40e_aqc_macvlan *cmd =
1104 (struct i40e_aqc_macvlan *)&desc.params.raw;
1105 i40e_status status;
1106 u16 buf_size;
1107
1108 if (count == 0 || !mv_list || !hw)
1109 return I40E_ERR_PARAM;
1110
1111 buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data);
1112
1113 /* prep the rest of the request */
1114 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
1115 cmd->num_addresses = cpu_to_le16(count);
1116 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1117 cmd->seid[1] = 0;
1118 cmd->seid[2] = 0;
1119
1120 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1121 if (buf_size > I40E_AQ_LARGE_BUF)
1122 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1123
1124 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1125 cmd_details);
1126
1127 return status;
1128 }
1129
1130 /**
1131 * i40e_aq_add_vlan - Add VLAN ids to the HW filtering
1132 * @hw: pointer to the hw struct
1133 * @seid: VSI for the vlan filters
1134 * @v_list: list of vlan filters to be added
1135 * @count: length of the list
1136 * @cmd_details: pointer to command details structure or NULL
1137 **/
1138 i40e_status i40e_aq_add_vlan(struct i40e_hw *hw, u16 seid,
1139 struct i40e_aqc_add_remove_vlan_element_data *v_list,
1140 u8 count, struct i40e_asq_cmd_details *cmd_details)
1141 {
1142 struct i40e_aq_desc desc;
1143 struct i40e_aqc_macvlan *cmd =
1144 (struct i40e_aqc_macvlan *)&desc.params.raw;
1145 i40e_status status;
1146 u16 buf_size;
1147
1148 if (count == 0 || !v_list || !hw)
1149 return I40E_ERR_PARAM;
1150
1151 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data);
1152
1153 /* prep the rest of the request */
1154 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_vlan);
1155 cmd->num_addresses = cpu_to_le16(count);
1156 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID);
1157 cmd->seid[1] = 0;
1158 cmd->seid[2] = 0;
1159
1160 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1161 if (buf_size > I40E_AQ_LARGE_BUF)
1162 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1163
1164 status = i40e_asq_send_command(hw, &desc, v_list, buf_size,
1165 cmd_details);
1166
1167 return status;
1168 }
1169
1170 /**
1171 * i40e_aq_remove_vlan - Remove VLANs from the HW filtering
1172 * @hw: pointer to the hw struct
1173 * @seid: VSI for the vlan filters
1174 * @v_list: list of macvlans to be removed
1175 * @count: length of the list
1176 * @cmd_details: pointer to command details structure or NULL
1177 **/
1178 i40e_status i40e_aq_remove_vlan(struct i40e_hw *hw, u16 seid,
1179 struct i40e_aqc_add_remove_vlan_element_data *v_list,
1180 u8 count, struct i40e_asq_cmd_details *cmd_details)
1181 {
1182 struct i40e_aq_desc desc;
1183 struct i40e_aqc_macvlan *cmd =
1184 (struct i40e_aqc_macvlan *)&desc.params.raw;
1185 i40e_status status;
1186 u16 buf_size;
1187
1188 if (count == 0 || !v_list || !hw)
1189 return I40E_ERR_PARAM;
1190
1191 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data);
1192
1193 /* prep the rest of the request */
1194 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_vlan);
1195 cmd->num_addresses = cpu_to_le16(count);
1196 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID);
1197 cmd->seid[1] = 0;
1198 cmd->seid[2] = 0;
1199
1200 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1201 if (buf_size > I40E_AQ_LARGE_BUF)
1202 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1203
1204 status = i40e_asq_send_command(hw, &desc, v_list, buf_size,
1205 cmd_details);
1206
1207 return status;
1208 }
1209
1210 /**
1211 * i40e_aq_send_msg_to_vf
1212 * @hw: pointer to the hardware structure
1213 * @vfid: vf id to send msg
1214 * @msg: pointer to the msg buffer
1215 * @msglen: msg length
1216 * @cmd_details: pointer to command details
1217 *
1218 * send msg to vf
1219 **/
1220 i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
1221 u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
1222 struct i40e_asq_cmd_details *cmd_details)
1223 {
1224 struct i40e_aq_desc desc;
1225 struct i40e_aqc_pf_vf_message *cmd =
1226 (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
1227 i40e_status status;
1228
1229 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
1230 cmd->id = cpu_to_le32(vfid);
1231 desc.cookie_high = cpu_to_le32(v_opcode);
1232 desc.cookie_low = cpu_to_le32(v_retval);
1233 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1234 if (msglen) {
1235 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
1236 I40E_AQ_FLAG_RD));
1237 if (msglen > I40E_AQ_LARGE_BUF)
1238 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1239 desc.datalen = cpu_to_le16(msglen);
1240 }
1241 status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1242
1243 return status;
1244 }
1245
1246 /**
1247 * i40e_aq_set_hmc_resource_profile
1248 * @hw: pointer to the hw struct
1249 * @profile: type of profile the HMC is to be set as
1250 * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1251 * @cmd_details: pointer to command details structure or NULL
1252 *
1253 * set the HMC profile of the device.
1254 **/
1255 i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
1256 enum i40e_aq_hmc_profile profile,
1257 u8 pe_vf_enabled_count,
1258 struct i40e_asq_cmd_details *cmd_details)
1259 {
1260 struct i40e_aq_desc desc;
1261 struct i40e_aq_get_set_hmc_resource_profile *cmd =
1262 (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
1263 i40e_status status;
1264
1265 i40e_fill_default_direct_cmd_desc(&desc,
1266 i40e_aqc_opc_set_hmc_resource_profile);
1267
1268 cmd->pm_profile = (u8)profile;
1269 cmd->pe_vf_enabled = pe_vf_enabled_count;
1270
1271 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1272
1273 return status;
1274 }
1275
1276 /**
1277 * i40e_aq_request_resource
1278 * @hw: pointer to the hw struct
1279 * @resource: resource id
1280 * @access: access type
1281 * @sdp_number: resource number
1282 * @timeout: the maximum time in ms that the driver may hold the resource
1283 * @cmd_details: pointer to command details structure or NULL
1284 *
1285 * requests common resource using the admin queue commands
1286 **/
1287 i40e_status i40e_aq_request_resource(struct i40e_hw *hw,
1288 enum i40e_aq_resources_ids resource,
1289 enum i40e_aq_resource_access_type access,
1290 u8 sdp_number, u64 *timeout,
1291 struct i40e_asq_cmd_details *cmd_details)
1292 {
1293 struct i40e_aq_desc desc;
1294 struct i40e_aqc_request_resource *cmd_resp =
1295 (struct i40e_aqc_request_resource *)&desc.params.raw;
1296 i40e_status status;
1297
1298 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource);
1299
1300 cmd_resp->resource_id = cpu_to_le16(resource);
1301 cmd_resp->access_type = cpu_to_le16(access);
1302 cmd_resp->resource_number = cpu_to_le32(sdp_number);
1303
1304 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1305 /* The completion specifies the maximum time in ms that the driver
1306 * may hold the resource in the Timeout field.
1307 * If the resource is held by someone else, the command completes with
1308 * busy return value and the timeout field indicates the maximum time
1309 * the current owner of the resource has to free it.
1310 */
1311 if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)
1312 *timeout = le32_to_cpu(cmd_resp->timeout);
1313
1314 return status;
1315 }
1316
1317 /**
1318 * i40e_aq_release_resource
1319 * @hw: pointer to the hw struct
1320 * @resource: resource id
1321 * @sdp_number: resource number
1322 * @cmd_details: pointer to command details structure or NULL
1323 *
1324 * release common resource using the admin queue commands
1325 **/
1326 i40e_status i40e_aq_release_resource(struct i40e_hw *hw,
1327 enum i40e_aq_resources_ids resource,
1328 u8 sdp_number,
1329 struct i40e_asq_cmd_details *cmd_details)
1330 {
1331 struct i40e_aq_desc desc;
1332 struct i40e_aqc_request_resource *cmd =
1333 (struct i40e_aqc_request_resource *)&desc.params.raw;
1334 i40e_status status;
1335
1336 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource);
1337
1338 cmd->resource_id = cpu_to_le16(resource);
1339 cmd->resource_number = cpu_to_le32(sdp_number);
1340
1341 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1342
1343 return status;
1344 }
1345
1346 /**
1347 * i40e_aq_read_nvm
1348 * @hw: pointer to the hw struct
1349 * @module_pointer: module pointer location in words from the NVM beginning
1350 * @offset: byte offset from the module beginning
1351 * @length: length of the section to be read (in bytes from the offset)
1352 * @data: command buffer (size [bytes] = length)
1353 * @last_command: tells if this is the last command in a series
1354 * @cmd_details: pointer to command details structure or NULL
1355 *
1356 * Read the NVM using the admin queue commands
1357 **/
1358 i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
1359 u32 offset, u16 length, void *data,
1360 bool last_command,
1361 struct i40e_asq_cmd_details *cmd_details)
1362 {
1363 struct i40e_aq_desc desc;
1364 struct i40e_aqc_nvm_update *cmd =
1365 (struct i40e_aqc_nvm_update *)&desc.params.raw;
1366 i40e_status status;
1367
1368 /* In offset the highest byte must be zeroed. */
1369 if (offset & 0xFF000000) {
1370 status = I40E_ERR_PARAM;
1371 goto i40e_aq_read_nvm_exit;
1372 }
1373
1374 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read);
1375
1376 /* If this is the last command in a series, set the proper flag. */
1377 if (last_command)
1378 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
1379 cmd->module_pointer = module_pointer;
1380 cmd->offset = cpu_to_le32(offset);
1381 cmd->length = cpu_to_le16(length);
1382
1383 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1384 if (length > I40E_AQ_LARGE_BUF)
1385 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1386
1387 status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);
1388
1389 i40e_aq_read_nvm_exit:
1390 return status;
1391 }
1392
1393 #define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
1394 #define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
1395 #define I40E_DEV_FUNC_CAP_NPAR 0x03
1396 #define I40E_DEV_FUNC_CAP_OS2BMC 0x04
1397 #define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
1398 #define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
1399 #define I40E_DEV_FUNC_CAP_VF 0x13
1400 #define I40E_DEV_FUNC_CAP_VMDQ 0x14
1401 #define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
1402 #define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
1403 #define I40E_DEV_FUNC_CAP_VSI 0x17
1404 #define I40E_DEV_FUNC_CAP_DCB 0x18
1405 #define I40E_DEV_FUNC_CAP_FCOE 0x21
1406 #define I40E_DEV_FUNC_CAP_RSS 0x40
1407 #define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
1408 #define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
1409 #define I40E_DEV_FUNC_CAP_MSIX 0x43
1410 #define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
1411 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1412 #define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
1413 #define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1
1414 #define I40E_DEV_FUNC_CAP_CEM 0xF2
1415 #define I40E_DEV_FUNC_CAP_IWARP 0x51
1416 #define I40E_DEV_FUNC_CAP_LED 0x61
1417 #define I40E_DEV_FUNC_CAP_SDP 0x62
1418 #define I40E_DEV_FUNC_CAP_MDIO 0x63
1419
1420 /**
1421 * i40e_parse_discover_capabilities
1422 * @hw: pointer to the hw struct
1423 * @buff: pointer to a buffer containing device/function capability records
1424 * @cap_count: number of capability records in the list
1425 * @list_type_opc: type of capabilities list to parse
1426 *
1427 * Parse the device/function capabilities list.
1428 **/
1429 static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
1430 u32 cap_count,
1431 enum i40e_admin_queue_opc list_type_opc)
1432 {
1433 struct i40e_aqc_list_capabilities_element_resp *cap;
1434 u32 number, logical_id, phys_id;
1435 struct i40e_hw_capabilities *p;
1436 u32 reg_val;
1437 u32 i = 0;
1438 u16 id;
1439
1440 cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
1441
1442 if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
1443 p = (struct i40e_hw_capabilities *)&hw->dev_caps;
1444 else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
1445 p = (struct i40e_hw_capabilities *)&hw->func_caps;
1446 else
1447 return;
1448
1449 for (i = 0; i < cap_count; i++, cap++) {
1450 id = le16_to_cpu(cap->id);
1451 number = le32_to_cpu(cap->number);
1452 logical_id = le32_to_cpu(cap->logical_id);
1453 phys_id = le32_to_cpu(cap->phys_id);
1454
1455 switch (id) {
1456 case I40E_DEV_FUNC_CAP_SWITCH_MODE:
1457 p->switch_mode = number;
1458 break;
1459 case I40E_DEV_FUNC_CAP_MGMT_MODE:
1460 p->management_mode = number;
1461 break;
1462 case I40E_DEV_FUNC_CAP_NPAR:
1463 p->npar_enable = number;
1464 break;
1465 case I40E_DEV_FUNC_CAP_OS2BMC:
1466 p->os2bmc = number;
1467 break;
1468 case I40E_DEV_FUNC_CAP_VALID_FUNC:
1469 p->valid_functions = number;
1470 break;
1471 case I40E_DEV_FUNC_CAP_SRIOV_1_1:
1472 if (number == 1)
1473 p->sr_iov_1_1 = true;
1474 break;
1475 case I40E_DEV_FUNC_CAP_VF:
1476 p->num_vfs = number;
1477 p->vf_base_id = logical_id;
1478 break;
1479 case I40E_DEV_FUNC_CAP_VMDQ:
1480 if (number == 1)
1481 p->vmdq = true;
1482 break;
1483 case I40E_DEV_FUNC_CAP_802_1_QBG:
1484 if (number == 1)
1485 p->evb_802_1_qbg = true;
1486 break;
1487 case I40E_DEV_FUNC_CAP_802_1_QBH:
1488 if (number == 1)
1489 p->evb_802_1_qbh = true;
1490 break;
1491 case I40E_DEV_FUNC_CAP_VSI:
1492 p->num_vsis = number;
1493 break;
1494 case I40E_DEV_FUNC_CAP_DCB:
1495 if (number == 1) {
1496 p->dcb = true;
1497 p->enabled_tcmap = logical_id;
1498 p->maxtc = phys_id;
1499 }
1500 break;
1501 case I40E_DEV_FUNC_CAP_FCOE:
1502 if (number == 1)
1503 p->fcoe = true;
1504 break;
1505 case I40E_DEV_FUNC_CAP_RSS:
1506 p->rss = true;
1507 reg_val = rd32(hw, I40E_PFQF_CTL_0);
1508 if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
1509 p->rss_table_size = number;
1510 else
1511 p->rss_table_size = 128;
1512 p->rss_table_entry_width = logical_id;
1513 break;
1514 case I40E_DEV_FUNC_CAP_RX_QUEUES:
1515 p->num_rx_qp = number;
1516 p->base_queue = phys_id;
1517 break;
1518 case I40E_DEV_FUNC_CAP_TX_QUEUES:
1519 p->num_tx_qp = number;
1520 p->base_queue = phys_id;
1521 break;
1522 case I40E_DEV_FUNC_CAP_MSIX:
1523 p->num_msix_vectors = number;
1524 break;
1525 case I40E_DEV_FUNC_CAP_MSIX_VF:
1526 p->num_msix_vectors_vf = number;
1527 break;
1528 case I40E_DEV_FUNC_CAP_MFP_MODE_1:
1529 if (number == 1)
1530 p->mfp_mode_1 = true;
1531 break;
1532 case I40E_DEV_FUNC_CAP_CEM:
1533 if (number == 1)
1534 p->mgmt_cem = true;
1535 break;
1536 case I40E_DEV_FUNC_CAP_IWARP:
1537 if (number == 1)
1538 p->iwarp = true;
1539 break;
1540 case I40E_DEV_FUNC_CAP_LED:
1541 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1542 p->led[phys_id] = true;
1543 break;
1544 case I40E_DEV_FUNC_CAP_SDP:
1545 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1546 p->sdp[phys_id] = true;
1547 break;
1548 case I40E_DEV_FUNC_CAP_MDIO:
1549 if (number == 1) {
1550 p->mdio_port_num = phys_id;
1551 p->mdio_port_mode = logical_id;
1552 }
1553 break;
1554 case I40E_DEV_FUNC_CAP_IEEE_1588:
1555 if (number == 1)
1556 p->ieee_1588 = true;
1557 break;
1558 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:
1559 p->fd = true;
1560 p->fd_filters_guaranteed = number;
1561 p->fd_filters_best_effort = logical_id;
1562 break;
1563 default:
1564 break;
1565 }
1566 }
1567
1568 /* additional HW specific goodies that might
1569 * someday be HW version specific
1570 */
1571 p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
1572 }
1573
1574 /**
1575 * i40e_aq_discover_capabilities
1576 * @hw: pointer to the hw struct
1577 * @buff: a virtual buffer to hold the capabilities
1578 * @buff_size: Size of the virtual buffer
1579 * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1580 * @list_type_opc: capabilities type to discover - pass in the command opcode
1581 * @cmd_details: pointer to command details structure or NULL
1582 *
1583 * Get the device capabilities descriptions from the firmware
1584 **/
1585 i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
1586 void *buff, u16 buff_size, u16 *data_size,
1587 enum i40e_admin_queue_opc list_type_opc,
1588 struct i40e_asq_cmd_details *cmd_details)
1589 {
1590 struct i40e_aqc_list_capabilites *cmd;
1591 i40e_status status = 0;
1592 struct i40e_aq_desc desc;
1593
1594 cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
1595
1596 if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&
1597 list_type_opc != i40e_aqc_opc_list_dev_capabilities) {
1598 status = I40E_ERR_PARAM;
1599 goto exit;
1600 }
1601
1602 i40e_fill_default_direct_cmd_desc(&desc, list_type_opc);
1603
1604 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1605 if (buff_size > I40E_AQ_LARGE_BUF)
1606 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1607
1608 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1609 *data_size = le16_to_cpu(desc.datalen);
1610
1611 if (status)
1612 goto exit;
1613
1614 i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count),
1615 list_type_opc);
1616
1617 exit:
1618 return status;
1619 }
1620
1621 /**
1622 * i40e_aq_get_lldp_mib
1623 * @hw: pointer to the hw struct
1624 * @bridge_type: type of bridge requested
1625 * @mib_type: Local, Remote or both Local and Remote MIBs
1626 * @buff: pointer to a user supplied buffer to store the MIB block
1627 * @buff_size: size of the buffer (in bytes)
1628 * @local_len : length of the returned Local LLDP MIB
1629 * @remote_len: length of the returned Remote LLDP MIB
1630 * @cmd_details: pointer to command details structure or NULL
1631 *
1632 * Requests the complete LLDP MIB (entire packet).
1633 **/
1634 i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
1635 u8 mib_type, void *buff, u16 buff_size,
1636 u16 *local_len, u16 *remote_len,
1637 struct i40e_asq_cmd_details *cmd_details)
1638 {
1639 struct i40e_aq_desc desc;
1640 struct i40e_aqc_lldp_get_mib *cmd =
1641 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1642 struct i40e_aqc_lldp_get_mib *resp =
1643 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1644 i40e_status status;
1645
1646 if (buff_size == 0 || !buff)
1647 return I40E_ERR_PARAM;
1648
1649 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);
1650 /* Indirect Command */
1651 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1652
1653 cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK;
1654 cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) &
1655 I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
1656
1657 desc.datalen = cpu_to_le16(buff_size);
1658
1659 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1660 if (buff_size > I40E_AQ_LARGE_BUF)
1661 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1662
1663 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1664 if (!status) {
1665 if (local_len != NULL)
1666 *local_len = le16_to_cpu(resp->local_len);
1667 if (remote_len != NULL)
1668 *remote_len = le16_to_cpu(resp->remote_len);
1669 }
1670
1671 return status;
1672 }
1673
1674 /**
1675 * i40e_aq_cfg_lldp_mib_change_event
1676 * @hw: pointer to the hw struct
1677 * @enable_update: Enable or Disable event posting
1678 * @cmd_details: pointer to command details structure or NULL
1679 *
1680 * Enable or Disable posting of an event on ARQ when LLDP MIB
1681 * associated with the interface changes
1682 **/
1683 i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
1684 bool enable_update,
1685 struct i40e_asq_cmd_details *cmd_details)
1686 {
1687 struct i40e_aq_desc desc;
1688 struct i40e_aqc_lldp_update_mib *cmd =
1689 (struct i40e_aqc_lldp_update_mib *)&desc.params.raw;
1690 i40e_status status;
1691
1692 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib);
1693
1694 if (!enable_update)
1695 cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;
1696
1697 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1698
1699 return status;
1700 }
1701
1702 /**
1703 * i40e_aq_stop_lldp
1704 * @hw: pointer to the hw struct
1705 * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1706 * @cmd_details: pointer to command details structure or NULL
1707 *
1708 * Stop or Shutdown the embedded LLDP Agent
1709 **/
1710 i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
1711 struct i40e_asq_cmd_details *cmd_details)
1712 {
1713 struct i40e_aq_desc desc;
1714 struct i40e_aqc_lldp_stop *cmd =
1715 (struct i40e_aqc_lldp_stop *)&desc.params.raw;
1716 i40e_status status;
1717
1718 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop);
1719
1720 if (shutdown_agent)
1721 cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;
1722
1723 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1724
1725 return status;
1726 }
1727
1728 /**
1729 * i40e_aq_start_lldp
1730 * @hw: pointer to the hw struct
1731 * @cmd_details: pointer to command details structure or NULL
1732 *
1733 * Start the embedded LLDP Agent on all ports.
1734 **/
1735 i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
1736 struct i40e_asq_cmd_details *cmd_details)
1737 {
1738 struct i40e_aq_desc desc;
1739 struct i40e_aqc_lldp_start *cmd =
1740 (struct i40e_aqc_lldp_start *)&desc.params.raw;
1741 i40e_status status;
1742
1743 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start);
1744
1745 cmd->command = I40E_AQ_LLDP_AGENT_START;
1746
1747 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1748
1749 return status;
1750 }
1751
1752 /**
1753 * i40e_aq_delete_element - Delete switch element
1754 * @hw: pointer to the hw struct
1755 * @seid: the SEID to delete from the switch
1756 * @cmd_details: pointer to command details structure or NULL
1757 *
1758 * This deletes a switch element from the switch.
1759 **/
1760 i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
1761 struct i40e_asq_cmd_details *cmd_details)
1762 {
1763 struct i40e_aq_desc desc;
1764 struct i40e_aqc_switch_seid *cmd =
1765 (struct i40e_aqc_switch_seid *)&desc.params.raw;
1766 i40e_status status;
1767
1768 if (seid == 0)
1769 return I40E_ERR_PARAM;
1770
1771 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
1772
1773 cmd->seid = cpu_to_le16(seid);
1774
1775 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1776
1777 return status;
1778 }
1779
1780 /**
1781 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1782 * @hw: pointer to the hw struct
1783 * @seid: seid for the physical port/switching component/vsi
1784 * @buff: Indirect buffer to hold data parameters and response
1785 * @buff_size: Indirect buffer size
1786 * @opcode: Tx scheduler AQ command opcode
1787 * @cmd_details: pointer to command details structure or NULL
1788 *
1789 * Generic command handler for Tx scheduler AQ commands
1790 **/
1791 static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
1792 void *buff, u16 buff_size,
1793 enum i40e_admin_queue_opc opcode,
1794 struct i40e_asq_cmd_details *cmd_details)
1795 {
1796 struct i40e_aq_desc desc;
1797 struct i40e_aqc_tx_sched_ind *cmd =
1798 (struct i40e_aqc_tx_sched_ind *)&desc.params.raw;
1799 i40e_status status;
1800 bool cmd_param_flag = false;
1801
1802 switch (opcode) {
1803 case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit:
1804 case i40e_aqc_opc_configure_vsi_tc_bw:
1805 case i40e_aqc_opc_enable_switching_comp_ets:
1806 case i40e_aqc_opc_modify_switching_comp_ets:
1807 case i40e_aqc_opc_disable_switching_comp_ets:
1808 case i40e_aqc_opc_configure_switching_comp_ets_bw_limit:
1809 case i40e_aqc_opc_configure_switching_comp_bw_config:
1810 cmd_param_flag = true;
1811 break;
1812 case i40e_aqc_opc_query_vsi_bw_config:
1813 case i40e_aqc_opc_query_vsi_ets_sla_config:
1814 case i40e_aqc_opc_query_switching_comp_ets_config:
1815 case i40e_aqc_opc_query_port_ets_config:
1816 case i40e_aqc_opc_query_switching_comp_bw_config:
1817 cmd_param_flag = false;
1818 break;
1819 default:
1820 return I40E_ERR_PARAM;
1821 }
1822
1823 i40e_fill_default_direct_cmd_desc(&desc, opcode);
1824
1825 /* Indirect command */
1826 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1827 if (cmd_param_flag)
1828 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
1829 if (buff_size > I40E_AQ_LARGE_BUF)
1830 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1831
1832 desc.datalen = cpu_to_le16(buff_size);
1833
1834 cmd->vsi_seid = cpu_to_le16(seid);
1835
1836 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1837
1838 return status;
1839 }
1840
1841 /**
1842 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1843 * @hw: pointer to the hw struct
1844 * @seid: VSI seid
1845 * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1846 * @cmd_details: pointer to command details structure or NULL
1847 **/
1848 i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,
1849 u16 seid,
1850 struct i40e_aqc_configure_vsi_tc_bw_data *bw_data,
1851 struct i40e_asq_cmd_details *cmd_details)
1852 {
1853 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1854 i40e_aqc_opc_configure_vsi_tc_bw,
1855 cmd_details);
1856 }
1857
1858 /**
1859 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1860 * @hw: pointer to the hw struct
1861 * @seid: seid of the VSI
1862 * @bw_data: Buffer to hold VSI BW configuration
1863 * @cmd_details: pointer to command details structure or NULL
1864 **/
1865 i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,
1866 u16 seid,
1867 struct i40e_aqc_query_vsi_bw_config_resp *bw_data,
1868 struct i40e_asq_cmd_details *cmd_details)
1869 {
1870 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1871 i40e_aqc_opc_query_vsi_bw_config,
1872 cmd_details);
1873 }
1874
1875 /**
1876 * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1877 * @hw: pointer to the hw struct
1878 * @seid: seid of the VSI
1879 * @bw_data: Buffer to hold VSI BW configuration per TC
1880 * @cmd_details: pointer to command details structure or NULL
1881 **/
1882 i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,
1883 u16 seid,
1884 struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data,
1885 struct i40e_asq_cmd_details *cmd_details)
1886 {
1887 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1888 i40e_aqc_opc_query_vsi_ets_sla_config,
1889 cmd_details);
1890 }
1891
1892 /**
1893 * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1894 * @hw: pointer to the hw struct
1895 * @seid: seid of the switching component
1896 * @bw_data: Buffer to hold switching component's per TC BW config
1897 * @cmd_details: pointer to command details structure or NULL
1898 **/
1899 i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,
1900 u16 seid,
1901 struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data,
1902 struct i40e_asq_cmd_details *cmd_details)
1903 {
1904 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1905 i40e_aqc_opc_query_switching_comp_ets_config,
1906 cmd_details);
1907 }
1908
1909 /**
1910 * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1911 * @hw: pointer to the hw struct
1912 * @seid: seid of the VSI or switching component connected to Physical Port
1913 * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1914 * @cmd_details: pointer to command details structure or NULL
1915 **/
1916 i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw,
1917 u16 seid,
1918 struct i40e_aqc_query_port_ets_config_resp *bw_data,
1919 struct i40e_asq_cmd_details *cmd_details)
1920 {
1921 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1922 i40e_aqc_opc_query_port_ets_config,
1923 cmd_details);
1924 }
1925
1926 /**
1927 * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
1928 * @hw: pointer to the hw struct
1929 * @seid: seid of the switching component
1930 * @bw_data: Buffer to hold switching component's BW configuration
1931 * @cmd_details: pointer to command details structure or NULL
1932 **/
1933 i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,
1934 u16 seid,
1935 struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data,
1936 struct i40e_asq_cmd_details *cmd_details)
1937 {
1938 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1939 i40e_aqc_opc_query_switching_comp_bw_config,
1940 cmd_details);
1941 }
1942
1943 /**
1944 * i40e_validate_filter_settings
1945 * @hw: pointer to the hardware structure
1946 * @settings: Filter control settings
1947 *
1948 * Check and validate the filter control settings passed.
1949 * The function checks for the valid filter/context sizes being
1950 * passed for FCoE and PE.
1951 *
1952 * Returns 0 if the values passed are valid and within
1953 * range else returns an error.
1954 **/
1955 static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
1956 struct i40e_filter_control_settings *settings)
1957 {
1958 u32 fcoe_cntx_size, fcoe_filt_size;
1959 u32 pe_cntx_size, pe_filt_size;
1960 u32 fcoe_fmax, pe_fmax;
1961 u32 val;
1962
1963 /* Validate FCoE settings passed */
1964 switch (settings->fcoe_filt_num) {
1965 case I40E_HASH_FILTER_SIZE_1K:
1966 case I40E_HASH_FILTER_SIZE_2K:
1967 case I40E_HASH_FILTER_SIZE_4K:
1968 case I40E_HASH_FILTER_SIZE_8K:
1969 case I40E_HASH_FILTER_SIZE_16K:
1970 case I40E_HASH_FILTER_SIZE_32K:
1971 fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1972 fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
1973 break;
1974 default:
1975 return I40E_ERR_PARAM;
1976 }
1977
1978 switch (settings->fcoe_cntx_num) {
1979 case I40E_DMA_CNTX_SIZE_512:
1980 case I40E_DMA_CNTX_SIZE_1K:
1981 case I40E_DMA_CNTX_SIZE_2K:
1982 case I40E_DMA_CNTX_SIZE_4K:
1983 fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
1984 fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
1985 break;
1986 default:
1987 return I40E_ERR_PARAM;
1988 }
1989
1990 /* Validate PE settings passed */
1991 switch (settings->pe_filt_num) {
1992 case I40E_HASH_FILTER_SIZE_1K:
1993 case I40E_HASH_FILTER_SIZE_2K:
1994 case I40E_HASH_FILTER_SIZE_4K:
1995 case I40E_HASH_FILTER_SIZE_8K:
1996 case I40E_HASH_FILTER_SIZE_16K:
1997 case I40E_HASH_FILTER_SIZE_32K:
1998 case I40E_HASH_FILTER_SIZE_64K:
1999 case I40E_HASH_FILTER_SIZE_128K:
2000 case I40E_HASH_FILTER_SIZE_256K:
2001 case I40E_HASH_FILTER_SIZE_512K:
2002 case I40E_HASH_FILTER_SIZE_1M:
2003 pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
2004 pe_filt_size <<= (u32)settings->pe_filt_num;
2005 break;
2006 default:
2007 return I40E_ERR_PARAM;
2008 }
2009
2010 switch (settings->pe_cntx_num) {
2011 case I40E_DMA_CNTX_SIZE_512:
2012 case I40E_DMA_CNTX_SIZE_1K:
2013 case I40E_DMA_CNTX_SIZE_2K:
2014 case I40E_DMA_CNTX_SIZE_4K:
2015 case I40E_DMA_CNTX_SIZE_8K:
2016 case I40E_DMA_CNTX_SIZE_16K:
2017 case I40E_DMA_CNTX_SIZE_32K:
2018 case I40E_DMA_CNTX_SIZE_64K:
2019 case I40E_DMA_CNTX_SIZE_128K:
2020 case I40E_DMA_CNTX_SIZE_256K:
2021 pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
2022 pe_cntx_size <<= (u32)settings->pe_cntx_num;
2023 break;
2024 default:
2025 return I40E_ERR_PARAM;
2026 }
2027
2028 /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
2029 val = rd32(hw, I40E_GLHMC_FCOEFMAX);
2030 fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
2031 >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;
2032 if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax)
2033 return I40E_ERR_INVALID_SIZE;
2034
2035 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
2036 val = rd32(hw, I40E_GLHMC_PEXFMAX);
2037 pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
2038 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
2039 if (pe_filt_size + pe_cntx_size > pe_fmax)
2040 return I40E_ERR_INVALID_SIZE;
2041
2042 return 0;
2043 }
2044
2045 /**
2046 * i40e_set_filter_control
2047 * @hw: pointer to the hardware structure
2048 * @settings: Filter control settings
2049 *
2050 * Set the Queue Filters for PE/FCoE and enable filters required
2051 * for a single PF. It is expected that these settings are programmed
2052 * at the driver initialization time.
2053 **/
2054 i40e_status i40e_set_filter_control(struct i40e_hw *hw,
2055 struct i40e_filter_control_settings *settings)
2056 {
2057 i40e_status ret = 0;
2058 u32 hash_lut_size = 0;
2059 u32 val;
2060
2061 if (!settings)
2062 return I40E_ERR_PARAM;
2063
2064 /* Validate the input settings */
2065 ret = i40e_validate_filter_settings(hw, settings);
2066 if (ret)
2067 return ret;
2068
2069 /* Read the PF Queue Filter control register */
2070 val = rd32(hw, I40E_PFQF_CTL_0);
2071
2072 /* Program required PE hash buckets for the PF */
2073 val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
2074 val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
2075 I40E_PFQF_CTL_0_PEHSIZE_MASK;
2076 /* Program required PE contexts for the PF */
2077 val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
2078 val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
2079 I40E_PFQF_CTL_0_PEDSIZE_MASK;
2080
2081 /* Program required FCoE hash buckets for the PF */
2082 val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2083 val |= ((u32)settings->fcoe_filt_num <<
2084 I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) &
2085 I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2086 /* Program required FCoE DDP contexts for the PF */
2087 val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2088 val |= ((u32)settings->fcoe_cntx_num <<
2089 I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) &
2090 I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2091
2092 /* Program Hash LUT size for the PF */
2093 val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2094 if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
2095 hash_lut_size = 1;
2096 val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
2097 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2098
2099 /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2100 if (settings->enable_fdir)
2101 val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
2102 if (settings->enable_ethtype)
2103 val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
2104 if (settings->enable_macvlan)
2105 val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
2106
2107 wr32(hw, I40E_PFQF_CTL_0, val);
2108
2109 return 0;
2110 }
Linux kernel - Deliverables
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