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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jesse/openvswitch
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_common.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28 #include "i40e_type.h"
29 #include "i40e_adminq.h"
30 #include "i40e_prototype.h"
31 #include "i40e_virtchnl.h"
32
33 /**
34 * i40e_set_mac_type - Sets MAC type
35 * @hw: pointer to the HW structure
36 *
37 * This function sets the mac type of the adapter based on the
38 * vendor ID and device ID stored in the hw structure.
39 **/
40 static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
41 {
42 i40e_status status = 0;
43
44 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
45 switch (hw->device_id) {
46 case I40E_SFP_XL710_DEVICE_ID:
47 case I40E_SFP_X710_DEVICE_ID:
48 case I40E_QEMU_DEVICE_ID:
49 case I40E_KX_A_DEVICE_ID:
50 case I40E_KX_B_DEVICE_ID:
51 case I40E_KX_C_DEVICE_ID:
52 case I40E_KX_D_DEVICE_ID:
53 case I40E_QSFP_A_DEVICE_ID:
54 case I40E_QSFP_B_DEVICE_ID:
55 case I40E_QSFP_C_DEVICE_ID:
56 hw->mac.type = I40E_MAC_XL710;
57 break;
58 case I40E_VF_DEVICE_ID:
59 case I40E_VF_HV_DEVICE_ID:
60 hw->mac.type = I40E_MAC_VF;
61 break;
62 default:
63 hw->mac.type = I40E_MAC_GENERIC;
64 break;
65 }
66 } else {
67 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
68 }
69
70 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
71 hw->mac.type, status);
72 return status;
73 }
74
75 /**
76 * i40e_debug_aq
77 * @hw: debug mask related to admin queue
78 * @cap: pointer to adminq command descriptor
79 * @buffer: pointer to command buffer
80 *
81 * Dumps debug log about adminq command with descriptor contents.
82 **/
83 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
84 void *buffer)
85 {
86 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
87 u8 *aq_buffer = (u8 *)buffer;
88 u32 data[4];
89 u32 i = 0;
90
91 if ((!(mask & hw->debug_mask)) || (desc == NULL))
92 return;
93
94 i40e_debug(hw, mask,
95 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
96 aq_desc->opcode, aq_desc->flags, aq_desc->datalen,
97 aq_desc->retval);
98 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
99 aq_desc->cookie_high, aq_desc->cookie_low);
100 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
101 aq_desc->params.internal.param0,
102 aq_desc->params.internal.param1);
103 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
104 aq_desc->params.external.addr_high,
105 aq_desc->params.external.addr_low);
106
107 if ((buffer != NULL) && (aq_desc->datalen != 0)) {
108 memset(data, 0, sizeof(data));
109 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
110 for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) {
111 data[((i % 16) / 4)] |=
112 ((u32)aq_buffer[i]) << (8 * (i % 4));
113 if ((i % 16) == 15) {
114 i40e_debug(hw, mask,
115 "\t0x%04X %08X %08X %08X %08X\n",
116 i - 15, data[0], data[1], data[2],
117 data[3]);
118 memset(data, 0, sizeof(data));
119 }
120 }
121 if ((i % 16) != 0)
122 i40e_debug(hw, mask, "\t0x%04X %08X %08X %08X %08X\n",
123 i - (i % 16), data[0], data[1], data[2],
124 data[3]);
125 }
126 }
127
128 /**
129 * i40e_check_asq_alive
130 * @hw: pointer to the hw struct
131 *
132 * Returns true if Queue is enabled else false.
133 **/
134 bool i40e_check_asq_alive(struct i40e_hw *hw)
135 {
136 return !!(rd32(hw, hw->aq.asq.len) & I40E_PF_ATQLEN_ATQENABLE_MASK);
137 }
138
139 /**
140 * i40e_aq_queue_shutdown
141 * @hw: pointer to the hw struct
142 * @unloading: is the driver unloading itself
143 *
144 * Tell the Firmware that we're shutting down the AdminQ and whether
145 * or not the driver is unloading as well.
146 **/
147 i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
148 bool unloading)
149 {
150 struct i40e_aq_desc desc;
151 struct i40e_aqc_queue_shutdown *cmd =
152 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
153 i40e_status status;
154
155 i40e_fill_default_direct_cmd_desc(&desc,
156 i40e_aqc_opc_queue_shutdown);
157
158 if (unloading)
159 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
160 status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
161
162 return status;
163 }
164
165
166 /**
167 * i40e_init_shared_code - Initialize the shared code
168 * @hw: pointer to hardware structure
169 *
170 * This assigns the MAC type and PHY code and inits the NVM.
171 * Does not touch the hardware. This function must be called prior to any
172 * other function in the shared code. The i40e_hw structure should be
173 * memset to 0 prior to calling this function. The following fields in
174 * hw structure should be filled in prior to calling this function:
175 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
176 * subsystem_vendor_id, and revision_id
177 **/
178 i40e_status i40e_init_shared_code(struct i40e_hw *hw)
179 {
180 i40e_status status = 0;
181 u32 reg;
182
183 hw->phy.get_link_info = true;
184
185 /* Determine port number */
186 reg = rd32(hw, I40E_PFGEN_PORTNUM);
187 reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >>
188 I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT);
189 hw->port = (u8)reg;
190
191 i40e_set_mac_type(hw);
192
193 switch (hw->mac.type) {
194 case I40E_MAC_XL710:
195 break;
196 default:
197 return I40E_ERR_DEVICE_NOT_SUPPORTED;
198 break;
199 }
200
201 status = i40e_init_nvm(hw);
202 return status;
203 }
204
205 /**
206 * i40e_aq_mac_address_read - Retrieve the MAC addresses
207 * @hw: pointer to the hw struct
208 * @flags: a return indicator of what addresses were added to the addr store
209 * @addrs: the requestor's mac addr store
210 * @cmd_details: pointer to command details structure or NULL
211 **/
212 static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
213 u16 *flags,
214 struct i40e_aqc_mac_address_read_data *addrs,
215 struct i40e_asq_cmd_details *cmd_details)
216 {
217 struct i40e_aq_desc desc;
218 struct i40e_aqc_mac_address_read *cmd_data =
219 (struct i40e_aqc_mac_address_read *)&desc.params.raw;
220 i40e_status status;
221
222 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
223 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);
224
225 status = i40e_asq_send_command(hw, &desc, addrs,
226 sizeof(*addrs), cmd_details);
227 *flags = le16_to_cpu(cmd_data->command_flags);
228
229 return status;
230 }
231
232 /**
233 * i40e_aq_mac_address_write - Change the MAC addresses
234 * @hw: pointer to the hw struct
235 * @flags: indicates which MAC to be written
236 * @mac_addr: address to write
237 * @cmd_details: pointer to command details structure or NULL
238 **/
239 i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
240 u16 flags, u8 *mac_addr,
241 struct i40e_asq_cmd_details *cmd_details)
242 {
243 struct i40e_aq_desc desc;
244 struct i40e_aqc_mac_address_write *cmd_data =
245 (struct i40e_aqc_mac_address_write *)&desc.params.raw;
246 i40e_status status;
247
248 i40e_fill_default_direct_cmd_desc(&desc,
249 i40e_aqc_opc_mac_address_write);
250 cmd_data->command_flags = cpu_to_le16(flags);
251 memcpy(&cmd_data->mac_sal, &mac_addr[0], 4);
252 memcpy(&cmd_data->mac_sah, &mac_addr[4], 2);
253
254 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
255
256 return status;
257 }
258
259 /**
260 * i40e_get_mac_addr - get MAC address
261 * @hw: pointer to the HW structure
262 * @mac_addr: pointer to MAC address
263 *
264 * Reads the adapter's MAC address from register
265 **/
266 i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
267 {
268 struct i40e_aqc_mac_address_read_data addrs;
269 i40e_status status;
270 u16 flags = 0;
271
272 status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
273
274 if (flags & I40E_AQC_LAN_ADDR_VALID)
275 memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
276
277 return status;
278 }
279
280 /**
281 * i40e_get_media_type - Gets media type
282 * @hw: pointer to the hardware structure
283 **/
284 static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
285 {
286 enum i40e_media_type media;
287
288 switch (hw->phy.link_info.phy_type) {
289 case I40E_PHY_TYPE_10GBASE_SR:
290 case I40E_PHY_TYPE_10GBASE_LR:
291 case I40E_PHY_TYPE_40GBASE_SR4:
292 case I40E_PHY_TYPE_40GBASE_LR4:
293 media = I40E_MEDIA_TYPE_FIBER;
294 break;
295 case I40E_PHY_TYPE_100BASE_TX:
296 case I40E_PHY_TYPE_1000BASE_T:
297 case I40E_PHY_TYPE_10GBASE_T:
298 media = I40E_MEDIA_TYPE_BASET;
299 break;
300 case I40E_PHY_TYPE_10GBASE_CR1_CU:
301 case I40E_PHY_TYPE_40GBASE_CR4_CU:
302 case I40E_PHY_TYPE_10GBASE_CR1:
303 case I40E_PHY_TYPE_40GBASE_CR4:
304 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
305 media = I40E_MEDIA_TYPE_DA;
306 break;
307 case I40E_PHY_TYPE_1000BASE_KX:
308 case I40E_PHY_TYPE_10GBASE_KX4:
309 case I40E_PHY_TYPE_10GBASE_KR:
310 case I40E_PHY_TYPE_40GBASE_KR4:
311 media = I40E_MEDIA_TYPE_BACKPLANE;
312 break;
313 case I40E_PHY_TYPE_SGMII:
314 case I40E_PHY_TYPE_XAUI:
315 case I40E_PHY_TYPE_XFI:
316 case I40E_PHY_TYPE_XLAUI:
317 case I40E_PHY_TYPE_XLPPI:
318 default:
319 media = I40E_MEDIA_TYPE_UNKNOWN;
320 break;
321 }
322
323 return media;
324 }
325
326 #define I40E_PF_RESET_WAIT_COUNT_A0 200
327 #define I40E_PF_RESET_WAIT_COUNT 10
328 /**
329 * i40e_pf_reset - Reset the PF
330 * @hw: pointer to the hardware structure
331 *
332 * Assuming someone else has triggered a global reset,
333 * assure the global reset is complete and then reset the PF
334 **/
335 i40e_status i40e_pf_reset(struct i40e_hw *hw)
336 {
337 u32 cnt = 0;
338 u32 reg = 0;
339 u32 grst_del;
340
341 /* Poll for Global Reset steady state in case of recent GRST.
342 * The grst delay value is in 100ms units, and we'll wait a
343 * couple counts longer to be sure we don't just miss the end.
344 */
345 grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
346 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
347 for (cnt = 0; cnt < grst_del + 2; cnt++) {
348 reg = rd32(hw, I40E_GLGEN_RSTAT);
349 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
350 break;
351 msleep(100);
352 }
353 if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
354 hw_dbg(hw, "Global reset polling failed to complete.\n");
355 return I40E_ERR_RESET_FAILED;
356 }
357
358 /* Determine the PF number based on the PCI fn */
359 reg = rd32(hw, I40E_GLPCI_CAPSUP);
360 if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK)
361 hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func);
362 else
363 hw->pf_id = (u8)hw->bus.func;
364
365 /* If there was a Global Reset in progress when we got here,
366 * we don't need to do the PF Reset
367 */
368 if (!cnt) {
369 if (hw->revision_id == 0)
370 cnt = I40E_PF_RESET_WAIT_COUNT_A0;
371 else
372 cnt = I40E_PF_RESET_WAIT_COUNT;
373 reg = rd32(hw, I40E_PFGEN_CTRL);
374 wr32(hw, I40E_PFGEN_CTRL,
375 (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
376 for (; cnt; cnt--) {
377 reg = rd32(hw, I40E_PFGEN_CTRL);
378 if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
379 break;
380 usleep_range(1000, 2000);
381 }
382 if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
383 hw_dbg(hw, "PF reset polling failed to complete.\n");
384 return I40E_ERR_RESET_FAILED;
385 }
386 }
387
388 i40e_clear_pxe_mode(hw);
389 return 0;
390 }
391
392 /**
393 * i40e_clear_pxe_mode - clear pxe operations mode
394 * @hw: pointer to the hw struct
395 *
396 * Make sure all PXE mode settings are cleared, including things
397 * like descriptor fetch/write-back mode.
398 **/
399 void i40e_clear_pxe_mode(struct i40e_hw *hw)
400 {
401 u32 reg;
402
403 /* Clear single descriptor fetch/write-back mode */
404 reg = rd32(hw, I40E_GLLAN_RCTL_0);
405
406 if (hw->revision_id == 0) {
407 /* As a work around clear PXE_MODE instead of setting it */
408 wr32(hw, I40E_GLLAN_RCTL_0, (reg & (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK)));
409 } else {
410 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
411 }
412 }
413
414 /**
415 * i40e_led_is_mine - helper to find matching led
416 * @hw: pointer to the hw struct
417 * @idx: index into GPIO registers
418 *
419 * returns: 0 if no match, otherwise the value of the GPIO_CTL register
420 */
421 static u32 i40e_led_is_mine(struct i40e_hw *hw, int idx)
422 {
423 u32 gpio_val = 0;
424 u32 port;
425
426 if (!hw->func_caps.led[idx])
427 return 0;
428
429 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(idx));
430 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK) >>
431 I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
432
433 /* if PRT_NUM_NA is 1 then this LED is not port specific, OR
434 * if it is not our port then ignore
435 */
436 if ((gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_NA_MASK) ||
437 (port != hw->port))
438 return 0;
439
440 return gpio_val;
441 }
442
443 #define I40E_LED0 22
444 #define I40E_LINK_ACTIVITY 0xC
445
446 /**
447 * i40e_led_get - return current on/off mode
448 * @hw: pointer to the hw struct
449 *
450 * The value returned is the 'mode' field as defined in the
451 * GPIO register definitions: 0x0 = off, 0xf = on, and other
452 * values are variations of possible behaviors relating to
453 * blink, link, and wire.
454 **/
455 u32 i40e_led_get(struct i40e_hw *hw)
456 {
457 u32 mode = 0;
458 int i;
459
460 /* as per the documentation GPIO 22-29 are the LED
461 * GPIO pins named LED0..LED7
462 */
463 for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
464 u32 gpio_val = i40e_led_is_mine(hw, i);
465
466 if (!gpio_val)
467 continue;
468
469 mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >>
470 I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT;
471 break;
472 }
473
474 return mode;
475 }
476
477 /**
478 * i40e_led_set - set new on/off mode
479 * @hw: pointer to the hw struct
480 * @mode: 0=off, 0xf=on (else see manual for mode details)
481 * @blink: true if the LED should blink when on, false if steady
482 *
483 * if this function is used to turn on the blink it should
484 * be used to disable the blink when restoring the original state.
485 **/
486 void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
487 {
488 int i;
489
490 if (mode & 0xfffffff0)
491 hw_dbg(hw, "invalid mode passed in %X\n", mode);
492
493 /* as per the documentation GPIO 22-29 are the LED
494 * GPIO pins named LED0..LED7
495 */
496 for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
497 u32 gpio_val = i40e_led_is_mine(hw, i);
498
499 if (!gpio_val)
500 continue;
501
502 gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
503 /* this & is a bit of paranoia, but serves as a range check */
504 gpio_val |= ((mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
505 I40E_GLGEN_GPIO_CTL_LED_MODE_MASK);
506
507 if (mode == I40E_LINK_ACTIVITY)
508 blink = false;
509
510 gpio_val |= (blink ? 1 : 0) <<
511 I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT;
512
513 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
514 break;
515 }
516 }
517
518 /* Admin command wrappers */
519
520 /**
521 * i40e_aq_set_link_restart_an
522 * @hw: pointer to the hw struct
523 * @cmd_details: pointer to command details structure or NULL
524 *
525 * Sets up the link and restarts the Auto-Negotiation over the link.
526 **/
527 i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
528 struct i40e_asq_cmd_details *cmd_details)
529 {
530 struct i40e_aq_desc desc;
531 struct i40e_aqc_set_link_restart_an *cmd =
532 (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
533 i40e_status status;
534
535 i40e_fill_default_direct_cmd_desc(&desc,
536 i40e_aqc_opc_set_link_restart_an);
537
538 cmd->command = I40E_AQ_PHY_RESTART_AN;
539
540 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
541
542 return status;
543 }
544
545 /**
546 * i40e_aq_get_link_info
547 * @hw: pointer to the hw struct
548 * @enable_lse: enable/disable LinkStatusEvent reporting
549 * @link: pointer to link status structure - optional
550 * @cmd_details: pointer to command details structure or NULL
551 *
552 * Returns the link status of the adapter.
553 **/
554 i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
555 bool enable_lse, struct i40e_link_status *link,
556 struct i40e_asq_cmd_details *cmd_details)
557 {
558 struct i40e_aq_desc desc;
559 struct i40e_aqc_get_link_status *resp =
560 (struct i40e_aqc_get_link_status *)&desc.params.raw;
561 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
562 i40e_status status;
563 u16 command_flags;
564
565 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
566
567 if (enable_lse)
568 command_flags = I40E_AQ_LSE_ENABLE;
569 else
570 command_flags = I40E_AQ_LSE_DISABLE;
571 resp->command_flags = cpu_to_le16(command_flags);
572
573 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
574
575 if (status)
576 goto aq_get_link_info_exit;
577
578 /* save off old link status information */
579 memcpy(&hw->phy.link_info_old, hw_link_info,
580 sizeof(struct i40e_link_status));
581
582 /* update link status */
583 hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
584 hw->phy.media_type = i40e_get_media_type(hw);
585 hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
586 hw_link_info->link_info = resp->link_info;
587 hw_link_info->an_info = resp->an_info;
588 hw_link_info->ext_info = resp->ext_info;
589 hw_link_info->loopback = resp->loopback;
590
591 if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
592 hw_link_info->lse_enable = true;
593 else
594 hw_link_info->lse_enable = false;
595
596 /* save link status information */
597 if (link)
598 *link = *hw_link_info;
599
600 /* flag cleared so helper functions don't call AQ again */
601 hw->phy.get_link_info = false;
602
603 aq_get_link_info_exit:
604 return status;
605 }
606
607 /**
608 * i40e_aq_add_vsi
609 * @hw: pointer to the hw struct
610 * @vsi: pointer to a vsi context struct
611 * @cmd_details: pointer to command details structure or NULL
612 *
613 * Add a VSI context to the hardware.
614 **/
615 i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
616 struct i40e_vsi_context *vsi_ctx,
617 struct i40e_asq_cmd_details *cmd_details)
618 {
619 struct i40e_aq_desc desc;
620 struct i40e_aqc_add_get_update_vsi *cmd =
621 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
622 struct i40e_aqc_add_get_update_vsi_completion *resp =
623 (struct i40e_aqc_add_get_update_vsi_completion *)
624 &desc.params.raw;
625 i40e_status status;
626
627 i40e_fill_default_direct_cmd_desc(&desc,
628 i40e_aqc_opc_add_vsi);
629
630 cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
631 cmd->connection_type = vsi_ctx->connection_type;
632 cmd->vf_id = vsi_ctx->vf_num;
633 cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
634
635 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
636 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
637 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
638
639 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
640 sizeof(vsi_ctx->info), cmd_details);
641
642 if (status)
643 goto aq_add_vsi_exit;
644
645 vsi_ctx->seid = le16_to_cpu(resp->seid);
646 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
647 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
648 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
649
650 aq_add_vsi_exit:
651 return status;
652 }
653
654 /**
655 * i40e_aq_set_vsi_unicast_promiscuous
656 * @hw: pointer to the hw struct
657 * @seid: vsi number
658 * @set: set unicast promiscuous enable/disable
659 * @cmd_details: pointer to command details structure or NULL
660 **/
661 i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
662 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
663 {
664 struct i40e_aq_desc desc;
665 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
666 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
667 i40e_status status;
668 u16 flags = 0;
669
670 i40e_fill_default_direct_cmd_desc(&desc,
671 i40e_aqc_opc_set_vsi_promiscuous_modes);
672
673 if (set)
674 flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
675
676 cmd->promiscuous_flags = cpu_to_le16(flags);
677
678 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
679
680 cmd->seid = cpu_to_le16(seid);
681 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
682
683 return status;
684 }
685
686 /**
687 * i40e_aq_set_vsi_multicast_promiscuous
688 * @hw: pointer to the hw struct
689 * @seid: vsi number
690 * @set: set multicast promiscuous enable/disable
691 * @cmd_details: pointer to command details structure or NULL
692 **/
693 i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
694 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
695 {
696 struct i40e_aq_desc desc;
697 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
698 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
699 i40e_status status;
700 u16 flags = 0;
701
702 i40e_fill_default_direct_cmd_desc(&desc,
703 i40e_aqc_opc_set_vsi_promiscuous_modes);
704
705 if (set)
706 flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
707
708 cmd->promiscuous_flags = cpu_to_le16(flags);
709
710 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
711
712 cmd->seid = cpu_to_le16(seid);
713 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
714
715 return status;
716 }
717
718 /**
719 * i40e_aq_set_vsi_broadcast
720 * @hw: pointer to the hw struct
721 * @seid: vsi number
722 * @set_filter: true to set filter, false to clear filter
723 * @cmd_details: pointer to command details structure or NULL
724 *
725 * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
726 **/
727 i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
728 u16 seid, bool set_filter,
729 struct i40e_asq_cmd_details *cmd_details)
730 {
731 struct i40e_aq_desc desc;
732 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
733 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
734 i40e_status status;
735
736 i40e_fill_default_direct_cmd_desc(&desc,
737 i40e_aqc_opc_set_vsi_promiscuous_modes);
738
739 if (set_filter)
740 cmd->promiscuous_flags
741 |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
742 else
743 cmd->promiscuous_flags
744 &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);
745
746 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
747 cmd->seid = cpu_to_le16(seid);
748 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
749
750 return status;
751 }
752
753 /**
754 * i40e_get_vsi_params - get VSI configuration info
755 * @hw: pointer to the hw struct
756 * @vsi: pointer to a vsi context struct
757 * @cmd_details: pointer to command details structure or NULL
758 **/
759 i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
760 struct i40e_vsi_context *vsi_ctx,
761 struct i40e_asq_cmd_details *cmd_details)
762 {
763 struct i40e_aq_desc desc;
764 struct i40e_aqc_add_get_update_vsi *cmd =
765 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
766 struct i40e_aqc_add_get_update_vsi_completion *resp =
767 (struct i40e_aqc_add_get_update_vsi_completion *)
768 &desc.params.raw;
769 i40e_status status;
770
771 i40e_fill_default_direct_cmd_desc(&desc,
772 i40e_aqc_opc_get_vsi_parameters);
773
774 cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
775
776 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
777 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
778 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
779
780 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
781 sizeof(vsi_ctx->info), NULL);
782
783 if (status)
784 goto aq_get_vsi_params_exit;
785
786 vsi_ctx->seid = le16_to_cpu(resp->seid);
787 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
788 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
789 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
790
791 aq_get_vsi_params_exit:
792 return status;
793 }
794
795 /**
796 * i40e_aq_update_vsi_params
797 * @hw: pointer to the hw struct
798 * @vsi: pointer to a vsi context struct
799 * @cmd_details: pointer to command details structure or NULL
800 *
801 * Update a VSI context.
802 **/
803 i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
804 struct i40e_vsi_context *vsi_ctx,
805 struct i40e_asq_cmd_details *cmd_details)
806 {
807 struct i40e_aq_desc desc;
808 struct i40e_aqc_add_get_update_vsi *cmd =
809 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
810 i40e_status status;
811
812 i40e_fill_default_direct_cmd_desc(&desc,
813 i40e_aqc_opc_update_vsi_parameters);
814 cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
815
816 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
817 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
818 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
819
820 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
821 sizeof(vsi_ctx->info), cmd_details);
822
823 return status;
824 }
825
826 /**
827 * i40e_aq_get_switch_config
828 * @hw: pointer to the hardware structure
829 * @buf: pointer to the result buffer
830 * @buf_size: length of input buffer
831 * @start_seid: seid to start for the report, 0 == beginning
832 * @cmd_details: pointer to command details structure or NULL
833 *
834 * Fill the buf with switch configuration returned from AdminQ command
835 **/
836 i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
837 struct i40e_aqc_get_switch_config_resp *buf,
838 u16 buf_size, u16 *start_seid,
839 struct i40e_asq_cmd_details *cmd_details)
840 {
841 struct i40e_aq_desc desc;
842 struct i40e_aqc_switch_seid *scfg =
843 (struct i40e_aqc_switch_seid *)&desc.params.raw;
844 i40e_status status;
845
846 i40e_fill_default_direct_cmd_desc(&desc,
847 i40e_aqc_opc_get_switch_config);
848 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
849 if (buf_size > I40E_AQ_LARGE_BUF)
850 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
851 scfg->seid = cpu_to_le16(*start_seid);
852
853 status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
854 *start_seid = le16_to_cpu(scfg->seid);
855
856 return status;
857 }
858
859 /**
860 * i40e_aq_get_firmware_version
861 * @hw: pointer to the hw struct
862 * @fw_major_version: firmware major version
863 * @fw_minor_version: firmware minor version
864 * @api_major_version: major queue version
865 * @api_minor_version: minor queue version
866 * @cmd_details: pointer to command details structure or NULL
867 *
868 * Get the firmware version from the admin queue commands
869 **/
870 i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
871 u16 *fw_major_version, u16 *fw_minor_version,
872 u16 *api_major_version, u16 *api_minor_version,
873 struct i40e_asq_cmd_details *cmd_details)
874 {
875 struct i40e_aq_desc desc;
876 struct i40e_aqc_get_version *resp =
877 (struct i40e_aqc_get_version *)&desc.params.raw;
878 i40e_status status;
879
880 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);
881
882 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
883
884 if (!status) {
885 if (fw_major_version != NULL)
886 *fw_major_version = le16_to_cpu(resp->fw_major);
887 if (fw_minor_version != NULL)
888 *fw_minor_version = le16_to_cpu(resp->fw_minor);
889 if (api_major_version != NULL)
890 *api_major_version = le16_to_cpu(resp->api_major);
891 if (api_minor_version != NULL)
892 *api_minor_version = le16_to_cpu(resp->api_minor);
893 }
894
895 return status;
896 }
897
898 /**
899 * i40e_aq_send_driver_version
900 * @hw: pointer to the hw struct
901 * @event: driver event: driver ok, start or stop
902 * @dv: driver's major, minor version
903 * @cmd_details: pointer to command details structure or NULL
904 *
905 * Send the driver version to the firmware
906 **/
907 i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
908 struct i40e_driver_version *dv,
909 struct i40e_asq_cmd_details *cmd_details)
910 {
911 struct i40e_aq_desc desc;
912 struct i40e_aqc_driver_version *cmd =
913 (struct i40e_aqc_driver_version *)&desc.params.raw;
914 i40e_status status;
915
916 if (dv == NULL)
917 return I40E_ERR_PARAM;
918
919 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
920
921 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI);
922 cmd->driver_major_ver = dv->major_version;
923 cmd->driver_minor_ver = dv->minor_version;
924 cmd->driver_build_ver = dv->build_version;
925 cmd->driver_subbuild_ver = dv->subbuild_version;
926 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
927
928 return status;
929 }
930
931 /**
932 * i40e_get_link_status - get status of the HW network link
933 * @hw: pointer to the hw struct
934 *
935 * Returns true if link is up, false if link is down.
936 *
937 * Side effect: LinkStatusEvent reporting becomes enabled
938 **/
939 bool i40e_get_link_status(struct i40e_hw *hw)
940 {
941 i40e_status status = 0;
942 bool link_status = false;
943
944 if (hw->phy.get_link_info) {
945 status = i40e_aq_get_link_info(hw, true, NULL, NULL);
946
947 if (status)
948 goto i40e_get_link_status_exit;
949 }
950
951 link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
952
953 i40e_get_link_status_exit:
954 return link_status;
955 }
956
957 /**
958 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
959 * @hw: pointer to the hw struct
960 * @uplink_seid: the MAC or other gizmo SEID
961 * @downlink_seid: the VSI SEID
962 * @enabled_tc: bitmap of TCs to be enabled
963 * @default_port: true for default port VSI, false for control port
964 * @enable_l2_filtering: true to add L2 filter table rules to regular forwarding rules for cloud support
965 * @veb_seid: pointer to where to put the resulting VEB SEID
966 * @cmd_details: pointer to command details structure or NULL
967 *
968 * This asks the FW to add a VEB between the uplink and downlink
969 * elements. If the uplink SEID is 0, this will be a floating VEB.
970 **/
971 i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
972 u16 downlink_seid, u8 enabled_tc,
973 bool default_port, bool enable_l2_filtering,
974 u16 *veb_seid,
975 struct i40e_asq_cmd_details *cmd_details)
976 {
977 struct i40e_aq_desc desc;
978 struct i40e_aqc_add_veb *cmd =
979 (struct i40e_aqc_add_veb *)&desc.params.raw;
980 struct i40e_aqc_add_veb_completion *resp =
981 (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
982 i40e_status status;
983 u16 veb_flags = 0;
984
985 /* SEIDs need to either both be set or both be 0 for floating VEB */
986 if (!!uplink_seid != !!downlink_seid)
987 return I40E_ERR_PARAM;
988
989 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
990
991 cmd->uplink_seid = cpu_to_le16(uplink_seid);
992 cmd->downlink_seid = cpu_to_le16(downlink_seid);
993 cmd->enable_tcs = enabled_tc;
994 if (!uplink_seid)
995 veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
996 if (default_port)
997 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
998 else
999 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;
1000
1001 if (enable_l2_filtering)
1002 veb_flags |= I40E_AQC_ADD_VEB_ENABLE_L2_FILTER;
1003
1004 cmd->veb_flags = cpu_to_le16(veb_flags);
1005
1006 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1007
1008 if (!status && veb_seid)
1009 *veb_seid = le16_to_cpu(resp->veb_seid);
1010
1011 return status;
1012 }
1013
1014 /**
1015 * i40e_aq_get_veb_parameters - Retrieve VEB parameters
1016 * @hw: pointer to the hw struct
1017 * @veb_seid: the SEID of the VEB to query
1018 * @switch_id: the uplink switch id
1019 * @floating_veb: set to true if the VEB is floating
1020 * @statistic_index: index of the stats counter block for this VEB
1021 * @vebs_used: number of VEB's used by function
1022 * @vebs_unallocated: total VEB's not reserved by any function
1023 * @cmd_details: pointer to command details structure or NULL
1024 *
1025 * This retrieves the parameters for a particular VEB, specified by
1026 * uplink_seid, and returns them to the caller.
1027 **/
1028 i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
1029 u16 veb_seid, u16 *switch_id,
1030 bool *floating, u16 *statistic_index,
1031 u16 *vebs_used, u16 *vebs_free,
1032 struct i40e_asq_cmd_details *cmd_details)
1033 {
1034 struct i40e_aq_desc desc;
1035 struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
1036 (struct i40e_aqc_get_veb_parameters_completion *)
1037 &desc.params.raw;
1038 i40e_status status;
1039
1040 if (veb_seid == 0)
1041 return I40E_ERR_PARAM;
1042
1043 i40e_fill_default_direct_cmd_desc(&desc,
1044 i40e_aqc_opc_get_veb_parameters);
1045 cmd_resp->seid = cpu_to_le16(veb_seid);
1046
1047 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1048 if (status)
1049 goto get_veb_exit;
1050
1051 if (switch_id)
1052 *switch_id = le16_to_cpu(cmd_resp->switch_id);
1053 if (statistic_index)
1054 *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
1055 if (vebs_used)
1056 *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
1057 if (vebs_free)
1058 *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
1059 if (floating) {
1060 u16 flags = le16_to_cpu(cmd_resp->veb_flags);
1061 if (flags & I40E_AQC_ADD_VEB_FLOATING)
1062 *floating = true;
1063 else
1064 *floating = false;
1065 }
1066
1067 get_veb_exit:
1068 return status;
1069 }
1070
1071 /**
1072 * i40e_aq_add_macvlan
1073 * @hw: pointer to the hw struct
1074 * @seid: VSI for the mac address
1075 * @mv_list: list of macvlans to be added
1076 * @count: length of the list
1077 * @cmd_details: pointer to command details structure or NULL
1078 *
1079 * Add MAC/VLAN addresses to the HW filtering
1080 **/
1081 i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
1082 struct i40e_aqc_add_macvlan_element_data *mv_list,
1083 u16 count, struct i40e_asq_cmd_details *cmd_details)
1084 {
1085 struct i40e_aq_desc desc;
1086 struct i40e_aqc_macvlan *cmd =
1087 (struct i40e_aqc_macvlan *)&desc.params.raw;
1088 i40e_status status;
1089 u16 buf_size;
1090
1091 if (count == 0 || !mv_list || !hw)
1092 return I40E_ERR_PARAM;
1093
1094 buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data);
1095
1096 /* prep the rest of the request */
1097 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
1098 cmd->num_addresses = cpu_to_le16(count);
1099 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1100 cmd->seid[1] = 0;
1101 cmd->seid[2] = 0;
1102
1103 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1104 if (buf_size > I40E_AQ_LARGE_BUF)
1105 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1106
1107 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1108 cmd_details);
1109
1110 return status;
1111 }
1112
1113 /**
1114 * i40e_aq_remove_macvlan
1115 * @hw: pointer to the hw struct
1116 * @seid: VSI for the mac address
1117 * @mv_list: list of macvlans to be removed
1118 * @count: length of the list
1119 * @cmd_details: pointer to command details structure or NULL
1120 *
1121 * Remove MAC/VLAN addresses from the HW filtering
1122 **/
1123 i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
1124 struct i40e_aqc_remove_macvlan_element_data *mv_list,
1125 u16 count, struct i40e_asq_cmd_details *cmd_details)
1126 {
1127 struct i40e_aq_desc desc;
1128 struct i40e_aqc_macvlan *cmd =
1129 (struct i40e_aqc_macvlan *)&desc.params.raw;
1130 i40e_status status;
1131 u16 buf_size;
1132
1133 if (count == 0 || !mv_list || !hw)
1134 return I40E_ERR_PARAM;
1135
1136 buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data);
1137
1138 /* prep the rest of the request */
1139 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
1140 cmd->num_addresses = cpu_to_le16(count);
1141 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1142 cmd->seid[1] = 0;
1143 cmd->seid[2] = 0;
1144
1145 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1146 if (buf_size > I40E_AQ_LARGE_BUF)
1147 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1148
1149 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1150 cmd_details);
1151
1152 return status;
1153 }
1154
1155 /**
1156 * i40e_aq_send_msg_to_vf
1157 * @hw: pointer to the hardware structure
1158 * @vfid: vf id to send msg
1159 * @msg: pointer to the msg buffer
1160 * @msglen: msg length
1161 * @cmd_details: pointer to command details
1162 *
1163 * send msg to vf
1164 **/
1165 i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
1166 u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
1167 struct i40e_asq_cmd_details *cmd_details)
1168 {
1169 struct i40e_aq_desc desc;
1170 struct i40e_aqc_pf_vf_message *cmd =
1171 (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
1172 i40e_status status;
1173
1174 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
1175 cmd->id = cpu_to_le32(vfid);
1176 desc.cookie_high = cpu_to_le32(v_opcode);
1177 desc.cookie_low = cpu_to_le32(v_retval);
1178 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1179 if (msglen) {
1180 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
1181 I40E_AQ_FLAG_RD));
1182 if (msglen > I40E_AQ_LARGE_BUF)
1183 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1184 desc.datalen = cpu_to_le16(msglen);
1185 }
1186 status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1187
1188 return status;
1189 }
1190
1191 /**
1192 * i40e_aq_set_hmc_resource_profile
1193 * @hw: pointer to the hw struct
1194 * @profile: type of profile the HMC is to be set as
1195 * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1196 * @cmd_details: pointer to command details structure or NULL
1197 *
1198 * set the HMC profile of the device.
1199 **/
1200 i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
1201 enum i40e_aq_hmc_profile profile,
1202 u8 pe_vf_enabled_count,
1203 struct i40e_asq_cmd_details *cmd_details)
1204 {
1205 struct i40e_aq_desc desc;
1206 struct i40e_aq_get_set_hmc_resource_profile *cmd =
1207 (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
1208 i40e_status status;
1209
1210 i40e_fill_default_direct_cmd_desc(&desc,
1211 i40e_aqc_opc_set_hmc_resource_profile);
1212
1213 cmd->pm_profile = (u8)profile;
1214 cmd->pe_vf_enabled = pe_vf_enabled_count;
1215
1216 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1217
1218 return status;
1219 }
1220
1221 /**
1222 * i40e_aq_request_resource
1223 * @hw: pointer to the hw struct
1224 * @resource: resource id
1225 * @access: access type
1226 * @sdp_number: resource number
1227 * @timeout: the maximum time in ms that the driver may hold the resource
1228 * @cmd_details: pointer to command details structure or NULL
1229 *
1230 * requests common resource using the admin queue commands
1231 **/
1232 i40e_status i40e_aq_request_resource(struct i40e_hw *hw,
1233 enum i40e_aq_resources_ids resource,
1234 enum i40e_aq_resource_access_type access,
1235 u8 sdp_number, u64 *timeout,
1236 struct i40e_asq_cmd_details *cmd_details)
1237 {
1238 struct i40e_aq_desc desc;
1239 struct i40e_aqc_request_resource *cmd_resp =
1240 (struct i40e_aqc_request_resource *)&desc.params.raw;
1241 i40e_status status;
1242
1243 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource);
1244
1245 cmd_resp->resource_id = cpu_to_le16(resource);
1246 cmd_resp->access_type = cpu_to_le16(access);
1247 cmd_resp->resource_number = cpu_to_le32(sdp_number);
1248
1249 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1250 /* The completion specifies the maximum time in ms that the driver
1251 * may hold the resource in the Timeout field.
1252 * If the resource is held by someone else, the command completes with
1253 * busy return value and the timeout field indicates the maximum time
1254 * the current owner of the resource has to free it.
1255 */
1256 if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)
1257 *timeout = le32_to_cpu(cmd_resp->timeout);
1258
1259 return status;
1260 }
1261
1262 /**
1263 * i40e_aq_release_resource
1264 * @hw: pointer to the hw struct
1265 * @resource: resource id
1266 * @sdp_number: resource number
1267 * @cmd_details: pointer to command details structure or NULL
1268 *
1269 * release common resource using the admin queue commands
1270 **/
1271 i40e_status i40e_aq_release_resource(struct i40e_hw *hw,
1272 enum i40e_aq_resources_ids resource,
1273 u8 sdp_number,
1274 struct i40e_asq_cmd_details *cmd_details)
1275 {
1276 struct i40e_aq_desc desc;
1277 struct i40e_aqc_request_resource *cmd =
1278 (struct i40e_aqc_request_resource *)&desc.params.raw;
1279 i40e_status status;
1280
1281 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource);
1282
1283 cmd->resource_id = cpu_to_le16(resource);
1284 cmd->resource_number = cpu_to_le32(sdp_number);
1285
1286 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1287
1288 return status;
1289 }
1290
1291 /**
1292 * i40e_aq_read_nvm
1293 * @hw: pointer to the hw struct
1294 * @module_pointer: module pointer location in words from the NVM beginning
1295 * @offset: byte offset from the module beginning
1296 * @length: length of the section to be read (in bytes from the offset)
1297 * @data: command buffer (size [bytes] = length)
1298 * @last_command: tells if this is the last command in a series
1299 * @cmd_details: pointer to command details structure or NULL
1300 *
1301 * Read the NVM using the admin queue commands
1302 **/
1303 i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
1304 u32 offset, u16 length, void *data,
1305 bool last_command,
1306 struct i40e_asq_cmd_details *cmd_details)
1307 {
1308 struct i40e_aq_desc desc;
1309 struct i40e_aqc_nvm_update *cmd =
1310 (struct i40e_aqc_nvm_update *)&desc.params.raw;
1311 i40e_status status;
1312
1313 /* In offset the highest byte must be zeroed. */
1314 if (offset & 0xFF000000) {
1315 status = I40E_ERR_PARAM;
1316 goto i40e_aq_read_nvm_exit;
1317 }
1318
1319 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read);
1320
1321 /* If this is the last command in a series, set the proper flag. */
1322 if (last_command)
1323 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
1324 cmd->module_pointer = module_pointer;
1325 cmd->offset = cpu_to_le32(offset);
1326 cmd->length = cpu_to_le16(length);
1327
1328 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1329 if (length > I40E_AQ_LARGE_BUF)
1330 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1331
1332 status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);
1333
1334 i40e_aq_read_nvm_exit:
1335 return status;
1336 }
1337
1338 #define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
1339 #define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
1340 #define I40E_DEV_FUNC_CAP_NPAR 0x03
1341 #define I40E_DEV_FUNC_CAP_OS2BMC 0x04
1342 #define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
1343 #define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
1344 #define I40E_DEV_FUNC_CAP_VF 0x13
1345 #define I40E_DEV_FUNC_CAP_VMDQ 0x14
1346 #define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
1347 #define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
1348 #define I40E_DEV_FUNC_CAP_VSI 0x17
1349 #define I40E_DEV_FUNC_CAP_DCB 0x18
1350 #define I40E_DEV_FUNC_CAP_FCOE 0x21
1351 #define I40E_DEV_FUNC_CAP_RSS 0x40
1352 #define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
1353 #define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
1354 #define I40E_DEV_FUNC_CAP_MSIX 0x43
1355 #define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
1356 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1357 #define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
1358 #define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1
1359 #define I40E_DEV_FUNC_CAP_CEM 0xF2
1360 #define I40E_DEV_FUNC_CAP_IWARP 0x51
1361 #define I40E_DEV_FUNC_CAP_LED 0x61
1362 #define I40E_DEV_FUNC_CAP_SDP 0x62
1363 #define I40E_DEV_FUNC_CAP_MDIO 0x63
1364
1365 /**
1366 * i40e_parse_discover_capabilities
1367 * @hw: pointer to the hw struct
1368 * @buff: pointer to a buffer containing device/function capability records
1369 * @cap_count: number of capability records in the list
1370 * @list_type_opc: type of capabilities list to parse
1371 *
1372 * Parse the device/function capabilities list.
1373 **/
1374 static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
1375 u32 cap_count,
1376 enum i40e_admin_queue_opc list_type_opc)
1377 {
1378 struct i40e_aqc_list_capabilities_element_resp *cap;
1379 u32 number, logical_id, phys_id;
1380 struct i40e_hw_capabilities *p;
1381 u32 reg_val;
1382 u32 i = 0;
1383 u16 id;
1384
1385 cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
1386
1387 if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
1388 p = (struct i40e_hw_capabilities *)&hw->dev_caps;
1389 else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
1390 p = (struct i40e_hw_capabilities *)&hw->func_caps;
1391 else
1392 return;
1393
1394 for (i = 0; i < cap_count; i++, cap++) {
1395 id = le16_to_cpu(cap->id);
1396 number = le32_to_cpu(cap->number);
1397 logical_id = le32_to_cpu(cap->logical_id);
1398 phys_id = le32_to_cpu(cap->phys_id);
1399
1400 switch (id) {
1401 case I40E_DEV_FUNC_CAP_SWITCH_MODE:
1402 p->switch_mode = number;
1403 break;
1404 case I40E_DEV_FUNC_CAP_MGMT_MODE:
1405 p->management_mode = number;
1406 break;
1407 case I40E_DEV_FUNC_CAP_NPAR:
1408 p->npar_enable = number;
1409 break;
1410 case I40E_DEV_FUNC_CAP_OS2BMC:
1411 p->os2bmc = number;
1412 break;
1413 case I40E_DEV_FUNC_CAP_VALID_FUNC:
1414 p->valid_functions = number;
1415 break;
1416 case I40E_DEV_FUNC_CAP_SRIOV_1_1:
1417 if (number == 1)
1418 p->sr_iov_1_1 = true;
1419 break;
1420 case I40E_DEV_FUNC_CAP_VF:
1421 p->num_vfs = number;
1422 p->vf_base_id = logical_id;
1423 break;
1424 case I40E_DEV_FUNC_CAP_VMDQ:
1425 if (number == 1)
1426 p->vmdq = true;
1427 break;
1428 case I40E_DEV_FUNC_CAP_802_1_QBG:
1429 if (number == 1)
1430 p->evb_802_1_qbg = true;
1431 break;
1432 case I40E_DEV_FUNC_CAP_802_1_QBH:
1433 if (number == 1)
1434 p->evb_802_1_qbh = true;
1435 break;
1436 case I40E_DEV_FUNC_CAP_VSI:
1437 p->num_vsis = number;
1438 break;
1439 case I40E_DEV_FUNC_CAP_DCB:
1440 if (number == 1) {
1441 p->dcb = true;
1442 p->enabled_tcmap = logical_id;
1443 p->maxtc = phys_id;
1444 }
1445 break;
1446 case I40E_DEV_FUNC_CAP_FCOE:
1447 if (number == 1)
1448 p->fcoe = true;
1449 break;
1450 case I40E_DEV_FUNC_CAP_RSS:
1451 p->rss = true;
1452 reg_val = rd32(hw, I40E_PFQF_CTL_0);
1453 if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
1454 p->rss_table_size = number;
1455 else
1456 p->rss_table_size = 128;
1457 p->rss_table_entry_width = logical_id;
1458 break;
1459 case I40E_DEV_FUNC_CAP_RX_QUEUES:
1460 p->num_rx_qp = number;
1461 p->base_queue = phys_id;
1462 break;
1463 case I40E_DEV_FUNC_CAP_TX_QUEUES:
1464 p->num_tx_qp = number;
1465 p->base_queue = phys_id;
1466 break;
1467 case I40E_DEV_FUNC_CAP_MSIX:
1468 p->num_msix_vectors = number;
1469 break;
1470 case I40E_DEV_FUNC_CAP_MSIX_VF:
1471 p->num_msix_vectors_vf = number;
1472 break;
1473 case I40E_DEV_FUNC_CAP_MFP_MODE_1:
1474 if (number == 1)
1475 p->mfp_mode_1 = true;
1476 break;
1477 case I40E_DEV_FUNC_CAP_CEM:
1478 if (number == 1)
1479 p->mgmt_cem = true;
1480 break;
1481 case I40E_DEV_FUNC_CAP_IWARP:
1482 if (number == 1)
1483 p->iwarp = true;
1484 break;
1485 case I40E_DEV_FUNC_CAP_LED:
1486 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1487 p->led[phys_id] = true;
1488 break;
1489 case I40E_DEV_FUNC_CAP_SDP:
1490 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1491 p->sdp[phys_id] = true;
1492 break;
1493 case I40E_DEV_FUNC_CAP_MDIO:
1494 if (number == 1) {
1495 p->mdio_port_num = phys_id;
1496 p->mdio_port_mode = logical_id;
1497 }
1498 break;
1499 case I40E_DEV_FUNC_CAP_IEEE_1588:
1500 if (number == 1)
1501 p->ieee_1588 = true;
1502 break;
1503 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:
1504 p->fd = true;
1505 p->fd_filters_guaranteed = number;
1506 p->fd_filters_best_effort = logical_id;
1507 break;
1508 default:
1509 break;
1510 }
1511 }
1512
1513 /* additional HW specific goodies that might
1514 * someday be HW version specific
1515 */
1516 p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
1517 }
1518
1519 /**
1520 * i40e_aq_discover_capabilities
1521 * @hw: pointer to the hw struct
1522 * @buff: a virtual buffer to hold the capabilities
1523 * @buff_size: Size of the virtual buffer
1524 * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1525 * @list_type_opc: capabilities type to discover - pass in the command opcode
1526 * @cmd_details: pointer to command details structure or NULL
1527 *
1528 * Get the device capabilities descriptions from the firmware
1529 **/
1530 i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
1531 void *buff, u16 buff_size, u16 *data_size,
1532 enum i40e_admin_queue_opc list_type_opc,
1533 struct i40e_asq_cmd_details *cmd_details)
1534 {
1535 struct i40e_aqc_list_capabilites *cmd;
1536 i40e_status status = 0;
1537 struct i40e_aq_desc desc;
1538
1539 cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
1540
1541 if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&
1542 list_type_opc != i40e_aqc_opc_list_dev_capabilities) {
1543 status = I40E_ERR_PARAM;
1544 goto exit;
1545 }
1546
1547 i40e_fill_default_direct_cmd_desc(&desc, list_type_opc);
1548
1549 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1550 if (buff_size > I40E_AQ_LARGE_BUF)
1551 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1552
1553 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1554 *data_size = le16_to_cpu(desc.datalen);
1555
1556 if (status)
1557 goto exit;
1558
1559 i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count),
1560 list_type_opc);
1561
1562 exit:
1563 return status;
1564 }
1565
1566 /**
1567 * i40e_aq_get_lldp_mib
1568 * @hw: pointer to the hw struct
1569 * @bridge_type: type of bridge requested
1570 * @mib_type: Local, Remote or both Local and Remote MIBs
1571 * @buff: pointer to a user supplied buffer to store the MIB block
1572 * @buff_size: size of the buffer (in bytes)
1573 * @local_len : length of the returned Local LLDP MIB
1574 * @remote_len: length of the returned Remote LLDP MIB
1575 * @cmd_details: pointer to command details structure or NULL
1576 *
1577 * Requests the complete LLDP MIB (entire packet).
1578 **/
1579 i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
1580 u8 mib_type, void *buff, u16 buff_size,
1581 u16 *local_len, u16 *remote_len,
1582 struct i40e_asq_cmd_details *cmd_details)
1583 {
1584 struct i40e_aq_desc desc;
1585 struct i40e_aqc_lldp_get_mib *cmd =
1586 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1587 struct i40e_aqc_lldp_get_mib *resp =
1588 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1589 i40e_status status;
1590
1591 if (buff_size == 0 || !buff)
1592 return I40E_ERR_PARAM;
1593
1594 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);
1595 /* Indirect Command */
1596 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1597
1598 cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK;
1599 cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) &
1600 I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
1601
1602 desc.datalen = cpu_to_le16(buff_size);
1603
1604 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1605 if (buff_size > I40E_AQ_LARGE_BUF)
1606 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1607
1608 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1609 if (!status) {
1610 if (local_len != NULL)
1611 *local_len = le16_to_cpu(resp->local_len);
1612 if (remote_len != NULL)
1613 *remote_len = le16_to_cpu(resp->remote_len);
1614 }
1615
1616 return status;
1617 }
1618
1619 /**
1620 * i40e_aq_cfg_lldp_mib_change_event
1621 * @hw: pointer to the hw struct
1622 * @enable_update: Enable or Disable event posting
1623 * @cmd_details: pointer to command details structure or NULL
1624 *
1625 * Enable or Disable posting of an event on ARQ when LLDP MIB
1626 * associated with the interface changes
1627 **/
1628 i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
1629 bool enable_update,
1630 struct i40e_asq_cmd_details *cmd_details)
1631 {
1632 struct i40e_aq_desc desc;
1633 struct i40e_aqc_lldp_update_mib *cmd =
1634 (struct i40e_aqc_lldp_update_mib *)&desc.params.raw;
1635 i40e_status status;
1636
1637 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib);
1638
1639 if (!enable_update)
1640 cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;
1641
1642 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1643
1644 return status;
1645 }
1646
1647 /**
1648 * i40e_aq_stop_lldp
1649 * @hw: pointer to the hw struct
1650 * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1651 * @cmd_details: pointer to command details structure or NULL
1652 *
1653 * Stop or Shutdown the embedded LLDP Agent
1654 **/
1655 i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
1656 struct i40e_asq_cmd_details *cmd_details)
1657 {
1658 struct i40e_aq_desc desc;
1659 struct i40e_aqc_lldp_stop *cmd =
1660 (struct i40e_aqc_lldp_stop *)&desc.params.raw;
1661 i40e_status status;
1662
1663 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop);
1664
1665 if (shutdown_agent)
1666 cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;
1667
1668 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1669
1670 return status;
1671 }
1672
1673 /**
1674 * i40e_aq_start_lldp
1675 * @hw: pointer to the hw struct
1676 * @cmd_details: pointer to command details structure or NULL
1677 *
1678 * Start the embedded LLDP Agent on all ports.
1679 **/
1680 i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
1681 struct i40e_asq_cmd_details *cmd_details)
1682 {
1683 struct i40e_aq_desc desc;
1684 struct i40e_aqc_lldp_start *cmd =
1685 (struct i40e_aqc_lldp_start *)&desc.params.raw;
1686 i40e_status status;
1687
1688 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start);
1689
1690 cmd->command = I40E_AQ_LLDP_AGENT_START;
1691
1692 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1693
1694 return status;
1695 }
1696
1697 /**
1698 * i40e_aq_add_udp_tunnel
1699 * @hw: pointer to the hw struct
1700 * @udp_port: the UDP port to add
1701 * @header_len: length of the tunneling header length in DWords
1702 * @protocol_index: protocol index type
1703 * @cmd_details: pointer to command details structure or NULL
1704 **/
1705 i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw,
1706 u16 udp_port, u8 header_len,
1707 u8 protocol_index, u8 *filter_index,
1708 struct i40e_asq_cmd_details *cmd_details)
1709 {
1710 struct i40e_aq_desc desc;
1711 struct i40e_aqc_add_udp_tunnel *cmd =
1712 (struct i40e_aqc_add_udp_tunnel *)&desc.params.raw;
1713 struct i40e_aqc_del_udp_tunnel_completion *resp =
1714 (struct i40e_aqc_del_udp_tunnel_completion *)&desc.params.raw;
1715 i40e_status status;
1716
1717 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_udp_tunnel);
1718
1719 cmd->udp_port = cpu_to_le16(udp_port);
1720 cmd->header_len = header_len;
1721 cmd->protocol_index = protocol_index;
1722
1723 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1724
1725 if (!status)
1726 *filter_index = resp->index;
1727
1728 return status;
1729 }
1730
1731 /**
1732 * i40e_aq_del_udp_tunnel
1733 * @hw: pointer to the hw struct
1734 * @index: filter index
1735 * @cmd_details: pointer to command details structure or NULL
1736 **/
1737 i40e_status i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index,
1738 struct i40e_asq_cmd_details *cmd_details)
1739 {
1740 struct i40e_aq_desc desc;
1741 struct i40e_aqc_remove_udp_tunnel *cmd =
1742 (struct i40e_aqc_remove_udp_tunnel *)&desc.params.raw;
1743 i40e_status status;
1744
1745 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_del_udp_tunnel);
1746
1747 cmd->index = index;
1748
1749 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1750
1751 return status;
1752 }
1753
1754 /**
1755 * i40e_aq_delete_element - Delete switch element
1756 * @hw: pointer to the hw struct
1757 * @seid: the SEID to delete from the switch
1758 * @cmd_details: pointer to command details structure or NULL
1759 *
1760 * This deletes a switch element from the switch.
1761 **/
1762 i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
1763 struct i40e_asq_cmd_details *cmd_details)
1764 {
1765 struct i40e_aq_desc desc;
1766 struct i40e_aqc_switch_seid *cmd =
1767 (struct i40e_aqc_switch_seid *)&desc.params.raw;
1768 i40e_status status;
1769
1770 if (seid == 0)
1771 return I40E_ERR_PARAM;
1772
1773 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
1774
1775 cmd->seid = cpu_to_le16(seid);
1776
1777 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1778
1779 return status;
1780 }
1781
1782 /**
1783 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1784 * @hw: pointer to the hw struct
1785 * @seid: seid for the physical port/switching component/vsi
1786 * @buff: Indirect buffer to hold data parameters and response
1787 * @buff_size: Indirect buffer size
1788 * @opcode: Tx scheduler AQ command opcode
1789 * @cmd_details: pointer to command details structure or NULL
1790 *
1791 * Generic command handler for Tx scheduler AQ commands
1792 **/
1793 static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
1794 void *buff, u16 buff_size,
1795 enum i40e_admin_queue_opc opcode,
1796 struct i40e_asq_cmd_details *cmd_details)
1797 {
1798 struct i40e_aq_desc desc;
1799 struct i40e_aqc_tx_sched_ind *cmd =
1800 (struct i40e_aqc_tx_sched_ind *)&desc.params.raw;
1801 i40e_status status;
1802 bool cmd_param_flag = false;
1803
1804 switch (opcode) {
1805 case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit:
1806 case i40e_aqc_opc_configure_vsi_tc_bw:
1807 case i40e_aqc_opc_enable_switching_comp_ets:
1808 case i40e_aqc_opc_modify_switching_comp_ets:
1809 case i40e_aqc_opc_disable_switching_comp_ets:
1810 case i40e_aqc_opc_configure_switching_comp_ets_bw_limit:
1811 case i40e_aqc_opc_configure_switching_comp_bw_config:
1812 cmd_param_flag = true;
1813 break;
1814 case i40e_aqc_opc_query_vsi_bw_config:
1815 case i40e_aqc_opc_query_vsi_ets_sla_config:
1816 case i40e_aqc_opc_query_switching_comp_ets_config:
1817 case i40e_aqc_opc_query_port_ets_config:
1818 case i40e_aqc_opc_query_switching_comp_bw_config:
1819 cmd_param_flag = false;
1820 break;
1821 default:
1822 return I40E_ERR_PARAM;
1823 }
1824
1825 i40e_fill_default_direct_cmd_desc(&desc, opcode);
1826
1827 /* Indirect command */
1828 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1829 if (cmd_param_flag)
1830 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
1831 if (buff_size > I40E_AQ_LARGE_BUF)
1832 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1833
1834 desc.datalen = cpu_to_le16(buff_size);
1835
1836 cmd->vsi_seid = cpu_to_le16(seid);
1837
1838 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1839
1840 return status;
1841 }
1842
1843 /**
1844 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1845 * @hw: pointer to the hw struct
1846 * @seid: VSI seid
1847 * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1848 * @cmd_details: pointer to command details structure or NULL
1849 **/
1850 i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,
1851 u16 seid,
1852 struct i40e_aqc_configure_vsi_tc_bw_data *bw_data,
1853 struct i40e_asq_cmd_details *cmd_details)
1854 {
1855 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1856 i40e_aqc_opc_configure_vsi_tc_bw,
1857 cmd_details);
1858 }
1859
1860 /**
1861 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1862 * @hw: pointer to the hw struct
1863 * @seid: seid of the VSI
1864 * @bw_data: Buffer to hold VSI BW configuration
1865 * @cmd_details: pointer to command details structure or NULL
1866 **/
1867 i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,
1868 u16 seid,
1869 struct i40e_aqc_query_vsi_bw_config_resp *bw_data,
1870 struct i40e_asq_cmd_details *cmd_details)
1871 {
1872 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1873 i40e_aqc_opc_query_vsi_bw_config,
1874 cmd_details);
1875 }
1876
1877 /**
1878 * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1879 * @hw: pointer to the hw struct
1880 * @seid: seid of the VSI
1881 * @bw_data: Buffer to hold VSI BW configuration per TC
1882 * @cmd_details: pointer to command details structure or NULL
1883 **/
1884 i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,
1885 u16 seid,
1886 struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data,
1887 struct i40e_asq_cmd_details *cmd_details)
1888 {
1889 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1890 i40e_aqc_opc_query_vsi_ets_sla_config,
1891 cmd_details);
1892 }
1893
1894 /**
1895 * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1896 * @hw: pointer to the hw struct
1897 * @seid: seid of the switching component
1898 * @bw_data: Buffer to hold switching component's per TC BW config
1899 * @cmd_details: pointer to command details structure or NULL
1900 **/
1901 i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,
1902 u16 seid,
1903 struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data,
1904 struct i40e_asq_cmd_details *cmd_details)
1905 {
1906 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1907 i40e_aqc_opc_query_switching_comp_ets_config,
1908 cmd_details);
1909 }
1910
1911 /**
1912 * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1913 * @hw: pointer to the hw struct
1914 * @seid: seid of the VSI or switching component connected to Physical Port
1915 * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1916 * @cmd_details: pointer to command details structure or NULL
1917 **/
1918 i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw,
1919 u16 seid,
1920 struct i40e_aqc_query_port_ets_config_resp *bw_data,
1921 struct i40e_asq_cmd_details *cmd_details)
1922 {
1923 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1924 i40e_aqc_opc_query_port_ets_config,
1925 cmd_details);
1926 }
1927
1928 /**
1929 * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
1930 * @hw: pointer to the hw struct
1931 * @seid: seid of the switching component
1932 * @bw_data: Buffer to hold switching component's BW configuration
1933 * @cmd_details: pointer to command details structure or NULL
1934 **/
1935 i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,
1936 u16 seid,
1937 struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data,
1938 struct i40e_asq_cmd_details *cmd_details)
1939 {
1940 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1941 i40e_aqc_opc_query_switching_comp_bw_config,
1942 cmd_details);
1943 }
1944
1945 /**
1946 * i40e_validate_filter_settings
1947 * @hw: pointer to the hardware structure
1948 * @settings: Filter control settings
1949 *
1950 * Check and validate the filter control settings passed.
1951 * The function checks for the valid filter/context sizes being
1952 * passed for FCoE and PE.
1953 *
1954 * Returns 0 if the values passed are valid and within
1955 * range else returns an error.
1956 **/
1957 static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
1958 struct i40e_filter_control_settings *settings)
1959 {
1960 u32 fcoe_cntx_size, fcoe_filt_size;
1961 u32 pe_cntx_size, pe_filt_size;
1962 u32 fcoe_fmax, pe_fmax;
1963 u32 val;
1964
1965 /* Validate FCoE settings passed */
1966 switch (settings->fcoe_filt_num) {
1967 case I40E_HASH_FILTER_SIZE_1K:
1968 case I40E_HASH_FILTER_SIZE_2K:
1969 case I40E_HASH_FILTER_SIZE_4K:
1970 case I40E_HASH_FILTER_SIZE_8K:
1971 case I40E_HASH_FILTER_SIZE_16K:
1972 case I40E_HASH_FILTER_SIZE_32K:
1973 fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1974 fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
1975 break;
1976 default:
1977 return I40E_ERR_PARAM;
1978 }
1979
1980 switch (settings->fcoe_cntx_num) {
1981 case I40E_DMA_CNTX_SIZE_512:
1982 case I40E_DMA_CNTX_SIZE_1K:
1983 case I40E_DMA_CNTX_SIZE_2K:
1984 case I40E_DMA_CNTX_SIZE_4K:
1985 fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
1986 fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
1987 break;
1988 default:
1989 return I40E_ERR_PARAM;
1990 }
1991
1992 /* Validate PE settings passed */
1993 switch (settings->pe_filt_num) {
1994 case I40E_HASH_FILTER_SIZE_1K:
1995 case I40E_HASH_FILTER_SIZE_2K:
1996 case I40E_HASH_FILTER_SIZE_4K:
1997 case I40E_HASH_FILTER_SIZE_8K:
1998 case I40E_HASH_FILTER_SIZE_16K:
1999 case I40E_HASH_FILTER_SIZE_32K:
2000 case I40E_HASH_FILTER_SIZE_64K:
2001 case I40E_HASH_FILTER_SIZE_128K:
2002 case I40E_HASH_FILTER_SIZE_256K:
2003 case I40E_HASH_FILTER_SIZE_512K:
2004 case I40E_HASH_FILTER_SIZE_1M:
2005 pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
2006 pe_filt_size <<= (u32)settings->pe_filt_num;
2007 break;
2008 default:
2009 return I40E_ERR_PARAM;
2010 }
2011
2012 switch (settings->pe_cntx_num) {
2013 case I40E_DMA_CNTX_SIZE_512:
2014 case I40E_DMA_CNTX_SIZE_1K:
2015 case I40E_DMA_CNTX_SIZE_2K:
2016 case I40E_DMA_CNTX_SIZE_4K:
2017 case I40E_DMA_CNTX_SIZE_8K:
2018 case I40E_DMA_CNTX_SIZE_16K:
2019 case I40E_DMA_CNTX_SIZE_32K:
2020 case I40E_DMA_CNTX_SIZE_64K:
2021 case I40E_DMA_CNTX_SIZE_128K:
2022 case I40E_DMA_CNTX_SIZE_256K:
2023 pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
2024 pe_cntx_size <<= (u32)settings->pe_cntx_num;
2025 break;
2026 default:
2027 return I40E_ERR_PARAM;
2028 }
2029
2030 /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
2031 val = rd32(hw, I40E_GLHMC_FCOEFMAX);
2032 fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
2033 >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;
2034 if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax)
2035 return I40E_ERR_INVALID_SIZE;
2036
2037 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
2038 val = rd32(hw, I40E_GLHMC_PEXFMAX);
2039 pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
2040 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
2041 if (pe_filt_size + pe_cntx_size > pe_fmax)
2042 return I40E_ERR_INVALID_SIZE;
2043
2044 return 0;
2045 }
2046
2047 /**
2048 * i40e_set_filter_control
2049 * @hw: pointer to the hardware structure
2050 * @settings: Filter control settings
2051 *
2052 * Set the Queue Filters for PE/FCoE and enable filters required
2053 * for a single PF. It is expected that these settings are programmed
2054 * at the driver initialization time.
2055 **/
2056 i40e_status i40e_set_filter_control(struct i40e_hw *hw,
2057 struct i40e_filter_control_settings *settings)
2058 {
2059 i40e_status ret = 0;
2060 u32 hash_lut_size = 0;
2061 u32 val;
2062
2063 if (!settings)
2064 return I40E_ERR_PARAM;
2065
2066 /* Validate the input settings */
2067 ret = i40e_validate_filter_settings(hw, settings);
2068 if (ret)
2069 return ret;
2070
2071 /* Read the PF Queue Filter control register */
2072 val = rd32(hw, I40E_PFQF_CTL_0);
2073
2074 /* Program required PE hash buckets for the PF */
2075 val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
2076 val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
2077 I40E_PFQF_CTL_0_PEHSIZE_MASK;
2078 /* Program required PE contexts for the PF */
2079 val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
2080 val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
2081 I40E_PFQF_CTL_0_PEDSIZE_MASK;
2082
2083 /* Program required FCoE hash buckets for the PF */
2084 val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2085 val |= ((u32)settings->fcoe_filt_num <<
2086 I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) &
2087 I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2088 /* Program required FCoE DDP contexts for the PF */
2089 val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2090 val |= ((u32)settings->fcoe_cntx_num <<
2091 I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) &
2092 I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2093
2094 /* Program Hash LUT size for the PF */
2095 val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2096 if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
2097 hash_lut_size = 1;
2098 val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
2099 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2100
2101 /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2102 if (settings->enable_fdir)
2103 val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
2104 if (settings->enable_ethtype)
2105 val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
2106 if (settings->enable_macvlan)
2107 val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
2108
2109 wr32(hw, I40E_PFQF_CTL_0, val);
2110
2111 return 0;
2112 }
2113 /**
2114 * i40e_set_pci_config_data - store PCI bus info
2115 * @hw: pointer to hardware structure
2116 * @link_status: the link status word from PCI config space
2117 *
2118 * Stores the PCI bus info (speed, width, type) within the i40e_hw structure
2119 **/
2120 void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status)
2121 {
2122 hw->bus.type = i40e_bus_type_pci_express;
2123
2124 switch (link_status & PCI_EXP_LNKSTA_NLW) {
2125 case PCI_EXP_LNKSTA_NLW_X1:
2126 hw->bus.width = i40e_bus_width_pcie_x1;
2127 break;
2128 case PCI_EXP_LNKSTA_NLW_X2:
2129 hw->bus.width = i40e_bus_width_pcie_x2;
2130 break;
2131 case PCI_EXP_LNKSTA_NLW_X4:
2132 hw->bus.width = i40e_bus_width_pcie_x4;
2133 break;
2134 case PCI_EXP_LNKSTA_NLW_X8:
2135 hw->bus.width = i40e_bus_width_pcie_x8;
2136 break;
2137 default:
2138 hw->bus.width = i40e_bus_width_unknown;
2139 break;
2140 }
2141
2142 switch (link_status & PCI_EXP_LNKSTA_CLS) {
2143 case PCI_EXP_LNKSTA_CLS_2_5GB:
2144 hw->bus.speed = i40e_bus_speed_2500;
2145 break;
2146 case PCI_EXP_LNKSTA_CLS_5_0GB:
2147 hw->bus.speed = i40e_bus_speed_5000;
2148 break;
2149 case PCI_EXP_LNKSTA_CLS_8_0GB:
2150 hw->bus.speed = i40e_bus_speed_8000;
2151 break;
2152 default:
2153 hw->bus.speed = i40e_bus_speed_unknown;
2154 break;
2155 }
2156 }
Linux kernel - Deliverables
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