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i40e: loopback info and set loopback fix
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_common.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28 #include "i40e_type.h"
29 #include "i40e_adminq.h"
30 #include "i40e_prototype.h"
31 #include "i40e_virtchnl.h"
32
33 /**
34 * i40e_set_mac_type - Sets MAC type
35 * @hw: pointer to the HW structure
36 *
37 * This function sets the mac type of the adapter based on the
38 * vendor ID and device ID stored in the hw structure.
39 **/
40 static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
41 {
42 i40e_status status = 0;
43
44 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
45 switch (hw->device_id) {
46 case I40E_SFP_XL710_DEVICE_ID:
47 case I40E_SFP_X710_DEVICE_ID:
48 case I40E_QEMU_DEVICE_ID:
49 case I40E_KX_A_DEVICE_ID:
50 case I40E_KX_B_DEVICE_ID:
51 case I40E_KX_C_DEVICE_ID:
52 case I40E_KX_D_DEVICE_ID:
53 case I40E_QSFP_A_DEVICE_ID:
54 case I40E_QSFP_B_DEVICE_ID:
55 case I40E_QSFP_C_DEVICE_ID:
56 hw->mac.type = I40E_MAC_XL710;
57 break;
58 case I40E_VF_DEVICE_ID:
59 case I40E_VF_HV_DEVICE_ID:
60 hw->mac.type = I40E_MAC_VF;
61 break;
62 default:
63 hw->mac.type = I40E_MAC_GENERIC;
64 break;
65 }
66 } else {
67 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
68 }
69
70 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
71 hw->mac.type, status);
72 return status;
73 }
74
75 /**
76 * i40e_debug_aq
77 * @hw: debug mask related to admin queue
78 * @cap: pointer to adminq command descriptor
79 * @buffer: pointer to command buffer
80 *
81 * Dumps debug log about adminq command with descriptor contents.
82 **/
83 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
84 void *buffer)
85 {
86 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
87 u8 *aq_buffer = (u8 *)buffer;
88 u32 data[4];
89 u32 i = 0;
90
91 if ((!(mask & hw->debug_mask)) || (desc == NULL))
92 return;
93
94 i40e_debug(hw, mask,
95 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
96 aq_desc->opcode, aq_desc->flags, aq_desc->datalen,
97 aq_desc->retval);
98 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
99 aq_desc->cookie_high, aq_desc->cookie_low);
100 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
101 aq_desc->params.internal.param0,
102 aq_desc->params.internal.param1);
103 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
104 aq_desc->params.external.addr_high,
105 aq_desc->params.external.addr_low);
106
107 if ((buffer != NULL) && (aq_desc->datalen != 0)) {
108 memset(data, 0, sizeof(data));
109 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
110 for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) {
111 data[((i % 16) / 4)] |=
112 ((u32)aq_buffer[i]) << (8 * (i % 4));
113 if ((i % 16) == 15) {
114 i40e_debug(hw, mask,
115 "\t0x%04X %08X %08X %08X %08X\n",
116 i - 15, data[0], data[1], data[2],
117 data[3]);
118 memset(data, 0, sizeof(data));
119 }
120 }
121 if ((i % 16) != 0)
122 i40e_debug(hw, mask, "\t0x%04X %08X %08X %08X %08X\n",
123 i - (i % 16), data[0], data[1], data[2],
124 data[3]);
125 }
126 }
127
128 /**
129 * i40e_init_shared_code - Initialize the shared code
130 * @hw: pointer to hardware structure
131 *
132 * This assigns the MAC type and PHY code and inits the NVM.
133 * Does not touch the hardware. This function must be called prior to any
134 * other function in the shared code. The i40e_hw structure should be
135 * memset to 0 prior to calling this function. The following fields in
136 * hw structure should be filled in prior to calling this function:
137 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
138 * subsystem_vendor_id, and revision_id
139 **/
140 i40e_status i40e_init_shared_code(struct i40e_hw *hw)
141 {
142 i40e_status status = 0;
143 u32 reg;
144
145 hw->phy.get_link_info = true;
146
147 /* Determine port number */
148 reg = rd32(hw, I40E_PFGEN_PORTNUM);
149 reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >>
150 I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT);
151 hw->port = (u8)reg;
152
153 i40e_set_mac_type(hw);
154
155 switch (hw->mac.type) {
156 case I40E_MAC_XL710:
157 break;
158 default:
159 return I40E_ERR_DEVICE_NOT_SUPPORTED;
160 break;
161 }
162
163 status = i40e_init_nvm(hw);
164 return status;
165 }
166
167 /**
168 * i40e_aq_mac_address_read - Retrieve the MAC addresses
169 * @hw: pointer to the hw struct
170 * @flags: a return indicator of what addresses were added to the addr store
171 * @addrs: the requestor's mac addr store
172 * @cmd_details: pointer to command details structure or NULL
173 **/
174 static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
175 u16 *flags,
176 struct i40e_aqc_mac_address_read_data *addrs,
177 struct i40e_asq_cmd_details *cmd_details)
178 {
179 struct i40e_aq_desc desc;
180 struct i40e_aqc_mac_address_read *cmd_data =
181 (struct i40e_aqc_mac_address_read *)&desc.params.raw;
182 i40e_status status;
183
184 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
185 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);
186
187 status = i40e_asq_send_command(hw, &desc, addrs,
188 sizeof(*addrs), cmd_details);
189 *flags = le16_to_cpu(cmd_data->command_flags);
190
191 return status;
192 }
193
194 /**
195 * i40e_aq_mac_address_write - Change the MAC addresses
196 * @hw: pointer to the hw struct
197 * @flags: indicates which MAC to be written
198 * @mac_addr: address to write
199 * @cmd_details: pointer to command details structure or NULL
200 **/
201 i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
202 u16 flags, u8 *mac_addr,
203 struct i40e_asq_cmd_details *cmd_details)
204 {
205 struct i40e_aq_desc desc;
206 struct i40e_aqc_mac_address_write *cmd_data =
207 (struct i40e_aqc_mac_address_write *)&desc.params.raw;
208 i40e_status status;
209
210 i40e_fill_default_direct_cmd_desc(&desc,
211 i40e_aqc_opc_mac_address_write);
212 cmd_data->command_flags = cpu_to_le16(flags);
213 memcpy(&cmd_data->mac_sal, &mac_addr[0], 4);
214 memcpy(&cmd_data->mac_sah, &mac_addr[4], 2);
215
216 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
217
218 return status;
219 }
220
221 /**
222 * i40e_get_mac_addr - get MAC address
223 * @hw: pointer to the HW structure
224 * @mac_addr: pointer to MAC address
225 *
226 * Reads the adapter's MAC address from register
227 **/
228 i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
229 {
230 struct i40e_aqc_mac_address_read_data addrs;
231 i40e_status status;
232 u16 flags = 0;
233
234 status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
235
236 if (flags & I40E_AQC_LAN_ADDR_VALID)
237 memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
238
239 return status;
240 }
241
242 /**
243 * i40e_validate_mac_addr - Validate MAC address
244 * @mac_addr: pointer to MAC address
245 *
246 * Tests a MAC address to ensure it is a valid Individual Address
247 **/
248 i40e_status i40e_validate_mac_addr(u8 *mac_addr)
249 {
250 i40e_status status = 0;
251
252 /* Make sure it is not a multicast address */
253 if (I40E_IS_MULTICAST(mac_addr)) {
254 hw_dbg(hw, "MAC address is multicast\n");
255 status = I40E_ERR_INVALID_MAC_ADDR;
256 /* Not a broadcast address */
257 } else if (I40E_IS_BROADCAST(mac_addr)) {
258 hw_dbg(hw, "MAC address is broadcast\n");
259 status = I40E_ERR_INVALID_MAC_ADDR;
260 /* Reject the zero address */
261 } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&
262 mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {
263 hw_dbg(hw, "MAC address is all zeros\n");
264 status = I40E_ERR_INVALID_MAC_ADDR;
265 }
266 return status;
267 }
268
269 /**
270 * i40e_get_media_type - Gets media type
271 * @hw: pointer to the hardware structure
272 **/
273 static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
274 {
275 enum i40e_media_type media;
276
277 switch (hw->phy.link_info.phy_type) {
278 case I40E_PHY_TYPE_10GBASE_SR:
279 case I40E_PHY_TYPE_10GBASE_LR:
280 case I40E_PHY_TYPE_40GBASE_SR4:
281 case I40E_PHY_TYPE_40GBASE_LR4:
282 media = I40E_MEDIA_TYPE_FIBER;
283 break;
284 case I40E_PHY_TYPE_100BASE_TX:
285 case I40E_PHY_TYPE_1000BASE_T:
286 case I40E_PHY_TYPE_10GBASE_T:
287 media = I40E_MEDIA_TYPE_BASET;
288 break;
289 case I40E_PHY_TYPE_10GBASE_CR1_CU:
290 case I40E_PHY_TYPE_40GBASE_CR4_CU:
291 case I40E_PHY_TYPE_10GBASE_CR1:
292 case I40E_PHY_TYPE_40GBASE_CR4:
293 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
294 media = I40E_MEDIA_TYPE_DA;
295 break;
296 case I40E_PHY_TYPE_1000BASE_KX:
297 case I40E_PHY_TYPE_10GBASE_KX4:
298 case I40E_PHY_TYPE_10GBASE_KR:
299 case I40E_PHY_TYPE_40GBASE_KR4:
300 media = I40E_MEDIA_TYPE_BACKPLANE;
301 break;
302 case I40E_PHY_TYPE_SGMII:
303 case I40E_PHY_TYPE_XAUI:
304 case I40E_PHY_TYPE_XFI:
305 case I40E_PHY_TYPE_XLAUI:
306 case I40E_PHY_TYPE_XLPPI:
307 default:
308 media = I40E_MEDIA_TYPE_UNKNOWN;
309 break;
310 }
311
312 return media;
313 }
314
315 #define I40E_PF_RESET_WAIT_COUNT_A0 200
316 #define I40E_PF_RESET_WAIT_COUNT 10
317 /**
318 * i40e_pf_reset - Reset the PF
319 * @hw: pointer to the hardware structure
320 *
321 * Assuming someone else has triggered a global reset,
322 * assure the global reset is complete and then reset the PF
323 **/
324 i40e_status i40e_pf_reset(struct i40e_hw *hw)
325 {
326 u32 cnt = 0;
327 u32 reg = 0;
328 u32 grst_del;
329
330 /* Poll for Global Reset steady state in case of recent GRST.
331 * The grst delay value is in 100ms units, and we'll wait a
332 * couple counts longer to be sure we don't just miss the end.
333 */
334 grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
335 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
336 for (cnt = 0; cnt < grst_del + 2; cnt++) {
337 reg = rd32(hw, I40E_GLGEN_RSTAT);
338 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
339 break;
340 msleep(100);
341 }
342 if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
343 hw_dbg(hw, "Global reset polling failed to complete.\n");
344 return I40E_ERR_RESET_FAILED;
345 }
346
347 /* Determine the PF number based on the PCI fn */
348 reg = rd32(hw, I40E_GLPCI_CAPSUP);
349 if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK)
350 hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func);
351 else
352 hw->pf_id = (u8)hw->bus.func;
353
354 /* If there was a Global Reset in progress when we got here,
355 * we don't need to do the PF Reset
356 */
357 if (!cnt) {
358 if (hw->revision_id == 0)
359 cnt = I40E_PF_RESET_WAIT_COUNT_A0;
360 else
361 cnt = I40E_PF_RESET_WAIT_COUNT;
362 reg = rd32(hw, I40E_PFGEN_CTRL);
363 wr32(hw, I40E_PFGEN_CTRL,
364 (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
365 for (; cnt; cnt--) {
366 reg = rd32(hw, I40E_PFGEN_CTRL);
367 if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
368 break;
369 usleep_range(1000, 2000);
370 }
371 if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
372 hw_dbg(hw, "PF reset polling failed to complete.\n");
373 return I40E_ERR_RESET_FAILED;
374 }
375 }
376
377 i40e_clear_pxe_mode(hw);
378 return 0;
379 }
380
381 /**
382 * i40e_clear_pxe_mode - clear pxe operations mode
383 * @hw: pointer to the hw struct
384 *
385 * Make sure all PXE mode settings are cleared, including things
386 * like descriptor fetch/write-back mode.
387 **/
388 void i40e_clear_pxe_mode(struct i40e_hw *hw)
389 {
390 u32 reg;
391
392 /* Clear single descriptor fetch/write-back mode */
393 reg = rd32(hw, I40E_GLLAN_RCTL_0);
394
395 if (hw->revision_id == 0) {
396 /* As a work around clear PXE_MODE instead of setting it */
397 wr32(hw, I40E_GLLAN_RCTL_0, (reg & (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK)));
398 } else {
399 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
400 }
401 }
402
403 /**
404 * i40e_led_get - return current on/off mode
405 * @hw: pointer to the hw struct
406 *
407 * The value returned is the 'mode' field as defined in the
408 * GPIO register definitions: 0x0 = off, 0xf = on, and other
409 * values are variations of possible behaviors relating to
410 * blink, link, and wire.
411 **/
412 u32 i40e_led_get(struct i40e_hw *hw)
413 {
414 u32 gpio_val = 0;
415 u32 mode = 0;
416 u32 port;
417 int i;
418
419 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
420 if (!hw->func_caps.led[i])
421 continue;
422
423 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
424 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
425 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
426
427 if (port != hw->port)
428 continue;
429
430 mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
431 >> I40E_GLGEN_GPIO_CTL_INT_MODE_SHIFT;
432 break;
433 }
434
435 return mode;
436 }
437
438 /**
439 * i40e_led_set - set new on/off mode
440 * @hw: pointer to the hw struct
441 * @mode: 0=off, else on (see EAS for mode details)
442 **/
443 void i40e_led_set(struct i40e_hw *hw, u32 mode)
444 {
445 u32 gpio_val = 0;
446 u32 led_mode = 0;
447 u32 port;
448 int i;
449
450 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
451 if (!hw->func_caps.led[i])
452 continue;
453
454 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
455 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
456 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
457
458 if (port != hw->port)
459 continue;
460
461 led_mode = (mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
462 I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
463 gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
464 gpio_val |= led_mode;
465 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
466 }
467 }
468
469 /* Admin command wrappers */
470 /**
471 * i40e_aq_queue_shutdown
472 * @hw: pointer to the hw struct
473 * @unloading: is the driver unloading itself
474 *
475 * Tell the Firmware that we're shutting down the AdminQ and whether
476 * or not the driver is unloading as well.
477 **/
478 i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
479 bool unloading)
480 {
481 struct i40e_aq_desc desc;
482 struct i40e_aqc_queue_shutdown *cmd =
483 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
484 i40e_status status;
485
486 i40e_fill_default_direct_cmd_desc(&desc,
487 i40e_aqc_opc_queue_shutdown);
488
489 if (unloading)
490 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
491 status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
492
493 return status;
494 }
495
496 /**
497 * i40e_aq_set_link_restart_an
498 * @hw: pointer to the hw struct
499 * @cmd_details: pointer to command details structure or NULL
500 *
501 * Sets up the link and restarts the Auto-Negotiation over the link.
502 **/
503 i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
504 struct i40e_asq_cmd_details *cmd_details)
505 {
506 struct i40e_aq_desc desc;
507 struct i40e_aqc_set_link_restart_an *cmd =
508 (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
509 i40e_status status;
510
511 i40e_fill_default_direct_cmd_desc(&desc,
512 i40e_aqc_opc_set_link_restart_an);
513
514 cmd->command = I40E_AQ_PHY_RESTART_AN;
515
516 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
517
518 return status;
519 }
520
521 /**
522 * i40e_aq_get_link_info
523 * @hw: pointer to the hw struct
524 * @enable_lse: enable/disable LinkStatusEvent reporting
525 * @link: pointer to link status structure - optional
526 * @cmd_details: pointer to command details structure or NULL
527 *
528 * Returns the link status of the adapter.
529 **/
530 i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
531 bool enable_lse, struct i40e_link_status *link,
532 struct i40e_asq_cmd_details *cmd_details)
533 {
534 struct i40e_aq_desc desc;
535 struct i40e_aqc_get_link_status *resp =
536 (struct i40e_aqc_get_link_status *)&desc.params.raw;
537 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
538 i40e_status status;
539 u16 command_flags;
540
541 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
542
543 if (enable_lse)
544 command_flags = I40E_AQ_LSE_ENABLE;
545 else
546 command_flags = I40E_AQ_LSE_DISABLE;
547 resp->command_flags = cpu_to_le16(command_flags);
548
549 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
550
551 if (status)
552 goto aq_get_link_info_exit;
553
554 /* save off old link status information */
555 memcpy(&hw->phy.link_info_old, hw_link_info,
556 sizeof(struct i40e_link_status));
557
558 /* update link status */
559 hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
560 hw->phy.media_type = i40e_get_media_type(hw);
561 hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
562 hw_link_info->link_info = resp->link_info;
563 hw_link_info->an_info = resp->an_info;
564 hw_link_info->ext_info = resp->ext_info;
565 hw_link_info->loopback = resp->loopback;
566
567 if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
568 hw_link_info->lse_enable = true;
569 else
570 hw_link_info->lse_enable = false;
571
572 /* save link status information */
573 if (link)
574 *link = *hw_link_info;
575
576 /* flag cleared so helper functions don't call AQ again */
577 hw->phy.get_link_info = false;
578
579 aq_get_link_info_exit:
580 return status;
581 }
582
583 /**
584 * i40e_aq_add_vsi
585 * @hw: pointer to the hw struct
586 * @vsi: pointer to a vsi context struct
587 * @cmd_details: pointer to command details structure or NULL
588 *
589 * Add a VSI context to the hardware.
590 **/
591 i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
592 struct i40e_vsi_context *vsi_ctx,
593 struct i40e_asq_cmd_details *cmd_details)
594 {
595 struct i40e_aq_desc desc;
596 struct i40e_aqc_add_get_update_vsi *cmd =
597 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
598 struct i40e_aqc_add_get_update_vsi_completion *resp =
599 (struct i40e_aqc_add_get_update_vsi_completion *)
600 &desc.params.raw;
601 i40e_status status;
602
603 i40e_fill_default_direct_cmd_desc(&desc,
604 i40e_aqc_opc_add_vsi);
605
606 cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
607 cmd->connection_type = vsi_ctx->connection_type;
608 cmd->vf_id = vsi_ctx->vf_num;
609 cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
610
611 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
612 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
613 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
614
615 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
616 sizeof(vsi_ctx->info), cmd_details);
617
618 if (status)
619 goto aq_add_vsi_exit;
620
621 vsi_ctx->seid = le16_to_cpu(resp->seid);
622 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
623 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
624 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
625
626 aq_add_vsi_exit:
627 return status;
628 }
629
630 /**
631 * i40e_aq_set_vsi_unicast_promiscuous
632 * @hw: pointer to the hw struct
633 * @seid: vsi number
634 * @set: set unicast promiscuous enable/disable
635 * @cmd_details: pointer to command details structure or NULL
636 **/
637 i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
638 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
639 {
640 struct i40e_aq_desc desc;
641 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
642 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
643 i40e_status status;
644 u16 flags = 0;
645
646 i40e_fill_default_direct_cmd_desc(&desc,
647 i40e_aqc_opc_set_vsi_promiscuous_modes);
648
649 if (set)
650 flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
651
652 cmd->promiscuous_flags = cpu_to_le16(flags);
653
654 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
655
656 cmd->seid = cpu_to_le16(seid);
657 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
658
659 return status;
660 }
661
662 /**
663 * i40e_aq_set_vsi_multicast_promiscuous
664 * @hw: pointer to the hw struct
665 * @seid: vsi number
666 * @set: set multicast promiscuous enable/disable
667 * @cmd_details: pointer to command details structure or NULL
668 **/
669 i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
670 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
671 {
672 struct i40e_aq_desc desc;
673 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
674 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
675 i40e_status status;
676 u16 flags = 0;
677
678 i40e_fill_default_direct_cmd_desc(&desc,
679 i40e_aqc_opc_set_vsi_promiscuous_modes);
680
681 if (set)
682 flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
683
684 cmd->promiscuous_flags = cpu_to_le16(flags);
685
686 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
687
688 cmd->seid = cpu_to_le16(seid);
689 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
690
691 return status;
692 }
693
694 /**
695 * i40e_aq_set_vsi_broadcast
696 * @hw: pointer to the hw struct
697 * @seid: vsi number
698 * @set_filter: true to set filter, false to clear filter
699 * @cmd_details: pointer to command details structure or NULL
700 *
701 * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
702 **/
703 i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
704 u16 seid, bool set_filter,
705 struct i40e_asq_cmd_details *cmd_details)
706 {
707 struct i40e_aq_desc desc;
708 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
709 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
710 i40e_status status;
711
712 i40e_fill_default_direct_cmd_desc(&desc,
713 i40e_aqc_opc_set_vsi_promiscuous_modes);
714
715 if (set_filter)
716 cmd->promiscuous_flags
717 |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
718 else
719 cmd->promiscuous_flags
720 &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);
721
722 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
723 cmd->seid = cpu_to_le16(seid);
724 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
725
726 return status;
727 }
728
729 /**
730 * i40e_get_vsi_params - get VSI configuration info
731 * @hw: pointer to the hw struct
732 * @vsi: pointer to a vsi context struct
733 * @cmd_details: pointer to command details structure or NULL
734 **/
735 i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
736 struct i40e_vsi_context *vsi_ctx,
737 struct i40e_asq_cmd_details *cmd_details)
738 {
739 struct i40e_aq_desc desc;
740 struct i40e_aqc_switch_seid *cmd =
741 (struct i40e_aqc_switch_seid *)&desc.params.raw;
742 struct i40e_aqc_add_get_update_vsi_completion *resp =
743 (struct i40e_aqc_add_get_update_vsi_completion *)
744 &desc.params.raw;
745 i40e_status status;
746
747 i40e_fill_default_direct_cmd_desc(&desc,
748 i40e_aqc_opc_get_vsi_parameters);
749
750 cmd->seid = cpu_to_le16(vsi_ctx->seid);
751
752 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
753 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
754 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
755
756 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
757 sizeof(vsi_ctx->info), NULL);
758
759 if (status)
760 goto aq_get_vsi_params_exit;
761
762 vsi_ctx->seid = le16_to_cpu(resp->seid);
763 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
764 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
765 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
766
767 aq_get_vsi_params_exit:
768 return status;
769 }
770
771 /**
772 * i40e_aq_update_vsi_params
773 * @hw: pointer to the hw struct
774 * @vsi: pointer to a vsi context struct
775 * @cmd_details: pointer to command details structure or NULL
776 *
777 * Update a VSI context.
778 **/
779 i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
780 struct i40e_vsi_context *vsi_ctx,
781 struct i40e_asq_cmd_details *cmd_details)
782 {
783 struct i40e_aq_desc desc;
784 struct i40e_aqc_switch_seid *cmd =
785 (struct i40e_aqc_switch_seid *)&desc.params.raw;
786 i40e_status status;
787
788 i40e_fill_default_direct_cmd_desc(&desc,
789 i40e_aqc_opc_update_vsi_parameters);
790 cmd->seid = cpu_to_le16(vsi_ctx->seid);
791
792 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
793 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
794 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
795
796 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
797 sizeof(vsi_ctx->info), cmd_details);
798
799 return status;
800 }
801
802 /**
803 * i40e_aq_get_switch_config
804 * @hw: pointer to the hardware structure
805 * @buf: pointer to the result buffer
806 * @buf_size: length of input buffer
807 * @start_seid: seid to start for the report, 0 == beginning
808 * @cmd_details: pointer to command details structure or NULL
809 *
810 * Fill the buf with switch configuration returned from AdminQ command
811 **/
812 i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
813 struct i40e_aqc_get_switch_config_resp *buf,
814 u16 buf_size, u16 *start_seid,
815 struct i40e_asq_cmd_details *cmd_details)
816 {
817 struct i40e_aq_desc desc;
818 struct i40e_aqc_switch_seid *scfg =
819 (struct i40e_aqc_switch_seid *)&desc.params.raw;
820 i40e_status status;
821
822 i40e_fill_default_direct_cmd_desc(&desc,
823 i40e_aqc_opc_get_switch_config);
824 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
825 if (buf_size > I40E_AQ_LARGE_BUF)
826 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
827 scfg->seid = cpu_to_le16(*start_seid);
828
829 status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
830 *start_seid = le16_to_cpu(scfg->seid);
831
832 return status;
833 }
834
835 /**
836 * i40e_aq_get_firmware_version
837 * @hw: pointer to the hw struct
838 * @fw_major_version: firmware major version
839 * @fw_minor_version: firmware minor version
840 * @api_major_version: major queue version
841 * @api_minor_version: minor queue version
842 * @cmd_details: pointer to command details structure or NULL
843 *
844 * Get the firmware version from the admin queue commands
845 **/
846 i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
847 u16 *fw_major_version, u16 *fw_minor_version,
848 u16 *api_major_version, u16 *api_minor_version,
849 struct i40e_asq_cmd_details *cmd_details)
850 {
851 struct i40e_aq_desc desc;
852 struct i40e_aqc_get_version *resp =
853 (struct i40e_aqc_get_version *)&desc.params.raw;
854 i40e_status status;
855
856 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);
857
858 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
859
860 if (!status) {
861 if (fw_major_version != NULL)
862 *fw_major_version = le16_to_cpu(resp->fw_major);
863 if (fw_minor_version != NULL)
864 *fw_minor_version = le16_to_cpu(resp->fw_minor);
865 if (api_major_version != NULL)
866 *api_major_version = le16_to_cpu(resp->api_major);
867 if (api_minor_version != NULL)
868 *api_minor_version = le16_to_cpu(resp->api_minor);
869 }
870
871 return status;
872 }
873
874 /**
875 * i40e_aq_send_driver_version
876 * @hw: pointer to the hw struct
877 * @event: driver event: driver ok, start or stop
878 * @dv: driver's major, minor version
879 * @cmd_details: pointer to command details structure or NULL
880 *
881 * Send the driver version to the firmware
882 **/
883 i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
884 struct i40e_driver_version *dv,
885 struct i40e_asq_cmd_details *cmd_details)
886 {
887 struct i40e_aq_desc desc;
888 struct i40e_aqc_driver_version *cmd =
889 (struct i40e_aqc_driver_version *)&desc.params.raw;
890 i40e_status status;
891
892 if (dv == NULL)
893 return I40E_ERR_PARAM;
894
895 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
896
897 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI);
898 cmd->driver_major_ver = dv->major_version;
899 cmd->driver_minor_ver = dv->minor_version;
900 cmd->driver_build_ver = dv->build_version;
901 cmd->driver_subbuild_ver = dv->subbuild_version;
902 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
903
904 return status;
905 }
906
907 /**
908 * i40e_get_link_status - get status of the HW network link
909 * @hw: pointer to the hw struct
910 *
911 * Returns true if link is up, false if link is down.
912 *
913 * Side effect: LinkStatusEvent reporting becomes enabled
914 **/
915 bool i40e_get_link_status(struct i40e_hw *hw)
916 {
917 i40e_status status = 0;
918 bool link_status = false;
919
920 if (hw->phy.get_link_info) {
921 status = i40e_aq_get_link_info(hw, true, NULL, NULL);
922
923 if (status)
924 goto i40e_get_link_status_exit;
925 }
926
927 link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
928
929 i40e_get_link_status_exit:
930 return link_status;
931 }
932
933 /**
934 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
935 * @hw: pointer to the hw struct
936 * @uplink_seid: the MAC or other gizmo SEID
937 * @downlink_seid: the VSI SEID
938 * @enabled_tc: bitmap of TCs to be enabled
939 * @default_port: true for default port VSI, false for control port
940 * @enable_l2_filtering: true to add L2 filter table rules to regular forwarding rules for cloud support
941 * @veb_seid: pointer to where to put the resulting VEB SEID
942 * @cmd_details: pointer to command details structure or NULL
943 *
944 * This asks the FW to add a VEB between the uplink and downlink
945 * elements. If the uplink SEID is 0, this will be a floating VEB.
946 **/
947 i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
948 u16 downlink_seid, u8 enabled_tc,
949 bool default_port, bool enable_l2_filtering,
950 u16 *veb_seid,
951 struct i40e_asq_cmd_details *cmd_details)
952 {
953 struct i40e_aq_desc desc;
954 struct i40e_aqc_add_veb *cmd =
955 (struct i40e_aqc_add_veb *)&desc.params.raw;
956 struct i40e_aqc_add_veb_completion *resp =
957 (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
958 i40e_status status;
959 u16 veb_flags = 0;
960
961 /* SEIDs need to either both be set or both be 0 for floating VEB */
962 if (!!uplink_seid != !!downlink_seid)
963 return I40E_ERR_PARAM;
964
965 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
966
967 cmd->uplink_seid = cpu_to_le16(uplink_seid);
968 cmd->downlink_seid = cpu_to_le16(downlink_seid);
969 cmd->enable_tcs = enabled_tc;
970 if (!uplink_seid)
971 veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
972 if (default_port)
973 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
974 else
975 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;
976
977 if (enable_l2_filtering)
978 veb_flags |= I40E_AQC_ADD_VEB_ENABLE_L2_FILTER;
979
980 cmd->veb_flags = cpu_to_le16(veb_flags);
981
982 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
983
984 if (!status && veb_seid)
985 *veb_seid = le16_to_cpu(resp->veb_seid);
986
987 return status;
988 }
989
990 /**
991 * i40e_aq_get_veb_parameters - Retrieve VEB parameters
992 * @hw: pointer to the hw struct
993 * @veb_seid: the SEID of the VEB to query
994 * @switch_id: the uplink switch id
995 * @floating_veb: set to true if the VEB is floating
996 * @statistic_index: index of the stats counter block for this VEB
997 * @vebs_used: number of VEB's used by function
998 * @vebs_unallocated: total VEB's not reserved by any function
999 * @cmd_details: pointer to command details structure or NULL
1000 *
1001 * This retrieves the parameters for a particular VEB, specified by
1002 * uplink_seid, and returns them to the caller.
1003 **/
1004 i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
1005 u16 veb_seid, u16 *switch_id,
1006 bool *floating, u16 *statistic_index,
1007 u16 *vebs_used, u16 *vebs_free,
1008 struct i40e_asq_cmd_details *cmd_details)
1009 {
1010 struct i40e_aq_desc desc;
1011 struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
1012 (struct i40e_aqc_get_veb_parameters_completion *)
1013 &desc.params.raw;
1014 i40e_status status;
1015
1016 if (veb_seid == 0)
1017 return I40E_ERR_PARAM;
1018
1019 i40e_fill_default_direct_cmd_desc(&desc,
1020 i40e_aqc_opc_get_veb_parameters);
1021 cmd_resp->seid = cpu_to_le16(veb_seid);
1022
1023 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1024 if (status)
1025 goto get_veb_exit;
1026
1027 if (switch_id)
1028 *switch_id = le16_to_cpu(cmd_resp->switch_id);
1029 if (statistic_index)
1030 *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
1031 if (vebs_used)
1032 *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
1033 if (vebs_free)
1034 *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
1035 if (floating) {
1036 u16 flags = le16_to_cpu(cmd_resp->veb_flags);
1037 if (flags & I40E_AQC_ADD_VEB_FLOATING)
1038 *floating = true;
1039 else
1040 *floating = false;
1041 }
1042
1043 get_veb_exit:
1044 return status;
1045 }
1046
1047 /**
1048 * i40e_aq_add_macvlan
1049 * @hw: pointer to the hw struct
1050 * @seid: VSI for the mac address
1051 * @mv_list: list of macvlans to be added
1052 * @count: length of the list
1053 * @cmd_details: pointer to command details structure or NULL
1054 *
1055 * Add MAC/VLAN addresses to the HW filtering
1056 **/
1057 i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
1058 struct i40e_aqc_add_macvlan_element_data *mv_list,
1059 u16 count, struct i40e_asq_cmd_details *cmd_details)
1060 {
1061 struct i40e_aq_desc desc;
1062 struct i40e_aqc_macvlan *cmd =
1063 (struct i40e_aqc_macvlan *)&desc.params.raw;
1064 i40e_status status;
1065 u16 buf_size;
1066
1067 if (count == 0 || !mv_list || !hw)
1068 return I40E_ERR_PARAM;
1069
1070 buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data);
1071
1072 /* prep the rest of the request */
1073 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
1074 cmd->num_addresses = cpu_to_le16(count);
1075 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1076 cmd->seid[1] = 0;
1077 cmd->seid[2] = 0;
1078
1079 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1080 if (buf_size > I40E_AQ_LARGE_BUF)
1081 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1082
1083 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1084 cmd_details);
1085
1086 return status;
1087 }
1088
1089 /**
1090 * i40e_aq_remove_macvlan
1091 * @hw: pointer to the hw struct
1092 * @seid: VSI for the mac address
1093 * @mv_list: list of macvlans to be removed
1094 * @count: length of the list
1095 * @cmd_details: pointer to command details structure or NULL
1096 *
1097 * Remove MAC/VLAN addresses from the HW filtering
1098 **/
1099 i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
1100 struct i40e_aqc_remove_macvlan_element_data *mv_list,
1101 u16 count, struct i40e_asq_cmd_details *cmd_details)
1102 {
1103 struct i40e_aq_desc desc;
1104 struct i40e_aqc_macvlan *cmd =
1105 (struct i40e_aqc_macvlan *)&desc.params.raw;
1106 i40e_status status;
1107 u16 buf_size;
1108
1109 if (count == 0 || !mv_list || !hw)
1110 return I40E_ERR_PARAM;
1111
1112 buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data);
1113
1114 /* prep the rest of the request */
1115 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
1116 cmd->num_addresses = cpu_to_le16(count);
1117 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1118 cmd->seid[1] = 0;
1119 cmd->seid[2] = 0;
1120
1121 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1122 if (buf_size > I40E_AQ_LARGE_BUF)
1123 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1124
1125 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1126 cmd_details);
1127
1128 return status;
1129 }
1130
1131 /**
1132 * i40e_aq_add_vlan - Add VLAN ids to the HW filtering
1133 * @hw: pointer to the hw struct
1134 * @seid: VSI for the vlan filters
1135 * @v_list: list of vlan filters to be added
1136 * @count: length of the list
1137 * @cmd_details: pointer to command details structure or NULL
1138 **/
1139 i40e_status i40e_aq_add_vlan(struct i40e_hw *hw, u16 seid,
1140 struct i40e_aqc_add_remove_vlan_element_data *v_list,
1141 u8 count, struct i40e_asq_cmd_details *cmd_details)
1142 {
1143 struct i40e_aq_desc desc;
1144 struct i40e_aqc_macvlan *cmd =
1145 (struct i40e_aqc_macvlan *)&desc.params.raw;
1146 i40e_status status;
1147 u16 buf_size;
1148
1149 if (count == 0 || !v_list || !hw)
1150 return I40E_ERR_PARAM;
1151
1152 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data);
1153
1154 /* prep the rest of the request */
1155 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_vlan);
1156 cmd->num_addresses = cpu_to_le16(count);
1157 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID);
1158 cmd->seid[1] = 0;
1159 cmd->seid[2] = 0;
1160
1161 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1162 if (buf_size > I40E_AQ_LARGE_BUF)
1163 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1164
1165 status = i40e_asq_send_command(hw, &desc, v_list, buf_size,
1166 cmd_details);
1167
1168 return status;
1169 }
1170
1171 /**
1172 * i40e_aq_remove_vlan - Remove VLANs from the HW filtering
1173 * @hw: pointer to the hw struct
1174 * @seid: VSI for the vlan filters
1175 * @v_list: list of macvlans to be removed
1176 * @count: length of the list
1177 * @cmd_details: pointer to command details structure or NULL
1178 **/
1179 i40e_status i40e_aq_remove_vlan(struct i40e_hw *hw, u16 seid,
1180 struct i40e_aqc_add_remove_vlan_element_data *v_list,
1181 u8 count, struct i40e_asq_cmd_details *cmd_details)
1182 {
1183 struct i40e_aq_desc desc;
1184 struct i40e_aqc_macvlan *cmd =
1185 (struct i40e_aqc_macvlan *)&desc.params.raw;
1186 i40e_status status;
1187 u16 buf_size;
1188
1189 if (count == 0 || !v_list || !hw)
1190 return I40E_ERR_PARAM;
1191
1192 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data);
1193
1194 /* prep the rest of the request */
1195 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_vlan);
1196 cmd->num_addresses = cpu_to_le16(count);
1197 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID);
1198 cmd->seid[1] = 0;
1199 cmd->seid[2] = 0;
1200
1201 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1202 if (buf_size > I40E_AQ_LARGE_BUF)
1203 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1204
1205 status = i40e_asq_send_command(hw, &desc, v_list, buf_size,
1206 cmd_details);
1207
1208 return status;
1209 }
1210
1211 /**
1212 * i40e_aq_send_msg_to_vf
1213 * @hw: pointer to the hardware structure
1214 * @vfid: vf id to send msg
1215 * @msg: pointer to the msg buffer
1216 * @msglen: msg length
1217 * @cmd_details: pointer to command details
1218 *
1219 * send msg to vf
1220 **/
1221 i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
1222 u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
1223 struct i40e_asq_cmd_details *cmd_details)
1224 {
1225 struct i40e_aq_desc desc;
1226 struct i40e_aqc_pf_vf_message *cmd =
1227 (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
1228 i40e_status status;
1229
1230 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
1231 cmd->id = cpu_to_le32(vfid);
1232 desc.cookie_high = cpu_to_le32(v_opcode);
1233 desc.cookie_low = cpu_to_le32(v_retval);
1234 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1235 if (msglen) {
1236 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
1237 I40E_AQ_FLAG_RD));
1238 if (msglen > I40E_AQ_LARGE_BUF)
1239 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1240 desc.datalen = cpu_to_le16(msglen);
1241 }
1242 status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1243
1244 return status;
1245 }
1246
1247 /**
1248 * i40e_aq_set_hmc_resource_profile
1249 * @hw: pointer to the hw struct
1250 * @profile: type of profile the HMC is to be set as
1251 * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1252 * @cmd_details: pointer to command details structure or NULL
1253 *
1254 * set the HMC profile of the device.
1255 **/
1256 i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
1257 enum i40e_aq_hmc_profile profile,
1258 u8 pe_vf_enabled_count,
1259 struct i40e_asq_cmd_details *cmd_details)
1260 {
1261 struct i40e_aq_desc desc;
1262 struct i40e_aq_get_set_hmc_resource_profile *cmd =
1263 (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
1264 i40e_status status;
1265
1266 i40e_fill_default_direct_cmd_desc(&desc,
1267 i40e_aqc_opc_set_hmc_resource_profile);
1268
1269 cmd->pm_profile = (u8)profile;
1270 cmd->pe_vf_enabled = pe_vf_enabled_count;
1271
1272 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1273
1274 return status;
1275 }
1276
1277 /**
1278 * i40e_aq_request_resource
1279 * @hw: pointer to the hw struct
1280 * @resource: resource id
1281 * @access: access type
1282 * @sdp_number: resource number
1283 * @timeout: the maximum time in ms that the driver may hold the resource
1284 * @cmd_details: pointer to command details structure or NULL
1285 *
1286 * requests common resource using the admin queue commands
1287 **/
1288 i40e_status i40e_aq_request_resource(struct i40e_hw *hw,
1289 enum i40e_aq_resources_ids resource,
1290 enum i40e_aq_resource_access_type access,
1291 u8 sdp_number, u64 *timeout,
1292 struct i40e_asq_cmd_details *cmd_details)
1293 {
1294 struct i40e_aq_desc desc;
1295 struct i40e_aqc_request_resource *cmd_resp =
1296 (struct i40e_aqc_request_resource *)&desc.params.raw;
1297 i40e_status status;
1298
1299 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource);
1300
1301 cmd_resp->resource_id = cpu_to_le16(resource);
1302 cmd_resp->access_type = cpu_to_le16(access);
1303 cmd_resp->resource_number = cpu_to_le32(sdp_number);
1304
1305 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1306 /* The completion specifies the maximum time in ms that the driver
1307 * may hold the resource in the Timeout field.
1308 * If the resource is held by someone else, the command completes with
1309 * busy return value and the timeout field indicates the maximum time
1310 * the current owner of the resource has to free it.
1311 */
1312 if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)
1313 *timeout = le32_to_cpu(cmd_resp->timeout);
1314
1315 return status;
1316 }
1317
1318 /**
1319 * i40e_aq_release_resource
1320 * @hw: pointer to the hw struct
1321 * @resource: resource id
1322 * @sdp_number: resource number
1323 * @cmd_details: pointer to command details structure or NULL
1324 *
1325 * release common resource using the admin queue commands
1326 **/
1327 i40e_status i40e_aq_release_resource(struct i40e_hw *hw,
1328 enum i40e_aq_resources_ids resource,
1329 u8 sdp_number,
1330 struct i40e_asq_cmd_details *cmd_details)
1331 {
1332 struct i40e_aq_desc desc;
1333 struct i40e_aqc_request_resource *cmd =
1334 (struct i40e_aqc_request_resource *)&desc.params.raw;
1335 i40e_status status;
1336
1337 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource);
1338
1339 cmd->resource_id = cpu_to_le16(resource);
1340 cmd->resource_number = cpu_to_le32(sdp_number);
1341
1342 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1343
1344 return status;
1345 }
1346
1347 /**
1348 * i40e_aq_read_nvm
1349 * @hw: pointer to the hw struct
1350 * @module_pointer: module pointer location in words from the NVM beginning
1351 * @offset: byte offset from the module beginning
1352 * @length: length of the section to be read (in bytes from the offset)
1353 * @data: command buffer (size [bytes] = length)
1354 * @last_command: tells if this is the last command in a series
1355 * @cmd_details: pointer to command details structure or NULL
1356 *
1357 * Read the NVM using the admin queue commands
1358 **/
1359 i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
1360 u32 offset, u16 length, void *data,
1361 bool last_command,
1362 struct i40e_asq_cmd_details *cmd_details)
1363 {
1364 struct i40e_aq_desc desc;
1365 struct i40e_aqc_nvm_update *cmd =
1366 (struct i40e_aqc_nvm_update *)&desc.params.raw;
1367 i40e_status status;
1368
1369 /* In offset the highest byte must be zeroed. */
1370 if (offset & 0xFF000000) {
1371 status = I40E_ERR_PARAM;
1372 goto i40e_aq_read_nvm_exit;
1373 }
1374
1375 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read);
1376
1377 /* If this is the last command in a series, set the proper flag. */
1378 if (last_command)
1379 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
1380 cmd->module_pointer = module_pointer;
1381 cmd->offset = cpu_to_le32(offset);
1382 cmd->length = cpu_to_le16(length);
1383
1384 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1385 if (length > I40E_AQ_LARGE_BUF)
1386 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1387
1388 status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);
1389
1390 i40e_aq_read_nvm_exit:
1391 return status;
1392 }
1393
1394 #define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
1395 #define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
1396 #define I40E_DEV_FUNC_CAP_NPAR 0x03
1397 #define I40E_DEV_FUNC_CAP_OS2BMC 0x04
1398 #define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
1399 #define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
1400 #define I40E_DEV_FUNC_CAP_VF 0x13
1401 #define I40E_DEV_FUNC_CAP_VMDQ 0x14
1402 #define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
1403 #define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
1404 #define I40E_DEV_FUNC_CAP_VSI 0x17
1405 #define I40E_DEV_FUNC_CAP_DCB 0x18
1406 #define I40E_DEV_FUNC_CAP_FCOE 0x21
1407 #define I40E_DEV_FUNC_CAP_RSS 0x40
1408 #define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
1409 #define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
1410 #define I40E_DEV_FUNC_CAP_MSIX 0x43
1411 #define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
1412 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1413 #define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
1414 #define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1
1415 #define I40E_DEV_FUNC_CAP_CEM 0xF2
1416 #define I40E_DEV_FUNC_CAP_IWARP 0x51
1417 #define I40E_DEV_FUNC_CAP_LED 0x61
1418 #define I40E_DEV_FUNC_CAP_SDP 0x62
1419 #define I40E_DEV_FUNC_CAP_MDIO 0x63
1420
1421 /**
1422 * i40e_parse_discover_capabilities
1423 * @hw: pointer to the hw struct
1424 * @buff: pointer to a buffer containing device/function capability records
1425 * @cap_count: number of capability records in the list
1426 * @list_type_opc: type of capabilities list to parse
1427 *
1428 * Parse the device/function capabilities list.
1429 **/
1430 static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
1431 u32 cap_count,
1432 enum i40e_admin_queue_opc list_type_opc)
1433 {
1434 struct i40e_aqc_list_capabilities_element_resp *cap;
1435 u32 number, logical_id, phys_id;
1436 struct i40e_hw_capabilities *p;
1437 u32 reg_val;
1438 u32 i = 0;
1439 u16 id;
1440
1441 cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
1442
1443 if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
1444 p = (struct i40e_hw_capabilities *)&hw->dev_caps;
1445 else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
1446 p = (struct i40e_hw_capabilities *)&hw->func_caps;
1447 else
1448 return;
1449
1450 for (i = 0; i < cap_count; i++, cap++) {
1451 id = le16_to_cpu(cap->id);
1452 number = le32_to_cpu(cap->number);
1453 logical_id = le32_to_cpu(cap->logical_id);
1454 phys_id = le32_to_cpu(cap->phys_id);
1455
1456 switch (id) {
1457 case I40E_DEV_FUNC_CAP_SWITCH_MODE:
1458 p->switch_mode = number;
1459 break;
1460 case I40E_DEV_FUNC_CAP_MGMT_MODE:
1461 p->management_mode = number;
1462 break;
1463 case I40E_DEV_FUNC_CAP_NPAR:
1464 p->npar_enable = number;
1465 break;
1466 case I40E_DEV_FUNC_CAP_OS2BMC:
1467 p->os2bmc = number;
1468 break;
1469 case I40E_DEV_FUNC_CAP_VALID_FUNC:
1470 p->valid_functions = number;
1471 break;
1472 case I40E_DEV_FUNC_CAP_SRIOV_1_1:
1473 if (number == 1)
1474 p->sr_iov_1_1 = true;
1475 break;
1476 case I40E_DEV_FUNC_CAP_VF:
1477 p->num_vfs = number;
1478 p->vf_base_id = logical_id;
1479 break;
1480 case I40E_DEV_FUNC_CAP_VMDQ:
1481 if (number == 1)
1482 p->vmdq = true;
1483 break;
1484 case I40E_DEV_FUNC_CAP_802_1_QBG:
1485 if (number == 1)
1486 p->evb_802_1_qbg = true;
1487 break;
1488 case I40E_DEV_FUNC_CAP_802_1_QBH:
1489 if (number == 1)
1490 p->evb_802_1_qbh = true;
1491 break;
1492 case I40E_DEV_FUNC_CAP_VSI:
1493 p->num_vsis = number;
1494 break;
1495 case I40E_DEV_FUNC_CAP_DCB:
1496 if (number == 1) {
1497 p->dcb = true;
1498 p->enabled_tcmap = logical_id;
1499 p->maxtc = phys_id;
1500 }
1501 break;
1502 case I40E_DEV_FUNC_CAP_FCOE:
1503 if (number == 1)
1504 p->fcoe = true;
1505 break;
1506 case I40E_DEV_FUNC_CAP_RSS:
1507 p->rss = true;
1508 reg_val = rd32(hw, I40E_PFQF_CTL_0);
1509 if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
1510 p->rss_table_size = number;
1511 else
1512 p->rss_table_size = 128;
1513 p->rss_table_entry_width = logical_id;
1514 break;
1515 case I40E_DEV_FUNC_CAP_RX_QUEUES:
1516 p->num_rx_qp = number;
1517 p->base_queue = phys_id;
1518 break;
1519 case I40E_DEV_FUNC_CAP_TX_QUEUES:
1520 p->num_tx_qp = number;
1521 p->base_queue = phys_id;
1522 break;
1523 case I40E_DEV_FUNC_CAP_MSIX:
1524 p->num_msix_vectors = number;
1525 break;
1526 case I40E_DEV_FUNC_CAP_MSIX_VF:
1527 p->num_msix_vectors_vf = number;
1528 break;
1529 case I40E_DEV_FUNC_CAP_MFP_MODE_1:
1530 if (number == 1)
1531 p->mfp_mode_1 = true;
1532 break;
1533 case I40E_DEV_FUNC_CAP_CEM:
1534 if (number == 1)
1535 p->mgmt_cem = true;
1536 break;
1537 case I40E_DEV_FUNC_CAP_IWARP:
1538 if (number == 1)
1539 p->iwarp = true;
1540 break;
1541 case I40E_DEV_FUNC_CAP_LED:
1542 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1543 p->led[phys_id] = true;
1544 break;
1545 case I40E_DEV_FUNC_CAP_SDP:
1546 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1547 p->sdp[phys_id] = true;
1548 break;
1549 case I40E_DEV_FUNC_CAP_MDIO:
1550 if (number == 1) {
1551 p->mdio_port_num = phys_id;
1552 p->mdio_port_mode = logical_id;
1553 }
1554 break;
1555 case I40E_DEV_FUNC_CAP_IEEE_1588:
1556 if (number == 1)
1557 p->ieee_1588 = true;
1558 break;
1559 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:
1560 p->fd = true;
1561 p->fd_filters_guaranteed = number;
1562 p->fd_filters_best_effort = logical_id;
1563 break;
1564 default:
1565 break;
1566 }
1567 }
1568
1569 /* additional HW specific goodies that might
1570 * someday be HW version specific
1571 */
1572 p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
1573 }
1574
1575 /**
1576 * i40e_aq_discover_capabilities
1577 * @hw: pointer to the hw struct
1578 * @buff: a virtual buffer to hold the capabilities
1579 * @buff_size: Size of the virtual buffer
1580 * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1581 * @list_type_opc: capabilities type to discover - pass in the command opcode
1582 * @cmd_details: pointer to command details structure or NULL
1583 *
1584 * Get the device capabilities descriptions from the firmware
1585 **/
1586 i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
1587 void *buff, u16 buff_size, u16 *data_size,
1588 enum i40e_admin_queue_opc list_type_opc,
1589 struct i40e_asq_cmd_details *cmd_details)
1590 {
1591 struct i40e_aqc_list_capabilites *cmd;
1592 i40e_status status = 0;
1593 struct i40e_aq_desc desc;
1594
1595 cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
1596
1597 if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&
1598 list_type_opc != i40e_aqc_opc_list_dev_capabilities) {
1599 status = I40E_ERR_PARAM;
1600 goto exit;
1601 }
1602
1603 i40e_fill_default_direct_cmd_desc(&desc, list_type_opc);
1604
1605 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1606 if (buff_size > I40E_AQ_LARGE_BUF)
1607 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1608
1609 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1610 *data_size = le16_to_cpu(desc.datalen);
1611
1612 if (status)
1613 goto exit;
1614
1615 i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count),
1616 list_type_opc);
1617
1618 exit:
1619 return status;
1620 }
1621
1622 /**
1623 * i40e_aq_get_lldp_mib
1624 * @hw: pointer to the hw struct
1625 * @bridge_type: type of bridge requested
1626 * @mib_type: Local, Remote or both Local and Remote MIBs
1627 * @buff: pointer to a user supplied buffer to store the MIB block
1628 * @buff_size: size of the buffer (in bytes)
1629 * @local_len : length of the returned Local LLDP MIB
1630 * @remote_len: length of the returned Remote LLDP MIB
1631 * @cmd_details: pointer to command details structure or NULL
1632 *
1633 * Requests the complete LLDP MIB (entire packet).
1634 **/
1635 i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
1636 u8 mib_type, void *buff, u16 buff_size,
1637 u16 *local_len, u16 *remote_len,
1638 struct i40e_asq_cmd_details *cmd_details)
1639 {
1640 struct i40e_aq_desc desc;
1641 struct i40e_aqc_lldp_get_mib *cmd =
1642 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1643 struct i40e_aqc_lldp_get_mib *resp =
1644 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1645 i40e_status status;
1646
1647 if (buff_size == 0 || !buff)
1648 return I40E_ERR_PARAM;
1649
1650 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);
1651 /* Indirect Command */
1652 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1653
1654 cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK;
1655 cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) &
1656 I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
1657
1658 desc.datalen = cpu_to_le16(buff_size);
1659
1660 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1661 if (buff_size > I40E_AQ_LARGE_BUF)
1662 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1663
1664 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1665 if (!status) {
1666 if (local_len != NULL)
1667 *local_len = le16_to_cpu(resp->local_len);
1668 if (remote_len != NULL)
1669 *remote_len = le16_to_cpu(resp->remote_len);
1670 }
1671
1672 return status;
1673 }
1674
1675 /**
1676 * i40e_aq_cfg_lldp_mib_change_event
1677 * @hw: pointer to the hw struct
1678 * @enable_update: Enable or Disable event posting
1679 * @cmd_details: pointer to command details structure or NULL
1680 *
1681 * Enable or Disable posting of an event on ARQ when LLDP MIB
1682 * associated with the interface changes
1683 **/
1684 i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
1685 bool enable_update,
1686 struct i40e_asq_cmd_details *cmd_details)
1687 {
1688 struct i40e_aq_desc desc;
1689 struct i40e_aqc_lldp_update_mib *cmd =
1690 (struct i40e_aqc_lldp_update_mib *)&desc.params.raw;
1691 i40e_status status;
1692
1693 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib);
1694
1695 if (!enable_update)
1696 cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;
1697
1698 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1699
1700 return status;
1701 }
1702
1703 /**
1704 * i40e_aq_stop_lldp
1705 * @hw: pointer to the hw struct
1706 * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1707 * @cmd_details: pointer to command details structure or NULL
1708 *
1709 * Stop or Shutdown the embedded LLDP Agent
1710 **/
1711 i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
1712 struct i40e_asq_cmd_details *cmd_details)
1713 {
1714 struct i40e_aq_desc desc;
1715 struct i40e_aqc_lldp_stop *cmd =
1716 (struct i40e_aqc_lldp_stop *)&desc.params.raw;
1717 i40e_status status;
1718
1719 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop);
1720
1721 if (shutdown_agent)
1722 cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;
1723
1724 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1725
1726 return status;
1727 }
1728
1729 /**
1730 * i40e_aq_start_lldp
1731 * @hw: pointer to the hw struct
1732 * @cmd_details: pointer to command details structure or NULL
1733 *
1734 * Start the embedded LLDP Agent on all ports.
1735 **/
1736 i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
1737 struct i40e_asq_cmd_details *cmd_details)
1738 {
1739 struct i40e_aq_desc desc;
1740 struct i40e_aqc_lldp_start *cmd =
1741 (struct i40e_aqc_lldp_start *)&desc.params.raw;
1742 i40e_status status;
1743
1744 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start);
1745
1746 cmd->command = I40E_AQ_LLDP_AGENT_START;
1747
1748 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1749
1750 return status;
1751 }
1752
1753 /**
1754 * i40e_aq_delete_element - Delete switch element
1755 * @hw: pointer to the hw struct
1756 * @seid: the SEID to delete from the switch
1757 * @cmd_details: pointer to command details structure or NULL
1758 *
1759 * This deletes a switch element from the switch.
1760 **/
1761 i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
1762 struct i40e_asq_cmd_details *cmd_details)
1763 {
1764 struct i40e_aq_desc desc;
1765 struct i40e_aqc_switch_seid *cmd =
1766 (struct i40e_aqc_switch_seid *)&desc.params.raw;
1767 i40e_status status;
1768
1769 if (seid == 0)
1770 return I40E_ERR_PARAM;
1771
1772 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
1773
1774 cmd->seid = cpu_to_le16(seid);
1775
1776 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1777
1778 return status;
1779 }
1780
1781 /**
1782 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1783 * @hw: pointer to the hw struct
1784 * @seid: seid for the physical port/switching component/vsi
1785 * @buff: Indirect buffer to hold data parameters and response
1786 * @buff_size: Indirect buffer size
1787 * @opcode: Tx scheduler AQ command opcode
1788 * @cmd_details: pointer to command details structure or NULL
1789 *
1790 * Generic command handler for Tx scheduler AQ commands
1791 **/
1792 static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
1793 void *buff, u16 buff_size,
1794 enum i40e_admin_queue_opc opcode,
1795 struct i40e_asq_cmd_details *cmd_details)
1796 {
1797 struct i40e_aq_desc desc;
1798 struct i40e_aqc_tx_sched_ind *cmd =
1799 (struct i40e_aqc_tx_sched_ind *)&desc.params.raw;
1800 i40e_status status;
1801 bool cmd_param_flag = false;
1802
1803 switch (opcode) {
1804 case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit:
1805 case i40e_aqc_opc_configure_vsi_tc_bw:
1806 case i40e_aqc_opc_enable_switching_comp_ets:
1807 case i40e_aqc_opc_modify_switching_comp_ets:
1808 case i40e_aqc_opc_disable_switching_comp_ets:
1809 case i40e_aqc_opc_configure_switching_comp_ets_bw_limit:
1810 case i40e_aqc_opc_configure_switching_comp_bw_config:
1811 cmd_param_flag = true;
1812 break;
1813 case i40e_aqc_opc_query_vsi_bw_config:
1814 case i40e_aqc_opc_query_vsi_ets_sla_config:
1815 case i40e_aqc_opc_query_switching_comp_ets_config:
1816 case i40e_aqc_opc_query_port_ets_config:
1817 case i40e_aqc_opc_query_switching_comp_bw_config:
1818 cmd_param_flag = false;
1819 break;
1820 default:
1821 return I40E_ERR_PARAM;
1822 }
1823
1824 i40e_fill_default_direct_cmd_desc(&desc, opcode);
1825
1826 /* Indirect command */
1827 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1828 if (cmd_param_flag)
1829 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
1830 if (buff_size > I40E_AQ_LARGE_BUF)
1831 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1832
1833 desc.datalen = cpu_to_le16(buff_size);
1834
1835 cmd->vsi_seid = cpu_to_le16(seid);
1836
1837 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1838
1839 return status;
1840 }
1841
1842 /**
1843 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1844 * @hw: pointer to the hw struct
1845 * @seid: VSI seid
1846 * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1847 * @cmd_details: pointer to command details structure or NULL
1848 **/
1849 i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,
1850 u16 seid,
1851 struct i40e_aqc_configure_vsi_tc_bw_data *bw_data,
1852 struct i40e_asq_cmd_details *cmd_details)
1853 {
1854 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1855 i40e_aqc_opc_configure_vsi_tc_bw,
1856 cmd_details);
1857 }
1858
1859 /**
1860 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1861 * @hw: pointer to the hw struct
1862 * @seid: seid of the VSI
1863 * @bw_data: Buffer to hold VSI BW configuration
1864 * @cmd_details: pointer to command details structure or NULL
1865 **/
1866 i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,
1867 u16 seid,
1868 struct i40e_aqc_query_vsi_bw_config_resp *bw_data,
1869 struct i40e_asq_cmd_details *cmd_details)
1870 {
1871 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1872 i40e_aqc_opc_query_vsi_bw_config,
1873 cmd_details);
1874 }
1875
1876 /**
1877 * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1878 * @hw: pointer to the hw struct
1879 * @seid: seid of the VSI
1880 * @bw_data: Buffer to hold VSI BW configuration per TC
1881 * @cmd_details: pointer to command details structure or NULL
1882 **/
1883 i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,
1884 u16 seid,
1885 struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data,
1886 struct i40e_asq_cmd_details *cmd_details)
1887 {
1888 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1889 i40e_aqc_opc_query_vsi_ets_sla_config,
1890 cmd_details);
1891 }
1892
1893 /**
1894 * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1895 * @hw: pointer to the hw struct
1896 * @seid: seid of the switching component
1897 * @bw_data: Buffer to hold switching component's per TC BW config
1898 * @cmd_details: pointer to command details structure or NULL
1899 **/
1900 i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,
1901 u16 seid,
1902 struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data,
1903 struct i40e_asq_cmd_details *cmd_details)
1904 {
1905 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1906 i40e_aqc_opc_query_switching_comp_ets_config,
1907 cmd_details);
1908 }
1909
1910 /**
1911 * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1912 * @hw: pointer to the hw struct
1913 * @seid: seid of the VSI or switching component connected to Physical Port
1914 * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1915 * @cmd_details: pointer to command details structure or NULL
1916 **/
1917 i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw,
1918 u16 seid,
1919 struct i40e_aqc_query_port_ets_config_resp *bw_data,
1920 struct i40e_asq_cmd_details *cmd_details)
1921 {
1922 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1923 i40e_aqc_opc_query_port_ets_config,
1924 cmd_details);
1925 }
1926
1927 /**
1928 * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
1929 * @hw: pointer to the hw struct
1930 * @seid: seid of the switching component
1931 * @bw_data: Buffer to hold switching component's BW configuration
1932 * @cmd_details: pointer to command details structure or NULL
1933 **/
1934 i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,
1935 u16 seid,
1936 struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data,
1937 struct i40e_asq_cmd_details *cmd_details)
1938 {
1939 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1940 i40e_aqc_opc_query_switching_comp_bw_config,
1941 cmd_details);
1942 }
1943
1944 /**
1945 * i40e_validate_filter_settings
1946 * @hw: pointer to the hardware structure
1947 * @settings: Filter control settings
1948 *
1949 * Check and validate the filter control settings passed.
1950 * The function checks for the valid filter/context sizes being
1951 * passed for FCoE and PE.
1952 *
1953 * Returns 0 if the values passed are valid and within
1954 * range else returns an error.
1955 **/
1956 static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
1957 struct i40e_filter_control_settings *settings)
1958 {
1959 u32 fcoe_cntx_size, fcoe_filt_size;
1960 u32 pe_cntx_size, pe_filt_size;
1961 u32 fcoe_fmax, pe_fmax;
1962 u32 val;
1963
1964 /* Validate FCoE settings passed */
1965 switch (settings->fcoe_filt_num) {
1966 case I40E_HASH_FILTER_SIZE_1K:
1967 case I40E_HASH_FILTER_SIZE_2K:
1968 case I40E_HASH_FILTER_SIZE_4K:
1969 case I40E_HASH_FILTER_SIZE_8K:
1970 case I40E_HASH_FILTER_SIZE_16K:
1971 case I40E_HASH_FILTER_SIZE_32K:
1972 fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1973 fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
1974 break;
1975 default:
1976 return I40E_ERR_PARAM;
1977 }
1978
1979 switch (settings->fcoe_cntx_num) {
1980 case I40E_DMA_CNTX_SIZE_512:
1981 case I40E_DMA_CNTX_SIZE_1K:
1982 case I40E_DMA_CNTX_SIZE_2K:
1983 case I40E_DMA_CNTX_SIZE_4K:
1984 fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
1985 fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
1986 break;
1987 default:
1988 return I40E_ERR_PARAM;
1989 }
1990
1991 /* Validate PE settings passed */
1992 switch (settings->pe_filt_num) {
1993 case I40E_HASH_FILTER_SIZE_1K:
1994 case I40E_HASH_FILTER_SIZE_2K:
1995 case I40E_HASH_FILTER_SIZE_4K:
1996 case I40E_HASH_FILTER_SIZE_8K:
1997 case I40E_HASH_FILTER_SIZE_16K:
1998 case I40E_HASH_FILTER_SIZE_32K:
1999 case I40E_HASH_FILTER_SIZE_64K:
2000 case I40E_HASH_FILTER_SIZE_128K:
2001 case I40E_HASH_FILTER_SIZE_256K:
2002 case I40E_HASH_FILTER_SIZE_512K:
2003 case I40E_HASH_FILTER_SIZE_1M:
2004 pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
2005 pe_filt_size <<= (u32)settings->pe_filt_num;
2006 break;
2007 default:
2008 return I40E_ERR_PARAM;
2009 }
2010
2011 switch (settings->pe_cntx_num) {
2012 case I40E_DMA_CNTX_SIZE_512:
2013 case I40E_DMA_CNTX_SIZE_1K:
2014 case I40E_DMA_CNTX_SIZE_2K:
2015 case I40E_DMA_CNTX_SIZE_4K:
2016 case I40E_DMA_CNTX_SIZE_8K:
2017 case I40E_DMA_CNTX_SIZE_16K:
2018 case I40E_DMA_CNTX_SIZE_32K:
2019 case I40E_DMA_CNTX_SIZE_64K:
2020 case I40E_DMA_CNTX_SIZE_128K:
2021 case I40E_DMA_CNTX_SIZE_256K:
2022 pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
2023 pe_cntx_size <<= (u32)settings->pe_cntx_num;
2024 break;
2025 default:
2026 return I40E_ERR_PARAM;
2027 }
2028
2029 /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
2030 val = rd32(hw, I40E_GLHMC_FCOEFMAX);
2031 fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
2032 >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;
2033 if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax)
2034 return I40E_ERR_INVALID_SIZE;
2035
2036 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
2037 val = rd32(hw, I40E_GLHMC_PEXFMAX);
2038 pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
2039 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
2040 if (pe_filt_size + pe_cntx_size > pe_fmax)
2041 return I40E_ERR_INVALID_SIZE;
2042
2043 return 0;
2044 }
2045
2046 /**
2047 * i40e_set_filter_control
2048 * @hw: pointer to the hardware structure
2049 * @settings: Filter control settings
2050 *
2051 * Set the Queue Filters for PE/FCoE and enable filters required
2052 * for a single PF. It is expected that these settings are programmed
2053 * at the driver initialization time.
2054 **/
2055 i40e_status i40e_set_filter_control(struct i40e_hw *hw,
2056 struct i40e_filter_control_settings *settings)
2057 {
2058 i40e_status ret = 0;
2059 u32 hash_lut_size = 0;
2060 u32 val;
2061
2062 if (!settings)
2063 return I40E_ERR_PARAM;
2064
2065 /* Validate the input settings */
2066 ret = i40e_validate_filter_settings(hw, settings);
2067 if (ret)
2068 return ret;
2069
2070 /* Read the PF Queue Filter control register */
2071 val = rd32(hw, I40E_PFQF_CTL_0);
2072
2073 /* Program required PE hash buckets for the PF */
2074 val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
2075 val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
2076 I40E_PFQF_CTL_0_PEHSIZE_MASK;
2077 /* Program required PE contexts for the PF */
2078 val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
2079 val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
2080 I40E_PFQF_CTL_0_PEDSIZE_MASK;
2081
2082 /* Program required FCoE hash buckets for the PF */
2083 val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2084 val |= ((u32)settings->fcoe_filt_num <<
2085 I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) &
2086 I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2087 /* Program required FCoE DDP contexts for the PF */
2088 val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2089 val |= ((u32)settings->fcoe_cntx_num <<
2090 I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) &
2091 I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2092
2093 /* Program Hash LUT size for the PF */
2094 val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2095 if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
2096 hash_lut_size = 1;
2097 val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
2098 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2099
2100 /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2101 if (settings->enable_fdir)
2102 val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
2103 if (settings->enable_ethtype)
2104 val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
2105 if (settings->enable_macvlan)
2106 val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
2107
2108 wr32(hw, I40E_PFQF_CTL_0, val);
2109
2110 return 0;
2111 }
Linux kernel - Deliverables
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