1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 ******************************************************************************/
28 #include "i40e_type.h"
29 #include "i40e_adminq.h"
30 #include "i40e_prototype.h"
31 #include "i40e_virtchnl.h"
34 * i40e_set_mac_type - Sets MAC type
35 * @hw: pointer to the HW structure
37 * This function sets the mac type of the adapter based on the
38 * vendor ID and device ID stored in the hw structure.
40 static i40e_status
i40e_set_mac_type(struct i40e_hw
*hw
)
42 i40e_status status
= 0;
44 if (hw
->vendor_id
== PCI_VENDOR_ID_INTEL
) {
45 switch (hw
->device_id
) {
46 case I40E_SFP_XL710_DEVICE_ID
:
47 case I40E_SFP_X710_DEVICE_ID
:
48 case I40E_QEMU_DEVICE_ID
:
49 case I40E_KX_A_DEVICE_ID
:
50 case I40E_KX_B_DEVICE_ID
:
51 case I40E_KX_C_DEVICE_ID
:
52 case I40E_KX_D_DEVICE_ID
:
53 case I40E_QSFP_A_DEVICE_ID
:
54 case I40E_QSFP_B_DEVICE_ID
:
55 case I40E_QSFP_C_DEVICE_ID
:
56 hw
->mac
.type
= I40E_MAC_XL710
;
58 case I40E_VF_DEVICE_ID
:
59 case I40E_VF_HV_DEVICE_ID
:
60 hw
->mac
.type
= I40E_MAC_VF
;
63 hw
->mac
.type
= I40E_MAC_GENERIC
;
67 status
= I40E_ERR_DEVICE_NOT_SUPPORTED
;
70 hw_dbg(hw
, "i40e_set_mac_type found mac: %d, returns: %d\n",
71 hw
->mac
.type
, status
);
77 * @hw: debug mask related to admin queue
78 * @cap: pointer to adminq command descriptor
79 * @buffer: pointer to command buffer
81 * Dumps debug log about adminq command with descriptor contents.
83 void i40e_debug_aq(struct i40e_hw
*hw
, enum i40e_debug_mask mask
, void *desc
,
86 struct i40e_aq_desc
*aq_desc
= (struct i40e_aq_desc
*)desc
;
87 u8
*aq_buffer
= (u8
*)buffer
;
91 if ((!(mask
& hw
->debug_mask
)) || (desc
== NULL
))
95 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
96 aq_desc
->opcode
, aq_desc
->flags
, aq_desc
->datalen
,
98 i40e_debug(hw
, mask
, "\tcookie (h,l) 0x%08X 0x%08X\n",
99 aq_desc
->cookie_high
, aq_desc
->cookie_low
);
100 i40e_debug(hw
, mask
, "\tparam (0,1) 0x%08X 0x%08X\n",
101 aq_desc
->params
.internal
.param0
,
102 aq_desc
->params
.internal
.param1
);
103 i40e_debug(hw
, mask
, "\taddr (h,l) 0x%08X 0x%08X\n",
104 aq_desc
->params
.external
.addr_high
,
105 aq_desc
->params
.external
.addr_low
);
107 if ((buffer
!= NULL
) && (aq_desc
->datalen
!= 0)) {
108 memset(data
, 0, sizeof(data
));
109 i40e_debug(hw
, mask
, "AQ CMD Buffer:\n");
110 for (i
= 0; i
< le16_to_cpu(aq_desc
->datalen
); i
++) {
111 data
[((i
% 16) / 4)] |=
112 ((u32
)aq_buffer
[i
]) << (8 * (i
% 4));
113 if ((i
% 16) == 15) {
115 "\t0x%04X %08X %08X %08X %08X\n",
116 i
- 15, data
[0], data
[1], data
[2],
118 memset(data
, 0, sizeof(data
));
122 i40e_debug(hw
, mask
, "\t0x%04X %08X %08X %08X %08X\n",
123 i
- (i
% 16), data
[0], data
[1], data
[2],
129 * i40e_init_shared_code - Initialize the shared code
130 * @hw: pointer to hardware structure
132 * This assigns the MAC type and PHY code and inits the NVM.
133 * Does not touch the hardware. This function must be called prior to any
134 * other function in the shared code. The i40e_hw structure should be
135 * memset to 0 prior to calling this function. The following fields in
136 * hw structure should be filled in prior to calling this function:
137 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
138 * subsystem_vendor_id, and revision_id
140 i40e_status
i40e_init_shared_code(struct i40e_hw
*hw
)
142 i40e_status status
= 0;
145 hw
->phy
.get_link_info
= true;
147 /* Determine port number */
148 reg
= rd32(hw
, I40E_PFGEN_PORTNUM
);
149 reg
= ((reg
& I40E_PFGEN_PORTNUM_PORT_NUM_MASK
) >>
150 I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT
);
153 i40e_set_mac_type(hw
);
155 switch (hw
->mac
.type
) {
159 return I40E_ERR_DEVICE_NOT_SUPPORTED
;
163 status
= i40e_init_nvm(hw
);
168 * i40e_aq_mac_address_read - Retrieve the MAC addresses
169 * @hw: pointer to the hw struct
170 * @flags: a return indicator of what addresses were added to the addr store
171 * @addrs: the requestor's mac addr store
172 * @cmd_details: pointer to command details structure or NULL
174 static i40e_status
i40e_aq_mac_address_read(struct i40e_hw
*hw
,
176 struct i40e_aqc_mac_address_read_data
*addrs
,
177 struct i40e_asq_cmd_details
*cmd_details
)
179 struct i40e_aq_desc desc
;
180 struct i40e_aqc_mac_address_read
*cmd_data
=
181 (struct i40e_aqc_mac_address_read
*)&desc
.params
.raw
;
184 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_mac_address_read
);
185 desc
.flags
|= cpu_to_le16(I40E_AQ_FLAG_BUF
);
187 status
= i40e_asq_send_command(hw
, &desc
, addrs
,
188 sizeof(*addrs
), cmd_details
);
189 *flags
= le16_to_cpu(cmd_data
->command_flags
);
195 * i40e_aq_mac_address_write - Change the MAC addresses
196 * @hw: pointer to the hw struct
197 * @flags: indicates which MAC to be written
198 * @mac_addr: address to write
199 * @cmd_details: pointer to command details structure or NULL
201 i40e_status
i40e_aq_mac_address_write(struct i40e_hw
*hw
,
202 u16 flags
, u8
*mac_addr
,
203 struct i40e_asq_cmd_details
*cmd_details
)
205 struct i40e_aq_desc desc
;
206 struct i40e_aqc_mac_address_write
*cmd_data
=
207 (struct i40e_aqc_mac_address_write
*)&desc
.params
.raw
;
210 i40e_fill_default_direct_cmd_desc(&desc
,
211 i40e_aqc_opc_mac_address_write
);
212 cmd_data
->command_flags
= cpu_to_le16(flags
);
213 memcpy(&cmd_data
->mac_sal
, &mac_addr
[0], 4);
214 memcpy(&cmd_data
->mac_sah
, &mac_addr
[4], 2);
216 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
222 * i40e_get_mac_addr - get MAC address
223 * @hw: pointer to the HW structure
224 * @mac_addr: pointer to MAC address
226 * Reads the adapter's MAC address from register
228 i40e_status
i40e_get_mac_addr(struct i40e_hw
*hw
, u8
*mac_addr
)
230 struct i40e_aqc_mac_address_read_data addrs
;
234 status
= i40e_aq_mac_address_read(hw
, &flags
, &addrs
, NULL
);
236 if (flags
& I40E_AQC_LAN_ADDR_VALID
)
237 memcpy(mac_addr
, &addrs
.pf_lan_mac
, sizeof(addrs
.pf_lan_mac
));
243 * i40e_validate_mac_addr - Validate MAC address
244 * @mac_addr: pointer to MAC address
246 * Tests a MAC address to ensure it is a valid Individual Address
248 i40e_status
i40e_validate_mac_addr(u8
*mac_addr
)
250 i40e_status status
= 0;
252 /* Make sure it is not a multicast address */
253 if (I40E_IS_MULTICAST(mac_addr
)) {
254 hw_dbg(hw
, "MAC address is multicast\n");
255 status
= I40E_ERR_INVALID_MAC_ADDR
;
256 /* Not a broadcast address */
257 } else if (I40E_IS_BROADCAST(mac_addr
)) {
258 hw_dbg(hw
, "MAC address is broadcast\n");
259 status
= I40E_ERR_INVALID_MAC_ADDR
;
260 /* Reject the zero address */
261 } else if (mac_addr
[0] == 0 && mac_addr
[1] == 0 && mac_addr
[2] == 0 &&
262 mac_addr
[3] == 0 && mac_addr
[4] == 0 && mac_addr
[5] == 0) {
263 hw_dbg(hw
, "MAC address is all zeros\n");
264 status
= I40E_ERR_INVALID_MAC_ADDR
;
270 * i40e_get_media_type - Gets media type
271 * @hw: pointer to the hardware structure
273 static enum i40e_media_type
i40e_get_media_type(struct i40e_hw
*hw
)
275 enum i40e_media_type media
;
277 switch (hw
->phy
.link_info
.phy_type
) {
278 case I40E_PHY_TYPE_10GBASE_SR
:
279 case I40E_PHY_TYPE_10GBASE_LR
:
280 case I40E_PHY_TYPE_40GBASE_SR4
:
281 case I40E_PHY_TYPE_40GBASE_LR4
:
282 media
= I40E_MEDIA_TYPE_FIBER
;
284 case I40E_PHY_TYPE_100BASE_TX
:
285 case I40E_PHY_TYPE_1000BASE_T
:
286 case I40E_PHY_TYPE_10GBASE_T
:
287 media
= I40E_MEDIA_TYPE_BASET
;
289 case I40E_PHY_TYPE_10GBASE_CR1_CU
:
290 case I40E_PHY_TYPE_40GBASE_CR4_CU
:
291 case I40E_PHY_TYPE_10GBASE_CR1
:
292 case I40E_PHY_TYPE_40GBASE_CR4
:
293 case I40E_PHY_TYPE_10GBASE_SFPP_CU
:
294 media
= I40E_MEDIA_TYPE_DA
;
296 case I40E_PHY_TYPE_1000BASE_KX
:
297 case I40E_PHY_TYPE_10GBASE_KX4
:
298 case I40E_PHY_TYPE_10GBASE_KR
:
299 case I40E_PHY_TYPE_40GBASE_KR4
:
300 media
= I40E_MEDIA_TYPE_BACKPLANE
;
302 case I40E_PHY_TYPE_SGMII
:
303 case I40E_PHY_TYPE_XAUI
:
304 case I40E_PHY_TYPE_XFI
:
305 case I40E_PHY_TYPE_XLAUI
:
306 case I40E_PHY_TYPE_XLPPI
:
308 media
= I40E_MEDIA_TYPE_UNKNOWN
;
315 #define I40E_PF_RESET_WAIT_COUNT_A0 200
316 #define I40E_PF_RESET_WAIT_COUNT 10
318 * i40e_pf_reset - Reset the PF
319 * @hw: pointer to the hardware structure
321 * Assuming someone else has triggered a global reset,
322 * assure the global reset is complete and then reset the PF
324 i40e_status
i40e_pf_reset(struct i40e_hw
*hw
)
330 /* Poll for Global Reset steady state in case of recent GRST.
331 * The grst delay value is in 100ms units, and we'll wait a
332 * couple counts longer to be sure we don't just miss the end.
334 grst_del
= rd32(hw
, I40E_GLGEN_RSTCTL
) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
335 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT
;
336 for (cnt
= 0; cnt
< grst_del
+ 2; cnt
++) {
337 reg
= rd32(hw
, I40E_GLGEN_RSTAT
);
338 if (!(reg
& I40E_GLGEN_RSTAT_DEVSTATE_MASK
))
342 if (reg
& I40E_GLGEN_RSTAT_DEVSTATE_MASK
) {
343 hw_dbg(hw
, "Global reset polling failed to complete.\n");
344 return I40E_ERR_RESET_FAILED
;
347 /* Determine the PF number based on the PCI fn */
348 reg
= rd32(hw
, I40E_GLPCI_CAPSUP
);
349 if (reg
& I40E_GLPCI_CAPSUP_ARI_EN_MASK
)
350 hw
->pf_id
= (u8
)((hw
->bus
.device
<< 3) | hw
->bus
.func
);
352 hw
->pf_id
= (u8
)hw
->bus
.func
;
354 /* If there was a Global Reset in progress when we got here,
355 * we don't need to do the PF Reset
358 if (hw
->revision_id
== 0)
359 cnt
= I40E_PF_RESET_WAIT_COUNT_A0
;
361 cnt
= I40E_PF_RESET_WAIT_COUNT
;
362 reg
= rd32(hw
, I40E_PFGEN_CTRL
);
363 wr32(hw
, I40E_PFGEN_CTRL
,
364 (reg
| I40E_PFGEN_CTRL_PFSWR_MASK
));
366 reg
= rd32(hw
, I40E_PFGEN_CTRL
);
367 if (!(reg
& I40E_PFGEN_CTRL_PFSWR_MASK
))
369 usleep_range(1000, 2000);
371 if (reg
& I40E_PFGEN_CTRL_PFSWR_MASK
) {
372 hw_dbg(hw
, "PF reset polling failed to complete.\n");
373 return I40E_ERR_RESET_FAILED
;
377 i40e_clear_pxe_mode(hw
);
382 * i40e_clear_pxe_mode - clear pxe operations mode
383 * @hw: pointer to the hw struct
385 * Make sure all PXE mode settings are cleared, including things
386 * like descriptor fetch/write-back mode.
388 void i40e_clear_pxe_mode(struct i40e_hw
*hw
)
392 /* Clear single descriptor fetch/write-back mode */
393 reg
= rd32(hw
, I40E_GLLAN_RCTL_0
);
395 if (hw
->revision_id
== 0) {
396 /* As a work around clear PXE_MODE instead of setting it */
397 wr32(hw
, I40E_GLLAN_RCTL_0
, (reg
& (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK
)));
399 wr32(hw
, I40E_GLLAN_RCTL_0
, (reg
| I40E_GLLAN_RCTL_0_PXE_MODE_MASK
));
404 * i40e_led_get - return current on/off mode
405 * @hw: pointer to the hw struct
407 * The value returned is the 'mode' field as defined in the
408 * GPIO register definitions: 0x0 = off, 0xf = on, and other
409 * values are variations of possible behaviors relating to
410 * blink, link, and wire.
412 u32
i40e_led_get(struct i40e_hw
*hw
)
419 for (i
= 0; i
< I40E_HW_CAP_MAX_GPIO
; i
++) {
420 if (!hw
->func_caps
.led
[i
])
423 gpio_val
= rd32(hw
, I40E_GLGEN_GPIO_CTL(i
));
424 port
= (gpio_val
& I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK
)
425 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT
;
427 if (port
!= hw
->port
)
430 mode
= (gpio_val
& I40E_GLGEN_GPIO_CTL_LED_MODE_MASK
)
431 >> I40E_GLGEN_GPIO_CTL_INT_MODE_SHIFT
;
439 * i40e_led_set - set new on/off mode
440 * @hw: pointer to the hw struct
441 * @mode: 0=off, else on (see EAS for mode details)
443 void i40e_led_set(struct i40e_hw
*hw
, u32 mode
)
450 for (i
= 0; i
< I40E_HW_CAP_MAX_GPIO
; i
++) {
451 if (!hw
->func_caps
.led
[i
])
454 gpio_val
= rd32(hw
, I40E_GLGEN_GPIO_CTL(i
));
455 port
= (gpio_val
& I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK
)
456 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT
;
458 if (port
!= hw
->port
)
461 led_mode
= (mode
<< I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT
) &
462 I40E_GLGEN_GPIO_CTL_LED_MODE_MASK
;
463 gpio_val
&= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK
;
464 gpio_val
|= led_mode
;
465 wr32(hw
, I40E_GLGEN_GPIO_CTL(i
), gpio_val
);
469 /* Admin command wrappers */
471 * i40e_aq_queue_shutdown
472 * @hw: pointer to the hw struct
473 * @unloading: is the driver unloading itself
475 * Tell the Firmware that we're shutting down the AdminQ and whether
476 * or not the driver is unloading as well.
478 i40e_status
i40e_aq_queue_shutdown(struct i40e_hw
*hw
,
481 struct i40e_aq_desc desc
;
482 struct i40e_aqc_queue_shutdown
*cmd
=
483 (struct i40e_aqc_queue_shutdown
*)&desc
.params
.raw
;
486 i40e_fill_default_direct_cmd_desc(&desc
,
487 i40e_aqc_opc_queue_shutdown
);
490 cmd
->driver_unloading
= cpu_to_le32(I40E_AQ_DRIVER_UNLOADING
);
491 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, NULL
);
497 * i40e_aq_set_link_restart_an
498 * @hw: pointer to the hw struct
499 * @cmd_details: pointer to command details structure or NULL
501 * Sets up the link and restarts the Auto-Negotiation over the link.
503 i40e_status
i40e_aq_set_link_restart_an(struct i40e_hw
*hw
,
504 struct i40e_asq_cmd_details
*cmd_details
)
506 struct i40e_aq_desc desc
;
507 struct i40e_aqc_set_link_restart_an
*cmd
=
508 (struct i40e_aqc_set_link_restart_an
*)&desc
.params
.raw
;
511 i40e_fill_default_direct_cmd_desc(&desc
,
512 i40e_aqc_opc_set_link_restart_an
);
514 cmd
->command
= I40E_AQ_PHY_RESTART_AN
;
516 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
522 * i40e_aq_get_link_info
523 * @hw: pointer to the hw struct
524 * @enable_lse: enable/disable LinkStatusEvent reporting
525 * @link: pointer to link status structure - optional
526 * @cmd_details: pointer to command details structure or NULL
528 * Returns the link status of the adapter.
530 i40e_status
i40e_aq_get_link_info(struct i40e_hw
*hw
,
531 bool enable_lse
, struct i40e_link_status
*link
,
532 struct i40e_asq_cmd_details
*cmd_details
)
534 struct i40e_aq_desc desc
;
535 struct i40e_aqc_get_link_status
*resp
=
536 (struct i40e_aqc_get_link_status
*)&desc
.params
.raw
;
537 struct i40e_link_status
*hw_link_info
= &hw
->phy
.link_info
;
541 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_get_link_status
);
544 command_flags
= I40E_AQ_LSE_ENABLE
;
546 command_flags
= I40E_AQ_LSE_DISABLE
;
547 resp
->command_flags
= cpu_to_le16(command_flags
);
549 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
552 goto aq_get_link_info_exit
;
554 /* save off old link status information */
555 memcpy(&hw
->phy
.link_info_old
, hw_link_info
,
556 sizeof(struct i40e_link_status
));
558 /* update link status */
559 hw_link_info
->phy_type
= (enum i40e_aq_phy_type
)resp
->phy_type
;
560 hw
->phy
.media_type
= i40e_get_media_type(hw
);
561 hw_link_info
->link_speed
= (enum i40e_aq_link_speed
)resp
->link_speed
;
562 hw_link_info
->link_info
= resp
->link_info
;
563 hw_link_info
->an_info
= resp
->an_info
;
564 hw_link_info
->ext_info
= resp
->ext_info
;
565 hw_link_info
->loopback
= resp
->loopback
;
567 if (resp
->command_flags
& cpu_to_le16(I40E_AQ_LSE_ENABLE
))
568 hw_link_info
->lse_enable
= true;
570 hw_link_info
->lse_enable
= false;
572 /* save link status information */
574 *link
= *hw_link_info
;
576 /* flag cleared so helper functions don't call AQ again */
577 hw
->phy
.get_link_info
= false;
579 aq_get_link_info_exit
:
585 * @hw: pointer to the hw struct
586 * @vsi: pointer to a vsi context struct
587 * @cmd_details: pointer to command details structure or NULL
589 * Add a VSI context to the hardware.
591 i40e_status
i40e_aq_add_vsi(struct i40e_hw
*hw
,
592 struct i40e_vsi_context
*vsi_ctx
,
593 struct i40e_asq_cmd_details
*cmd_details
)
595 struct i40e_aq_desc desc
;
596 struct i40e_aqc_add_get_update_vsi
*cmd
=
597 (struct i40e_aqc_add_get_update_vsi
*)&desc
.params
.raw
;
598 struct i40e_aqc_add_get_update_vsi_completion
*resp
=
599 (struct i40e_aqc_add_get_update_vsi_completion
*)
603 i40e_fill_default_direct_cmd_desc(&desc
,
604 i40e_aqc_opc_add_vsi
);
606 cmd
->uplink_seid
= cpu_to_le16(vsi_ctx
->uplink_seid
);
607 cmd
->connection_type
= vsi_ctx
->connection_type
;
608 cmd
->vf_id
= vsi_ctx
->vf_num
;
609 cmd
->vsi_flags
= cpu_to_le16(vsi_ctx
->flags
);
611 desc
.flags
|= cpu_to_le16((u16
)(I40E_AQ_FLAG_BUF
| I40E_AQ_FLAG_RD
));
612 if (sizeof(vsi_ctx
->info
) > I40E_AQ_LARGE_BUF
)
613 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
615 status
= i40e_asq_send_command(hw
, &desc
, &vsi_ctx
->info
,
616 sizeof(vsi_ctx
->info
), cmd_details
);
619 goto aq_add_vsi_exit
;
621 vsi_ctx
->seid
= le16_to_cpu(resp
->seid
);
622 vsi_ctx
->vsi_number
= le16_to_cpu(resp
->vsi_number
);
623 vsi_ctx
->vsis_allocated
= le16_to_cpu(resp
->vsi_used
);
624 vsi_ctx
->vsis_unallocated
= le16_to_cpu(resp
->vsi_free
);
631 * i40e_aq_set_vsi_unicast_promiscuous
632 * @hw: pointer to the hw struct
634 * @set: set unicast promiscuous enable/disable
635 * @cmd_details: pointer to command details structure or NULL
637 i40e_status
i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw
*hw
,
638 u16 seid
, bool set
, struct i40e_asq_cmd_details
*cmd_details
)
640 struct i40e_aq_desc desc
;
641 struct i40e_aqc_set_vsi_promiscuous_modes
*cmd
=
642 (struct i40e_aqc_set_vsi_promiscuous_modes
*)&desc
.params
.raw
;
646 i40e_fill_default_direct_cmd_desc(&desc
,
647 i40e_aqc_opc_set_vsi_promiscuous_modes
);
650 flags
|= I40E_AQC_SET_VSI_PROMISC_UNICAST
;
652 cmd
->promiscuous_flags
= cpu_to_le16(flags
);
654 cmd
->valid_flags
= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST
);
656 cmd
->seid
= cpu_to_le16(seid
);
657 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
663 * i40e_aq_set_vsi_multicast_promiscuous
664 * @hw: pointer to the hw struct
666 * @set: set multicast promiscuous enable/disable
667 * @cmd_details: pointer to command details structure or NULL
669 i40e_status
i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw
*hw
,
670 u16 seid
, bool set
, struct i40e_asq_cmd_details
*cmd_details
)
672 struct i40e_aq_desc desc
;
673 struct i40e_aqc_set_vsi_promiscuous_modes
*cmd
=
674 (struct i40e_aqc_set_vsi_promiscuous_modes
*)&desc
.params
.raw
;
678 i40e_fill_default_direct_cmd_desc(&desc
,
679 i40e_aqc_opc_set_vsi_promiscuous_modes
);
682 flags
|= I40E_AQC_SET_VSI_PROMISC_MULTICAST
;
684 cmd
->promiscuous_flags
= cpu_to_le16(flags
);
686 cmd
->valid_flags
= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST
);
688 cmd
->seid
= cpu_to_le16(seid
);
689 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
695 * i40e_aq_set_vsi_broadcast
696 * @hw: pointer to the hw struct
698 * @set_filter: true to set filter, false to clear filter
699 * @cmd_details: pointer to command details structure or NULL
701 * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
703 i40e_status
i40e_aq_set_vsi_broadcast(struct i40e_hw
*hw
,
704 u16 seid
, bool set_filter
,
705 struct i40e_asq_cmd_details
*cmd_details
)
707 struct i40e_aq_desc desc
;
708 struct i40e_aqc_set_vsi_promiscuous_modes
*cmd
=
709 (struct i40e_aqc_set_vsi_promiscuous_modes
*)&desc
.params
.raw
;
712 i40e_fill_default_direct_cmd_desc(&desc
,
713 i40e_aqc_opc_set_vsi_promiscuous_modes
);
716 cmd
->promiscuous_flags
717 |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST
);
719 cmd
->promiscuous_flags
720 &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST
);
722 cmd
->valid_flags
= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST
);
723 cmd
->seid
= cpu_to_le16(seid
);
724 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
730 * i40e_get_vsi_params - get VSI configuration info
731 * @hw: pointer to the hw struct
732 * @vsi: pointer to a vsi context struct
733 * @cmd_details: pointer to command details structure or NULL
735 i40e_status
i40e_aq_get_vsi_params(struct i40e_hw
*hw
,
736 struct i40e_vsi_context
*vsi_ctx
,
737 struct i40e_asq_cmd_details
*cmd_details
)
739 struct i40e_aq_desc desc
;
740 struct i40e_aqc_switch_seid
*cmd
=
741 (struct i40e_aqc_switch_seid
*)&desc
.params
.raw
;
742 struct i40e_aqc_add_get_update_vsi_completion
*resp
=
743 (struct i40e_aqc_add_get_update_vsi_completion
*)
747 i40e_fill_default_direct_cmd_desc(&desc
,
748 i40e_aqc_opc_get_vsi_parameters
);
750 cmd
->seid
= cpu_to_le16(vsi_ctx
->seid
);
752 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
753 if (sizeof(vsi_ctx
->info
) > I40E_AQ_LARGE_BUF
)
754 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
756 status
= i40e_asq_send_command(hw
, &desc
, &vsi_ctx
->info
,
757 sizeof(vsi_ctx
->info
), NULL
);
760 goto aq_get_vsi_params_exit
;
762 vsi_ctx
->seid
= le16_to_cpu(resp
->seid
);
763 vsi_ctx
->vsi_number
= le16_to_cpu(resp
->vsi_number
);
764 vsi_ctx
->vsis_allocated
= le16_to_cpu(resp
->vsi_used
);
765 vsi_ctx
->vsis_unallocated
= le16_to_cpu(resp
->vsi_free
);
767 aq_get_vsi_params_exit
:
772 * i40e_aq_update_vsi_params
773 * @hw: pointer to the hw struct
774 * @vsi: pointer to a vsi context struct
775 * @cmd_details: pointer to command details structure or NULL
777 * Update a VSI context.
779 i40e_status
i40e_aq_update_vsi_params(struct i40e_hw
*hw
,
780 struct i40e_vsi_context
*vsi_ctx
,
781 struct i40e_asq_cmd_details
*cmd_details
)
783 struct i40e_aq_desc desc
;
784 struct i40e_aqc_switch_seid
*cmd
=
785 (struct i40e_aqc_switch_seid
*)&desc
.params
.raw
;
788 i40e_fill_default_direct_cmd_desc(&desc
,
789 i40e_aqc_opc_update_vsi_parameters
);
790 cmd
->seid
= cpu_to_le16(vsi_ctx
->seid
);
792 desc
.flags
|= cpu_to_le16((u16
)(I40E_AQ_FLAG_BUF
| I40E_AQ_FLAG_RD
));
793 if (sizeof(vsi_ctx
->info
) > I40E_AQ_LARGE_BUF
)
794 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
796 status
= i40e_asq_send_command(hw
, &desc
, &vsi_ctx
->info
,
797 sizeof(vsi_ctx
->info
), cmd_details
);
803 * i40e_aq_get_switch_config
804 * @hw: pointer to the hardware structure
805 * @buf: pointer to the result buffer
806 * @buf_size: length of input buffer
807 * @start_seid: seid to start for the report, 0 == beginning
808 * @cmd_details: pointer to command details structure or NULL
810 * Fill the buf with switch configuration returned from AdminQ command
812 i40e_status
i40e_aq_get_switch_config(struct i40e_hw
*hw
,
813 struct i40e_aqc_get_switch_config_resp
*buf
,
814 u16 buf_size
, u16
*start_seid
,
815 struct i40e_asq_cmd_details
*cmd_details
)
817 struct i40e_aq_desc desc
;
818 struct i40e_aqc_switch_seid
*scfg
=
819 (struct i40e_aqc_switch_seid
*)&desc
.params
.raw
;
822 i40e_fill_default_direct_cmd_desc(&desc
,
823 i40e_aqc_opc_get_switch_config
);
824 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
825 if (buf_size
> I40E_AQ_LARGE_BUF
)
826 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
827 scfg
->seid
= cpu_to_le16(*start_seid
);
829 status
= i40e_asq_send_command(hw
, &desc
, buf
, buf_size
, cmd_details
);
830 *start_seid
= le16_to_cpu(scfg
->seid
);
836 * i40e_aq_get_firmware_version
837 * @hw: pointer to the hw struct
838 * @fw_major_version: firmware major version
839 * @fw_minor_version: firmware minor version
840 * @api_major_version: major queue version
841 * @api_minor_version: minor queue version
842 * @cmd_details: pointer to command details structure or NULL
844 * Get the firmware version from the admin queue commands
846 i40e_status
i40e_aq_get_firmware_version(struct i40e_hw
*hw
,
847 u16
*fw_major_version
, u16
*fw_minor_version
,
848 u16
*api_major_version
, u16
*api_minor_version
,
849 struct i40e_asq_cmd_details
*cmd_details
)
851 struct i40e_aq_desc desc
;
852 struct i40e_aqc_get_version
*resp
=
853 (struct i40e_aqc_get_version
*)&desc
.params
.raw
;
856 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_get_version
);
858 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
861 if (fw_major_version
!= NULL
)
862 *fw_major_version
= le16_to_cpu(resp
->fw_major
);
863 if (fw_minor_version
!= NULL
)
864 *fw_minor_version
= le16_to_cpu(resp
->fw_minor
);
865 if (api_major_version
!= NULL
)
866 *api_major_version
= le16_to_cpu(resp
->api_major
);
867 if (api_minor_version
!= NULL
)
868 *api_minor_version
= le16_to_cpu(resp
->api_minor
);
875 * i40e_aq_send_driver_version
876 * @hw: pointer to the hw struct
877 * @event: driver event: driver ok, start or stop
878 * @dv: driver's major, minor version
879 * @cmd_details: pointer to command details structure or NULL
881 * Send the driver version to the firmware
883 i40e_status
i40e_aq_send_driver_version(struct i40e_hw
*hw
,
884 struct i40e_driver_version
*dv
,
885 struct i40e_asq_cmd_details
*cmd_details
)
887 struct i40e_aq_desc desc
;
888 struct i40e_aqc_driver_version
*cmd
=
889 (struct i40e_aqc_driver_version
*)&desc
.params
.raw
;
893 return I40E_ERR_PARAM
;
895 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_driver_version
);
897 desc
.flags
|= cpu_to_le16(I40E_AQ_FLAG_SI
);
898 cmd
->driver_major_ver
= dv
->major_version
;
899 cmd
->driver_minor_ver
= dv
->minor_version
;
900 cmd
->driver_build_ver
= dv
->build_version
;
901 cmd
->driver_subbuild_ver
= dv
->subbuild_version
;
902 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
908 * i40e_get_link_status - get status of the HW network link
909 * @hw: pointer to the hw struct
911 * Returns true if link is up, false if link is down.
913 * Side effect: LinkStatusEvent reporting becomes enabled
915 bool i40e_get_link_status(struct i40e_hw
*hw
)
917 i40e_status status
= 0;
918 bool link_status
= false;
920 if (hw
->phy
.get_link_info
) {
921 status
= i40e_aq_get_link_info(hw
, true, NULL
, NULL
);
924 goto i40e_get_link_status_exit
;
927 link_status
= hw
->phy
.link_info
.link_info
& I40E_AQ_LINK_UP
;
929 i40e_get_link_status_exit
:
934 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
935 * @hw: pointer to the hw struct
936 * @uplink_seid: the MAC or other gizmo SEID
937 * @downlink_seid: the VSI SEID
938 * @enabled_tc: bitmap of TCs to be enabled
939 * @default_port: true for default port VSI, false for control port
940 * @enable_l2_filtering: true to add L2 filter table rules to regular forwarding rules for cloud support
941 * @veb_seid: pointer to where to put the resulting VEB SEID
942 * @cmd_details: pointer to command details structure or NULL
944 * This asks the FW to add a VEB between the uplink and downlink
945 * elements. If the uplink SEID is 0, this will be a floating VEB.
947 i40e_status
i40e_aq_add_veb(struct i40e_hw
*hw
, u16 uplink_seid
,
948 u16 downlink_seid
, u8 enabled_tc
,
949 bool default_port
, bool enable_l2_filtering
,
951 struct i40e_asq_cmd_details
*cmd_details
)
953 struct i40e_aq_desc desc
;
954 struct i40e_aqc_add_veb
*cmd
=
955 (struct i40e_aqc_add_veb
*)&desc
.params
.raw
;
956 struct i40e_aqc_add_veb_completion
*resp
=
957 (struct i40e_aqc_add_veb_completion
*)&desc
.params
.raw
;
961 /* SEIDs need to either both be set or both be 0 for floating VEB */
962 if (!!uplink_seid
!= !!downlink_seid
)
963 return I40E_ERR_PARAM
;
965 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_add_veb
);
967 cmd
->uplink_seid
= cpu_to_le16(uplink_seid
);
968 cmd
->downlink_seid
= cpu_to_le16(downlink_seid
);
969 cmd
->enable_tcs
= enabled_tc
;
971 veb_flags
|= I40E_AQC_ADD_VEB_FLOATING
;
973 veb_flags
|= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT
;
975 veb_flags
|= I40E_AQC_ADD_VEB_PORT_TYPE_DATA
;
977 if (enable_l2_filtering
)
978 veb_flags
|= I40E_AQC_ADD_VEB_ENABLE_L2_FILTER
;
980 cmd
->veb_flags
= cpu_to_le16(veb_flags
);
982 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
984 if (!status
&& veb_seid
)
985 *veb_seid
= le16_to_cpu(resp
->veb_seid
);
991 * i40e_aq_get_veb_parameters - Retrieve VEB parameters
992 * @hw: pointer to the hw struct
993 * @veb_seid: the SEID of the VEB to query
994 * @switch_id: the uplink switch id
995 * @floating_veb: set to true if the VEB is floating
996 * @statistic_index: index of the stats counter block for this VEB
997 * @vebs_used: number of VEB's used by function
998 * @vebs_unallocated: total VEB's not reserved by any function
999 * @cmd_details: pointer to command details structure or NULL
1001 * This retrieves the parameters for a particular VEB, specified by
1002 * uplink_seid, and returns them to the caller.
1004 i40e_status
i40e_aq_get_veb_parameters(struct i40e_hw
*hw
,
1005 u16 veb_seid
, u16
*switch_id
,
1006 bool *floating
, u16
*statistic_index
,
1007 u16
*vebs_used
, u16
*vebs_free
,
1008 struct i40e_asq_cmd_details
*cmd_details
)
1010 struct i40e_aq_desc desc
;
1011 struct i40e_aqc_get_veb_parameters_completion
*cmd_resp
=
1012 (struct i40e_aqc_get_veb_parameters_completion
*)
1017 return I40E_ERR_PARAM
;
1019 i40e_fill_default_direct_cmd_desc(&desc
,
1020 i40e_aqc_opc_get_veb_parameters
);
1021 cmd_resp
->seid
= cpu_to_le16(veb_seid
);
1023 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1028 *switch_id
= le16_to_cpu(cmd_resp
->switch_id
);
1029 if (statistic_index
)
1030 *statistic_index
= le16_to_cpu(cmd_resp
->statistic_index
);
1032 *vebs_used
= le16_to_cpu(cmd_resp
->vebs_used
);
1034 *vebs_free
= le16_to_cpu(cmd_resp
->vebs_free
);
1036 u16 flags
= le16_to_cpu(cmd_resp
->veb_flags
);
1037 if (flags
& I40E_AQC_ADD_VEB_FLOATING
)
1048 * i40e_aq_add_macvlan
1049 * @hw: pointer to the hw struct
1050 * @seid: VSI for the mac address
1051 * @mv_list: list of macvlans to be added
1052 * @count: length of the list
1053 * @cmd_details: pointer to command details structure or NULL
1055 * Add MAC/VLAN addresses to the HW filtering
1057 i40e_status
i40e_aq_add_macvlan(struct i40e_hw
*hw
, u16 seid
,
1058 struct i40e_aqc_add_macvlan_element_data
*mv_list
,
1059 u16 count
, struct i40e_asq_cmd_details
*cmd_details
)
1061 struct i40e_aq_desc desc
;
1062 struct i40e_aqc_macvlan
*cmd
=
1063 (struct i40e_aqc_macvlan
*)&desc
.params
.raw
;
1067 if (count
== 0 || !mv_list
|| !hw
)
1068 return I40E_ERR_PARAM
;
1070 buf_size
= count
* sizeof(struct i40e_aqc_add_macvlan_element_data
);
1072 /* prep the rest of the request */
1073 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_add_macvlan
);
1074 cmd
->num_addresses
= cpu_to_le16(count
);
1075 cmd
->seid
[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID
| seid
);
1079 desc
.flags
|= cpu_to_le16((u16
)(I40E_AQ_FLAG_BUF
| I40E_AQ_FLAG_RD
));
1080 if (buf_size
> I40E_AQ_LARGE_BUF
)
1081 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1083 status
= i40e_asq_send_command(hw
, &desc
, mv_list
, buf_size
,
1090 * i40e_aq_remove_macvlan
1091 * @hw: pointer to the hw struct
1092 * @seid: VSI for the mac address
1093 * @mv_list: list of macvlans to be removed
1094 * @count: length of the list
1095 * @cmd_details: pointer to command details structure or NULL
1097 * Remove MAC/VLAN addresses from the HW filtering
1099 i40e_status
i40e_aq_remove_macvlan(struct i40e_hw
*hw
, u16 seid
,
1100 struct i40e_aqc_remove_macvlan_element_data
*mv_list
,
1101 u16 count
, struct i40e_asq_cmd_details
*cmd_details
)
1103 struct i40e_aq_desc desc
;
1104 struct i40e_aqc_macvlan
*cmd
=
1105 (struct i40e_aqc_macvlan
*)&desc
.params
.raw
;
1109 if (count
== 0 || !mv_list
|| !hw
)
1110 return I40E_ERR_PARAM
;
1112 buf_size
= count
* sizeof(struct i40e_aqc_remove_macvlan_element_data
);
1114 /* prep the rest of the request */
1115 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_remove_macvlan
);
1116 cmd
->num_addresses
= cpu_to_le16(count
);
1117 cmd
->seid
[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID
| seid
);
1121 desc
.flags
|= cpu_to_le16((u16
)(I40E_AQ_FLAG_BUF
| I40E_AQ_FLAG_RD
));
1122 if (buf_size
> I40E_AQ_LARGE_BUF
)
1123 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1125 status
= i40e_asq_send_command(hw
, &desc
, mv_list
, buf_size
,
1132 * i40e_aq_send_msg_to_vf
1133 * @hw: pointer to the hardware structure
1134 * @vfid: vf id to send msg
1135 * @msg: pointer to the msg buffer
1136 * @msglen: msg length
1137 * @cmd_details: pointer to command details
1141 i40e_status
i40e_aq_send_msg_to_vf(struct i40e_hw
*hw
, u16 vfid
,
1142 u32 v_opcode
, u32 v_retval
, u8
*msg
, u16 msglen
,
1143 struct i40e_asq_cmd_details
*cmd_details
)
1145 struct i40e_aq_desc desc
;
1146 struct i40e_aqc_pf_vf_message
*cmd
=
1147 (struct i40e_aqc_pf_vf_message
*)&desc
.params
.raw
;
1150 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_send_msg_to_vf
);
1151 cmd
->id
= cpu_to_le32(vfid
);
1152 desc
.cookie_high
= cpu_to_le32(v_opcode
);
1153 desc
.cookie_low
= cpu_to_le32(v_retval
);
1154 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_SI
);
1156 desc
.flags
|= cpu_to_le16((u16
)(I40E_AQ_FLAG_BUF
|
1158 if (msglen
> I40E_AQ_LARGE_BUF
)
1159 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1160 desc
.datalen
= cpu_to_le16(msglen
);
1162 status
= i40e_asq_send_command(hw
, &desc
, msg
, msglen
, cmd_details
);
1168 * i40e_aq_set_hmc_resource_profile
1169 * @hw: pointer to the hw struct
1170 * @profile: type of profile the HMC is to be set as
1171 * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1172 * @cmd_details: pointer to command details structure or NULL
1174 * set the HMC profile of the device.
1176 i40e_status
i40e_aq_set_hmc_resource_profile(struct i40e_hw
*hw
,
1177 enum i40e_aq_hmc_profile profile
,
1178 u8 pe_vf_enabled_count
,
1179 struct i40e_asq_cmd_details
*cmd_details
)
1181 struct i40e_aq_desc desc
;
1182 struct i40e_aq_get_set_hmc_resource_profile
*cmd
=
1183 (struct i40e_aq_get_set_hmc_resource_profile
*)&desc
.params
.raw
;
1186 i40e_fill_default_direct_cmd_desc(&desc
,
1187 i40e_aqc_opc_set_hmc_resource_profile
);
1189 cmd
->pm_profile
= (u8
)profile
;
1190 cmd
->pe_vf_enabled
= pe_vf_enabled_count
;
1192 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1198 * i40e_aq_request_resource
1199 * @hw: pointer to the hw struct
1200 * @resource: resource id
1201 * @access: access type
1202 * @sdp_number: resource number
1203 * @timeout: the maximum time in ms that the driver may hold the resource
1204 * @cmd_details: pointer to command details structure or NULL
1206 * requests common resource using the admin queue commands
1208 i40e_status
i40e_aq_request_resource(struct i40e_hw
*hw
,
1209 enum i40e_aq_resources_ids resource
,
1210 enum i40e_aq_resource_access_type access
,
1211 u8 sdp_number
, u64
*timeout
,
1212 struct i40e_asq_cmd_details
*cmd_details
)
1214 struct i40e_aq_desc desc
;
1215 struct i40e_aqc_request_resource
*cmd_resp
=
1216 (struct i40e_aqc_request_resource
*)&desc
.params
.raw
;
1219 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_request_resource
);
1221 cmd_resp
->resource_id
= cpu_to_le16(resource
);
1222 cmd_resp
->access_type
= cpu_to_le16(access
);
1223 cmd_resp
->resource_number
= cpu_to_le32(sdp_number
);
1225 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1226 /* The completion specifies the maximum time in ms that the driver
1227 * may hold the resource in the Timeout field.
1228 * If the resource is held by someone else, the command completes with
1229 * busy return value and the timeout field indicates the maximum time
1230 * the current owner of the resource has to free it.
1232 if (!status
|| hw
->aq
.asq_last_status
== I40E_AQ_RC_EBUSY
)
1233 *timeout
= le32_to_cpu(cmd_resp
->timeout
);
1239 * i40e_aq_release_resource
1240 * @hw: pointer to the hw struct
1241 * @resource: resource id
1242 * @sdp_number: resource number
1243 * @cmd_details: pointer to command details structure or NULL
1245 * release common resource using the admin queue commands
1247 i40e_status
i40e_aq_release_resource(struct i40e_hw
*hw
,
1248 enum i40e_aq_resources_ids resource
,
1250 struct i40e_asq_cmd_details
*cmd_details
)
1252 struct i40e_aq_desc desc
;
1253 struct i40e_aqc_request_resource
*cmd
=
1254 (struct i40e_aqc_request_resource
*)&desc
.params
.raw
;
1257 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_release_resource
);
1259 cmd
->resource_id
= cpu_to_le16(resource
);
1260 cmd
->resource_number
= cpu_to_le32(sdp_number
);
1262 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1269 * @hw: pointer to the hw struct
1270 * @module_pointer: module pointer location in words from the NVM beginning
1271 * @offset: byte offset from the module beginning
1272 * @length: length of the section to be read (in bytes from the offset)
1273 * @data: command buffer (size [bytes] = length)
1274 * @last_command: tells if this is the last command in a series
1275 * @cmd_details: pointer to command details structure or NULL
1277 * Read the NVM using the admin queue commands
1279 i40e_status
i40e_aq_read_nvm(struct i40e_hw
*hw
, u8 module_pointer
,
1280 u32 offset
, u16 length
, void *data
,
1282 struct i40e_asq_cmd_details
*cmd_details
)
1284 struct i40e_aq_desc desc
;
1285 struct i40e_aqc_nvm_update
*cmd
=
1286 (struct i40e_aqc_nvm_update
*)&desc
.params
.raw
;
1289 /* In offset the highest byte must be zeroed. */
1290 if (offset
& 0xFF000000) {
1291 status
= I40E_ERR_PARAM
;
1292 goto i40e_aq_read_nvm_exit
;
1295 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_nvm_read
);
1297 /* If this is the last command in a series, set the proper flag. */
1299 cmd
->command_flags
|= I40E_AQ_NVM_LAST_CMD
;
1300 cmd
->module_pointer
= module_pointer
;
1301 cmd
->offset
= cpu_to_le32(offset
);
1302 cmd
->length
= cpu_to_le16(length
);
1304 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
1305 if (length
> I40E_AQ_LARGE_BUF
)
1306 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1308 status
= i40e_asq_send_command(hw
, &desc
, data
, length
, cmd_details
);
1310 i40e_aq_read_nvm_exit
:
1314 #define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
1315 #define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
1316 #define I40E_DEV_FUNC_CAP_NPAR 0x03
1317 #define I40E_DEV_FUNC_CAP_OS2BMC 0x04
1318 #define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
1319 #define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
1320 #define I40E_DEV_FUNC_CAP_VF 0x13
1321 #define I40E_DEV_FUNC_CAP_VMDQ 0x14
1322 #define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
1323 #define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
1324 #define I40E_DEV_FUNC_CAP_VSI 0x17
1325 #define I40E_DEV_FUNC_CAP_DCB 0x18
1326 #define I40E_DEV_FUNC_CAP_FCOE 0x21
1327 #define I40E_DEV_FUNC_CAP_RSS 0x40
1328 #define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
1329 #define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
1330 #define I40E_DEV_FUNC_CAP_MSIX 0x43
1331 #define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
1332 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1333 #define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
1334 #define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1
1335 #define I40E_DEV_FUNC_CAP_CEM 0xF2
1336 #define I40E_DEV_FUNC_CAP_IWARP 0x51
1337 #define I40E_DEV_FUNC_CAP_LED 0x61
1338 #define I40E_DEV_FUNC_CAP_SDP 0x62
1339 #define I40E_DEV_FUNC_CAP_MDIO 0x63
1342 * i40e_parse_discover_capabilities
1343 * @hw: pointer to the hw struct
1344 * @buff: pointer to a buffer containing device/function capability records
1345 * @cap_count: number of capability records in the list
1346 * @list_type_opc: type of capabilities list to parse
1348 * Parse the device/function capabilities list.
1350 static void i40e_parse_discover_capabilities(struct i40e_hw
*hw
, void *buff
,
1352 enum i40e_admin_queue_opc list_type_opc
)
1354 struct i40e_aqc_list_capabilities_element_resp
*cap
;
1355 u32 number
, logical_id
, phys_id
;
1356 struct i40e_hw_capabilities
*p
;
1361 cap
= (struct i40e_aqc_list_capabilities_element_resp
*) buff
;
1363 if (list_type_opc
== i40e_aqc_opc_list_dev_capabilities
)
1364 p
= (struct i40e_hw_capabilities
*)&hw
->dev_caps
;
1365 else if (list_type_opc
== i40e_aqc_opc_list_func_capabilities
)
1366 p
= (struct i40e_hw_capabilities
*)&hw
->func_caps
;
1370 for (i
= 0; i
< cap_count
; i
++, cap
++) {
1371 id
= le16_to_cpu(cap
->id
);
1372 number
= le32_to_cpu(cap
->number
);
1373 logical_id
= le32_to_cpu(cap
->logical_id
);
1374 phys_id
= le32_to_cpu(cap
->phys_id
);
1377 case I40E_DEV_FUNC_CAP_SWITCH_MODE
:
1378 p
->switch_mode
= number
;
1380 case I40E_DEV_FUNC_CAP_MGMT_MODE
:
1381 p
->management_mode
= number
;
1383 case I40E_DEV_FUNC_CAP_NPAR
:
1384 p
->npar_enable
= number
;
1386 case I40E_DEV_FUNC_CAP_OS2BMC
:
1389 case I40E_DEV_FUNC_CAP_VALID_FUNC
:
1390 p
->valid_functions
= number
;
1392 case I40E_DEV_FUNC_CAP_SRIOV_1_1
:
1394 p
->sr_iov_1_1
= true;
1396 case I40E_DEV_FUNC_CAP_VF
:
1397 p
->num_vfs
= number
;
1398 p
->vf_base_id
= logical_id
;
1400 case I40E_DEV_FUNC_CAP_VMDQ
:
1404 case I40E_DEV_FUNC_CAP_802_1_QBG
:
1406 p
->evb_802_1_qbg
= true;
1408 case I40E_DEV_FUNC_CAP_802_1_QBH
:
1410 p
->evb_802_1_qbh
= true;
1412 case I40E_DEV_FUNC_CAP_VSI
:
1413 p
->num_vsis
= number
;
1415 case I40E_DEV_FUNC_CAP_DCB
:
1418 p
->enabled_tcmap
= logical_id
;
1422 case I40E_DEV_FUNC_CAP_FCOE
:
1426 case I40E_DEV_FUNC_CAP_RSS
:
1428 reg_val
= rd32(hw
, I40E_PFQF_CTL_0
);
1429 if (reg_val
& I40E_PFQF_CTL_0_HASHLUTSIZE_MASK
)
1430 p
->rss_table_size
= number
;
1432 p
->rss_table_size
= 128;
1433 p
->rss_table_entry_width
= logical_id
;
1435 case I40E_DEV_FUNC_CAP_RX_QUEUES
:
1436 p
->num_rx_qp
= number
;
1437 p
->base_queue
= phys_id
;
1439 case I40E_DEV_FUNC_CAP_TX_QUEUES
:
1440 p
->num_tx_qp
= number
;
1441 p
->base_queue
= phys_id
;
1443 case I40E_DEV_FUNC_CAP_MSIX
:
1444 p
->num_msix_vectors
= number
;
1446 case I40E_DEV_FUNC_CAP_MSIX_VF
:
1447 p
->num_msix_vectors_vf
= number
;
1449 case I40E_DEV_FUNC_CAP_MFP_MODE_1
:
1451 p
->mfp_mode_1
= true;
1453 case I40E_DEV_FUNC_CAP_CEM
:
1457 case I40E_DEV_FUNC_CAP_IWARP
:
1461 case I40E_DEV_FUNC_CAP_LED
:
1462 if (phys_id
< I40E_HW_CAP_MAX_GPIO
)
1463 p
->led
[phys_id
] = true;
1465 case I40E_DEV_FUNC_CAP_SDP
:
1466 if (phys_id
< I40E_HW_CAP_MAX_GPIO
)
1467 p
->sdp
[phys_id
] = true;
1469 case I40E_DEV_FUNC_CAP_MDIO
:
1471 p
->mdio_port_num
= phys_id
;
1472 p
->mdio_port_mode
= logical_id
;
1475 case I40E_DEV_FUNC_CAP_IEEE_1588
:
1477 p
->ieee_1588
= true;
1479 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR
:
1481 p
->fd_filters_guaranteed
= number
;
1482 p
->fd_filters_best_effort
= logical_id
;
1489 /* additional HW specific goodies that might
1490 * someday be HW version specific
1492 p
->rx_buf_chain_len
= I40E_MAX_CHAINED_RX_BUFFERS
;
1496 * i40e_aq_discover_capabilities
1497 * @hw: pointer to the hw struct
1498 * @buff: a virtual buffer to hold the capabilities
1499 * @buff_size: Size of the virtual buffer
1500 * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1501 * @list_type_opc: capabilities type to discover - pass in the command opcode
1502 * @cmd_details: pointer to command details structure or NULL
1504 * Get the device capabilities descriptions from the firmware
1506 i40e_status
i40e_aq_discover_capabilities(struct i40e_hw
*hw
,
1507 void *buff
, u16 buff_size
, u16
*data_size
,
1508 enum i40e_admin_queue_opc list_type_opc
,
1509 struct i40e_asq_cmd_details
*cmd_details
)
1511 struct i40e_aqc_list_capabilites
*cmd
;
1512 i40e_status status
= 0;
1513 struct i40e_aq_desc desc
;
1515 cmd
= (struct i40e_aqc_list_capabilites
*)&desc
.params
.raw
;
1517 if (list_type_opc
!= i40e_aqc_opc_list_func_capabilities
&&
1518 list_type_opc
!= i40e_aqc_opc_list_dev_capabilities
) {
1519 status
= I40E_ERR_PARAM
;
1523 i40e_fill_default_direct_cmd_desc(&desc
, list_type_opc
);
1525 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
1526 if (buff_size
> I40E_AQ_LARGE_BUF
)
1527 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1529 status
= i40e_asq_send_command(hw
, &desc
, buff
, buff_size
, cmd_details
);
1530 *data_size
= le16_to_cpu(desc
.datalen
);
1535 i40e_parse_discover_capabilities(hw
, buff
, le32_to_cpu(cmd
->count
),
1543 * i40e_aq_get_lldp_mib
1544 * @hw: pointer to the hw struct
1545 * @bridge_type: type of bridge requested
1546 * @mib_type: Local, Remote or both Local and Remote MIBs
1547 * @buff: pointer to a user supplied buffer to store the MIB block
1548 * @buff_size: size of the buffer (in bytes)
1549 * @local_len : length of the returned Local LLDP MIB
1550 * @remote_len: length of the returned Remote LLDP MIB
1551 * @cmd_details: pointer to command details structure or NULL
1553 * Requests the complete LLDP MIB (entire packet).
1555 i40e_status
i40e_aq_get_lldp_mib(struct i40e_hw
*hw
, u8 bridge_type
,
1556 u8 mib_type
, void *buff
, u16 buff_size
,
1557 u16
*local_len
, u16
*remote_len
,
1558 struct i40e_asq_cmd_details
*cmd_details
)
1560 struct i40e_aq_desc desc
;
1561 struct i40e_aqc_lldp_get_mib
*cmd
=
1562 (struct i40e_aqc_lldp_get_mib
*)&desc
.params
.raw
;
1563 struct i40e_aqc_lldp_get_mib
*resp
=
1564 (struct i40e_aqc_lldp_get_mib
*)&desc
.params
.raw
;
1567 if (buff_size
== 0 || !buff
)
1568 return I40E_ERR_PARAM
;
1570 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_lldp_get_mib
);
1571 /* Indirect Command */
1572 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
1574 cmd
->type
= mib_type
& I40E_AQ_LLDP_MIB_TYPE_MASK
;
1575 cmd
->type
|= ((bridge_type
<< I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT
) &
1576 I40E_AQ_LLDP_BRIDGE_TYPE_MASK
);
1578 desc
.datalen
= cpu_to_le16(buff_size
);
1580 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
1581 if (buff_size
> I40E_AQ_LARGE_BUF
)
1582 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1584 status
= i40e_asq_send_command(hw
, &desc
, buff
, buff_size
, cmd_details
);
1586 if (local_len
!= NULL
)
1587 *local_len
= le16_to_cpu(resp
->local_len
);
1588 if (remote_len
!= NULL
)
1589 *remote_len
= le16_to_cpu(resp
->remote_len
);
1596 * i40e_aq_cfg_lldp_mib_change_event
1597 * @hw: pointer to the hw struct
1598 * @enable_update: Enable or Disable event posting
1599 * @cmd_details: pointer to command details structure or NULL
1601 * Enable or Disable posting of an event on ARQ when LLDP MIB
1602 * associated with the interface changes
1604 i40e_status
i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw
*hw
,
1606 struct i40e_asq_cmd_details
*cmd_details
)
1608 struct i40e_aq_desc desc
;
1609 struct i40e_aqc_lldp_update_mib
*cmd
=
1610 (struct i40e_aqc_lldp_update_mib
*)&desc
.params
.raw
;
1613 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_lldp_update_mib
);
1616 cmd
->command
|= I40E_AQ_LLDP_MIB_UPDATE_DISABLE
;
1618 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1625 * @hw: pointer to the hw struct
1626 * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1627 * @cmd_details: pointer to command details structure or NULL
1629 * Stop or Shutdown the embedded LLDP Agent
1631 i40e_status
i40e_aq_stop_lldp(struct i40e_hw
*hw
, bool shutdown_agent
,
1632 struct i40e_asq_cmd_details
*cmd_details
)
1634 struct i40e_aq_desc desc
;
1635 struct i40e_aqc_lldp_stop
*cmd
=
1636 (struct i40e_aqc_lldp_stop
*)&desc
.params
.raw
;
1639 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_lldp_stop
);
1642 cmd
->command
|= I40E_AQ_LLDP_AGENT_SHUTDOWN
;
1644 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1650 * i40e_aq_start_lldp
1651 * @hw: pointer to the hw struct
1652 * @cmd_details: pointer to command details structure or NULL
1654 * Start the embedded LLDP Agent on all ports.
1656 i40e_status
i40e_aq_start_lldp(struct i40e_hw
*hw
,
1657 struct i40e_asq_cmd_details
*cmd_details
)
1659 struct i40e_aq_desc desc
;
1660 struct i40e_aqc_lldp_start
*cmd
=
1661 (struct i40e_aqc_lldp_start
*)&desc
.params
.raw
;
1664 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_lldp_start
);
1666 cmd
->command
= I40E_AQ_LLDP_AGENT_START
;
1668 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1674 * i40e_aq_add_udp_tunnel
1675 * @hw: pointer to the hw struct
1676 * @udp_port: the UDP port to add
1677 * @header_len: length of the tunneling header length in DWords
1678 * @protocol_index: protocol index type
1679 * @cmd_details: pointer to command details structure or NULL
1681 i40e_status
i40e_aq_add_udp_tunnel(struct i40e_hw
*hw
,
1682 u16 udp_port
, u8 header_len
,
1683 u8 protocol_index
, u8
*filter_index
,
1684 struct i40e_asq_cmd_details
*cmd_details
)
1686 struct i40e_aq_desc desc
;
1687 struct i40e_aqc_add_udp_tunnel
*cmd
=
1688 (struct i40e_aqc_add_udp_tunnel
*)&desc
.params
.raw
;
1689 struct i40e_aqc_del_udp_tunnel_completion
*resp
=
1690 (struct i40e_aqc_del_udp_tunnel_completion
*)&desc
.params
.raw
;
1693 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_add_udp_tunnel
);
1695 cmd
->udp_port
= cpu_to_le16(udp_port
);
1696 cmd
->header_len
= header_len
;
1697 cmd
->protocol_index
= protocol_index
;
1699 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1702 *filter_index
= resp
->index
;
1708 * i40e_aq_del_udp_tunnel
1709 * @hw: pointer to the hw struct
1710 * @index: filter index
1711 * @cmd_details: pointer to command details structure or NULL
1713 i40e_status
i40e_aq_del_udp_tunnel(struct i40e_hw
*hw
, u8 index
,
1714 struct i40e_asq_cmd_details
*cmd_details
)
1716 struct i40e_aq_desc desc
;
1717 struct i40e_aqc_remove_udp_tunnel
*cmd
=
1718 (struct i40e_aqc_remove_udp_tunnel
*)&desc
.params
.raw
;
1721 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_del_udp_tunnel
);
1725 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1731 * i40e_aq_delete_element - Delete switch element
1732 * @hw: pointer to the hw struct
1733 * @seid: the SEID to delete from the switch
1734 * @cmd_details: pointer to command details structure or NULL
1736 * This deletes a switch element from the switch.
1738 i40e_status
i40e_aq_delete_element(struct i40e_hw
*hw
, u16 seid
,
1739 struct i40e_asq_cmd_details
*cmd_details
)
1741 struct i40e_aq_desc desc
;
1742 struct i40e_aqc_switch_seid
*cmd
=
1743 (struct i40e_aqc_switch_seid
*)&desc
.params
.raw
;
1747 return I40E_ERR_PARAM
;
1749 i40e_fill_default_direct_cmd_desc(&desc
, i40e_aqc_opc_delete_element
);
1751 cmd
->seid
= cpu_to_le16(seid
);
1753 status
= i40e_asq_send_command(hw
, &desc
, NULL
, 0, cmd_details
);
1759 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1760 * @hw: pointer to the hw struct
1761 * @seid: seid for the physical port/switching component/vsi
1762 * @buff: Indirect buffer to hold data parameters and response
1763 * @buff_size: Indirect buffer size
1764 * @opcode: Tx scheduler AQ command opcode
1765 * @cmd_details: pointer to command details structure or NULL
1767 * Generic command handler for Tx scheduler AQ commands
1769 static i40e_status
i40e_aq_tx_sched_cmd(struct i40e_hw
*hw
, u16 seid
,
1770 void *buff
, u16 buff_size
,
1771 enum i40e_admin_queue_opc opcode
,
1772 struct i40e_asq_cmd_details
*cmd_details
)
1774 struct i40e_aq_desc desc
;
1775 struct i40e_aqc_tx_sched_ind
*cmd
=
1776 (struct i40e_aqc_tx_sched_ind
*)&desc
.params
.raw
;
1778 bool cmd_param_flag
= false;
1781 case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit
:
1782 case i40e_aqc_opc_configure_vsi_tc_bw
:
1783 case i40e_aqc_opc_enable_switching_comp_ets
:
1784 case i40e_aqc_opc_modify_switching_comp_ets
:
1785 case i40e_aqc_opc_disable_switching_comp_ets
:
1786 case i40e_aqc_opc_configure_switching_comp_ets_bw_limit
:
1787 case i40e_aqc_opc_configure_switching_comp_bw_config
:
1788 cmd_param_flag
= true;
1790 case i40e_aqc_opc_query_vsi_bw_config
:
1791 case i40e_aqc_opc_query_vsi_ets_sla_config
:
1792 case i40e_aqc_opc_query_switching_comp_ets_config
:
1793 case i40e_aqc_opc_query_port_ets_config
:
1794 case i40e_aqc_opc_query_switching_comp_bw_config
:
1795 cmd_param_flag
= false;
1798 return I40E_ERR_PARAM
;
1801 i40e_fill_default_direct_cmd_desc(&desc
, opcode
);
1803 /* Indirect command */
1804 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_BUF
);
1806 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_RD
);
1807 if (buff_size
> I40E_AQ_LARGE_BUF
)
1808 desc
.flags
|= cpu_to_le16((u16
)I40E_AQ_FLAG_LB
);
1810 desc
.datalen
= cpu_to_le16(buff_size
);
1812 cmd
->vsi_seid
= cpu_to_le16(seid
);
1814 status
= i40e_asq_send_command(hw
, &desc
, buff
, buff_size
, cmd_details
);
1820 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1821 * @hw: pointer to the hw struct
1823 * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1824 * @cmd_details: pointer to command details structure or NULL
1826 i40e_status
i40e_aq_config_vsi_tc_bw(struct i40e_hw
*hw
,
1828 struct i40e_aqc_configure_vsi_tc_bw_data
*bw_data
,
1829 struct i40e_asq_cmd_details
*cmd_details
)
1831 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1832 i40e_aqc_opc_configure_vsi_tc_bw
,
1837 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1838 * @hw: pointer to the hw struct
1839 * @seid: seid of the VSI
1840 * @bw_data: Buffer to hold VSI BW configuration
1841 * @cmd_details: pointer to command details structure or NULL
1843 i40e_status
i40e_aq_query_vsi_bw_config(struct i40e_hw
*hw
,
1845 struct i40e_aqc_query_vsi_bw_config_resp
*bw_data
,
1846 struct i40e_asq_cmd_details
*cmd_details
)
1848 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1849 i40e_aqc_opc_query_vsi_bw_config
,
1854 * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1855 * @hw: pointer to the hw struct
1856 * @seid: seid of the VSI
1857 * @bw_data: Buffer to hold VSI BW configuration per TC
1858 * @cmd_details: pointer to command details structure or NULL
1860 i40e_status
i40e_aq_query_vsi_ets_sla_config(struct i40e_hw
*hw
,
1862 struct i40e_aqc_query_vsi_ets_sla_config_resp
*bw_data
,
1863 struct i40e_asq_cmd_details
*cmd_details
)
1865 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1866 i40e_aqc_opc_query_vsi_ets_sla_config
,
1871 * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1872 * @hw: pointer to the hw struct
1873 * @seid: seid of the switching component
1874 * @bw_data: Buffer to hold switching component's per TC BW config
1875 * @cmd_details: pointer to command details structure or NULL
1877 i40e_status
i40e_aq_query_switch_comp_ets_config(struct i40e_hw
*hw
,
1879 struct i40e_aqc_query_switching_comp_ets_config_resp
*bw_data
,
1880 struct i40e_asq_cmd_details
*cmd_details
)
1882 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1883 i40e_aqc_opc_query_switching_comp_ets_config
,
1888 * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1889 * @hw: pointer to the hw struct
1890 * @seid: seid of the VSI or switching component connected to Physical Port
1891 * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1892 * @cmd_details: pointer to command details structure or NULL
1894 i40e_status
i40e_aq_query_port_ets_config(struct i40e_hw
*hw
,
1896 struct i40e_aqc_query_port_ets_config_resp
*bw_data
,
1897 struct i40e_asq_cmd_details
*cmd_details
)
1899 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1900 i40e_aqc_opc_query_port_ets_config
,
1905 * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
1906 * @hw: pointer to the hw struct
1907 * @seid: seid of the switching component
1908 * @bw_data: Buffer to hold switching component's BW configuration
1909 * @cmd_details: pointer to command details structure or NULL
1911 i40e_status
i40e_aq_query_switch_comp_bw_config(struct i40e_hw
*hw
,
1913 struct i40e_aqc_query_switching_comp_bw_config_resp
*bw_data
,
1914 struct i40e_asq_cmd_details
*cmd_details
)
1916 return i40e_aq_tx_sched_cmd(hw
, seid
, (void *)bw_data
, sizeof(*bw_data
),
1917 i40e_aqc_opc_query_switching_comp_bw_config
,
1922 * i40e_validate_filter_settings
1923 * @hw: pointer to the hardware structure
1924 * @settings: Filter control settings
1926 * Check and validate the filter control settings passed.
1927 * The function checks for the valid filter/context sizes being
1928 * passed for FCoE and PE.
1930 * Returns 0 if the values passed are valid and within
1931 * range else returns an error.
1933 static i40e_status
i40e_validate_filter_settings(struct i40e_hw
*hw
,
1934 struct i40e_filter_control_settings
*settings
)
1936 u32 fcoe_cntx_size
, fcoe_filt_size
;
1937 u32 pe_cntx_size
, pe_filt_size
;
1938 u32 fcoe_fmax
, pe_fmax
;
1941 /* Validate FCoE settings passed */
1942 switch (settings
->fcoe_filt_num
) {
1943 case I40E_HASH_FILTER_SIZE_1K
:
1944 case I40E_HASH_FILTER_SIZE_2K
:
1945 case I40E_HASH_FILTER_SIZE_4K
:
1946 case I40E_HASH_FILTER_SIZE_8K
:
1947 case I40E_HASH_FILTER_SIZE_16K
:
1948 case I40E_HASH_FILTER_SIZE_32K
:
1949 fcoe_filt_size
= I40E_HASH_FILTER_BASE_SIZE
;
1950 fcoe_filt_size
<<= (u32
)settings
->fcoe_filt_num
;
1953 return I40E_ERR_PARAM
;
1956 switch (settings
->fcoe_cntx_num
) {
1957 case I40E_DMA_CNTX_SIZE_512
:
1958 case I40E_DMA_CNTX_SIZE_1K
:
1959 case I40E_DMA_CNTX_SIZE_2K
:
1960 case I40E_DMA_CNTX_SIZE_4K
:
1961 fcoe_cntx_size
= I40E_DMA_CNTX_BASE_SIZE
;
1962 fcoe_cntx_size
<<= (u32
)settings
->fcoe_cntx_num
;
1965 return I40E_ERR_PARAM
;
1968 /* Validate PE settings passed */
1969 switch (settings
->pe_filt_num
) {
1970 case I40E_HASH_FILTER_SIZE_1K
:
1971 case I40E_HASH_FILTER_SIZE_2K
:
1972 case I40E_HASH_FILTER_SIZE_4K
:
1973 case I40E_HASH_FILTER_SIZE_8K
:
1974 case I40E_HASH_FILTER_SIZE_16K
:
1975 case I40E_HASH_FILTER_SIZE_32K
:
1976 case I40E_HASH_FILTER_SIZE_64K
:
1977 case I40E_HASH_FILTER_SIZE_128K
:
1978 case I40E_HASH_FILTER_SIZE_256K
:
1979 case I40E_HASH_FILTER_SIZE_512K
:
1980 case I40E_HASH_FILTER_SIZE_1M
:
1981 pe_filt_size
= I40E_HASH_FILTER_BASE_SIZE
;
1982 pe_filt_size
<<= (u32
)settings
->pe_filt_num
;
1985 return I40E_ERR_PARAM
;
1988 switch (settings
->pe_cntx_num
) {
1989 case I40E_DMA_CNTX_SIZE_512
:
1990 case I40E_DMA_CNTX_SIZE_1K
:
1991 case I40E_DMA_CNTX_SIZE_2K
:
1992 case I40E_DMA_CNTX_SIZE_4K
:
1993 case I40E_DMA_CNTX_SIZE_8K
:
1994 case I40E_DMA_CNTX_SIZE_16K
:
1995 case I40E_DMA_CNTX_SIZE_32K
:
1996 case I40E_DMA_CNTX_SIZE_64K
:
1997 case I40E_DMA_CNTX_SIZE_128K
:
1998 case I40E_DMA_CNTX_SIZE_256K
:
1999 pe_cntx_size
= I40E_DMA_CNTX_BASE_SIZE
;
2000 pe_cntx_size
<<= (u32
)settings
->pe_cntx_num
;
2003 return I40E_ERR_PARAM
;
2006 /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
2007 val
= rd32(hw
, I40E_GLHMC_FCOEFMAX
);
2008 fcoe_fmax
= (val
& I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK
)
2009 >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT
;
2010 if (fcoe_filt_size
+ fcoe_cntx_size
> fcoe_fmax
)
2011 return I40E_ERR_INVALID_SIZE
;
2013 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
2014 val
= rd32(hw
, I40E_GLHMC_PEXFMAX
);
2015 pe_fmax
= (val
& I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK
)
2016 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT
;
2017 if (pe_filt_size
+ pe_cntx_size
> pe_fmax
)
2018 return I40E_ERR_INVALID_SIZE
;
2024 * i40e_set_filter_control
2025 * @hw: pointer to the hardware structure
2026 * @settings: Filter control settings
2028 * Set the Queue Filters for PE/FCoE and enable filters required
2029 * for a single PF. It is expected that these settings are programmed
2030 * at the driver initialization time.
2032 i40e_status
i40e_set_filter_control(struct i40e_hw
*hw
,
2033 struct i40e_filter_control_settings
*settings
)
2035 i40e_status ret
= 0;
2036 u32 hash_lut_size
= 0;
2040 return I40E_ERR_PARAM
;
2042 /* Validate the input settings */
2043 ret
= i40e_validate_filter_settings(hw
, settings
);
2047 /* Read the PF Queue Filter control register */
2048 val
= rd32(hw
, I40E_PFQF_CTL_0
);
2050 /* Program required PE hash buckets for the PF */
2051 val
&= ~I40E_PFQF_CTL_0_PEHSIZE_MASK
;
2052 val
|= ((u32
)settings
->pe_filt_num
<< I40E_PFQF_CTL_0_PEHSIZE_SHIFT
) &
2053 I40E_PFQF_CTL_0_PEHSIZE_MASK
;
2054 /* Program required PE contexts for the PF */
2055 val
&= ~I40E_PFQF_CTL_0_PEDSIZE_MASK
;
2056 val
|= ((u32
)settings
->pe_cntx_num
<< I40E_PFQF_CTL_0_PEDSIZE_SHIFT
) &
2057 I40E_PFQF_CTL_0_PEDSIZE_MASK
;
2059 /* Program required FCoE hash buckets for the PF */
2060 val
&= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK
;
2061 val
|= ((u32
)settings
->fcoe_filt_num
<<
2062 I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT
) &
2063 I40E_PFQF_CTL_0_PFFCHSIZE_MASK
;
2064 /* Program required FCoE DDP contexts for the PF */
2065 val
&= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK
;
2066 val
|= ((u32
)settings
->fcoe_cntx_num
<<
2067 I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT
) &
2068 I40E_PFQF_CTL_0_PFFCDSIZE_MASK
;
2070 /* Program Hash LUT size for the PF */
2071 val
&= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK
;
2072 if (settings
->hash_lut_size
== I40E_HASH_LUT_SIZE_512
)
2074 val
|= (hash_lut_size
<< I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT
) &
2075 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK
;
2077 /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2078 if (settings
->enable_fdir
)
2079 val
|= I40E_PFQF_CTL_0_FD_ENA_MASK
;
2080 if (settings
->enable_ethtype
)
2081 val
|= I40E_PFQF_CTL_0_ETYPE_ENA_MASK
;
2082 if (settings
->enable_macvlan
)
2083 val
|= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK
;
2085 wr32(hw
, I40E_PFQF_CTL_0
, val
);
2090 * i40e_set_pci_config_data - store PCI bus info
2091 * @hw: pointer to hardware structure
2092 * @link_status: the link status word from PCI config space
2094 * Stores the PCI bus info (speed, width, type) within the i40e_hw structure
2096 void i40e_set_pci_config_data(struct i40e_hw
*hw
, u16 link_status
)
2098 hw
->bus
.type
= i40e_bus_type_pci_express
;
2100 switch (link_status
& PCI_EXP_LNKSTA_NLW
) {
2101 case PCI_EXP_LNKSTA_NLW_X1
:
2102 hw
->bus
.width
= i40e_bus_width_pcie_x1
;
2104 case PCI_EXP_LNKSTA_NLW_X2
:
2105 hw
->bus
.width
= i40e_bus_width_pcie_x2
;
2107 case PCI_EXP_LNKSTA_NLW_X4
:
2108 hw
->bus
.width
= i40e_bus_width_pcie_x4
;
2110 case PCI_EXP_LNKSTA_NLW_X8
:
2111 hw
->bus
.width
= i40e_bus_width_pcie_x8
;
2114 hw
->bus
.width
= i40e_bus_width_unknown
;
2118 switch (link_status
& PCI_EXP_LNKSTA_CLS
) {
2119 case PCI_EXP_LNKSTA_CLS_2_5GB
:
2120 hw
->bus
.speed
= i40e_bus_speed_2500
;
2122 case PCI_EXP_LNKSTA_CLS_5_0GB
:
2123 hw
->bus
.speed
= i40e_bus_speed_5000
;
2125 case PCI_EXP_LNKSTA_CLS_8_0GB
:
2126 hw
->bus
.speed
= i40e_bus_speed_8000
;
2129 hw
->bus
.speed
= i40e_bus_speed_unknown
;